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   1 /*
   2 =========================================================================
   3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
   4  --------------------------------------------------------------------
   5
   6  History:
   7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
   8  May 20 2002    - Add link status force-mode and TBI mode support.
   9         2004    - Massive updates. See kernel SCM system for details.
  10 =========================================================================
  11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
  12          Command: 'insmod r8169 media = SET_MEDIA'
  13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
  14
  15          SET_MEDIA can be:
  16                 _10_Half        = 0x01
  17                 _10_Full        = 0x02
  18                 _100_Half       = 0x04
  19                 _100_Full       = 0x08
  20                 _1000_Full      = 0x10
  21
  22   2. Support TBI mode.
  23 =========================================================================
  24 VERSION 1.1     <2002/10/4>
  25
  26         The bit4:0 of MII register 4 is called "selector field", and have to be
  27         00001b to indicate support of IEEE std 802.3 during NWay process of
  28         exchanging Link Code Word (FLP).
  29
  30 VERSION 1.2     <2002/11/30>
  31
  32         - Large style cleanup
  33         - Use ether_crc in stock kernel (linux/crc32.h)
  34         - Copy mc_filter setup code from 8139cp
  35           (includes an optimization, and avoids set_bit use)
  36
  37 VERSION 1.6LK   <2004/04/14>
  38
  39         - Merge of Realtek's version 1.6
  40         - Conversion to DMA API
  41         - Suspend/resume
  42         - Endianness
  43         - Misc Rx/Tx bugs
  44
  45 VERSION 2.2LK   <2005/01/25>
  46
  47         - RX csum, TX csum/SG, TSO
  48         - VLAN
  49         - baby (< 7200) Jumbo frames support
  50         - Merge of Realtek's version 2.2 (new phy)
  51  */
  52
  53 #include <linux/module.h>
  54 #include <linux/moduleparam.h>
  55 #include <linux/pci.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/etherdevice.h>
  58 #include <linux/delay.h>
  59 #include <linux/ethtool.h>
  60 #include <linux/mii.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/crc32.h>
  63 #include <linux/in.h>
  64 #include <linux/ip.h>
  65 #include <linux/tcp.h>
  66 #include <linux/init.h>
  67 #include <linux/dma-mapping.h>
  68
  69 #include <asm/io.h>
  70 #include <asm/irq.h>
  71
  72 #ifdef CONFIG_R8169_NAPI
  73 #define NAPI_SUFFIX     "-NAPI"
  74 #else
  75 #define NAPI_SUFFIX     ""
  76 #endif
  77
  78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
  79 #define MODULENAME "r8169"
  80 #define PFX MODULENAME ": "
  81
  82 #ifdef RTL8169_DEBUG
  83 #define assert(expr) \
  84         if (!(expr)) {                                  \
  85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
  86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
  87         }
  88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
  89 #else
  90 #define assert(expr) do {} while (0)
  91 #define dprintk(fmt, args...)   do {} while (0)
  92 #endif /* RTL8169_DEBUG */
  93
  94 #define R8169_MSG_DEFAULT \
  95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
  96
  97 #define TX_BUFFS_AVAIL(tp) \
  98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
  99
 100 #ifdef CONFIG_R8169_NAPI
 101 #define rtl8169_rx_skb                  netif_receive_skb
 102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
 103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
 104 #else
 105 #define rtl8169_rx_skb                  netif_rx
 106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
 107 #define rtl8169_rx_quota(count, quota)  count
 108 #endif
 109
 110 /* media options */
 111 #define MAX_UNITS 8
 112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 113 static int num_media = 0;
 114
 115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
 116 static const int max_interrupt_work = 20;
 117
 118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
 120 static const int multicast_filter_limit = 32;
 121
 122 /* MAC address length */
 123 #define MAC_ADDR_LEN    6
 124
 125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
 126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
 129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
 130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
 131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
 132
 133 #define R8169_REGS_SIZE         256
 134 #define R8169_NAPI_WEIGHT       64
 135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
 136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
 137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
 138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
 139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
 140
 141 #define RTL8169_TX_TIMEOUT      (6*HZ)
 142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
 143
 144 /* write/read MMIO register */
 145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
 146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
 147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
 148 #define RTL_R8(reg)             readb (ioaddr + (reg))
 149 #define RTL_R16(reg)            readw (ioaddr + (reg))
 150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
 151
 152 enum mac_version {
 153         RTL_GIGA_MAC_VER_01 = 0x00,
 154         RTL_GIGA_MAC_VER_02 = 0x01,
 155         RTL_GIGA_MAC_VER_03 = 0x02,
 156         RTL_GIGA_MAC_VER_04 = 0x03,
 157         RTL_GIGA_MAC_VER_05 = 0x04,
 158         RTL_GIGA_MAC_VER_11 = 0x0b,
 159         RTL_GIGA_MAC_VER_12 = 0x0c,
 160         RTL_GIGA_MAC_VER_13 = 0x0d,
 161         RTL_GIGA_MAC_VER_14 = 0x0e,
 162         RTL_GIGA_MAC_VER_15 = 0x0f
 163 };
 164
 165 enum phy_version {
 166         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 167         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 168         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 169         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
 170         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
 171         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
 172 };
 173
 174 #define _R(NAME,MAC,MASK) \
 175         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
 176
 177 static const struct {
 178         const char *name;
 179         u8 mac_version;
 180         u32 RxConfigMask;       /* Clears the bits supported by this chip */
 181 } rtl_chip_info[] = {
 182         _R("RTL8169",           RTL_GIGA_MAC_VER_01, 0xff7e1880),
 183         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_02, 0xff7e1880),
 184         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_03, 0xff7e1880),
 185         _R("RTL8169sb/8110sb",  RTL_GIGA_MAC_VER_04, 0xff7e1880),
 186         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_05, 0xff7e1880),
 187         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
 188         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
 189         _R("RTL8101e",          RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
 190         _R("RTL8100e",          RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
 191         _R("RTL8100e",          RTL_GIGA_MAC_VER_15, 0xff7e1880)  // PCI-E 8139
 192 };
 193 #undef _R
 194
 195 enum cfg_version {
 196         RTL_CFG_0 = 0x00,
 197         RTL_CFG_1,
 198         RTL_CFG_2
 199 };
 200
 201 static const struct {
 202         unsigned int region;
 203         unsigned int align;
 204 } rtl_cfg_info[] = {
 205         [RTL_CFG_0] = { 1, NET_IP_ALIGN },
 206         [RTL_CFG_1] = { 2, NET_IP_ALIGN },
 207         [RTL_CFG_2] = { 2, 8 }
 208 };
 209
 210 static struct pci_device_id rtl8169_pci_tbl[] = {
 211         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8129), 0, 0, RTL_CFG_0 },
 212         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8136), 0, 0, RTL_CFG_2 },
 213         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8167), 0, 0, RTL_CFG_0 },
 214         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8168), 0, 0, RTL_CFG_2 },
 215         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), 0, 0, RTL_CFG_0 },
 216         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), 0, 0, RTL_CFG_0 },
 217         { PCI_DEVICE(0x1259,                    0xc107), 0, 0, RTL_CFG_0 },
 218         { PCI_DEVICE(0x16ec,                    0x0116), 0, 0, RTL_CFG_0 },
 219         { PCI_VENDOR_ID_LINKSYS,                0x1032,
 220                 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
 221         {0,},
 222 };
 223
 224 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
 225
 226 static int rx_copybreak = 200;
 227 static int use_dac;
 228 static struct {
 229         u32 msg_enable;
 230 } debug = { -1 };
 231
 232 enum RTL8169_registers {
 233         MAC0 = 0,               /* Ethernet hardware address. */
 234         MAR0 = 8,               /* Multicast filter. */
 235         CounterAddrLow = 0x10,
 236         CounterAddrHigh = 0x14,
 237         TxDescStartAddrLow = 0x20,
 238         TxDescStartAddrHigh = 0x24,
 239         TxHDescStartAddrLow = 0x28,
 240         TxHDescStartAddrHigh = 0x2c,
 241         FLASH = 0x30,
 242         ERSR = 0x36,
 243         ChipCmd = 0x37,
 244         TxPoll = 0x38,
 245         IntrMask = 0x3C,
 246         IntrStatus = 0x3E,
 247         TxConfig = 0x40,
 248         RxConfig = 0x44,
 249         RxMissed = 0x4C,
 250         Cfg9346 = 0x50,
 251         Config0 = 0x51,
 252         Config1 = 0x52,
 253         Config2 = 0x53,
 254         Config3 = 0x54,
 255         Config4 = 0x55,
 256         Config5 = 0x56,
 257         MultiIntr = 0x5C,
 258         PHYAR = 0x60,
 259         TBICSR = 0x64,
 260         TBI_ANAR = 0x68,
 261         TBI_LPAR = 0x6A,
 262         PHYstatus = 0x6C,
 263         RxMaxSize = 0xDA,
 264         CPlusCmd = 0xE0,
 265         IntrMitigate = 0xE2,
 266         RxDescAddrLow = 0xE4,
 267         RxDescAddrHigh = 0xE8,
 268         EarlyTxThres = 0xEC,
 269         FuncEvent = 0xF0,
 270         FuncEventMask = 0xF4,
 271         FuncPresetState = 0xF8,
 272         FuncForceEvent = 0xFC,
 273 };
 274
 275 enum RTL8169_register_content {
 276         /* InterruptStatusBits */
 277         SYSErr = 0x8000,
 278         PCSTimeout = 0x4000,
 279         SWInt = 0x0100,
 280         TxDescUnavail = 0x80,
 281         RxFIFOOver = 0x40,
 282         LinkChg = 0x20,
 283         RxOverflow = 0x10,
 284         TxErr = 0x08,
 285         TxOK = 0x04,
 286         RxErr = 0x02,
 287         RxOK = 0x01,
 288
 289         /* RxStatusDesc */
 290         RxFOVF  = (1 << 23),
 291         RxRWT   = (1 << 22),
 292         RxRES   = (1 << 21),
 293         RxRUNT  = (1 << 20),
 294         RxCRC   = (1 << 19),
 295
 296         /* ChipCmdBits */
 297         CmdReset = 0x10,
 298         CmdRxEnb = 0x08,
 299         CmdTxEnb = 0x04,
 300         RxBufEmpty = 0x01,
 301
 302         /* Cfg9346Bits */
 303         Cfg9346_Lock = 0x00,
 304         Cfg9346_Unlock = 0xC0,
 305
 306         /* rx_mode_bits */
 307         AcceptErr = 0x20,
 308         AcceptRunt = 0x10,
 309         AcceptBroadcast = 0x08,
 310         AcceptMulticast = 0x04,
 311         AcceptMyPhys = 0x02,
 312         AcceptAllPhys = 0x01,
 313
 314         /* RxConfigBits */
 315         RxCfgFIFOShift = 13,
 316         RxCfgDMAShift = 8,
 317
 318         /* TxConfigBits */
 319         TxInterFrameGapShift = 24,
 320         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
 321
 322         /* Config1 register p.24 */
 323         PMEnable        = (1 << 0),     /* Power Management Enable */
 324
 325         /* Config3 register p.25 */
 326         MagicPacket     = (1 << 5),     /* Wake up when receives a Magic Packet */
 327         LinkUp          = (1 << 4),     /* Wake up when the cable connection is re-established */
 328
 329         /* Config5 register p.27 */
 330         BWF             = (1 << 6),     /* Accept Broadcast wakeup frame */
 331         MWF             = (1 << 5),     /* Accept Multicast wakeup frame */
 332         UWF             = (1 << 4),     /* Accept Unicast wakeup frame */
 333         LanWake         = (1 << 1),     /* LanWake enable/disable */
 334         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
 335
 336         /* TBICSR p.28 */
 337         TBIReset        = 0x80000000,
 338         TBILoopback     = 0x40000000,
 339         TBINwEnable     = 0x20000000,
 340         TBINwRestart    = 0x10000000,
 341         TBILinkOk       = 0x02000000,
 342         TBINwComplete   = 0x01000000,
 343
 344         /* CPlusCmd p.31 */
 345         RxVlan          = (1 << 6),
 346         RxChkSum        = (1 << 5),
 347         PCIDAC          = (1 << 4),
 348         PCIMulRW        = (1 << 3),
 349
 350         /* rtl8169_PHYstatus */
 351         TBI_Enable = 0x80,
 352         TxFlowCtrl = 0x40,
 353         RxFlowCtrl = 0x20,
 354         _1000bpsF = 0x10,
 355         _100bps = 0x08,
 356         _10bps = 0x04,
 357         LinkStatus = 0x02,
 358         FullDup = 0x01,
 359
 360         /* _MediaType */
 361         _10_Half = 0x01,
 362         _10_Full = 0x02,
 363         _100_Half = 0x04,
 364         _100_Full = 0x08,
 365         _1000_Full = 0x10,
 366
 367         /* _TBICSRBit */
 368         TBILinkOK = 0x02000000,
 369
 370         /* DumpCounterCommand */
 371         CounterDump = 0x8,
 372 };
 373
 374 enum _DescStatusBit {
 375         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
 376         RingEnd         = (1 << 30), /* End of descriptor ring */
 377         FirstFrag       = (1 << 29), /* First segment of a packet */
 378         LastFrag        = (1 << 28), /* Final segment of a packet */
 379
 380         /* Tx private */
 381         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
 382         MSSShift        = 16,        /* MSS value position */
 383         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
 384         IPCS            = (1 << 18), /* Calculate IP checksum */
 385         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
 386         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
 387         TxVlanTag       = (1 << 17), /* Add VLAN tag */
 388
 389         /* Rx private */
 390         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
 391         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
 392
 393 #define RxProtoUDP      (PID1)
 394 #define RxProtoTCP      (PID0)
 395 #define RxProtoIP       (PID1 | PID0)
 396 #define RxProtoMask     RxProtoIP
 397
 398         IPFail          = (1 << 16), /* IP checksum failed */
 399         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
 400         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
 401         RxVlanTag       = (1 << 16), /* VLAN tag available */
 402 };
 403
 404 #define RsvdMask        0x3fffc000
 405
 406 struct TxDesc {
 407         u32 opts1;
 408         u32 opts2;
 409         u64 addr;
 410 };
 411
 412 struct RxDesc {
 413         u32 opts1;
 414         u32 opts2;
 415         u64 addr;
 416 };
 417
 418 struct ring_info {
 419         struct sk_buff  *skb;
 420         u32             len;
 421         u8              __pad[sizeof(void *) - sizeof(u32)];
 422 };
 423
 424 struct rtl8169_private {
 425         void __iomem *mmio_addr;        /* memory map physical address */
 426         struct pci_dev *pci_dev;        /* Index of PCI device */
 427         struct net_device *dev;
 428         struct net_device_stats stats;  /* statistics of net device */
 429         spinlock_t lock;                /* spin lock flag */
 430         u32 msg_enable;
 431         int chipset;
 432         int mac_version;
 433         int phy_version;
 434         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
 435         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
 436         u32 dirty_rx;
 437         u32 dirty_tx;
 438         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
 439         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
 440         dma_addr_t TxPhyAddr;
 441         dma_addr_t RxPhyAddr;
 442         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
 443         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
 444         unsigned align;
 445         unsigned rx_buf_sz;
 446         struct timer_list timer;
 447         u16 cp_cmd;
 448         u16 intr_mask;
 449         int phy_auto_nego_reg;
 450         int phy_1000_ctrl_reg;
 451 #ifdef CONFIG_R8169_VLAN
 452         struct vlan_group *vlgrp;
 453 #endif
 454         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
 455         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
 456         void (*phy_reset_enable)(void __iomem *);
 457         unsigned int (*phy_reset_pending)(void __iomem *);
 458         unsigned int (*link_ok)(void __iomem *);
 459         struct delayed_work task;
 460         unsigned wol_enabled : 1;
 461 };
 462
 463 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
 464 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
 465 module_param_array(media, int, &num_media, 0);
 466 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
 467 module_param(rx_copybreak, int, 0);
 468 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
 469 module_param(use_dac, int, 0);
 470 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
 471 module_param_named(debug, debug.msg_enable, int, 0);
 472 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
 473 MODULE_LICENSE("GPL");
 474 MODULE_VERSION(RTL8169_VERSION);
 475
 476 static int rtl8169_open(struct net_device *dev);
 477 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
 478 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance);
 479 static int rtl8169_init_ring(struct net_device *dev);
 480 static void rtl8169_hw_start(struct net_device *dev);
 481 static int rtl8169_close(struct net_device *dev);
 482 static void rtl8169_set_rx_mode(struct net_device *dev);
 483 static void rtl8169_tx_timeout(struct net_device *dev);
 484 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
 485 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
 486                                 void __iomem *);
 487 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
 488 static void rtl8169_down(struct net_device *dev);
 489
 490 #ifdef CONFIG_R8169_NAPI
 491 static int rtl8169_poll(struct net_device *dev, int *budget);
 492 #endif
 493
 494 static const u16 rtl8169_intr_mask =
 495         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
 496 static const u16 rtl8169_napi_event =
 497         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
 498 static const unsigned int rtl8169_rx_config =
 499         (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 500
 501 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
 502 {
 503         int i;
 504
 505         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
 506
 507         for (i = 20; i > 0; i--) {
 508                 /* Check if the RTL8169 has completed writing to the specified MII register */
 509                 if (!(RTL_R32(PHYAR) & 0x80000000))
 510                         break;
 511                 udelay(25);
 512         }
 513 }
 514
 515 static int mdio_read(void __iomem *ioaddr, int RegAddr)
 516 {
 517         int i, value = -1;
 518
 519         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
 520
 521         for (i = 20; i > 0; i--) {
 522                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
 523                 if (RTL_R32(PHYAR) & 0x80000000) {
 524                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
 525                         break;
 526                 }
 527                 udelay(25);
 528         }
 529         return value;
 530 }
 531
 532 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
 533 {
 534         RTL_W16(IntrMask, 0x0000);
 535
 536         RTL_W16(IntrStatus, 0xffff);
 537 }
 538
 539 static void rtl8169_asic_down(void __iomem *ioaddr)
 540 {
 541         RTL_W8(ChipCmd, 0x00);
 542         rtl8169_irq_mask_and_ack(ioaddr);
 543         RTL_R16(CPlusCmd);
 544 }
 545
 546 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
 547 {
 548         return RTL_R32(TBICSR) & TBIReset;
 549 }
 550
 551 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
 552 {
 553         return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET;
 554 }
 555
 556 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
 557 {
 558         return RTL_R32(TBICSR) & TBILinkOk;
 559 }
 560
 561 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
 562 {
 563         return RTL_R8(PHYstatus) & LinkStatus;
 564 }
 565
 566 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
 567 {
 568         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
 569 }
 570
 571 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
 572 {
 573         unsigned int val;
 574
 575         val = mdio_read(ioaddr, MII_BMCR) | BMCR_RESET;
 576         mdio_write(ioaddr, MII_BMCR, val & 0xffff);
 577 }
 578
 579 static void rtl8169_check_link_status(struct net_device *dev,
 580                                       struct rtl8169_private *tp, void __iomem *ioaddr)
 581 {
 582         unsigned long flags;
 583
 584         spin_lock_irqsave(&tp->lock, flags);
 585         if (tp->link_ok(ioaddr)) {
 586                 netif_carrier_on(dev);
 587                 if (netif_msg_ifup(tp))
 588                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
 589         } else {
 590                 if (netif_msg_ifdown(tp))
 591                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
 592                 netif_carrier_off(dev);
 593         }
 594         spin_unlock_irqrestore(&tp->lock, flags);
 595 }
 596
 597 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
 598 {
 599         struct {
 600                 u16 speed;
 601                 u8 duplex;
 602                 u8 autoneg;
 603                 u8 media;
 604         } link_settings[] = {
 605                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
 606                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
 607                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
 608                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
 609                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
 610                 /* Make TBI happy */
 611                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
 612         }, *p;
 613         unsigned char option;
 614
 615         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
 616
 617         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
 618                 printk(KERN_WARNING PFX "media option is deprecated.\n");
 619
 620         for (p = link_settings; p->media != 0xff; p++) {
 621                 if (p->media == option)
 622                         break;
 623         }
 624         *autoneg = p->autoneg;
 625         *speed = p->speed;
 626         *duplex = p->duplex;
 627 }
 628
 629 static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 630 {
 631         struct rtl8169_private *tp = netdev_priv(dev);
 632         void __iomem *ioaddr = tp->mmio_addr;
 633         u8 options;
 634
 635         wol->wolopts = 0;
 636
 637 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
 638         wol->supported = WAKE_ANY;
 639
 640         spin_lock_irq(&tp->lock);
 641
 642         options = RTL_R8(Config1);
 643         if (!(options & PMEnable))
 644                 goto out_unlock;
 645
 646         options = RTL_R8(Config3);
 647         if (options & LinkUp)
 648                 wol->wolopts |= WAKE_PHY;
 649         if (options & MagicPacket)
 650                 wol->wolopts |= WAKE_MAGIC;
 651
 652         options = RTL_R8(Config5);
 653         if (options & UWF)
 654                 wol->wolopts |= WAKE_UCAST;
 655         if (options & BWF)
 656                 wol->wolopts |= WAKE_BCAST;
 657         if (options & MWF)
 658                 wol->wolopts |= WAKE_MCAST;
 659
 660 out_unlock:
 661         spin_unlock_irq(&tp->lock);
 662 }
 663
 664 static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 665 {
 666         struct rtl8169_private *tp = netdev_priv(dev);
 667         void __iomem *ioaddr = tp->mmio_addr;
 668         int i;
 669         static struct {
 670                 u32 opt;
 671                 u16 reg;
 672                 u8  mask;
 673         } cfg[] = {
 674                 { WAKE_ANY,   Config1, PMEnable },
 675                 { WAKE_PHY,   Config3, LinkUp },
 676                 { WAKE_MAGIC, Config3, MagicPacket },
 677                 { WAKE_UCAST, Config5, UWF },
 678                 { WAKE_BCAST, Config5, BWF },
 679                 { WAKE_MCAST, Config5, MWF },
 680                 { WAKE_ANY,   Config5, LanWake }
 681         };
 682
 683         spin_lock_irq(&tp->lock);
 684
 685         RTL_W8(Cfg9346, Cfg9346_Unlock);
 686
 687         for (i = 0; i < ARRAY_SIZE(cfg); i++) {
 688                 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
 689                 if (wol->wolopts & cfg[i].opt)
 690                         options |= cfg[i].mask;
 691                 RTL_W8(cfg[i].reg, options);
 692         }
 693
 694         RTL_W8(Cfg9346, Cfg9346_Lock);
 695
 696         tp->wol_enabled = (wol->wolopts) ? 1 : 0;
 697
 698         spin_unlock_irq(&tp->lock);
 699
 700         return 0;
 701 }
 702
 703 static void rtl8169_get_drvinfo(struct net_device *dev,
 704                                 struct ethtool_drvinfo *info)
 705 {
 706         struct rtl8169_private *tp = netdev_priv(dev);
 707
 708         strcpy(info->driver, MODULENAME);
 709         strcpy(info->version, RTL8169_VERSION);
 710         strcpy(info->bus_info, pci_name(tp->pci_dev));
 711 }
 712
 713 static int rtl8169_get_regs_len(struct net_device *dev)
 714 {
 715         return R8169_REGS_SIZE;
 716 }
 717
 718 static int rtl8169_set_speed_tbi(struct net_device *dev,
 719                                  u8 autoneg, u16 speed, u8 duplex)
 720 {
 721         struct rtl8169_private *tp = netdev_priv(dev);
 722         void __iomem *ioaddr = tp->mmio_addr;
 723         int ret = 0;
 724         u32 reg;
 725
 726         reg = RTL_R32(TBICSR);
 727         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
 728             (duplex == DUPLEX_FULL)) {
 729                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
 730         } else if (autoneg == AUTONEG_ENABLE)
 731                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
 732         else {
 733                 if (netif_msg_link(tp)) {
 734                         printk(KERN_WARNING "%s: "
 735                                "incorrect speed setting refused in TBI mode\n",
 736                                dev->name);
 737                 }
 738                 ret = -EOPNOTSUPP;
 739         }
 740
 741         return ret;
 742 }
 743
 744 static int rtl8169_set_speed_xmii(struct net_device *dev,
 745                                   u8 autoneg, u16 speed, u8 duplex)
 746 {
 747         struct rtl8169_private *tp = netdev_priv(dev);
 748         void __iomem *ioaddr = tp->mmio_addr;
 749         int auto_nego, giga_ctrl;
 750
 751         auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
 752         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
 753                        ADVERTISE_100HALF | ADVERTISE_100FULL);
 754         giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
 755         giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 756
 757         if (autoneg == AUTONEG_ENABLE) {
 758                 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
 759                               ADVERTISE_100HALF | ADVERTISE_100FULL);
 760                 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 761         } else {
 762                 if (speed == SPEED_10)
 763                         auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 764                 else if (speed == SPEED_100)
 765                         auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 766                 else if (speed == SPEED_1000)
 767                         giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 768
 769                 if (duplex == DUPLEX_HALF)
 770                         auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
 771
 772                 if (duplex == DUPLEX_FULL)
 773                         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
 774
 775                 /* This tweak comes straight from Realtek's driver. */
 776                 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
 777                     (tp->mac_version == RTL_GIGA_MAC_VER_13)) {
 778                         auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
 779                 }
 780         }
 781
 782         /* The 8100e/8101e do Fast Ethernet only. */
 783         if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
 784             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
 785             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
 786                 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
 787                     netif_msg_link(tp)) {
 788                         printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
 789                                dev->name);
 790                 }
 791                 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 792         }
 793
 794         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 795
 796         tp->phy_auto_nego_reg = auto_nego;
 797         tp->phy_1000_ctrl_reg = giga_ctrl;
 798
 799         mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
 800         mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
 801         mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
 802         return 0;
 803 }
 804
 805 static int rtl8169_set_speed(struct net_device *dev,
 806                              u8 autoneg, u16 speed, u8 duplex)
 807 {
 808         struct rtl8169_private *tp = netdev_priv(dev);
 809         int ret;
 810
 811         ret = tp->set_speed(dev, autoneg, speed, duplex);
 812
 813         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
 814                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
 815
 816         return ret;
 817 }
 818
 819 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 820 {
 821         struct rtl8169_private *tp = netdev_priv(dev);
 822         unsigned long flags;
 823         int ret;
 824
 825         spin_lock_irqsave(&tp->lock, flags);
 826         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
 827         spin_unlock_irqrestore(&tp->lock, flags);
 828
 829         return ret;
 830 }
 831
 832 static u32 rtl8169_get_rx_csum(struct net_device *dev)
 833 {
 834         struct rtl8169_private *tp = netdev_priv(dev);
 835
 836         return tp->cp_cmd & RxChkSum;
 837 }
 838
 839 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
 840 {
 841         struct rtl8169_private *tp = netdev_priv(dev);
 842         void __iomem *ioaddr = tp->mmio_addr;
 843         unsigned long flags;
 844
 845         spin_lock_irqsave(&tp->lock, flags);
 846
 847         if (data)
 848                 tp->cp_cmd |= RxChkSum;
 849         else
 850                 tp->cp_cmd &= ~RxChkSum;
 851
 852         RTL_W16(CPlusCmd, tp->cp_cmd);
 853         RTL_R16(CPlusCmd);
 854
 855         spin_unlock_irqrestore(&tp->lock, flags);
 856
 857         return 0;
 858 }
 859
 860 #ifdef CONFIG_R8169_VLAN
 861
 862 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 863                                       struct sk_buff *skb)
 864 {
 865         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
 866                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
 867 }
 868
 869 static void rtl8169_vlan_rx_register(struct net_device *dev,
 870                                      struct vlan_group *grp)
 871 {
 872         struct rtl8169_private *tp = netdev_priv(dev);
 873         void __iomem *ioaddr = tp->mmio_addr;
 874         unsigned long flags;
 875
 876         spin_lock_irqsave(&tp->lock, flags);
 877         tp->vlgrp = grp;
 878         if (tp->vlgrp)
 879                 tp->cp_cmd |= RxVlan;
 880         else
 881                 tp->cp_cmd &= ~RxVlan;
 882         RTL_W16(CPlusCmd, tp->cp_cmd);
 883         RTL_R16(CPlusCmd);
 884         spin_unlock_irqrestore(&tp->lock, flags);
 885 }
 886
 887 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
 888 {
 889         struct rtl8169_private *tp = netdev_priv(dev);
 890         unsigned long flags;
 891
 892         spin_lock_irqsave(&tp->lock, flags);
 893         vlan_group_set_device(tp->vlgrp, vid, NULL);
 894         spin_unlock_irqrestore(&tp->lock, flags);
 895 }
 896
 897 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 898                                struct sk_buff *skb)
 899 {
 900         u32 opts2 = le32_to_cpu(desc->opts2);
 901         int ret;
 902
 903         if (tp->vlgrp && (opts2 & RxVlanTag)) {
 904                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
 905                                        swab16(opts2 & 0xffff));
 906                 ret = 0;
 907         } else
 908                 ret = -1;
 909         desc->opts2 = 0;
 910         return ret;
 911 }
 912
 913 #else /* !CONFIG_R8169_VLAN */
 914
 915 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 916                                       struct sk_buff *skb)
 917 {
 918         return 0;
 919 }
 920
 921 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 922                                struct sk_buff *skb)
 923 {
 924         return -1;
 925 }
 926
 927 #endif
 928
 929 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
 930 {
 931         struct rtl8169_private *tp = netdev_priv(dev);
 932         void __iomem *ioaddr = tp->mmio_addr;
 933         u32 status;
 934
 935         cmd->supported =
 936                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
 937         cmd->port = PORT_FIBRE;
 938         cmd->transceiver = XCVR_INTERNAL;
 939
 940         status = RTL_R32(TBICSR);
 941         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
 942         cmd->autoneg = !!(status & TBINwEnable);
 943
 944         cmd->speed = SPEED_1000;
 945         cmd->duplex = DUPLEX_FULL; /* Always set */
 946 }
 947
 948 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
 949 {
 950         struct rtl8169_private *tp = netdev_priv(dev);
 951         void __iomem *ioaddr = tp->mmio_addr;
 952         u8 status;
 953
 954         cmd->supported = SUPPORTED_10baseT_Half |
 955                          SUPPORTED_10baseT_Full |
 956                          SUPPORTED_100baseT_Half |
 957                          SUPPORTED_100baseT_Full |
 958                          SUPPORTED_1000baseT_Full |
 959                          SUPPORTED_Autoneg |
 960                          SUPPORTED_TP;
 961
 962         cmd->autoneg = 1;
 963         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
 964
 965         if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
 966                 cmd->advertising |= ADVERTISED_10baseT_Half;
 967         if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
 968                 cmd->advertising |= ADVERTISED_10baseT_Full;
 969         if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
 970                 cmd->advertising |= ADVERTISED_100baseT_Half;
 971         if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
 972                 cmd->advertising |= ADVERTISED_100baseT_Full;
 973         if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
 974                 cmd->advertising |= ADVERTISED_1000baseT_Full;
 975
 976         status = RTL_R8(PHYstatus);
 977
 978         if (status & _1000bpsF)
 979                 cmd->speed = SPEED_1000;
 980         else if (status & _100bps)
 981                 cmd->speed = SPEED_100;
 982         else if (status & _10bps)
 983                 cmd->speed = SPEED_10;
 984
 985         if (status & TxFlowCtrl)
 986                 cmd->advertising |= ADVERTISED_Asym_Pause;
 987         if (status & RxFlowCtrl)
 988                 cmd->advertising |= ADVERTISED_Pause;
 989
 990         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
 991                       DUPLEX_FULL : DUPLEX_HALF;
 992 }
 993
 994 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 995 {
 996         struct rtl8169_private *tp = netdev_priv(dev);
 997         unsigned long flags;
 998
 999         spin_lock_irqsave(&tp->lock, flags);
1000
1001         tp->get_settings(dev, cmd);
1002
1003         spin_unlock_irqrestore(&tp->lock, flags);
1004         return 0;
1005 }
1006
1007 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1008                              void *p)
1009 {
1010         struct rtl8169_private *tp = netdev_priv(dev);
1011         unsigned long flags;
1012
1013         if (regs->len > R8169_REGS_SIZE)
1014                 regs->len = R8169_REGS_SIZE;
1015
1016         spin_lock_irqsave(&tp->lock, flags);
1017         memcpy_fromio(p, tp->mmio_addr, regs->len);
1018         spin_unlock_irqrestore(&tp->lock, flags);
1019 }
1020
1021 static u32 rtl8169_get_msglevel(struct net_device *dev)
1022 {
1023         struct rtl8169_private *tp = netdev_priv(dev);
1024
1025         return tp->msg_enable;
1026 }
1027
1028 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1029 {
1030         struct rtl8169_private *tp = netdev_priv(dev);
1031
1032         tp->msg_enable = value;
1033 }
1034
1035 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1036         "tx_packets",
1037         "rx_packets",
1038         "tx_errors",
1039         "rx_errors",
1040         "rx_missed",
1041         "align_errors",
1042         "tx_single_collisions",
1043         "tx_multi_collisions",
1044         "unicast",
1045         "broadcast",
1046         "multicast",
1047         "tx_aborted",
1048         "tx_underrun",
1049 };
1050
1051 struct rtl8169_counters {
1052         u64     tx_packets;
1053         u64     rx_packets;
1054         u64     tx_errors;
1055         u32     rx_errors;
1056         u16     rx_missed;
1057         u16     align_errors;
1058         u32     tx_one_collision;
1059         u32     tx_multi_collision;
1060         u64     rx_unicast;
1061         u64     rx_broadcast;
1062         u32     rx_multicast;
1063         u16     tx_aborted;
1064         u16     tx_underun;
1065 };
1066
1067 static int rtl8169_get_stats_count(struct net_device *dev)
1068 {
1069         return ARRAY_SIZE(rtl8169_gstrings);
1070 }
1071
1072 static void rtl8169_get_ethtool_stats(struct net_device *dev,
1073                                       struct ethtool_stats *stats, u64 *data)
1074 {
1075         struct rtl8169_private *tp = netdev_priv(dev);
1076         void __iomem *ioaddr = tp->mmio_addr;
1077         struct rtl8169_counters *counters;
1078         dma_addr_t paddr;
1079         u32 cmd;
1080
1081         ASSERT_RTNL();
1082
1083         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
1084         if (!counters)
1085                 return;
1086
1087         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1088         cmd = (u64)paddr & DMA_32BIT_MASK;
1089         RTL_W32(CounterAddrLow, cmd);
1090         RTL_W32(CounterAddrLow, cmd | CounterDump);
1091
1092         while (RTL_R32(CounterAddrLow) & CounterDump) {
1093                 if (msleep_interruptible(1))
1094                         break;
1095         }
1096
1097         RTL_W32(CounterAddrLow, 0);
1098         RTL_W32(CounterAddrHigh, 0);
1099
1100         data[0] = le64_to_cpu(counters->tx_packets);
1101         data[1] = le64_to_cpu(counters->rx_packets);
1102         data[2] = le64_to_cpu(counters->tx_errors);
1103         data[3] = le32_to_cpu(counters->rx_errors);
1104         data[4] = le16_to_cpu(counters->rx_missed);
1105         data[5] = le16_to_cpu(counters->align_errors);
1106         data[6] = le32_to_cpu(counters->tx_one_collision);
1107         data[7] = le32_to_cpu(counters->tx_multi_collision);
1108         data[8] = le64_to_cpu(counters->rx_unicast);
1109         data[9] = le64_to_cpu(counters->rx_broadcast);
1110         data[10] = le32_to_cpu(counters->rx_multicast);
1111         data[11] = le16_to_cpu(counters->tx_aborted);
1112         data[12] = le16_to_cpu(counters->tx_underun);
1113
1114         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1115 }
1116
1117 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1118 {
1119         switch(stringset) {
1120         case ETH_SS_STATS:
1121                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1122                 break;
1123         }
1124 }
1125
1126
1127 static const struct ethtool_ops rtl8169_ethtool_ops = {
1128         .get_drvinfo            = rtl8169_get_drvinfo,
1129         .get_regs_len           = rtl8169_get_regs_len,
1130         .get_link               = ethtool_op_get_link,
1131         .get_settings           = rtl8169_get_settings,
1132         .set_settings           = rtl8169_set_settings,
1133         .get_msglevel           = rtl8169_get_msglevel,
1134         .set_msglevel           = rtl8169_set_msglevel,
1135         .get_rx_csum            = rtl8169_get_rx_csum,
1136         .set_rx_csum            = rtl8169_set_rx_csum,
1137         .get_tx_csum            = ethtool_op_get_tx_csum,
1138         .set_tx_csum            = ethtool_op_set_tx_csum,
1139         .get_sg                 = ethtool_op_get_sg,
1140         .set_sg                 = ethtool_op_set_sg,
1141         .get_tso                = ethtool_op_get_tso,
1142         .set_tso                = ethtool_op_set_tso,
1143         .get_regs               = rtl8169_get_regs,
1144         .get_wol                = rtl8169_get_wol,
1145         .set_wol                = rtl8169_set_wol,
1146         .get_strings            = rtl8169_get_strings,
1147         .get_stats_count        = rtl8169_get_stats_count,
1148         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1149         .get_perm_addr          = ethtool_op_get_perm_addr,
1150 };
1151
1152 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1153                                        int bitval)
1154 {
1155         int val;
1156
1157         val = mdio_read(ioaddr, reg);
1158         val = (bitval == 1) ?
1159                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1160         mdio_write(ioaddr, reg, val & 0xffff);
1161 }
1162
1163 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1164 {
1165         const struct {
1166                 u32 mask;
1167                 int mac_version;
1168         } mac_info[] = {
1169                 { 0x38800000,   RTL_GIGA_MAC_VER_15 },
1170                 { 0x38000000,   RTL_GIGA_MAC_VER_12 },
1171                 { 0x34000000,   RTL_GIGA_MAC_VER_13 },
1172                 { 0x30800000,   RTL_GIGA_MAC_VER_14 },
1173                 { 0x30000000,   RTL_GIGA_MAC_VER_11 },
1174                 { 0x18000000,   RTL_GIGA_MAC_VER_05 },
1175                 { 0x10000000,   RTL_GIGA_MAC_VER_04 },
1176                 { 0x04000000,   RTL_GIGA_MAC_VER_03 },
1177                 { 0x00800000,   RTL_GIGA_MAC_VER_02 },
1178                 { 0x00000000,   RTL_GIGA_MAC_VER_01 }   /* Catch-all */
1179         }, *p = mac_info;
1180         u32 reg;
1181
1182         reg = RTL_R32(TxConfig) & 0x7c800000;
1183         while ((reg & p->mask) != p->mask)
1184                 p++;
1185         tp->mac_version = p->mac_version;
1186 }
1187
1188 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1189 {
1190         dprintk("mac_version = 0x%02x\n", tp->mac_version);
1191 }
1192
1193 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1194 {
1195         const struct {
1196                 u16 mask;
1197                 u16 set;
1198                 int phy_version;
1199         } phy_info[] = {
1200                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1201                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1202                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1203                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1204         }, *p = phy_info;
1205         u16 reg;
1206
1207         reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff;
1208         while ((reg & p->mask) != p->set)
1209                 p++;
1210         tp->phy_version = p->phy_version;
1211 }
1212
1213 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1214 {
1215         struct {
1216                 int version;
1217                 char *msg;
1218                 u32 reg;
1219         } phy_print[] = {
1220                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1221                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1222                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1223                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1224                 { 0, NULL, 0x0000 }
1225         }, *p;
1226
1227         for (p = phy_print; p->msg; p++) {
1228                 if (tp->phy_version == p->version) {
1229                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1230                         return;
1231                 }
1232         }
1233         dprintk("phy_version == Unknown\n");
1234 }
1235
1236 static void rtl8169_hw_phy_config(struct net_device *dev)
1237 {
1238         struct rtl8169_private *tp = netdev_priv(dev);
1239         void __iomem *ioaddr = tp->mmio_addr;
1240         struct {
1241                 u16 regs[5]; /* Beware of bit-sign propagation */
1242         } phy_magic[5] = { {
1243                 { 0x0000,       //w 4 15 12 0
1244                   0x00a1,       //w 3 15 0 00a1
1245                   0x0008,       //w 2 15 0 0008
1246                   0x1020,       //w 1 15 0 1020
1247                   0x1000 } },{  //w 0 15 0 1000
1248                 { 0x7000,       //w 4 15 12 7
1249                   0xff41,       //w 3 15 0 ff41
1250                   0xde60,       //w 2 15 0 de60
1251                   0x0140,       //w 1 15 0 0140
1252                   0x0077 } },{  //w 0 15 0 0077
1253                 { 0xa000,       //w 4 15 12 a
1254                   0xdf01,       //w 3 15 0 df01
1255                   0xdf20,       //w 2 15 0 df20
1256                   0xff95,       //w 1 15 0 ff95
1257                   0xfa00 } },{  //w 0 15 0 fa00
1258                 { 0xb000,       //w 4 15 12 b
1259                   0xff41,       //w 3 15 0 ff41
1260                   0xde20,       //w 2 15 0 de20
1261                   0x0140,       //w 1 15 0 0140
1262                   0x00bb } },{  //w 0 15 0 00bb
1263                 { 0xf000,       //w 4 15 12 f
1264                   0xdf01,       //w 3 15 0 df01
1265                   0xdf20,       //w 2 15 0 df20
1266                   0xff95,       //w 1 15 0 ff95
1267                   0xbf00 }      //w 0 15 0 bf00
1268                 }
1269         }, *p = phy_magic;
1270         int i;
1271
1272         rtl8169_print_mac_version(tp);
1273         rtl8169_print_phy_version(tp);
1274
1275         if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
1276                 return;
1277         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1278                 return;
1279
1280         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1281         dprintk("Do final_reg2.cfg\n");
1282
1283         /* Shazam ! */
1284
1285         if (tp->mac_version == RTL_GIGA_MAC_VER_04) {
1286                 mdio_write(ioaddr, 31, 0x0002);
1287                 mdio_write(ioaddr,  1, 0x90d0);
1288                 mdio_write(ioaddr, 31, 0x0000);
1289                 return;
1290         }
1291
1292         /* phy config for RTL8169s mac_version C chip */
1293         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1294         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1295         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1296         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1297
1298         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1299                 int val, pos = 4;
1300
1301                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1302                 mdio_write(ioaddr, pos, val);
1303                 while (--pos >= 0)
1304                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1305                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1306                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1307         }
1308         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1309 }
1310
1311 static void rtl8169_phy_timer(unsigned long __opaque)
1312 {
1313         struct net_device *dev = (struct net_device *)__opaque;
1314         struct rtl8169_private *tp = netdev_priv(dev);
1315         struct timer_list *timer = &tp->timer;
1316         void __iomem *ioaddr = tp->mmio_addr;
1317         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1318
1319         assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
1320         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1321
1322         if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
1323                 return;
1324
1325         spin_lock_irq(&tp->lock);
1326
1327         if (tp->phy_reset_pending(ioaddr)) {
1328                 /*
1329                  * A busy loop could burn quite a few cycles on nowadays CPU.
1330                  * Let's delay the execution of the timer for a few ticks.
1331                  */
1332                 timeout = HZ/10;
1333                 goto out_mod_timer;
1334         }
1335
1336         if (tp->link_ok(ioaddr))
1337                 goto out_unlock;
1338
1339         if (netif_msg_link(tp))
1340                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1341
1342         tp->phy_reset_enable(ioaddr);
1343
1344 out_mod_timer:
1345         mod_timer(timer, jiffies + timeout);
1346 out_unlock:
1347         spin_unlock_irq(&tp->lock);
1348 }
1349
1350 static inline void rtl8169_delete_timer(struct net_device *dev)
1351 {
1352         struct rtl8169_private *tp = netdev_priv(dev);
1353         struct timer_list *timer = &tp->timer;
1354
1355         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1356             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1357                 return;
1358
1359         del_timer_sync(timer);
1360 }
1361
1362 static inline void rtl8169_request_timer(struct net_device *dev)
1363 {
1364         struct rtl8169_private *tp = netdev_priv(dev);
1365         struct timer_list *timer = &tp->timer;
1366
1367         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1368             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1369                 return;
1370
1371         mod_timer(timer, jiffies + RTL8169_PHY_TIMEOUT);
1372 }
1373
1374 #ifdef CONFIG_NET_POLL_CONTROLLER
1375 /*
1376  * Polling 'interrupt' - used by things like netconsole to send skbs
1377  * without having to re-enable interrupts. It's not called while
1378  * the interrupt routine is executing.
1379  */
1380 static void rtl8169_netpoll(struct net_device *dev)
1381 {
1382         struct rtl8169_private *tp = netdev_priv(dev);
1383         struct pci_dev *pdev = tp->pci_dev;
1384
1385         disable_irq(pdev->irq);
1386         rtl8169_interrupt(pdev->irq, dev);
1387         enable_irq(pdev->irq);
1388 }
1389 #endif
1390
1391 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1392                                   void __iomem *ioaddr)
1393 {
1394         iounmap(ioaddr);
1395         pci_release_regions(pdev);
1396         pci_disable_device(pdev);
1397         free_netdev(dev);
1398 }
1399
1400 static void rtl8169_phy_reset(struct net_device *dev,
1401                               struct rtl8169_private *tp)
1402 {
1403         void __iomem *ioaddr = tp->mmio_addr;
1404         int i;
1405
1406         tp->phy_reset_enable(ioaddr);
1407         for (i = 0; i < 100; i++) {
1408                 if (!tp->phy_reset_pending(ioaddr))
1409                         return;
1410                 msleep(1);
1411         }
1412         if (netif_msg_link(tp))
1413                 printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
1414 }
1415
1416 static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
1417 {
1418         void __iomem *ioaddr = tp->mmio_addr;
1419         static int board_idx = -1;
1420         u8 autoneg, duplex;
1421         u16 speed;
1422
1423         board_idx++;
1424
1425         rtl8169_hw_phy_config(dev);
1426
1427         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1428         RTL_W8(0x82, 0x01);
1429
1430         if (tp->mac_version < RTL_GIGA_MAC_VER_03) {
1431                 dprintk("Set PCI Latency=0x40\n");
1432                 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
1433         }
1434
1435         if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
1436                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1437                 RTL_W8(0x82, 0x01);
1438                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1439                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1440         }
1441
1442         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1443
1444         rtl8169_phy_reset(dev, tp);
1445
1446         rtl8169_set_speed(dev, autoneg, speed, duplex);
1447
1448         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1449                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1450 }
1451
1452 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1453 {
1454         struct rtl8169_private *tp = netdev_priv(dev);
1455         struct mii_ioctl_data *data = if_mii(ifr);
1456
1457         if (!netif_running(dev))
1458                 return -ENODEV;
1459
1460         switch (cmd) {
1461         case SIOCGMIIPHY:
1462                 data->phy_id = 32; /* Internal PHY */
1463                 return 0;
1464
1465         case SIOCGMIIREG:
1466                 data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f);
1467                 return 0;
1468
1469         case SIOCSMIIREG:
1470                 if (!capable(CAP_NET_ADMIN))
1471                         return -EPERM;
1472                 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
1473                 return 0;
1474         }
1475         return -EOPNOTSUPP;
1476 }
1477
1478 static int __devinit
1479 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1480 {
1481         const unsigned int region = rtl_cfg_info[ent->driver_data].region;
1482         struct rtl8169_private *tp;
1483         struct net_device *dev;
1484         void __iomem *ioaddr;
1485         unsigned int pm_cap;
1486         int i, rc;
1487
1488         if (netif_msg_drv(&debug)) {
1489                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1490                        MODULENAME, RTL8169_VERSION);
1491         }
1492
1493         dev = alloc_etherdev(sizeof (*tp));
1494         if (!dev) {
1495                 if (netif_msg_drv(&debug))
1496                         dev_err(&pdev->dev, "unable to alloc new ethernet\n");
1497                 rc = -ENOMEM;
1498                 goto out;
1499         }
1500
1501         SET_MODULE_OWNER(dev);
1502         SET_NETDEV_DEV(dev, &pdev->dev);
1503         tp = netdev_priv(dev);
1504         tp->dev = dev;
1505         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1506
1507         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1508         rc = pci_enable_device(pdev);
1509         if (rc < 0) {
1510                 if (netif_msg_probe(tp))
1511                         dev_err(&pdev->dev, "enable failure\n");
1512                 goto err_out_free_dev_1;
1513         }
1514
1515         rc = pci_set_mwi(pdev);
1516         if (rc < 0)
1517                 goto err_out_disable_2;
1518
1519         /* save power state before pci_enable_device overwrites it */
1520         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1521         if (pm_cap) {
1522                 u16 pwr_command, acpi_idle_state;
1523
1524                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1525                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1526         } else {
1527                 if (netif_msg_probe(tp)) {
1528                         dev_err(&pdev->dev,
1529                                 "PowerManagement capability not found.\n");
1530                 }
1531         }
1532
1533         /* make sure PCI base addr 1 is MMIO */
1534         if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
1535                 if (netif_msg_probe(tp)) {
1536                         dev_err(&pdev->dev,
1537                                 "region #%d not an MMIO resource, aborting\n",
1538                                 region);
1539                 }
1540                 rc = -ENODEV;
1541                 goto err_out_mwi_3;
1542         }
1543
1544         /* check for weird/broken PCI region reporting */
1545         if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
1546                 if (netif_msg_probe(tp)) {
1547                         dev_err(&pdev->dev,
1548                                 "Invalid PCI region size(s), aborting\n");
1549                 }
1550                 rc = -ENODEV;
1551                 goto err_out_mwi_3;
1552         }
1553
1554         rc = pci_request_regions(pdev, MODULENAME);
1555         if (rc < 0) {
1556                 if (netif_msg_probe(tp))
1557                         dev_err(&pdev->dev, "could not request regions.\n");
1558                 goto err_out_mwi_3;
1559         }
1560
1561         tp->cp_cmd = PCIMulRW | RxChkSum;
1562
1563         if ((sizeof(dma_addr_t) > 4) &&
1564             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1565                 tp->cp_cmd |= PCIDAC;
1566                 dev->features |= NETIF_F_HIGHDMA;
1567         } else {
1568                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1569                 if (rc < 0) {
1570                         if (netif_msg_probe(tp)) {
1571                                 dev_err(&pdev->dev,
1572                                         "DMA configuration failed.\n");
1573                         }
1574                         goto err_out_free_res_4;
1575                 }
1576         }
1577
1578         pci_set_master(pdev);
1579
1580         /* ioremap MMIO region */
1581         ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
1582         if (!ioaddr) {
1583                 if (netif_msg_probe(tp))
1584                         dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
1585                 rc = -EIO;
1586                 goto err_out_free_res_4;
1587         }
1588
1589         /* Unneeded ? Don't mess with Mrs. Murphy. */
1590         rtl8169_irq_mask_and_ack(ioaddr);
1591
1592         /* Soft reset the chip. */
1593         RTL_W8(ChipCmd, CmdReset);
1594
1595         /* Check that the chip has finished the reset. */
1596         for (i = 100; i > 0; i--) {
1597                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1598                         break;
1599                 msleep_interruptible(1);
1600         }
1601
1602         /* Identify chip attached to board */
1603         rtl8169_get_mac_version(tp, ioaddr);
1604         rtl8169_get_phy_version(tp, ioaddr);
1605
1606         rtl8169_print_mac_version(tp);
1607         rtl8169_print_phy_version(tp);
1608
1609         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1610                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1611                         break;
1612         }
1613         if (i < 0) {
1614                 /* Unknown chip: assume array element #0, original RTL-8169 */
1615                 if (netif_msg_probe(tp)) {
1616                         dev_printk(KERN_DEBUG, &pdev->dev,
1617                                 "unknown chip version, assuming %s\n",
1618                                 rtl_chip_info[0].name);
1619                 }
1620                 i++;
1621         }
1622         tp->chipset = i;
1623
1624         RTL_W8(Cfg9346, Cfg9346_Unlock);
1625         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1626         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1627         RTL_W8(Cfg9346, Cfg9346_Lock);
1628
1629         if (RTL_R8(PHYstatus) & TBI_Enable) {
1630                 tp->set_speed = rtl8169_set_speed_tbi;
1631                 tp->get_settings = rtl8169_gset_tbi;
1632                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1633                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1634                 tp->link_ok = rtl8169_tbi_link_ok;
1635
1636                 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
1637         } else {
1638                 tp->set_speed = rtl8169_set_speed_xmii;
1639                 tp->get_settings = rtl8169_gset_xmii;
1640                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1641                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1642                 tp->link_ok = rtl8169_xmii_link_ok;
1643
1644                 dev->do_ioctl = rtl8169_ioctl;
1645         }
1646
1647         /* Get MAC address.  FIXME: read EEPROM */
1648         for (i = 0; i < MAC_ADDR_LEN; i++)
1649                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1650         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1651
1652         dev->open = rtl8169_open;
1653         dev->hard_start_xmit = rtl8169_start_xmit;
1654         dev->get_stats = rtl8169_get_stats;
1655         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1656         dev->stop = rtl8169_close;
1657         dev->tx_timeout = rtl8169_tx_timeout;
1658         dev->set_multicast_list = rtl8169_set_rx_mode;
1659         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1660         dev->irq = pdev->irq;
1661         dev->base_addr = (unsigned long) ioaddr;
1662         dev->change_mtu = rtl8169_change_mtu;
1663
1664 #ifdef CONFIG_R8169_NAPI
1665         dev->poll = rtl8169_poll;
1666         dev->weight = R8169_NAPI_WEIGHT;
1667 #endif
1668
1669 #ifdef CONFIG_R8169_VLAN
1670         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1671         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1672         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1673 #endif
1674
1675 #ifdef CONFIG_NET_POLL_CONTROLLER
1676         dev->poll_controller = rtl8169_netpoll;
1677 #endif
1678
1679         tp->intr_mask = 0xffff;
1680         tp->pci_dev = pdev;
1681         tp->mmio_addr = ioaddr;
1682         tp->align = rtl_cfg_info[ent->driver_data].align;
1683
1684         init_timer(&tp->timer);
1685         tp->timer.data = (unsigned long) dev;
1686         tp->timer.function = rtl8169_phy_timer;
1687
1688         spin_lock_init(&tp->lock);
1689
1690         rc = register_netdev(dev);
1691         if (rc < 0)
1692                 goto err_out_unmap_5;
1693
1694         pci_set_drvdata(pdev, dev);
1695
1696         if (netif_msg_probe(tp)) {
1697                 printk(KERN_INFO "%s: %s at 0x%lx, "
1698                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1699                        "IRQ %d\n",
1700                        dev->name,
1701                        rtl_chip_info[tp->chipset].name,
1702                        dev->base_addr,
1703                        dev->dev_addr[0], dev->dev_addr[1],
1704                        dev->dev_addr[2], dev->dev_addr[3],
1705                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1706         }
1707
1708         rtl8169_init_phy(dev, tp);
1709
1710 out:
1711         return rc;
1712
1713 err_out_unmap_5:
1714         iounmap(ioaddr);
1715 err_out_free_res_4:
1716         pci_release_regions(pdev);
1717 err_out_mwi_3:
1718         pci_clear_mwi(pdev);
1719 err_out_disable_2:
1720         pci_disable_device(pdev);
1721 err_out_free_dev_1:
1722         free_netdev(dev);
1723         goto out;
1724 }
1725
1726 static void __devexit
1727 rtl8169_remove_one(struct pci_dev *pdev)
1728 {
1729         struct net_device *dev = pci_get_drvdata(pdev);
1730         struct rtl8169_private *tp = netdev_priv(dev);
1731
1732         assert(dev != NULL);
1733         assert(tp != NULL);
1734
1735         flush_scheduled_work();
1736
1737         unregister_netdev(dev);
1738         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1739         pci_set_drvdata(pdev, NULL);
1740 }
1741
1742 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1743                                   struct net_device *dev)
1744 {
1745         unsigned int mtu = dev->mtu;
1746
1747         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1748 }
1749
1750 static int rtl8169_open(struct net_device *dev)
1751 {
1752         struct rtl8169_private *tp = netdev_priv(dev);
1753         struct pci_dev *pdev = tp->pci_dev;
1754         int retval;
1755
1756         rtl8169_set_rxbufsize(tp, dev);
1757
1758         retval =
1759             request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev);
1760         if (retval < 0)
1761                 goto out;
1762
1763         retval = -ENOMEM;
1764
1765         /*
1766          * Rx and Tx desscriptors needs 256 bytes alignment.
1767          * pci_alloc_consistent provides more.
1768          */
1769         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1770                                                &tp->TxPhyAddr);
1771         if (!tp->TxDescArray)
1772                 goto err_free_irq;
1773
1774         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1775                                                &tp->RxPhyAddr);
1776         if (!tp->RxDescArray)
1777                 goto err_free_tx;
1778
1779         retval = rtl8169_init_ring(dev);
1780         if (retval < 0)
1781                 goto err_free_rx;
1782
1783         INIT_DELAYED_WORK(&tp->task, NULL);
1784
1785         rtl8169_hw_start(dev);
1786
1787         rtl8169_request_timer(dev);
1788
1789         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1790 out:
1791         return retval;
1792
1793 err_free_rx:
1794         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1795                             tp->RxPhyAddr);
1796 err_free_tx:
1797         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1798                             tp->TxPhyAddr);
1799 err_free_irq:
1800         free_irq(dev->irq, dev);
1801         goto out;
1802 }
1803
1804 static void rtl8169_hw_reset(void __iomem *ioaddr)
1805 {
1806         /* Disable interrupts */
1807         rtl8169_irq_mask_and_ack(ioaddr);
1808
1809         /* Reset the chipset */
1810         RTL_W8(ChipCmd, CmdReset);
1811
1812         /* PCI commit */
1813         RTL_R8(ChipCmd);
1814 }
1815
1816 static void rtl8169_set_rx_tx_config_registers(struct rtl8169_private *tp)
1817 {
1818         void __iomem *ioaddr = tp->mmio_addr;
1819         u32 cfg = rtl8169_rx_config;
1820
1821         cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1822         RTL_W32(RxConfig, cfg);
1823
1824         /* Set DMA burst size and Interframe Gap Time */
1825         RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
1826                 (InterFrameGap << TxInterFrameGapShift));
1827 }
1828
1829 static void rtl8169_hw_start(struct net_device *dev)
1830 {
1831         struct rtl8169_private *tp = netdev_priv(dev);
1832         void __iomem *ioaddr = tp->mmio_addr;
1833         struct pci_dev *pdev = tp->pci_dev;
1834         u16 cmd;
1835         u32 i;
1836
1837         /* Soft reset the chip. */
1838         RTL_W8(ChipCmd, CmdReset);
1839
1840         /* Check that the chip has finished the reset. */
1841         for (i = 100; i > 0; i--) {
1842                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1843                         break;
1844                 msleep_interruptible(1);
1845         }
1846
1847         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1848                 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
1849                 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
1850         }
1851
1852         if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
1853                 pci_write_config_word(pdev, 0x68, 0x00);
1854                 pci_write_config_word(pdev, 0x69, 0x08);
1855         }
1856
1857         /* Undocumented stuff. */
1858         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1859                 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1860                 if ((RTL_R8(Config2) & 0x07) & 0x01)
1861                         RTL_W32(0x7c, 0x0007ffff);
1862
1863                 RTL_W32(0x7c, 0x0007ff00);
1864
1865                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1866                 cmd = cmd & 0xef;
1867                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1868         }
1869
1870         RTL_W8(Cfg9346, Cfg9346_Unlock);
1871         if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
1872             (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1873             (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
1874             (tp->mac_version == RTL_GIGA_MAC_VER_04))
1875                 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1876
1877         RTL_W8(EarlyTxThres, EarlyTxThld);
1878
1879         /* Low hurts. Let's disable the filtering. */
1880         RTL_W16(RxMaxSize, 16383);
1881
1882         if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
1883             (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1884             (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
1885             (tp->mac_version == RTL_GIGA_MAC_VER_04))
1886                 rtl8169_set_rx_tx_config_registers(tp);
1887
1888         cmd = RTL_R16(CPlusCmd);
1889         RTL_W16(CPlusCmd, cmd);
1890
1891         tp->cp_cmd |= cmd | PCIMulRW;
1892
1893         if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1894             (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
1895                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1896                         "Bit-3 and bit-14 MUST be 1\n");
1897                 tp->cp_cmd |= (1 << 14);
1898         }
1899
1900         RTL_W16(CPlusCmd, tp->cp_cmd);
1901
1902         /*
1903          * Undocumented corner. Supposedly:
1904          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1905          */
1906         RTL_W16(IntrMitigate, 0x0000);
1907
1908         /*
1909          * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1910          * register to be written before TxDescAddrLow to work.
1911          * Switching from MMIO to I/O access fixes the issue as well.
1912          */
1913         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1914         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1915         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1916         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1917
1918         if ((tp->mac_version != RTL_GIGA_MAC_VER_01) &&
1919             (tp->mac_version != RTL_GIGA_MAC_VER_02) &&
1920             (tp->mac_version != RTL_GIGA_MAC_VER_03) &&
1921             (tp->mac_version != RTL_GIGA_MAC_VER_04)) {
1922                 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1923                 rtl8169_set_rx_tx_config_registers(tp);
1924         }
1925
1926         RTL_W8(Cfg9346, Cfg9346_Lock);
1927
1928         /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1929         RTL_R8(IntrMask);
1930
1931         RTL_W32(RxMissed, 0);
1932
1933         rtl8169_set_rx_mode(dev);
1934
1935         /* no early-rx interrupts */
1936         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1937
1938         /* Enable all known interrupts by setting the interrupt mask. */
1939         RTL_W16(IntrMask, rtl8169_intr_mask);
1940
1941         netif_start_queue(dev);
1942 }
1943
1944 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1945 {
1946         struct rtl8169_private *tp = netdev_priv(dev);
1947         int ret = 0;
1948
1949         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1950                 return -EINVAL;
1951
1952         dev->mtu = new_mtu;
1953
1954         if (!netif_running(dev))
1955                 goto out;
1956
1957         rtl8169_down(dev);
1958
1959         rtl8169_set_rxbufsize(tp, dev);
1960
1961         ret = rtl8169_init_ring(dev);
1962         if (ret < 0)
1963                 goto out;
1964
1965         netif_poll_enable(dev);
1966
1967         rtl8169_hw_start(dev);
1968
1969         rtl8169_request_timer(dev);
1970
1971 out:
1972         return ret;
1973 }
1974
1975 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1976 {
1977         desc->addr = 0x0badbadbadbadbadull;
1978         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1979 }
1980
1981 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1982                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1983 {
1984         struct pci_dev *pdev = tp->pci_dev;
1985
1986         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1987                          PCI_DMA_FROMDEVICE);
1988         dev_kfree_skb(*sk_buff);
1989         *sk_buff = NULL;
1990         rtl8169_make_unusable_by_asic(desc);
1991 }
1992
1993 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1994 {
1995         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1996
1997         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1998 }
1999
2000 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
2001                                        u32 rx_buf_sz)
2002 {
2003         desc->addr = cpu_to_le64(mapping);
2004         wmb();
2005         rtl8169_mark_to_asic(desc, rx_buf_sz);
2006 }
2007
2008 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
2009                                 struct RxDesc *desc, int rx_buf_sz,
2010                                 unsigned int align)
2011 {
2012         struct sk_buff *skb;
2013         dma_addr_t mapping;
2014         int ret = 0;
2015
2016         skb = dev_alloc_skb(rx_buf_sz + align);
2017         if (!skb)
2018                 goto err_out;
2019
2020         skb_reserve(skb, (align - 1) & (unsigned long)skb->data);
2021         *sk_buff = skb;
2022
2023         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
2024                                  PCI_DMA_FROMDEVICE);
2025
2026         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
2027
2028 out:
2029         return ret;
2030
2031 err_out:
2032         ret = -ENOMEM;
2033         rtl8169_make_unusable_by_asic(desc);
2034         goto out;
2035 }
2036
2037 static void rtl8169_rx_clear(struct rtl8169_private *tp)
2038 {
2039         int i;
2040
2041         for (i = 0; i < NUM_RX_DESC; i++) {
2042                 if (tp->Rx_skbuff[i]) {
2043                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
2044                                             tp->RxDescArray + i);
2045                 }
2046         }
2047 }
2048
2049 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
2050                            u32 start, u32 end)
2051 {
2052         u32 cur;
2053
2054         for (cur = start; end - cur > 0; cur++) {
2055                 int ret, i = cur % NUM_RX_DESC;
2056
2057                 if (tp->Rx_skbuff[i])
2058                         continue;
2059
2060                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
2061                         tp->RxDescArray + i, tp->rx_buf_sz, tp->align);
2062                 if (ret < 0)
2063                         break;
2064         }
2065         return cur - start;
2066 }
2067
2068 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
2069 {
2070         desc->opts1 |= cpu_to_le32(RingEnd);
2071 }
2072
2073 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
2074 {
2075         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
2076 }
2077
2078 static int rtl8169_init_ring(struct net_device *dev)
2079 {
2080         struct rtl8169_private *tp = netdev_priv(dev);
2081
2082         rtl8169_init_ring_indexes(tp);
2083
2084         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
2085         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
2086
2087         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
2088                 goto err_out;
2089
2090         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
2091
2092         return 0;
2093
2094 err_out:
2095         rtl8169_rx_clear(tp);
2096         return -ENOMEM;
2097 }
2098
2099 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
2100                                  struct TxDesc *desc)
2101 {
2102         unsigned int len = tx_skb->len;
2103
2104         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
2105         desc->opts1 = 0x00;
2106         desc->opts2 = 0x00;
2107         desc->addr = 0x00;
2108         tx_skb->len = 0;
2109 }
2110
2111 static void rtl8169_tx_clear(struct rtl8169_private *tp)
2112 {
2113         unsigned int i;
2114
2115         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
2116                 unsigned int entry = i % NUM_TX_DESC;
2117                 struct ring_info *tx_skb = tp->tx_skb + entry;
2118                 unsigned int len = tx_skb->len;
2119
2120                 if (len) {
2121                         struct sk_buff *skb = tx_skb->skb;
2122
2123                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
2124                                              tp->TxDescArray + entry);
2125                         if (skb) {
2126                                 dev_kfree_skb(skb);
2127                                 tx_skb->skb = NULL;
2128                         }
2129                         tp->stats.tx_dropped++;
2130                 }
2131         }
2132         tp->cur_tx = tp->dirty_tx = 0;
2133 }
2134
2135 static void rtl8169_schedule_work(struct net_device *dev, work_func_t task)
2136 {
2137         struct rtl8169_private *tp = netdev_priv(dev);
2138
2139         PREPARE_DELAYED_WORK(&tp->task, task);
2140         schedule_delayed_work(&tp->task, 4);
2141 }
2142
2143 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2144 {
2145         struct rtl8169_private *tp = netdev_priv(dev);
2146         void __iomem *ioaddr = tp->mmio_addr;
2147
2148         synchronize_irq(dev->irq);
2149
2150         /* Wait for any pending NAPI task to complete */
2151         netif_poll_disable(dev);
2152
2153         rtl8169_irq_mask_and_ack(ioaddr);
2154
2155         netif_poll_enable(dev);
2156 }
2157
2158 static void rtl8169_reinit_task(struct work_struct *work)
2159 {
2160         struct rtl8169_private *tp =
2161                 container_of(work, struct rtl8169_private, task.work);
2162         struct net_device *dev = tp->dev;
2163         int ret;
2164
2165         rtnl_lock();
2166
2167         if (!netif_running(dev))
2168                 goto out_unlock;
2169
2170         rtl8169_wait_for_quiescence(dev);
2171         rtl8169_close(dev);
2172
2173         ret = rtl8169_open(dev);
2174         if (unlikely(ret < 0)) {
2175                 if (net_ratelimit()) {
2176                         struct rtl8169_private *tp = netdev_priv(dev);
2177
2178                         if (netif_msg_drv(tp)) {
2179                                 printk(PFX KERN_ERR
2180                                        "%s: reinit failure (status = %d)."
2181                                        " Rescheduling.\n", dev->name, ret);
2182                         }
2183                 }
2184                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2185         }
2186
2187 out_unlock:
2188         rtnl_unlock();
2189 }
2190
2191 static void rtl8169_reset_task(struct work_struct *work)
2192 {
2193         struct rtl8169_private *tp =
2194                 container_of(work, struct rtl8169_private, task.work);
2195         struct net_device *dev = tp->dev;
2196
2197         rtnl_lock();
2198
2199         if (!netif_running(dev))
2200                 goto out_unlock;
2201
2202         rtl8169_wait_for_quiescence(dev);
2203
2204         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2205         rtl8169_tx_clear(tp);
2206
2207         if (tp->dirty_rx == tp->cur_rx) {
2208                 rtl8169_init_ring_indexes(tp);
2209                 rtl8169_hw_start(dev);
2210                 netif_wake_queue(dev);
2211         } else {
2212                 if (net_ratelimit()) {
2213                         struct rtl8169_private *tp = netdev_priv(dev);
2214
2215                         if (netif_msg_intr(tp)) {
2216                                 printk(PFX KERN_EMERG
2217                                        "%s: Rx buffers shortage\n", dev->name);
2218                         }
2219                 }
2220                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2221         }
2222
2223 out_unlock:
2224         rtnl_unlock();
2225 }
2226
2227 static void rtl8169_tx_timeout(struct net_device *dev)
2228 {
2229         struct rtl8169_private *tp = netdev_priv(dev);
2230
2231         rtl8169_hw_reset(tp->mmio_addr);
2232
2233         /* Let's wait a bit while any (async) irq lands on */
2234         rtl8169_schedule_work(dev, rtl8169_reset_task);
2235 }
2236
2237 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2238                               u32 opts1)
2239 {
2240         struct skb_shared_info *info = skb_shinfo(skb);
2241         unsigned int cur_frag, entry;
2242         struct TxDesc *txd;
2243
2244         entry = tp->cur_tx;
2245         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2246                 skb_frag_t *frag = info->frags + cur_frag;
2247                 dma_addr_t mapping;
2248                 u32 status, len;
2249                 void *addr;
2250
2251                 entry = (entry + 1) % NUM_TX_DESC;
2252
2253                 txd = tp->TxDescArray + entry;
2254                 len = frag->size;
2255                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2256                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2257
2258                 /* anti gcc 2.95.3 bugware (sic) */
2259                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2260
2261                 txd->opts1 = cpu_to_le32(status);
2262                 txd->addr = cpu_to_le64(mapping);
2263
2264                 tp->tx_skb[entry].len = len;
2265         }
2266
2267         if (cur_frag) {
2268                 tp->tx_skb[entry].skb = skb;
2269                 txd->opts1 |= cpu_to_le32(LastFrag);
2270         }
2271
2272         return cur_frag;
2273 }
2274
2275 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2276 {
2277         if (dev->features & NETIF_F_TSO) {
2278                 u32 mss = skb_shinfo(skb)->gso_size;
2279
2280                 if (mss)
2281                         return LargeSend | ((mss & MSSMask) << MSSShift);
2282         }
2283         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2284                 const struct iphdr *ip = skb->nh.iph;
2285
2286                 if (ip->protocol == IPPROTO_TCP)
2287                         return IPCS | TCPCS;
2288                 else if (ip->protocol == IPPROTO_UDP)
2289                         return IPCS | UDPCS;
2290                 WARN_ON(1);     /* we need a WARN() */
2291         }
2292         return 0;
2293 }
2294
2295 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2296 {
2297         struct rtl8169_private *tp = netdev_priv(dev);
2298         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2299         struct TxDesc *txd = tp->TxDescArray + entry;
2300         void __iomem *ioaddr = tp->mmio_addr;
2301         dma_addr_t mapping;
2302         u32 status, len;
2303         u32 opts1;
2304         int ret = NETDEV_TX_OK;
2305
2306         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2307                 if (netif_msg_drv(tp)) {
2308                         printk(KERN_ERR
2309                                "%s: BUG! Tx Ring full when queue awake!\n",
2310                                dev->name);
2311                 }
2312                 goto err_stop;
2313         }
2314
2315         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2316                 goto err_stop;
2317
2318         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2319
2320         frags = rtl8169_xmit_frags(tp, skb, opts1);
2321         if (frags) {
2322                 len = skb_headlen(skb);
2323                 opts1 |= FirstFrag;
2324         } else {
2325                 len = skb->len;
2326
2327                 if (unlikely(len < ETH_ZLEN)) {
2328                         if (skb_padto(skb, ETH_ZLEN))
2329                                 goto err_update_stats;
2330                         len = ETH_ZLEN;
2331                 }
2332
2333                 opts1 |= FirstFrag | LastFrag;
2334                 tp->tx_skb[entry].skb = skb;
2335         }
2336
2337         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2338
2339         tp->tx_skb[entry].len = len;
2340         txd->addr = cpu_to_le64(mapping);
2341         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2342
2343         wmb();
2344
2345         /* anti gcc 2.95.3 bugware (sic) */
2346         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2347         txd->opts1 = cpu_to_le32(status);
2348
2349         dev->trans_start = jiffies;
2350
2351         tp->cur_tx += frags + 1;
2352
2353         smp_wmb();
2354
2355         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2356
2357         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2358                 netif_stop_queue(dev);
2359                 smp_rmb();
2360                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2361                         netif_wake_queue(dev);
2362         }
2363
2364 out:
2365         return ret;
2366
2367 err_stop:
2368         netif_stop_queue(dev);
2369         ret = NETDEV_TX_BUSY;
2370 err_update_stats:
2371         tp->stats.tx_dropped++;
2372         goto out;
2373 }
2374
2375 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2376 {
2377         struct rtl8169_private *tp = netdev_priv(dev);
2378         struct pci_dev *pdev = tp->pci_dev;
2379         void __iomem *ioaddr = tp->mmio_addr;
2380         u16 pci_status, pci_cmd;
2381
2382         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2383         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2384
2385         if (netif_msg_intr(tp)) {
2386                 printk(KERN_ERR
2387                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2388                        dev->name, pci_cmd, pci_status);
2389         }
2390
2391         /*
2392          * The recovery sequence below admits a very elaborated explanation:
2393          * - it seems to work;
2394          * - I did not see what else could be done;
2395          * - it makes iop3xx happy.
2396          *
2397          * Feel free to adjust to your needs.
2398          */
2399         if (pdev->broken_parity_status)
2400                 pci_cmd &= ~PCI_COMMAND_PARITY;
2401         else
2402                 pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY;
2403
2404         pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
2405
2406         pci_write_config_word(pdev, PCI_STATUS,
2407                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2408                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2409                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2410
2411         /* The infamous DAC f*ckup only happens at boot time */
2412         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2413                 if (netif_msg_intr(tp))
2414                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2415                 tp->cp_cmd &= ~PCIDAC;
2416                 RTL_W16(CPlusCmd, tp->cp_cmd);
2417                 dev->features &= ~NETIF_F_HIGHDMA;
2418         }
2419
2420         rtl8169_hw_reset(ioaddr);
2421
2422         rtl8169_schedule_work(dev, rtl8169_reinit_task);
2423 }
2424
2425 static void
2426 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2427                      void __iomem *ioaddr)
2428 {
2429         unsigned int dirty_tx, tx_left;
2430
2431         assert(dev != NULL);
2432         assert(tp != NULL);
2433         assert(ioaddr != NULL);
2434
2435         dirty_tx = tp->dirty_tx;
2436         smp_rmb();
2437         tx_left = tp->cur_tx - dirty_tx;
2438
2439         while (tx_left > 0) {
2440                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2441                 struct ring_info *tx_skb = tp->tx_skb + entry;
2442                 u32 len = tx_skb->len;
2443                 u32 status;
2444
2445                 rmb();
2446                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2447                 if (status & DescOwn)
2448                         break;
2449
2450                 tp->stats.tx_bytes += len;
2451                 tp->stats.tx_packets++;
2452
2453                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2454
2455                 if (status & LastFrag) {
2456                         dev_kfree_skb_irq(tx_skb->skb);
2457                         tx_skb->skb = NULL;
2458                 }
2459                 dirty_tx++;
2460                 tx_left--;
2461         }
2462
2463         if (tp->dirty_tx != dirty_tx) {
2464                 tp->dirty_tx = dirty_tx;
2465                 smp_wmb();
2466                 if (netif_queue_stopped(dev) &&
2467                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2468                         netif_wake_queue(dev);
2469                 }
2470         }
2471 }
2472
2473 static inline int rtl8169_fragmented_frame(u32 status)
2474 {
2475         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2476 }
2477
2478 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2479 {
2480         u32 opts1 = le32_to_cpu(desc->opts1);
2481         u32 status = opts1 & RxProtoMask;
2482
2483         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2484             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2485             ((status == RxProtoIP) && !(opts1 & IPFail)))
2486                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2487         else
2488                 skb->ip_summed = CHECKSUM_NONE;
2489 }
2490
2491 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2492                                       struct RxDesc *desc, int rx_buf_sz,
2493                                       unsigned int align)
2494 {
2495         int ret = -1;
2496
2497         if (pkt_size < rx_copybreak) {
2498                 struct sk_buff *skb;
2499
2500                 skb = dev_alloc_skb(pkt_size + align);
2501                 if (skb) {
2502                         skb_reserve(skb, (align - 1) & (unsigned long)skb->data);
2503                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2504                         *sk_buff = skb;
2505                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2506                         ret = 0;
2507                 }
2508         }
2509         return ret;
2510 }
2511
2512 static int
2513 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2514                      void __iomem *ioaddr)
2515 {
2516         unsigned int cur_rx, rx_left;
2517         unsigned int delta, count;
2518
2519         assert(dev != NULL);
2520         assert(tp != NULL);
2521         assert(ioaddr != NULL);
2522
2523         cur_rx = tp->cur_rx;
2524         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2525         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2526
2527         for (; rx_left > 0; rx_left--, cur_rx++) {
2528                 unsigned int entry = cur_rx % NUM_RX_DESC;
2529                 struct RxDesc *desc = tp->RxDescArray + entry;
2530                 u32 status;
2531
2532                 rmb();
2533                 status = le32_to_cpu(desc->opts1);
2534
2535                 if (status & DescOwn)
2536                         break;
2537                 if (unlikely(status & RxRES)) {
2538                         if (netif_msg_rx_err(tp)) {
2539                                 printk(KERN_INFO
2540                                        "%s: Rx ERROR. status = %08x\n",
2541                                        dev->name, status);
2542                         }
2543                         tp->stats.rx_errors++;
2544                         if (status & (RxRWT | RxRUNT))
2545                                 tp->stats.rx_length_errors++;
2546                         if (status & RxCRC)
2547                                 tp->stats.rx_crc_errors++;
2548                         if (status & RxFOVF) {
2549                                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2550                                 tp->stats.rx_fifo_errors++;
2551                         }
2552                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2553                 } else {
2554                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2555                         int pkt_size = (status & 0x00001FFF) - 4;
2556                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2557                                 size_t, int) = pci_dma_sync_single_for_device;
2558
2559                         /*
2560                          * The driver does not support incoming fragmented
2561                          * frames. They are seen as a symptom of over-mtu
2562                          * sized frames.
2563                          */
2564                         if (unlikely(rtl8169_fragmented_frame(status))) {
2565                                 tp->stats.rx_dropped++;
2566                                 tp->stats.rx_length_errors++;
2567                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2568                                 continue;
2569                         }
2570
2571                         rtl8169_rx_csum(skb, desc);
2572
2573                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2574                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2575                                 PCI_DMA_FROMDEVICE);
2576
2577                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2578                                                 tp->rx_buf_sz, tp->align)) {
2579                                 pci_action = pci_unmap_single;
2580                                 tp->Rx_skbuff[entry] = NULL;
2581                         }
2582
2583                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2584                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2585
2586                         skb->dev = dev;
2587                         skb_put(skb, pkt_size);
2588                         skb->protocol = eth_type_trans(skb, dev);
2589
2590                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2591                                 rtl8169_rx_skb(skb);
2592
2593                         dev->last_rx = jiffies;
2594                         tp->stats.rx_bytes += pkt_size;
2595                         tp->stats.rx_packets++;
2596                 }
2597         }
2598
2599         count = cur_rx - tp->cur_rx;
2600         tp->cur_rx = cur_rx;
2601
2602         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2603         if (!delta && count && netif_msg_intr(tp))
2604                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2605         tp->dirty_rx += delta;
2606
2607         /*
2608          * FIXME: until there is periodic timer to try and refill the ring,
2609          * a temporary shortage may definitely kill the Rx process.
2610          * - disable the asic to try and avoid an overflow and kick it again
2611          *   after refill ?
2612          * - how do others driver handle this condition (Uh oh...).
2613          */
2614         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2615                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2616
2617         return count;
2618 }
2619
2620 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2621 static irqreturn_t
2622 rtl8169_interrupt(int irq, void *dev_instance)
2623 {
2624         struct net_device *dev = (struct net_device *) dev_instance;
2625         struct rtl8169_private *tp = netdev_priv(dev);
2626         int boguscnt = max_interrupt_work;
2627         void __iomem *ioaddr = tp->mmio_addr;
2628         int status;
2629         int handled = 0;
2630
2631         do {
2632                 status = RTL_R16(IntrStatus);
2633
2634                 /* hotplug/major error/no more work/shared irq */
2635                 if ((status == 0xFFFF) || !status)
2636                         break;
2637
2638                 handled = 1;
2639
2640                 if (unlikely(!netif_running(dev))) {
2641                         rtl8169_asic_down(ioaddr);
2642                         goto out;
2643                 }
2644
2645                 status &= tp->intr_mask;
2646                 RTL_W16(IntrStatus,
2647                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2648
2649                 if (!(status & rtl8169_intr_mask))
2650                         break;
2651
2652                 if (unlikely(status & SYSErr)) {
2653                         rtl8169_pcierr_interrupt(dev);
2654                         break;
2655                 }
2656
2657                 if (status & LinkChg)
2658                         rtl8169_check_link_status(dev, tp, ioaddr);
2659
2660 #ifdef CONFIG_R8169_NAPI
2661                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2662                 tp->intr_mask = ~rtl8169_napi_event;
2663
2664                 if (likely(netif_rx_schedule_prep(dev)))
2665                         __netif_rx_schedule(dev);
2666                 else if (netif_msg_intr(tp)) {
2667                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2668                                dev->name, status);
2669                 }
2670                 break;
2671 #else
2672                 /* Rx interrupt */
2673                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2674                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2675                 }
2676                 /* Tx interrupt */
2677                 if (status & (TxOK | TxErr))
2678                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2679 #endif
2680
2681                 boguscnt--;
2682         } while (boguscnt > 0);
2683
2684         if (boguscnt <= 0) {
2685                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2686                         printk(KERN_WARNING
2687                                "%s: Too much work at interrupt!\n", dev->name);
2688                 }
2689                 /* Clear all interrupt sources. */
2690                 RTL_W16(IntrStatus, 0xffff);
2691         }
2692 out:
2693         return IRQ_RETVAL(handled);
2694 }
2695
2696 #ifdef CONFIG_R8169_NAPI
2697 static int rtl8169_poll(struct net_device *dev, int *budget)
2698 {
2699         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2700         struct rtl8169_private *tp = netdev_priv(dev);
2701         void __iomem *ioaddr = tp->mmio_addr;
2702
2703         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2704         rtl8169_tx_interrupt(dev, tp, ioaddr);
2705
2706         *budget -= work_done;
2707         dev->quota -= work_done;
2708
2709         if (work_done < work_to_do) {
2710                 netif_rx_complete(dev);
2711                 tp->intr_mask = 0xffff;
2712                 /*
2713                  * 20040426: the barrier is not strictly required but the
2714                  * behavior of the irq handler could be less predictable
2715                  * without it. Btw, the lack of flush for the posted pci
2716                  * write is safe - FR
2717                  */
2718                 smp_wmb();
2719                 RTL_W16(IntrMask, rtl8169_intr_mask);
2720         }
2721
2722         return (work_done >= work_to_do);
2723 }
2724 #endif
2725
2726 static void rtl8169_down(struct net_device *dev)
2727 {
2728         struct rtl8169_private *tp = netdev_priv(dev);
2729         void __iomem *ioaddr = tp->mmio_addr;
2730         unsigned int poll_locked = 0;
2731         unsigned int intrmask;
2732
2733         rtl8169_delete_timer(dev);
2734
2735         netif_stop_queue(dev);
2736
2737 core_down:
2738         spin_lock_irq(&tp->lock);
2739
2740         rtl8169_asic_down(ioaddr);
2741
2742         /* Update the error counts. */
2743         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2744         RTL_W32(RxMissed, 0);
2745
2746         spin_unlock_irq(&tp->lock);
2747
2748         synchronize_irq(dev->irq);
2749
2750         if (!poll_locked) {
2751                 netif_poll_disable(dev);
2752                 poll_locked++;
2753         }
2754
2755         /* Give a racing hard_start_xmit a few cycles to complete. */
2756         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2757
2758         /*
2759          * And now for the 50k$ question: are IRQ disabled or not ?
2760          *
2761          * Two paths lead here:
2762          * 1) dev->close
2763          *    -> netif_running() is available to sync the current code and the
2764          *       IRQ handler. See rtl8169_interrupt for details.
2765          * 2) dev->change_mtu
2766          *    -> rtl8169_poll can not be issued again and re-enable the
2767          *       interruptions. Let's simply issue the IRQ down sequence again.
2768          *
2769          * No loop if hotpluged or major error (0xffff).
2770          */
2771         intrmask = RTL_R16(IntrMask);
2772         if (intrmask && (intrmask != 0xffff))
2773                 goto core_down;
2774
2775         rtl8169_tx_clear(tp);
2776
2777         rtl8169_rx_clear(tp);
2778 }
2779
2780 static int rtl8169_close(struct net_device *dev)
2781 {
2782         struct rtl8169_private *tp = netdev_priv(dev);
2783         struct pci_dev *pdev = tp->pci_dev;
2784
2785         rtl8169_down(dev);
2786
2787         free_irq(dev->irq, dev);
2788
2789         netif_poll_enable(dev);
2790
2791         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2792                             tp->RxPhyAddr);
2793         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2794                             tp->TxPhyAddr);
2795         tp->TxDescArray = NULL;
2796         tp->RxDescArray = NULL;
2797
2798         return 0;
2799 }
2800
2801 static void
2802 rtl8169_set_rx_mode(struct net_device *dev)
2803 {
2804         struct rtl8169_private *tp = netdev_priv(dev);
2805         void __iomem *ioaddr = tp->mmio_addr;
2806         unsigned long flags;
2807         u32 mc_filter[2];       /* Multicast hash filter */
2808         int i, rx_mode;
2809         u32 tmp = 0;
2810
2811         if (dev->flags & IFF_PROMISC) {
2812                 /* Unconditionally log net taps. */
2813                 if (netif_msg_link(tp)) {
2814                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2815                                dev->name);
2816                 }
2817                 rx_mode =
2818                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2819                     AcceptAllPhys;
2820                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2821         } else if ((dev->mc_count > multicast_filter_limit)
2822                    || (dev->flags & IFF_ALLMULTI)) {
2823                 /* Too many to filter perfectly -- accept all multicasts. */
2824                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2825                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2826         } else {
2827                 struct dev_mc_list *mclist;
2828                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2829                 mc_filter[1] = mc_filter[0] = 0;
2830                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2831                      i++, mclist = mclist->next) {
2832                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2833                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2834                         rx_mode |= AcceptMulticast;
2835                 }
2836         }
2837
2838         spin_lock_irqsave(&tp->lock, flags);
2839
2840         tmp = rtl8169_rx_config | rx_mode |
2841               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2842
2843         if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
2844             (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
2845             (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
2846             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
2847             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
2848                 mc_filter[0] = 0xffffffff;
2849                 mc_filter[1] = 0xffffffff;
2850         }
2851
2852         RTL_W32(RxConfig, tmp);
2853         RTL_W32(MAR0 + 0, mc_filter[0]);
2854         RTL_W32(MAR0 + 4, mc_filter[1]);
2855
2856         spin_unlock_irqrestore(&tp->lock, flags);
2857 }
2858
2859 /**
2860  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2861  *  @dev: The Ethernet Device to get statistics for
2862  *
2863  *  Get TX/RX statistics for rtl8169
2864  */
2865 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2866 {
2867         struct rtl8169_private *tp = netdev_priv(dev);
2868         void __iomem *ioaddr = tp->mmio_addr;
2869         unsigned long flags;
2870
2871         if (netif_running(dev)) {
2872                 spin_lock_irqsave(&tp->lock, flags);
2873                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2874                 RTL_W32(RxMissed, 0);
2875                 spin_unlock_irqrestore(&tp->lock, flags);
2876         }
2877
2878         return &tp->stats;
2879 }
2880
2881 #ifdef CONFIG_PM
2882
2883 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2884 {
2885         struct net_device *dev = pci_get_drvdata(pdev);
2886         struct rtl8169_private *tp = netdev_priv(dev);
2887         void __iomem *ioaddr = tp->mmio_addr;
2888
2889         if (!netif_running(dev))
2890                 goto out;
2891
2892         netif_device_detach(dev);
2893         netif_stop_queue(dev);
2894
2895         spin_lock_irq(&tp->lock);
2896
2897         rtl8169_asic_down(ioaddr);
2898
2899         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2900         RTL_W32(RxMissed, 0);
2901
2902         spin_unlock_irq(&tp->lock);
2903
2904         pci_save_state(pdev);
2905         pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2906         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2907 out:
2908         return 0;
2909 }
2910
2911 static int rtl8169_resume(struct pci_dev *pdev)
2912 {
2913         struct net_device *dev = pci_get_drvdata(pdev);
2914
2915         if (!netif_running(dev))
2916                 goto out;
2917
2918         netif_device_attach(dev);
2919
2920         pci_set_power_state(pdev, PCI_D0);
2921         pci_restore_state(pdev);
2922         pci_enable_wake(pdev, PCI_D0, 0);
2923
2924         rtl8169_schedule_work(dev, rtl8169_reset_task);
2925 out:
2926         return 0;
2927 }
2928
2929 #endif /* CONFIG_PM */
2930
2931 static struct pci_driver rtl8169_pci_driver = {
2932         .name           = MODULENAME,
2933         .id_table       = rtl8169_pci_tbl,
2934         .probe          = rtl8169_init_one,
2935         .remove         = __devexit_p(rtl8169_remove_one),
2936 #ifdef CONFIG_PM
2937         .suspend        = rtl8169_suspend,
2938         .resume         = rtl8169_resume,
2939 #endif
2940 };
2941
2942 static int __init
2943 rtl8169_init_module(void)
2944 {
2945         return pci_register_driver(&rtl8169_pci_driver);
2946 }
2947
2948 static void __exit
2949 rtl8169_cleanup_module(void)
2950 {
2951         pci_unregister_driver(&rtl8169_pci_driver);
2952 }
2953
2954 module_init(rtl8169_init_module);
2955 module_exit(rtl8169_cleanup_module);