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   1 /*
   2  *  linux/arch/m32r/kernel/setup_mappi.c
   3  *
   4  *  Setup routines for Renesas MAPPI Board
   5  *
   6  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
   7  *                           Hitoshi Yamamoto
   8  */
   9
  10 #include <linux/config.h>
  11 #include <linux/irq.h>
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <asm/system.h>
  17 #include <asm/m32r.h>
  18 #include <asm/io.h>
  19
  20 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
  21
  22 #ifndef CONFIG_SMP
  23 typedef struct {
  24         unsigned long icucr;  /* ICU Control Register */
  25 } icu_data_t;
  26 #endif /* CONFIG_SMP */
  27
  28 icu_data_t icu_data[NR_IRQS];
  29
  30 static void disable_mappi_irq(unsigned int irq)
  31 {
  32         unsigned long port, data;
  33
  34         port = irq2port(irq);
  35         data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
  36         outl(data, port);
  37 }
  38
  39 static void enable_mappi_irq(unsigned int irq)
  40 {
  41         unsigned long port, data;
  42
  43         port = irq2port(irq);
  44         data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
  45         outl(data, port);
  46 }
  47
  48 static void mask_and_ack_mappi(unsigned int irq)
  49 {
  50         disable_mappi_irq(irq);
  51 }
  52
  53 static void end_mappi_irq(unsigned int irq)
  54 {
  55         enable_mappi_irq(irq);
  56 }
  57
  58 static unsigned int startup_mappi_irq(unsigned int irq)
  59 {
  60         enable_mappi_irq(irq);
  61         return (0);
  62 }
  63
  64 static void shutdown_mappi_irq(unsigned int irq)
  65 {
  66         unsigned long port;
  67
  68         port = irq2port(irq);
  69         outl(M32R_ICUCR_ILEVEL7, port);
  70 }
  71
  72 static struct hw_interrupt_type mappi_irq_type =
  73 {
  74         .typename = "MAPPI-IRQ",
  75         .startup = startup_mappi_irq,
  76         .shutdown = shutdown_mappi_irq,
  77         .enable = enable_mappi_irq,
  78         .disable = disable_mappi_irq,
  79         .ack = mask_and_ack_mappi,
  80         .end = end_mappi_irq
  81 };
  82
  83 void __init init_IRQ(void)
  84 {
  85         static int once = 0;
  86
  87         if (once)
  88                 return;
  89         else
  90                 once++;
  91
  92 #ifdef CONFIG_NE2000
  93         /* INT0 : LAN controller (RTL8019AS) */
  94         irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
  95         irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type;
  96         irq_desc[M32R_IRQ_INT0].action = 0;
  97         irq_desc[M32R_IRQ_INT0].depth = 1;
  98         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
  99         disable_mappi_irq(M32R_IRQ_INT0);
 100 #endif /* CONFIG_M32R_NE2000 */
 101
 102         /* MFT2 : system timer */
 103         irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
 104         irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
 105         irq_desc[M32R_IRQ_MFT2].action = 0;
 106         irq_desc[M32R_IRQ_MFT2].depth = 1;
 107         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
 108         disable_mappi_irq(M32R_IRQ_MFT2);
 109
 110 #ifdef CONFIG_SERIAL_M32R_SIO
 111         /* SIO0_R : uart receive data */
 112         irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
 113         irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
 114         irq_desc[M32R_IRQ_SIO0_R].action = 0;
 115         irq_desc[M32R_IRQ_SIO0_R].depth = 1;
 116         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
 117         disable_mappi_irq(M32R_IRQ_SIO0_R);
 118
 119         /* SIO0_S : uart send data */
 120         irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
 121         irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
 122         irq_desc[M32R_IRQ_SIO0_S].action = 0;
 123         irq_desc[M32R_IRQ_SIO0_S].depth = 1;
 124         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
 125         disable_mappi_irq(M32R_IRQ_SIO0_S);
 126
 127         /* SIO1_R : uart receive data */
 128         irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
 129         irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
 130         irq_desc[M32R_IRQ_SIO1_R].action = 0;
 131         irq_desc[M32R_IRQ_SIO1_R].depth = 1;
 132         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
 133         disable_mappi_irq(M32R_IRQ_SIO1_R);
 134
 135         /* SIO1_S : uart send data */
 136         irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
 137         irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
 138         irq_desc[M32R_IRQ_SIO1_S].action = 0;
 139         irq_desc[M32R_IRQ_SIO1_S].depth = 1;
 140         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
 141         disable_mappi_irq(M32R_IRQ_SIO1_S);
 142 #endif /* CONFIG_SERIAL_M32R_SIO */
 143
 144 #if defined(CONFIG_M32R_PCC)
 145         /* INT1 : pccard0 interrupt */
 146         irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
 147         irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type;
 148         irq_desc[M32R_IRQ_INT1].action = 0;
 149         irq_desc[M32R_IRQ_INT1].depth = 1;
 150         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
 151         disable_mappi_irq(M32R_IRQ_INT1);
 152
 153         /* INT2 : pccard1 interrupt */
 154         irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
 155         irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type;
 156         irq_desc[M32R_IRQ_INT2].action = 0;
 157         irq_desc[M32R_IRQ_INT2].depth = 1;
 158         icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
 159         disable_mappi_irq(M32R_IRQ_INT2);
 160 #endif /* CONFIG_M32RPCC */
 161 }
 162
 163 #if defined(CONFIG_FB_S1D13XXX)
 164
 165 #include <video/s1d13xxxfb.h>
 166 #include <asm/s1d13806.h>
 167
 168 static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
 169         .initregs               = s1d13xxxfb_initregs,
 170         .initregssize           = ARRAY_SIZE(s1d13xxxfb_initregs),
 171         .platform_init_video    = NULL,
 172 #ifdef CONFIG_PM
 173         .platform_suspend_video = NULL,
 174         .platform_resume_video  = NULL,
 175 #endif
 176 };
 177
 178 static struct resource s1d13xxxfb_resources[] = {
 179         [0] = {
 180                 .start  = 0x10200000UL,
 181                 .end    = 0x1033FFFFUL,
 182                 .flags  = IORESOURCE_MEM,
 183         },
 184         [1] = {
 185                 .start  = 0x10000000UL,
 186                 .end    = 0x100001FFUL,
 187                 .flags  = IORESOURCE_MEM,
 188         }
 189 };
 190
 191 static struct platform_device s1d13xxxfb_device = {
 192         .name           = S1D_DEVICENAME,
 193         .id             = 0,
 194         .dev            = {
 195                 .platform_data  = &s1d13xxxfb_data,
 196         },
 197         .num_resources  = ARRAY_SIZE(s1d13xxxfb_resources),
 198         .resource       = s1d13xxxfb_resources,
 199 };
 200
 201 static int __init platform_init(void)
 202 {
 203         platform_device_register(&s1d13xxxfb_device);
 204         return 0;
 205 }
 206 arch_initcall(platform_init);
 207 #endif