2 * Driver for Motorola PCAP2 as present in EZX phones
4 * Copyright (C) 2006 Harald Welte <laforge@openezx.org>
5 * Copyright (C) 2009 Daniel Ribeiro <drwyrm@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/platform_device.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/mfd/ezx-pcap.h>
19 #include <linux/spi/spi.h>
21 #define PCAP_ADC_MAXQ 8
22 struct pcap_adc_request {
26 void (*callback)(void *, u16[]);
30 struct pcap_adc_sync_request {
32 struct completion completion;
36 struct spi_device *spi;
40 struct mutex io_mutex;
43 unsigned int irq_base;
45 struct work_struct isr_work;
46 struct work_struct msr_work;
47 struct workqueue_struct *workqueue;
50 struct pcap_adc_request *adc_queue[PCAP_ADC_MAXQ];
53 struct mutex adc_mutex;
57 static int ezx_pcap_putget(struct pcap_chip *pcap, u32 *data)
59 struct spi_transfer t;
63 memset(&t, 0, sizeof t);
66 spi_message_add_tail(&t, &m);
69 t.tx_buf = (u8 *) &pcap->buf;
70 t.rx_buf = (u8 *) &pcap->buf;
71 status = spi_sync(pcap->spi, &m);
79 int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value)
83 mutex_lock(&pcap->io_mutex);
84 value &= PCAP_REGISTER_VALUE_MASK;
85 value |= PCAP_REGISTER_WRITE_OP_BIT
86 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
87 ret = ezx_pcap_putget(pcap, &value);
88 mutex_unlock(&pcap->io_mutex);
92 EXPORT_SYMBOL_GPL(ezx_pcap_write);
94 int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value)
98 mutex_lock(&pcap->io_mutex);
99 *value = PCAP_REGISTER_READ_OP_BIT
100 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
102 ret = ezx_pcap_putget(pcap, value);
103 mutex_unlock(&pcap->io_mutex);
107 EXPORT_SYMBOL_GPL(ezx_pcap_read);
110 static inline unsigned int irq2pcap(struct pcap_chip *pcap, int irq)
112 return 1 << (irq - pcap->irq_base);
115 int pcap_to_irq(struct pcap_chip *pcap, int irq)
117 return pcap->irq_base + irq;
119 EXPORT_SYMBOL_GPL(pcap_to_irq);
121 static void pcap_mask_irq(unsigned int irq)
123 struct pcap_chip *pcap = get_irq_chip_data(irq);
125 pcap->msr |= irq2pcap(pcap, irq);
126 queue_work(pcap->workqueue, &pcap->msr_work);
129 static void pcap_unmask_irq(unsigned int irq)
131 struct pcap_chip *pcap = get_irq_chip_data(irq);
133 pcap->msr &= ~irq2pcap(pcap, irq);
134 queue_work(pcap->workqueue, &pcap->msr_work);
137 static struct irq_chip pcap_irq_chip = {
139 .mask = pcap_mask_irq,
140 .unmask = pcap_unmask_irq,
143 static void pcap_msr_work(struct work_struct *work)
145 struct pcap_chip *pcap = container_of(work, struct pcap_chip, msr_work);
147 ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr);
150 static void pcap_isr_work(struct work_struct *work)
152 struct pcap_chip *pcap = container_of(work, struct pcap_chip, isr_work);
153 struct pcap_platform_data *pdata = pcap->spi->dev.platform_data;
154 u32 msr, isr, int_sel, service;
157 ezx_pcap_read(pcap, PCAP_REG_MSR, &msr);
158 ezx_pcap_read(pcap, PCAP_REG_ISR, &isr);
160 /* We cant service/ack irqs that are assigned to port 2 */
161 if (!(pdata->config & PCAP_SECOND_PORT)) {
162 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel);
165 ezx_pcap_write(pcap, PCAP_REG_ISR, isr);
168 service = isr & ~msr;
170 for (irq = pcap->irq_base; service; service >>= 1, irq++) {
172 struct irq_desc *desc = irq_to_desc(irq);
174 if (WARN(!desc, KERN_WARNING
175 "Invalid PCAP IRQ %d\n", irq))
178 if (desc->status & IRQ_DISABLED)
179 note_interrupt(irq, desc, IRQ_NONE);
181 desc->handle_irq(irq, desc);
187 static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
189 struct pcap_chip *pcap = get_irq_data(irq);
191 desc->chip->ack(irq);
192 queue_work(pcap->workqueue, &pcap->isr_work);
197 static void pcap_disable_adc(struct pcap_chip *pcap)
201 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
202 tmp &= ~(PCAP_ADC_ADEN|PCAP_ADC_BATT_I_ADC|PCAP_ADC_BATT_I_POLARITY);
203 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
206 static void pcap_adc_trigger(struct pcap_chip *pcap)
211 mutex_lock(&pcap->adc_mutex);
212 head = pcap->adc_head;
213 if (!pcap->adc_queue[head]) {
214 /* queue is empty, save power */
215 pcap_disable_adc(pcap);
216 mutex_unlock(&pcap->adc_mutex);
219 mutex_unlock(&pcap->adc_mutex);
221 /* start conversion on requested bank */
222 tmp = pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
224 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1)
225 tmp |= PCAP_ADC_AD_SEL1;
227 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
228 ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC);
231 static irqreturn_t pcap_adc_irq(int irq, void *_pcap)
233 struct pcap_chip *pcap = _pcap;
234 struct pcap_adc_request *req;
238 mutex_lock(&pcap->adc_mutex);
239 req = pcap->adc_queue[pcap->adc_head];
241 if (WARN(!req, KERN_WARNING "adc irq without pending request\n")) {
242 mutex_unlock(&pcap->adc_mutex);
246 /* read requested channels results */
247 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
248 tmp &= ~(PCAP_ADC_ADA1_MASK | PCAP_ADC_ADA2_MASK);
249 tmp |= (req->ch[0] << PCAP_ADC_ADA1_SHIFT);
250 tmp |= (req->ch[1] << PCAP_ADC_ADA2_SHIFT);
251 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
252 ezx_pcap_read(pcap, PCAP_REG_ADR, &tmp);
253 res[0] = (tmp & PCAP_ADR_ADD1_MASK) >> PCAP_ADR_ADD1_SHIFT;
254 res[1] = (tmp & PCAP_ADR_ADD2_MASK) >> PCAP_ADR_ADD2_SHIFT;
256 pcap->adc_queue[pcap->adc_head] = NULL;
257 pcap->adc_head = (pcap->adc_head + 1) & (PCAP_ADC_MAXQ - 1);
258 mutex_unlock(&pcap->adc_mutex);
260 /* pass the results and release memory */
261 req->callback(req->data, res);
264 /* trigger next conversion (if any) on queue */
265 pcap_adc_trigger(pcap);
270 int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[],
271 void *callback, void *data)
273 struct pcap_adc_request *req;
275 /* This will be freed after we have a result */
276 req = kmalloc(sizeof(struct pcap_adc_request), GFP_KERNEL);
284 req->callback = callback;
287 mutex_lock(&pcap->adc_mutex);
288 if (pcap->adc_queue[pcap->adc_tail]) {
289 mutex_unlock(&pcap->adc_mutex);
293 pcap->adc_queue[pcap->adc_tail] = req;
294 pcap->adc_tail = (pcap->adc_tail + 1) & (PCAP_ADC_MAXQ - 1);
295 mutex_unlock(&pcap->adc_mutex);
297 /* start conversion */
298 pcap_adc_trigger(pcap);
302 EXPORT_SYMBOL_GPL(pcap_adc_async);
304 static void pcap_adc_sync_cb(void *param, u16 res[])
306 struct pcap_adc_sync_request *req = param;
308 req->res[0] = res[0];
309 req->res[1] = res[1];
310 complete(&req->completion);
313 int pcap_adc_sync(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[],
316 struct pcap_adc_sync_request sync_data;
319 init_completion(&sync_data.completion);
320 ret = pcap_adc_async(pcap, bank, flags, ch, pcap_adc_sync_cb,
324 wait_for_completion(&sync_data.completion);
325 res[0] = sync_data.res[0];
326 res[1] = sync_data.res[1];
330 EXPORT_SYMBOL_GPL(pcap_adc_sync);
333 static int pcap_remove_subdev(struct device *dev, void *unused)
335 platform_device_unregister(to_platform_device(dev));
339 static int __devinit pcap_add_subdev(struct pcap_chip *pcap,
340 struct pcap_subdev *subdev)
342 struct platform_device *pdev;
344 pdev = platform_device_alloc(subdev->name, subdev->id);
345 pdev->dev.parent = &pcap->spi->dev;
346 pdev->dev.platform_data = subdev->platform_data;
347 platform_set_drvdata(pdev, pcap);
349 return platform_device_add(pdev);
352 static int __devexit ezx_pcap_remove(struct spi_device *spi)
354 struct pcap_chip *pcap = dev_get_drvdata(&spi->dev);
355 struct pcap_platform_data *pdata = spi->dev.platform_data;
358 /* remove all registered subdevs */
359 device_for_each_child(&spi->dev, NULL, pcap_remove_subdev);
362 adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ?
363 PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE);
364 free_irq(adc_irq, pcap);
365 mutex_lock(&pcap->adc_mutex);
366 for (i = 0; i < PCAP_ADC_MAXQ; i++)
367 kfree(pcap->adc_queue[i]);
368 mutex_unlock(&pcap->adc_mutex);
370 /* cleanup irqchip */
371 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
372 set_irq_chip_and_handler(i, NULL, NULL);
374 destroy_workqueue(pcap->workqueue);
381 static int __devinit ezx_pcap_probe(struct spi_device *spi)
383 struct pcap_platform_data *pdata = spi->dev.platform_data;
384 struct pcap_chip *pcap;
388 /* platform data is required */
392 pcap = kzalloc(sizeof(*pcap), GFP_KERNEL);
398 mutex_init(&pcap->io_mutex);
399 mutex_init(&pcap->adc_mutex);
400 INIT_WORK(&pcap->isr_work, pcap_isr_work);
401 INIT_WORK(&pcap->msr_work, pcap_msr_work);
402 dev_set_drvdata(&spi->dev, pcap);
405 spi->bits_per_word = 32;
406 spi->mode = SPI_MODE_0 | (pdata->config & PCAP_CS_AH ? SPI_CS_HIGH : 0);
407 ret = spi_setup(spi);
414 pcap->irq_base = pdata->irq_base;
415 pcap->workqueue = create_singlethread_workqueue("pcapd");
416 if (!pcap->workqueue) {
417 dev_err(&spi->dev, "cant create pcap thread\n");
421 /* redirect interrupts to AP, except adcdone2 */
422 if (!(pdata->config & PCAP_SECOND_PORT))
423 ezx_pcap_write(pcap, PCAP_REG_INT_SEL,
424 (1 << PCAP_IRQ_ADCDONE2));
427 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) {
428 set_irq_chip_and_handler(i, &pcap_irq_chip, handle_simple_irq);
429 set_irq_chip_data(i, pcap);
431 set_irq_flags(i, IRQF_VALID);
437 /* mask/ack all PCAP interrupts */
438 ezx_pcap_write(pcap, PCAP_REG_MSR, PCAP_MASK_ALL_INTERRUPT);
439 ezx_pcap_write(pcap, PCAP_REG_ISR, PCAP_CLEAR_INTERRUPT_REGISTER);
440 pcap->msr = PCAP_MASK_ALL_INTERRUPT;
442 set_irq_type(spi->irq, IRQ_TYPE_EDGE_RISING);
443 set_irq_data(spi->irq, pcap);
444 set_irq_chained_handler(spi->irq, pcap_irq_handler);
445 set_irq_wake(spi->irq, 1);
448 adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ?
449 PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE);
451 ret = request_irq(adc_irq, pcap_adc_irq, 0, "ADC", pcap);
456 for (i = 0; i < pdata->num_subdevs; i++) {
457 ret = pcap_add_subdev(pcap, &pdata->subdevs[i]);
462 /* board specific quirks */
469 device_for_each_child(&spi->dev, NULL, pcap_remove_subdev);
471 free_irq(adc_irq, pcap);
473 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
474 set_irq_chip_and_handler(i, NULL, NULL);
475 /* destroy_workqueue: */
476 destroy_workqueue(pcap->workqueue);
483 static struct spi_driver ezxpcap_driver = {
484 .probe = ezx_pcap_probe,
485 .remove = __devexit_p(ezx_pcap_remove),
488 .owner = THIS_MODULE,
492 static int __init ezx_pcap_init(void)
494 return spi_register_driver(&ezxpcap_driver);
497 static void __exit ezx_pcap_exit(void)
499 spi_unregister_driver(&ezxpcap_driver);
502 module_init(ezx_pcap_init);
503 module_exit(ezx_pcap_exit);
505 MODULE_LICENSE("GPL");
506 MODULE_AUTHOR("Daniel Ribeiro / Harald Welte");
507 MODULE_DESCRIPTION("Motorola PCAP2 ASIC Driver");