2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
37 #include <asm/firmware.h>
39 #include "pasemi_mac.h"
41 /* We have our own align, since ppc64 in general has it at 0 because
42 * of design flaws in some of the server bridge chips. However, for
43 * PWRficient doing the unaligned copies is more expensive than doing
44 * unaligned DMA, so make sure the data is aligned instead.
46 #define LOCAL_SKB_ALIGN 2
57 /* Must be a power of two */
58 #define RX_RING_SIZE 4096
59 #define TX_RING_SIZE 4096
61 #define DEFAULT_MSG_ENABLE \
71 #define TX_RING(mac, num) ((mac)->tx->ring[(num) & (TX_RING_SIZE-1)])
72 #define TX_RING_INFO(mac, num) ((mac)->tx->ring_info[(num) & (TX_RING_SIZE-1)])
73 #define RX_RING(mac, num) ((mac)->rx->ring[(num) & (RX_RING_SIZE-1)])
74 #define RX_RING_INFO(mac, num) ((mac)->rx->ring_info[(num) & (RX_RING_SIZE-1)])
75 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
77 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
79 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
81 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
83 MODULE_LICENSE("GPL");
84 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
85 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
87 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
88 module_param(debug, int, 0);
89 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
91 static struct pasdma_status *dma_status;
93 static int translation_enabled(void)
95 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
98 return firmware_has_feature(FW_FEATURE_LPAR);
102 static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
105 out_le32(mac->iob_regs+reg, val);
108 static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
110 return in_le32(mac->regs+reg);
113 static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
116 out_le32(mac->regs+reg, val);
119 static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
121 return in_le32(mac->dma_regs+reg);
124 static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
127 out_le32(mac->dma_regs+reg, val);
130 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
132 struct pci_dev *pdev = mac->pdev;
133 struct device_node *dn = pci_device_to_OF_node(pdev);
140 "No device node for mac, not configuring\n");
144 maddr = of_get_property(dn, "local-mac-address", &len);
146 if (maddr && len == 6) {
147 memcpy(mac->mac_addr, maddr, 6);
151 /* Some old versions of firmware mistakenly uses mac-address
152 * (and as a string) instead of a byte array in local-mac-address.
156 maddr = of_get_property(dn, "mac-address", NULL);
160 "no mac address in device tree, not configuring\n");
165 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
166 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
168 "can't parse mac address, not configuring\n");
172 memcpy(mac->mac_addr, addr, 6);
177 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
182 int nfrags = skb_shinfo(skb)->nr_frags;
184 pci_unmap_single(mac->dma_pdev, dmas[0], skb_headlen(skb),
187 for (f = 0; f < nfrags; f++) {
188 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
190 pci_unmap_page(mac->dma_pdev, dmas[f+1], frag->size,
193 dev_kfree_skb_irq(skb);
195 /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
196 * aligned up to a power of 2
198 return (nfrags + 3) & ~1;
201 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
203 struct pasemi_mac_rxring *ring;
204 struct pasemi_mac *mac = netdev_priv(dev);
205 int chan_id = mac->dma_rxch;
208 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
213 spin_lock_init(&ring->lock);
215 ring->size = RX_RING_SIZE;
216 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
217 RX_RING_SIZE, GFP_KERNEL);
219 if (!ring->ring_info)
222 /* Allocate descriptors */
223 ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
224 RX_RING_SIZE * sizeof(u64),
225 &ring->dma, GFP_KERNEL);
230 memset(ring->ring, 0, RX_RING_SIZE * sizeof(u64));
232 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
233 RX_RING_SIZE * sizeof(u64),
234 &ring->buf_dma, GFP_KERNEL);
238 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
240 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
242 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
243 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
244 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
246 cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
248 if (translation_enabled())
249 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
251 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id), cfg);
253 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
254 PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
256 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
257 PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
258 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
260 cfg = PAS_DMA_RXINT_CFG_DHL(3) | PAS_DMA_RXINT_CFG_L2 |
261 PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
262 PAS_DMA_RXINT_CFG_HEN;
264 if (translation_enabled())
265 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
267 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
269 ring->next_to_fill = 0;
270 ring->next_to_clean = 0;
272 snprintf(ring->irq_name, sizeof(ring->irq_name),
279 dma_free_coherent(&mac->dma_pdev->dev,
280 RX_RING_SIZE * sizeof(u64),
281 mac->rx->ring, mac->rx->dma);
283 kfree(ring->ring_info);
291 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
293 struct pasemi_mac *mac = netdev_priv(dev);
295 int chan_id = mac->dma_txch;
296 struct pasemi_mac_txring *ring;
299 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
303 spin_lock_init(&ring->lock);
305 ring->size = TX_RING_SIZE;
306 ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
307 TX_RING_SIZE, GFP_KERNEL);
308 if (!ring->ring_info)
311 /* Allocate descriptors */
312 ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
313 TX_RING_SIZE * sizeof(u64),
314 &ring->dma, GFP_KERNEL);
318 memset(ring->ring, 0, TX_RING_SIZE * sizeof(u64));
320 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
321 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
322 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
323 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
325 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
327 cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
328 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
329 PAS_DMA_TXCHAN_CFG_UP |
330 PAS_DMA_TXCHAN_CFG_WT(2);
332 if (translation_enabled())
333 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
335 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id), cfg);
337 ring->next_to_fill = 0;
338 ring->next_to_clean = 0;
340 snprintf(ring->irq_name, sizeof(ring->irq_name),
347 kfree(ring->ring_info);
354 static void pasemi_mac_free_tx_resources(struct net_device *dev)
356 struct pasemi_mac *mac = netdev_priv(dev);
358 struct pasemi_mac_buffer *info;
359 dma_addr_t dmas[MAX_SKB_FRAGS+1];
363 start = mac->tx->next_to_clean;
364 limit = mac->tx->next_to_fill;
366 /* Compensate for when fill has wrapped and clean has not */
368 limit += TX_RING_SIZE;
370 for (i = start; i < limit; i += freed) {
371 info = &TX_RING_INFO(mac, i+1);
372 if (info->dma && info->skb) {
373 for (j = 0; j <= skb_shinfo(info->skb)->nr_frags; j++)
374 dmas[j] = TX_RING_INFO(mac, i+1+j).dma;
375 freed = pasemi_mac_unmap_tx_skb(mac, info->skb, dmas);
380 for (i = 0; i < TX_RING_SIZE; i++)
383 dma_free_coherent(&mac->dma_pdev->dev,
384 TX_RING_SIZE * sizeof(u64),
385 mac->tx->ring, mac->tx->dma);
387 kfree(mac->tx->ring_info);
392 static void pasemi_mac_free_rx_resources(struct net_device *dev)
394 struct pasemi_mac *mac = netdev_priv(dev);
396 struct pasemi_mac_buffer *info;
398 for (i = 0; i < RX_RING_SIZE; i++) {
399 info = &RX_RING_INFO(mac, i);
400 if (info->skb && info->dma) {
401 pci_unmap_single(mac->dma_pdev,
405 dev_kfree_skb_any(info->skb);
411 for (i = 0; i < RX_RING_SIZE; i++)
414 dma_free_coherent(&mac->dma_pdev->dev,
415 RX_RING_SIZE * sizeof(u64),
416 mac->rx->ring, mac->rx->dma);
418 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
419 mac->rx->buffers, mac->rx->buf_dma);
421 kfree(mac->rx->ring_info);
426 static void pasemi_mac_replenish_rx_ring(struct net_device *dev, int limit)
428 struct pasemi_mac *mac = netdev_priv(dev);
434 fill = mac->rx->next_to_fill;
435 for (count = 0; count < limit; count++) {
436 struct pasemi_mac_buffer *info = &RX_RING_INFO(mac, fill);
437 u64 *buff = &RX_BUFF(mac, fill);
444 /* skb might still be in there for recycle on short receives */
448 skb = dev_alloc_skb(BUF_SIZE);
449 skb_reserve(skb, LOCAL_SKB_ALIGN);
455 dma = pci_map_single(mac->dma_pdev, skb->data,
456 BUF_SIZE - LOCAL_SKB_ALIGN,
459 if (unlikely(dma_mapping_error(dma))) {
460 dev_kfree_skb_irq(info->skb);
466 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
472 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), count);
474 mac->rx->next_to_fill = (mac->rx->next_to_fill + count) &
478 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
480 unsigned int reg, pcnt;
481 /* Re-enable packet count interrupts: finally
482 * ack the packet count interrupt we got in rx_intr.
485 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
487 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
489 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
492 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
494 unsigned int reg, pcnt;
496 /* Re-enable packet count interrupts */
497 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
499 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
501 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
505 static inline void pasemi_mac_rx_error(struct pasemi_mac *mac, u64 macrx)
507 unsigned int rcmdsta, ccmdsta;
509 if (!netif_msg_rx_err(mac))
512 rcmdsta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
513 ccmdsta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
515 printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
516 macrx, *mac->rx_status);
518 printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
522 static inline void pasemi_mac_tx_error(struct pasemi_mac *mac, u64 mactx)
526 if (!netif_msg_tx_err(mac))
529 cmdsta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
531 printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
532 "tx status 0x%016lx\n", mactx, *mac->tx_status);
534 printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
537 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
541 struct pasemi_mac_buffer *info;
549 spin_lock(&mac->rx->lock);
551 n = mac->rx->next_to_clean;
553 prefetch(&RX_RING(mac, n));
555 for (count = 0; count < limit; count++) {
556 macrx = RX_RING(mac, n);
558 if ((macrx & XCT_MACRX_E) ||
559 (*mac->rx_status & PAS_STATUS_ERROR))
560 pasemi_mac_rx_error(mac, macrx);
562 if (!(macrx & XCT_MACRX_O))
567 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
569 eval = (RX_RING(mac, n+1) & XCT_RXRES_8B_EVAL_M) >>
573 dma = (RX_RING(mac, n+2) & XCT_PTR_ADDR_M);
574 info = &RX_RING_INFO(mac, buf_index);
579 prefetch(&skb->data_len);
581 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
583 pci_unmap_single(mac->dma_pdev, dma, len, PCI_DMA_FROMDEVICE);
585 if (macrx & XCT_MACRX_CRC) {
586 /* CRC error flagged */
587 mac->netdev->stats.rx_errors++;
588 mac->netdev->stats.rx_crc_errors++;
589 dev_kfree_skb_irq(skb);
594 struct sk_buff *new_skb;
596 new_skb = netdev_alloc_skb(mac->netdev,
597 len + LOCAL_SKB_ALIGN);
599 skb_reserve(new_skb, LOCAL_SKB_ALIGN);
600 memcpy(new_skb->data, skb->data, len);
601 /* save the skb in buffer_info as good */
604 /* else just continue with the old one */
610 /* Don't include CRC */
613 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
614 skb->ip_summed = CHECKSUM_UNNECESSARY;
615 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
618 skb->ip_summed = CHECKSUM_NONE;
620 mac->netdev->stats.rx_bytes += len;
621 mac->netdev->stats.rx_packets++;
623 skb->protocol = eth_type_trans(skb, mac->netdev);
624 netif_receive_skb(skb);
628 RX_RING(mac, n+1) = 0;
630 /* Need to zero it out since hardware doesn't, since the
631 * replenish loop uses it to tell when it's done.
633 RX_BUFF(mac, buf_index) = 0;
638 if (n > RX_RING_SIZE) {
639 /* Errata 5971 workaround: L2 target of headers */
640 write_iob_reg(mac, PAS_IOB_COM_PKTHDRCNT, 0);
641 n &= (RX_RING_SIZE-1);
644 mac->rx->next_to_clean = n;
646 /* Increase is in number of 16-byte entries, and since each descriptor
647 * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
650 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), count << 1);
652 pasemi_mac_replenish_rx_ring(mac->netdev, count);
654 spin_unlock(&mac->rx->lock);
659 /* Can't make this too large or we blow the kernel stack limits */
660 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
662 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
665 unsigned int start, descr_count, buf_count, batch_limit;
666 unsigned int ring_limit;
667 unsigned int total_count;
669 struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
670 dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
673 batch_limit = TX_CLEAN_BATCHSIZE;
675 spin_lock_irqsave(&mac->tx->lock, flags);
677 start = mac->tx->next_to_clean;
678 ring_limit = mac->tx->next_to_fill;
680 /* Compensate for when fill has wrapped but clean has not */
681 if (start > ring_limit)
682 ring_limit += TX_RING_SIZE;
688 descr_count < batch_limit && i < ring_limit;
690 u64 mactx = TX_RING(mac, i);
693 if ((mactx & XCT_MACTX_E) ||
694 (*mac->tx_status & PAS_STATUS_ERROR))
695 pasemi_mac_tx_error(mac, mactx);
697 if (unlikely(mactx & XCT_MACTX_O))
698 /* Not yet transmitted */
701 skb = TX_RING_INFO(mac, i+1).skb;
702 skbs[descr_count] = skb;
704 buf_count = 2 + skb_shinfo(skb)->nr_frags;
705 for (j = 0; j <= skb_shinfo(skb)->nr_frags; j++)
706 dmas[descr_count][j] = TX_RING_INFO(mac, i+1+j).dma;
709 TX_RING(mac, i+1) = 0;
711 /* Since we always fill with an even number of entries, make
712 * sure we skip any unused one at the end as well.
718 mac->tx->next_to_clean = i & (TX_RING_SIZE-1);
720 spin_unlock_irqrestore(&mac->tx->lock, flags);
721 netif_wake_queue(mac->netdev);
723 for (i = 0; i < descr_count; i++)
724 pasemi_mac_unmap_tx_skb(mac, skbs[i], dmas[i]);
726 total_count += descr_count;
728 /* If the batch was full, try to clean more */
729 if (descr_count == batch_limit)
736 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
738 struct net_device *dev = data;
739 struct pasemi_mac *mac = netdev_priv(dev);
742 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
745 /* Don't reset packet count so it won't fire again but clear
750 if (*mac->rx_status & PAS_STATUS_SOFT)
751 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
752 if (*mac->rx_status & PAS_STATUS_ERROR)
753 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
754 if (*mac->rx_status & PAS_STATUS_TIMER)
755 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
757 netif_rx_schedule(dev, &mac->napi);
759 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
764 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
766 struct net_device *dev = data;
767 struct pasemi_mac *mac = netdev_priv(dev);
768 unsigned int reg, pcnt;
770 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
773 pasemi_mac_clean_tx(mac);
775 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
777 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
779 if (*mac->tx_status & PAS_STATUS_SOFT)
780 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
781 if (*mac->tx_status & PAS_STATUS_ERROR)
782 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
784 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
789 static void pasemi_adjust_link(struct net_device *dev)
791 struct pasemi_mac *mac = netdev_priv(dev);
794 unsigned int new_flags;
796 if (!mac->phydev->link) {
797 /* If no link, MAC speed settings don't matter. Just report
798 * link down and return.
800 if (mac->link && netif_msg_link(mac))
801 printk(KERN_INFO "%s: Link is down.\n", dev->name);
803 netif_carrier_off(dev);
808 netif_carrier_on(dev);
810 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
811 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
812 PAS_MAC_CFG_PCFG_TSR_M);
814 if (!mac->phydev->duplex)
815 new_flags |= PAS_MAC_CFG_PCFG_HD;
817 switch (mac->phydev->speed) {
819 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
820 PAS_MAC_CFG_PCFG_TSR_1G;
823 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
824 PAS_MAC_CFG_PCFG_TSR_100M;
827 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
828 PAS_MAC_CFG_PCFG_TSR_10M;
831 printk("Unsupported speed %d\n", mac->phydev->speed);
834 /* Print on link or speed/duplex change */
835 msg = mac->link != mac->phydev->link || flags != new_flags;
837 mac->duplex = mac->phydev->duplex;
838 mac->speed = mac->phydev->speed;
839 mac->link = mac->phydev->link;
841 if (new_flags != flags)
842 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
844 if (msg && netif_msg_link(mac))
845 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
846 dev->name, mac->speed, mac->duplex ? "full" : "half");
849 static int pasemi_mac_phy_init(struct net_device *dev)
851 struct pasemi_mac *mac = netdev_priv(dev);
852 struct device_node *dn, *phy_dn;
853 struct phy_device *phydev;
856 const unsigned int *prop;
860 dn = pci_device_to_OF_node(mac->pdev);
861 ph = of_get_property(dn, "phy-handle", NULL);
864 phy_dn = of_find_node_by_phandle(*ph);
866 prop = of_get_property(phy_dn, "reg", NULL);
867 ret = of_address_to_resource(phy_dn->parent, 0, &r);
872 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
880 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
882 if (IS_ERR(phydev)) {
883 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
884 return PTR_ERR(phydev);
887 mac->phydev = phydev;
897 static int pasemi_mac_open(struct net_device *dev)
899 struct pasemi_mac *mac = netdev_priv(dev);
904 /* enable rx section */
905 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
907 /* enable tx section */
908 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
910 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
911 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
912 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
914 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
916 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
917 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
919 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
920 PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
922 /* Clear out any residual packet count state from firmware */
923 pasemi_mac_restart_rx_intr(mac);
924 pasemi_mac_restart_tx_intr(mac);
926 /* 0xffffff is max value, about 16ms */
927 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
928 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
930 ret = pasemi_mac_setup_rx_resources(dev);
932 goto out_rx_resources;
934 ret = pasemi_mac_setup_tx_resources(dev);
936 goto out_tx_resources;
938 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
939 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
940 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
943 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
944 PAS_DMA_RXINT_RCMDSTA_EN |
945 PAS_DMA_RXINT_RCMDSTA_DROPS_M |
946 PAS_DMA_RXINT_RCMDSTA_BP |
947 PAS_DMA_RXINT_RCMDSTA_OO |
948 PAS_DMA_RXINT_RCMDSTA_BT);
950 /* enable rx channel */
951 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
952 PAS_DMA_RXCHAN_CCMDSTA_EN |
953 PAS_DMA_RXCHAN_CCMDSTA_DU |
954 PAS_DMA_RXCHAN_CCMDSTA_OD |
955 PAS_DMA_RXCHAN_CCMDSTA_FD |
956 PAS_DMA_RXCHAN_CCMDSTA_DT);
958 /* enable tx channel */
959 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
960 PAS_DMA_TXCHAN_TCMDSTA_EN |
961 PAS_DMA_TXCHAN_TCMDSTA_SZ |
962 PAS_DMA_TXCHAN_TCMDSTA_DB |
963 PAS_DMA_TXCHAN_TCMDSTA_DE |
964 PAS_DMA_TXCHAN_TCMDSTA_DA);
966 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
968 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), RX_RING_SIZE>>1);
970 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
971 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
973 if (mac->type == MAC_TYPE_GMAC)
974 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
976 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
978 /* Enable interface in MAC */
979 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
981 ret = pasemi_mac_phy_init(dev);
982 /* Some configs don't have PHYs (XAUI etc), so don't complain about
983 * failed init due to -ENODEV.
985 if (ret && ret != -ENODEV)
986 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
988 netif_start_queue(dev);
989 napi_enable(&mac->napi);
991 /* Interrupts are a bit different for our DMA controller: While
992 * it's got one a regular PCI device header, the interrupt there
993 * is really the base of the range it's using. Each tx and rx
994 * channel has it's own interrupt source.
997 base_irq = virq_to_hw(mac->dma_pdev->irq);
999 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
1000 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
1002 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
1003 mac->tx->irq_name, dev);
1005 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1006 base_irq + mac->dma_txch, ret);
1010 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
1011 mac->rx->irq_name, dev);
1013 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1014 base_irq + 20 + mac->dma_rxch, ret);
1019 phy_start(mac->phydev);
1024 free_irq(mac->tx_irq, dev);
1026 napi_disable(&mac->napi);
1027 netif_stop_queue(dev);
1028 pasemi_mac_free_tx_resources(dev);
1030 pasemi_mac_free_rx_resources(dev);
1036 #define MAX_RETRIES 5000
1038 static int pasemi_mac_close(struct net_device *dev)
1040 struct pasemi_mac *mac = netdev_priv(dev);
1045 phy_stop(mac->phydev);
1046 phy_disconnect(mac->phydev);
1049 netif_stop_queue(dev);
1050 napi_disable(&mac->napi);
1052 sta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1053 if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1054 PAS_DMA_RXINT_RCMDSTA_OO |
1055 PAS_DMA_RXINT_RCMDSTA_BT))
1056 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1058 sta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
1059 if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1060 PAS_DMA_RXCHAN_CCMDSTA_OD |
1061 PAS_DMA_RXCHAN_CCMDSTA_FD |
1062 PAS_DMA_RXCHAN_CCMDSTA_DT))
1063 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1065 sta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
1066 if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ |
1067 PAS_DMA_TXCHAN_TCMDSTA_DB |
1068 PAS_DMA_TXCHAN_TCMDSTA_DE |
1069 PAS_DMA_TXCHAN_TCMDSTA_DA))
1070 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1072 /* Clean out any pending buffers */
1073 pasemi_mac_clean_tx(mac);
1074 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
1076 /* Disable interface */
1077 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
1078 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
1079 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
1081 for (retries = 0; retries < MAX_RETRIES; retries++) {
1082 sta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
1083 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1088 if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1089 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
1091 for (retries = 0; retries < MAX_RETRIES; retries++) {
1092 sta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
1093 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1098 if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1099 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
1101 for (retries = 0; retries < MAX_RETRIES; retries++) {
1102 sta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1103 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1108 if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1109 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
1111 /* Then, disable the channel. This must be done separately from
1112 * stopping, since you can't disable when active.
1115 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
1116 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
1117 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1119 free_irq(mac->tx_irq, dev);
1120 free_irq(mac->rx_irq, dev);
1122 /* Free resources */
1123 pasemi_mac_free_rx_resources(dev);
1124 pasemi_mac_free_tx_resources(dev);
1129 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1131 struct pasemi_mac *mac = netdev_priv(dev);
1132 struct pasemi_mac_txring *txring;
1134 dma_addr_t map[MAX_SKB_FRAGS+1];
1135 unsigned int map_size[MAX_SKB_FRAGS+1];
1136 unsigned long flags;
1139 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1141 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1142 const unsigned char *nh = skb_network_header(skb);
1144 switch (ip_hdr(skb)->protocol) {
1146 dflags |= XCT_MACTX_CSUM_TCP;
1147 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1148 dflags |= XCT_MACTX_IPO(nh - skb->data);
1151 dflags |= XCT_MACTX_CSUM_UDP;
1152 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
1153 dflags |= XCT_MACTX_IPO(nh - skb->data);
1158 nfrags = skb_shinfo(skb)->nr_frags;
1160 map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1162 map_size[0] = skb_headlen(skb);
1163 if (dma_mapping_error(map[0]))
1164 goto out_err_nolock;
1166 for (i = 0; i < nfrags; i++) {
1167 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1169 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1170 frag->page_offset, frag->size,
1172 map_size[i+1] = frag->size;
1173 if (dma_mapping_error(map[i+1])) {
1175 goto out_err_nolock;
1179 mactx = dflags | XCT_MACTX_LLEN(skb->len);
1183 spin_lock_irqsave(&txring->lock, flags);
1185 /* Avoid stepping on the same cache line that the DMA controller
1186 * is currently about to send, so leave at least 8 words available.
1187 * Total free space needed is mactx + fragments + 8
1189 if (RING_AVAIL(txring) < nfrags + 10) {
1190 /* no room -- stop the queue and wait for tx intr */
1191 netif_stop_queue(dev);
1195 TX_RING(mac, txring->next_to_fill) = mactx;
1196 txring->next_to_fill++;
1197 TX_RING_INFO(mac, txring->next_to_fill).skb = skb;
1198 for (i = 0; i <= nfrags; i++) {
1199 TX_RING(mac, txring->next_to_fill+i) =
1200 XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1201 TX_RING_INFO(mac, txring->next_to_fill+i).dma = map[i];
1204 /* We have to add an even number of 8-byte entries to the ring
1205 * even if the last one is unused. That means always an odd number
1206 * of pointers + one mactx descriptor.
1211 txring->next_to_fill = (txring->next_to_fill + nfrags + 1) &
1214 dev->stats.tx_packets++;
1215 dev->stats.tx_bytes += skb->len;
1217 spin_unlock_irqrestore(&txring->lock, flags);
1219 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), (nfrags+2) >> 1);
1221 return NETDEV_TX_OK;
1224 spin_unlock_irqrestore(&txring->lock, flags);
1227 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1230 return NETDEV_TX_BUSY;
1233 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1235 struct pasemi_mac *mac = netdev_priv(dev);
1238 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1240 /* Set promiscuous */
1241 if (dev->flags & IFF_PROMISC)
1242 flags |= PAS_MAC_CFG_PCFG_PR;
1244 flags &= ~PAS_MAC_CFG_PCFG_PR;
1246 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1250 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1252 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1253 struct net_device *dev = mac->netdev;
1256 pasemi_mac_clean_tx(mac);
1257 pkts = pasemi_mac_clean_rx(mac, budget);
1258 if (pkts < budget) {
1259 /* all done, no more packets present */
1260 netif_rx_complete(dev, napi);
1262 pasemi_mac_restart_rx_intr(mac);
1267 static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1269 struct device_node *dn;
1272 dn = pci_device_to_OF_node(p);
1276 ret = of_iomap(dn, index);
1282 /* This is hardcoded and ugly, but we have some firmware versions
1283 * that don't provide the register space in the device tree. Luckily
1284 * they are at well-known locations so we can just do the math here.
1286 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1289 static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1291 struct resource res;
1292 struct device_node *dn;
1295 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1296 if (!mac->dma_pdev) {
1297 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1301 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1302 if (!mac->iob_pdev) {
1303 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1307 mac->regs = map_onedev(mac->pdev, 0);
1308 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1309 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1311 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1312 dev_err(&mac->pdev->dev, "Can't map registers\n");
1316 /* The dma status structure is located in the I/O bridge, and
1317 * is cache coherent.
1320 dn = pci_device_to_OF_node(mac->iob_pdev);
1322 err = of_address_to_resource(dn, 1, &res);
1324 /* Fallback for old firmware */
1325 res.start = 0xfd800000;
1326 res.end = res.start + 0x1000;
1328 dma_status = __ioremap(res.start, res.end-res.start, 0);
1334 static int __devinit
1335 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1337 static int index = 0;
1338 struct net_device *dev;
1339 struct pasemi_mac *mac;
1341 DECLARE_MAC_BUF(mac_buf);
1343 err = pci_enable_device(pdev);
1347 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1350 "pasemi_mac: Could not allocate ethernet device.\n");
1352 goto out_disable_device;
1355 pci_set_drvdata(pdev, dev);
1356 SET_NETDEV_DEV(dev, &pdev->dev);
1358 mac = netdev_priv(dev);
1363 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1365 dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX | NETIF_F_SG;
1367 /* These should come out of the device tree eventually */
1368 mac->dma_txch = index;
1369 mac->dma_rxch = index;
1371 /* We probe GMAC before XAUI, but the DMA interfaces are
1372 * in XAUI, GMAC order.
1375 mac->dma_if = index + 2;
1377 mac->dma_if = index - 4;
1380 switch (pdev->device) {
1382 mac->type = MAC_TYPE_GMAC;
1385 mac->type = MAC_TYPE_XAUI;
1392 /* get mac addr from device tree */
1393 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1397 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1399 dev->open = pasemi_mac_open;
1400 dev->stop = pasemi_mac_close;
1401 dev->hard_start_xmit = pasemi_mac_start_tx;
1402 dev->set_multicast_list = pasemi_mac_set_rx_mode;
1404 err = pasemi_mac_map_regs(mac);
1408 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1409 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1411 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1413 /* Enable most messages by default */
1414 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1416 err = register_netdev(dev);
1419 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1422 } else if netif_msg_probe(mac)
1423 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1425 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1426 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1427 print_mac(mac_buf, dev->dev_addr));
1433 pci_dev_put(mac->iob_pdev);
1435 pci_dev_put(mac->dma_pdev);
1437 iounmap(mac->dma_regs);
1439 iounmap(mac->iob_regs);
1445 pci_disable_device(pdev);
1450 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1452 struct net_device *netdev = pci_get_drvdata(pdev);
1453 struct pasemi_mac *mac;
1458 mac = netdev_priv(netdev);
1460 unregister_netdev(netdev);
1462 pci_disable_device(pdev);
1463 pci_dev_put(mac->dma_pdev);
1464 pci_dev_put(mac->iob_pdev);
1467 iounmap(mac->dma_regs);
1468 iounmap(mac->iob_regs);
1470 pci_set_drvdata(pdev, NULL);
1471 free_netdev(netdev);
1474 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1475 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1476 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1480 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1482 static struct pci_driver pasemi_mac_driver = {
1483 .name = "pasemi_mac",
1484 .id_table = pasemi_mac_pci_tbl,
1485 .probe = pasemi_mac_probe,
1486 .remove = __devexit_p(pasemi_mac_remove),
1489 static void __exit pasemi_mac_cleanup_module(void)
1491 pci_unregister_driver(&pasemi_mac_driver);
1492 __iounmap(dma_status);
1496 int pasemi_mac_init_module(void)
1498 return pci_register_driver(&pasemi_mac_driver);
1501 module_init(pasemi_mac_init_module);
1502 module_exit(pasemi_mac_cleanup_module);