2 * linux/arch/ia64/kernel/irq_ia64.c
4 * Copyright (C) 1998-2001 Hewlett-Packard Co
5 * Stephane Eranian <eranian@hpl.hp.com>
6 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * 6/10/99: Updated to bring in sync with x86 version to facilitate
9 * support for SMP and different interrupt controllers.
11 * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
12 * PCI to vector allocation routine.
13 * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
14 * Added CPU Hotplug handling for IPF.
17 #include <linux/module.h>
19 #include <linux/jiffies.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/ioport.h>
24 #include <linux/kernel_stat.h>
25 #include <linux/slab.h>
26 #include <linux/ptrace.h>
27 #include <linux/random.h> /* for rand_initialize_irq() */
28 #include <linux/signal.h>
29 #include <linux/smp.h>
30 #include <linux/smp_lock.h>
31 #include <linux/threads.h>
32 #include <linux/bitops.h>
33 #include <linux/irq.h>
35 #include <asm/delay.h>
36 #include <asm/intrinsics.h>
38 #include <asm/hw_irq.h>
39 #include <asm/machvec.h>
40 #include <asm/pgtable.h>
41 #include <asm/system.h>
44 # include <asm/perfmon.h>
49 /* These can be overridden in platform_irq_init */
50 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
51 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
53 /* default base addr of IPI table */
54 void __iomem *ipi_base_addr = ((void __iomem *)
55 (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
58 * Legacy IRQ to IA-64 vector translation table.
60 __u8 isa_irq_to_vector_map[16] = {
61 /* 8259 IRQ translation, first 16 entries */
62 0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
63 0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
65 EXPORT_SYMBOL(isa_irq_to_vector_map);
67 static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_MAX_DEVICE_VECTORS)];
70 assign_irq_vector (int irq)
74 pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS);
75 vector = IA64_FIRST_DEVICE_VECTOR + pos;
76 if (vector > IA64_LAST_DEVICE_VECTOR)
78 if (test_and_set_bit(pos, ia64_vector_mask))
84 free_irq_vector (int vector)
88 if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR)
91 pos = vector - IA64_FIRST_DEVICE_VECTOR;
92 if (!test_and_clear_bit(pos, ia64_vector_mask))
93 printk(KERN_WARNING "%s: double free!\n", __FUNCTION__);
97 reserve_irq_vector (int vector)
101 if (vector < IA64_FIRST_DEVICE_VECTOR ||
102 vector > IA64_LAST_DEVICE_VECTOR)
105 pos = vector - IA64_FIRST_DEVICE_VECTOR;
106 return test_and_set_bit(pos, ia64_vector_mask);
110 * Dynamic irq allocate and deallocation for MSI
114 int vector = assign_irq_vector(AUTO_ASSIGN);
117 dynamic_irq_init(vector);
122 void destroy_irq(unsigned int irq)
124 dynamic_irq_cleanup(irq);
125 free_irq_vector(irq);
129 # define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE)
131 # define IS_RESCHEDULE(vec) (0)
134 * That's where the IVT branches when we get an external
135 * interrupt. This branches to the correct hardware IRQ handler via
139 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
141 struct pt_regs *old_regs = set_irq_regs(regs);
142 unsigned long saved_tpr;
146 unsigned long bsp, sp;
149 * Note: if the interrupt happened while executing in
150 * the context switch routine (ia64_switch_to), we may
151 * get a spurious stack overflow here. This is
152 * because the register and the memory stack are not
153 * switched atomically.
155 bsp = ia64_getreg(_IA64_REG_AR_BSP);
156 sp = ia64_getreg(_IA64_REG_SP);
158 if ((sp - bsp) < 1024) {
159 static unsigned char count;
160 static long last_time;
162 if (jiffies - last_time > 5*HZ)
166 printk("ia64_handle_irq: DANGER: less than "
167 "1KB of free stack space!!\n"
168 "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
172 #endif /* IRQ_DEBUG */
175 * Always set TPR to limit maximum interrupt nesting depth to
176 * 16 (without this, it would be ~240, which could easily lead
177 * to kernel stack overflows).
180 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
182 while (vector != IA64_SPURIOUS_INT_VECTOR) {
183 if (unlikely(IS_RESCHEDULE(vector)))
184 kstat_this_cpu.irqs[vector]++;
186 ia64_setreg(_IA64_REG_CR_TPR, vector);
189 __do_IRQ(local_vector_to_irq(vector));
192 * Disable interrupts and send EOI:
195 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
198 vector = ia64_get_ivr();
201 * This must be done *after* the ia64_eoi(). For example, the keyboard softirq
202 * handler needs to be able to wait for further keyboard interrupts, which can't
203 * come through until ia64_eoi() has been done.
206 set_irq_regs(old_regs);
209 #ifdef CONFIG_HOTPLUG_CPU
211 * This function emulates a interrupt processing when a cpu is about to be
214 void ia64_process_pending_intr(void)
217 unsigned long saved_tpr;
218 extern unsigned int vectors_in_migration[NR_IRQS];
220 vector = ia64_get_ivr();
223 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
227 * Perform normal interrupt style processing
229 while (vector != IA64_SPURIOUS_INT_VECTOR) {
230 if (unlikely(IS_RESCHEDULE(vector)))
231 kstat_this_cpu.irqs[vector]++;
233 struct pt_regs *old_regs = set_irq_regs(NULL);
235 ia64_setreg(_IA64_REG_CR_TPR, vector);
239 * Now try calling normal ia64_handle_irq as it would have got called
240 * from a real intr handler. Try passing null for pt_regs, hopefully
241 * it will work. I hope it works!.
242 * Probably could shared code.
244 vectors_in_migration[local_vector_to_irq(vector)]=0;
245 __do_IRQ(local_vector_to_irq(vector));
246 set_irq_regs(old_regs);
249 * Disable interrupts and send EOI
252 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
255 vector = ia64_get_ivr();
263 extern irqreturn_t handle_IPI (int irq, void *dev_id);
265 static irqreturn_t dummy_handler (int irq, void *dev_id)
270 static struct irqaction ipi_irqaction = {
271 .handler = handle_IPI,
272 .flags = IRQF_DISABLED,
276 static struct irqaction resched_irqaction = {
277 .handler = dummy_handler,
278 .flags = SA_INTERRUPT,
284 register_percpu_irq (ia64_vector vec, struct irqaction *action)
289 for (irq = 0; irq < NR_IRQS; ++irq)
290 if (irq_to_vector(irq) == vec) {
291 desc = irq_desc + irq;
292 desc->status |= IRQ_PER_CPU;
293 desc->chip = &irq_type_ia64_lsapic;
295 setup_irq(irq, action);
302 register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
304 register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
305 register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
307 #ifdef CONFIG_PERFMON
314 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
316 void __iomem *ipi_addr;
317 unsigned long ipi_data;
318 unsigned long phys_cpu_id;
321 phys_cpu_id = cpu_physical_id(cpu);
323 phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
327 * cpu number is in 8bit ID and 8bit EID
330 ipi_data = (delivery_mode << 8) | (vector & 0xff);
331 ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
333 writeq(ipi_data, ipi_addr);