git.oblomov.eu Git - linux-2.6/blob - drivers/scsi/aic7xxx/aic7xxx_osm_pci.c

   1 /*
   2  * Linux driver attachment glue for PCI based controllers.
   3  *
   4  * Copyright (c) 2000-2001 Adaptec Inc.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14  *    substantially similar to the "NO WARRANTY" disclaimer below
  15  *    ("Disclaimer") and any redistribution must be conditioned upon
  16  *    including a substantially similar Disclaimer requirement for further
  17  *    binary redistribution.
  18  * 3. Neither the names of the above-listed copyright holders nor the names
  19  *    of any contributors may be used to endorse or promote products derived
  20  *    from this software without specific prior written permission.
  21  *
  22  * Alternatively, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2 as published by the Free
  24  * Software Foundation.
  25  *
  26  * NO WARRANTY
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGES.
  38  *
  39  * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
  40  */
  41
  42 #include "aic7xxx_osm.h"
  43 #include "aic7xxx_pci.h"
  44
  45 static int      ahc_linux_pci_dev_probe(struct pci_dev *pdev,
  46                                         const struct pci_device_id *ent);
  47 static int      ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc,
  48                                                 u_long *base);
  49 static int      ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
  50                                                  u_long *bus_addr,
  51                                                  uint8_t __iomem **maddr);
  52 static void     ahc_linux_pci_dev_remove(struct pci_dev *pdev);
  53
  54 /* Define the macro locally since it's different for different class of chips.
  55 */
  56 #define ID(x)   ID_C(x, PCI_CLASS_STORAGE_SCSI)
  57
  58 static struct pci_device_id ahc_linux_pci_id_table[] = {
  59         /* aic7850 based controllers */
  60         ID(ID_AHA_2902_04_10_15_20C_30C),
  61         /* aic7860 based controllers */
  62         ID(ID_AHA_2930CU),
  63         ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
  64         ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
  65         ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
  66         ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
  67         /* aic7870 based controllers */
  68         ID(ID_AHA_2940),
  69         ID(ID_AHA_3940),
  70         ID(ID_AHA_398X),
  71         ID(ID_AHA_2944),
  72         ID(ID_AHA_3944),
  73         ID(ID_AHA_4944),
  74         /* aic7880 based controllers */
  75         ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK),
  76         ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK),
  77         ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK),
  78         ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK),
  79         ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK),
  80         ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK),
  81         ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK),
  82         ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK),
  83         ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK),
  84         /* aic7890 based controllers */
  85         ID(ID_AHA_2930U2),
  86         ID(ID_AHA_2940U2B),
  87         ID(ID_AHA_2940U2_OEM),
  88         ID(ID_AHA_2940U2),
  89         ID(ID_AHA_2950U2B),
  90         ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK),
  91         ID(ID_AAA_131U2),
  92         /* aic7890 based controllers */
  93         ID(ID_AHA_29160),
  94         ID(ID_AHA_29160_CPQ),
  95         ID(ID_AHA_29160N),
  96         ID(ID_AHA_29160C),
  97         ID(ID_AHA_29160B),
  98         ID(ID_AHA_19160B),
  99         ID(ID_AIC7892_ARO),
 100         /* aic7892 based controllers */
 101         ID(ID_AHA_2940U_DUAL),
 102         ID(ID_AHA_3940AU),
 103         ID(ID_AHA_3944AU),
 104         ID(ID_AIC7895_ARO),
 105         ID(ID_AHA_3950U2B_0),
 106         ID(ID_AHA_3950U2B_1),
 107         ID(ID_AHA_3950U2D_0),
 108         ID(ID_AHA_3950U2D_1),
 109         ID(ID_AIC7896_ARO),
 110         /* aic7899 based controllers */
 111         ID(ID_AHA_3960D),
 112         ID(ID_AHA_3960D_CPQ),
 113         ID(ID_AIC7899_ARO),
 114         /* Generic chip probes for devices we don't know exactly. */
 115         ID(ID_AIC7850 & ID_DEV_VENDOR_MASK),
 116         ID(ID_AIC7855 & ID_DEV_VENDOR_MASK),
 117         ID(ID_AIC7859 & ID_DEV_VENDOR_MASK),
 118         ID(ID_AIC7860 & ID_DEV_VENDOR_MASK),
 119         ID(ID_AIC7870 & ID_DEV_VENDOR_MASK),
 120         ID(ID_AIC7880 & ID_DEV_VENDOR_MASK),
 121         ID16(ID_AIC7890 & ID_9005_GENERIC_MASK),
 122         ID16(ID_AIC7892 & ID_9005_GENERIC_MASK),
 123         ID(ID_AIC7895 & ID_DEV_VENDOR_MASK),
 124         ID16(ID_AIC7896 & ID_9005_GENERIC_MASK),
 125         ID16(ID_AIC7899 & ID_9005_GENERIC_MASK),
 126         ID(ID_AIC7810 & ID_DEV_VENDOR_MASK),
 127         ID(ID_AIC7815 & ID_DEV_VENDOR_MASK),
 128         { 0 }
 129 };
 130
 131 MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table);
 132
 133 struct pci_driver aic7xxx_pci_driver = {
 134         .name           = "aic7xxx",
 135         .probe          = ahc_linux_pci_dev_probe,
 136         .remove         = ahc_linux_pci_dev_remove,
 137         .id_table       = ahc_linux_pci_id_table
 138 };
 139
 140 static void
 141 ahc_linux_pci_dev_remove(struct pci_dev *pdev)
 142 {
 143         struct ahc_softc *ahc = pci_get_drvdata(pdev);
 144         u_long s;
 145
 146         ahc_lock(ahc, &s);
 147         ahc_intr_enable(ahc, FALSE);
 148         ahc_unlock(ahc, &s);
 149         ahc_free(ahc);
 150 }
 151
 152 static void
 153 ahc_linux_pci_inherit_flags(struct ahc_softc *ahc)
 154 {
 155         struct pci_dev *pdev = ahc->dev_softc, *master_pdev;
 156         unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
 157
 158         master_pdev = pci_get_slot(pdev->bus, master_devfn);
 159         if (master_pdev) {
 160                 struct ahc_softc *master = pci_get_drvdata(master_pdev);
 161                 if (master) {
 162                         ahc->flags &= ~AHC_BIOS_ENABLED;
 163                         ahc->flags |= master->flags & AHC_BIOS_ENABLED;
 164
 165                         ahc->flags &= ~AHC_PRIMARY_CHANNEL;
 166                         ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL;
 167                 } else
 168                         printk(KERN_ERR "aic7xxx: no multichannel peer found!\n");
 169                 pci_dev_put(master_pdev);
 170         }
 171 }
 172
 173 static int
 174 ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 175 {
 176         char             buf[80];
 177         const uint64_t   mask_39bit = 0x7FFFFFFFFFULL;
 178         struct           ahc_softc *ahc;
 179         ahc_dev_softc_t  pci;
 180         struct           ahc_pci_identity *entry;
 181         char            *name;
 182         int              error;
 183
 184         pci = pdev;
 185         entry = ahc_find_pci_device(pci);
 186         if (entry == NULL)
 187                 return (-ENODEV);
 188
 189         /*
 190          * Allocate a softc for this card and
 191          * set it up for attachment by our
 192          * common detect routine.
 193          */
 194         sprintf(buf, "ahc_pci:%d:%d:%d",
 195                 ahc_get_pci_bus(pci),
 196                 ahc_get_pci_slot(pci),
 197                 ahc_get_pci_function(pci));
 198         name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
 199         if (name == NULL)
 200                 return (-ENOMEM);
 201         strcpy(name, buf);
 202         ahc = ahc_alloc(NULL, name);
 203         if (ahc == NULL)
 204                 return (-ENOMEM);
 205         if (pci_enable_device(pdev)) {
 206                 ahc_free(ahc);
 207                 return (-ENODEV);
 208         }
 209         pci_set_master(pdev);
 210
 211         if (sizeof(dma_addr_t) > 4
 212          && ahc_linux_get_memsize() > 0x80000000
 213          && pci_set_dma_mask(pdev, mask_39bit) == 0) {
 214                 ahc->flags |= AHC_39BIT_ADDRESSING;
 215         } else {
 216                 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
 217                         printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n");
 218                         return (-ENODEV);
 219                 }
 220         }
 221         ahc->dev_softc = pci;
 222         error = ahc_pci_config(ahc, entry);
 223         if (error != 0) {
 224                 ahc_free(ahc);
 225                 return (-error);
 226         }
 227
 228         /*
 229          * Second Function PCI devices need to inherit some
 230          * settings from function 0.
 231          */
 232         if ((ahc->features & AHC_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
 233                 ahc_linux_pci_inherit_flags(ahc);
 234
 235         pci_set_drvdata(pdev, ahc);
 236         ahc_linux_register_host(ahc, &aic7xxx_driver_template);
 237         return (0);
 238 }
 239
 240 int
 241 ahc_linux_pci_init(void)
 242 {
 243         /* Translate error or zero return into zero or one */
 244         return pci_module_init(&aic7xxx_pci_driver) ? 0 : 1;
 245 }
 246
 247 void
 248 ahc_linux_pci_exit(void)
 249 {
 250         pci_unregister_driver(&aic7xxx_pci_driver);
 251 }
 252
 253 static int
 254 ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, u_long *base)
 255 {
 256         if (aic7xxx_allow_memio == 0)
 257                 return (ENOMEM);
 258
 259         *base = pci_resource_start(ahc->dev_softc, 0);
 260         if (*base == 0)
 261                 return (ENOMEM);
 262         if (request_region(*base, 256, "aic7xxx") == 0)
 263                 return (ENOMEM);
 264         return (0);
 265 }
 266
 267 static int
 268 ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
 269                                  u_long *bus_addr,
 270                                  uint8_t __iomem **maddr)
 271 {
 272         u_long  start;
 273         int     error;
 274
 275         error = 0;
 276         start = pci_resource_start(ahc->dev_softc, 1);
 277         if (start != 0) {
 278                 *bus_addr = start;
 279                 if (request_mem_region(start, 0x1000, "aic7xxx") == 0)
 280                         error = ENOMEM;
 281                 if (error == 0) {
 282                         *maddr = ioremap_nocache(start, 256);
 283                         if (*maddr == NULL) {
 284                                 error = ENOMEM;
 285                                 release_mem_region(start, 0x1000);
 286                         }
 287                 }
 288         } else
 289                 error = ENOMEM;
 290         return (error);
 291 }
 292
 293 int
 294 ahc_pci_map_registers(struct ahc_softc *ahc)
 295 {
 296         uint32_t command;
 297         u_long   base;
 298         uint8_t __iomem *maddr;
 299         int      error;
 300
 301         /*
 302          * If its allowed, we prefer memory mapped access.
 303          */
 304         command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4);
 305         command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
 306         base = 0;
 307         maddr = NULL;
 308         error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr);
 309         if (error == 0) {
 310                 ahc->platform_data->mem_busaddr = base;
 311                 ahc->tag = BUS_SPACE_MEMIO;
 312                 ahc->bsh.maddr = maddr;
 313                 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
 314                                      command | PCIM_CMD_MEMEN, 4);
 315
 316                 /*
 317                  * Do a quick test to see if memory mapped
 318                  * I/O is functioning correctly.
 319                  */
 320                 if (ahc_pci_test_register_access(ahc) != 0) {
 321
 322                         printf("aic7xxx: PCI Device %d:%d:%d "
 323                                "failed memory mapped test.  Using PIO.\n",
 324                                ahc_get_pci_bus(ahc->dev_softc),
 325                                ahc_get_pci_slot(ahc->dev_softc),
 326                                ahc_get_pci_function(ahc->dev_softc));
 327                         iounmap(maddr);
 328                         release_mem_region(ahc->platform_data->mem_busaddr,
 329                                            0x1000);
 330                         ahc->bsh.maddr = NULL;
 331                         maddr = NULL;
 332                 } else
 333                         command |= PCIM_CMD_MEMEN;
 334         } else {
 335                 printf("aic7xxx: PCI%d:%d:%d MEM region 0x%lx "
 336                        "unavailable. Cannot memory map device.\n",
 337                        ahc_get_pci_bus(ahc->dev_softc),
 338                        ahc_get_pci_slot(ahc->dev_softc),
 339                        ahc_get_pci_function(ahc->dev_softc),
 340                        base);
 341         }
 342
 343         /*
 344          * We always prefer memory mapped access.
 345          */
 346         if (maddr == NULL) {
 347
 348                 error = ahc_linux_pci_reserve_io_region(ahc, &base);
 349                 if (error == 0) {
 350                         ahc->tag = BUS_SPACE_PIO;
 351                         ahc->bsh.ioport = base;
 352                         command |= PCIM_CMD_PORTEN;
 353                 } else {
 354                         printf("aic7xxx: PCI%d:%d:%d IO region 0x%lx[0..255] "
 355                                "unavailable. Cannot map device.\n",
 356                                ahc_get_pci_bus(ahc->dev_softc),
 357                                ahc_get_pci_slot(ahc->dev_softc),
 358                                ahc_get_pci_function(ahc->dev_softc),
 359                                base);
 360                 }
 361         }
 362         ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4);
 363         return (error);
 364 }
 365
 366 int
 367 ahc_pci_map_int(struct ahc_softc *ahc)
 368 {
 369         int error;
 370
 371         error = request_irq(ahc->dev_softc->irq, ahc_linux_isr,
 372                             SA_SHIRQ, "aic7xxx", ahc);
 373         if (error == 0)
 374                 ahc->platform_data->irq = ahc->dev_softc->irq;
 375
 376         return (-error);
 377 }
 378