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   1 /*
   2  * linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
   3  *
   4  * Toshiba RBTX4927 specific interrupt handlers
   5  *
   6  * Author: MontaVista Software, Inc.
   7  *         source@mvista.com
   8  *
   9  * Copyright 2001-2002 MontaVista Software Inc.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the
  13  *  Free Software Foundation; either version 2 of the License, or (at your
  14  *  option) any later version.
  15  *
  16  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  18  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  19  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  20  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  21  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  22  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  23  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  24  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  25  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  *
  27  *  You should have received a copy of the GNU General Public License along
  28  *  with this program; if not, write to the Free Software Foundation, Inc.,
  29  *  675 Mass Ave, Cambridge, MA 02139, USA.
  30  */
  31
  32
  33 /*
  34 IRQ  Device
  35 00   RBTX4927-ISA/00
  36 01   RBTX4927-ISA/01 PS2/Keyboard
  37 02   RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
  38 03   RBTX4927-ISA/03
  39 04   RBTX4927-ISA/04
  40 05   RBTX4927-ISA/05
  41 06   RBTX4927-ISA/06
  42 07   RBTX4927-ISA/07
  43 08   RBTX4927-ISA/08
  44 09   RBTX4927-ISA/09
  45 10   RBTX4927-ISA/10
  46 11   RBTX4927-ISA/11
  47 12   RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
  48 13   RBTX4927-ISA/13
  49 14   RBTX4927-ISA/14 IDE
  50 15   RBTX4927-ISA/15
  51
  52 16   TX4927-CP0/00 Software 0
  53 17   TX4927-CP0/01 Software 1
  54 18   TX4927-CP0/02 Cascade TX4927-CP0
  55 19   TX4927-CP0/03 Multiplexed -- do not use
  56 20   TX4927-CP0/04 Multiplexed -- do not use
  57 21   TX4927-CP0/05 Multiplexed -- do not use
  58 22   TX4927-CP0/06 Multiplexed -- do not use
  59 23   TX4927-CP0/07 CPU TIMER
  60
  61 24   TX4927-PIC/00
  62 25   TX4927-PIC/01
  63 26   TX4927-PIC/02
  64 27   TX4927-PIC/03 Cascade RBTX4927-IOC
  65 28   TX4927-PIC/04
  66 29   TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
  67 30   TX4927-PIC/06
  68 31   TX4927-PIC/07
  69 32   TX4927-PIC/08 TX4927 SerialIO Channel 0
  70 33   TX4927-PIC/09 TX4927 SerialIO Channel 1
  71 34   TX4927-PIC/10
  72 35   TX4927-PIC/11
  73 36   TX4927-PIC/12
  74 37   TX4927-PIC/13
  75 38   TX4927-PIC/14
  76 39   TX4927-PIC/15
  77 40   TX4927-PIC/16 TX4927 PCI PCI-C
  78 41   TX4927-PIC/17
  79 42   TX4927-PIC/18
  80 43   TX4927-PIC/19
  81 44   TX4927-PIC/20
  82 45   TX4927-PIC/21
  83 46   TX4927-PIC/22 TX4927 PCI PCI-ERR
  84 47   TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
  85 48   TX4927-PIC/24
  86 49   TX4927-PIC/25
  87 50   TX4927-PIC/26
  88 51   TX4927-PIC/27
  89 52   TX4927-PIC/28
  90 53   TX4927-PIC/29
  91 54   TX4927-PIC/30
  92 55   TX4927-PIC/31
  93
  94 56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed)        [RTL-8139=PJ4]
  95 57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed)        [RTL-8139=PJ5]
  96 58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
  97 59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4)      [RTL-8139=PJ6]
  98 60 RBTX4927-IOC/04
  99 61 RBTX4927-IOC/05
 100 62 RBTX4927-IOC/06
 101 63 RBTX4927-IOC/07
 102
 103 NOTES:
 104 SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
 105 SouthBridge/ISA/pin=0 no pci irq used by this device
 106 SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
 107 SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
 108 SouthBridge/PMC/pin=0 no pci irq used by this device
 109 SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
 110 SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
 111 JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
 112 */
 113
 114 #include <linux/init.h>
 115 #include <linux/kernel.h>
 116 #include <linux/types.h>
 117 #include <linux/mm.h>
 118 #include <linux/swap.h>
 119 #include <linux/ioport.h>
 120 #include <linux/sched.h>
 121 #include <linux/interrupt.h>
 122 #include <linux/pci.h>
 123 #include <linux/timex.h>
 124 #include <asm/bootinfo.h>
 125 #include <asm/page.h>
 126 #include <asm/io.h>
 127 #include <asm/irq.h>
 128 #include <asm/pci.h>
 129 #include <asm/processor.h>
 130 #include <asm/reboot.h>
 131 #include <asm/time.h>
 132 #include <asm/wbflush.h>
 133 #include <linux/bootmem.h>
 134 #include <linux/blkdev.h>
 135 #ifdef CONFIG_RTC_DS1742
 136 #include <linux/ds1742rtc.h>
 137 #endif
 138 #ifdef CONFIG_TOSHIBA_FPCIB0
 139 #include <asm/tx4927/smsc_fdc37m81x.h>
 140 #endif
 141 #include <asm/tx4927/toshiba_rbtx4927.h>
 142
 143
 144 #undef TOSHIBA_RBTX4927_IRQ_DEBUG
 145
 146 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
 147 #define TOSHIBA_RBTX4927_IRQ_NONE        0x00000000
 148
 149 #define TOSHIBA_RBTX4927_IRQ_INFO          ( 1 <<  0 )
 150 #define TOSHIBA_RBTX4927_IRQ_WARN          ( 1 <<  1 )
 151 #define TOSHIBA_RBTX4927_IRQ_EROR          ( 1 <<  2 )
 152
 153 #define TOSHIBA_RBTX4927_IRQ_IOC_INIT      ( 1 << 10 )
 154 #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE    ( 1 << 13 )
 155 #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE   ( 1 << 14 )
 156 #define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ    ( 1 << 16 )
 157
 158 #define TOSHIBA_RBTX4927_IRQ_ISA_INIT      ( 1 << 20 )
 159 #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE    ( 1 << 23 )
 160 #define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE   ( 1 << 24 )
 161 #define TOSHIBA_RBTX4927_IRQ_ISA_MASK      ( 1 << 25 )
 162 #define TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ    ( 1 << 26 )
 163
 164 #define TOSHIBA_RBTX4927_SETUP_ALL         0xffffffff
 165 #endif
 166
 167
 168 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
 169 static const u32 toshiba_rbtx4927_irq_debug_flag =
 170     (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
 171      TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
 172 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_INIT
 173 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
 174 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
 175 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
 176 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_INIT
 177 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
 178 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
 179 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_MASK
 180 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ
 181     );
 182 #endif
 183
 184
 185 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
 186 #define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \
 187         if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \
 188         { \
 189            char tmp[100]; \
 190            sprintf( tmp, str ); \
 191            printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
 192         }
 193 #else
 194 #define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...)
 195 #endif
 196
 197
 198
 199
 200 #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG   0
 201 #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END   7
 202
 203 #define TOSHIBA_RBTX4927_IRQ_IOC_BEG  ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */
 204 #define TOSHIBA_RBTX4927_IRQ_IOC_END  ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */
 205
 206
 207 #define TOSHIBA_RBTX4927_IRQ_ISA_BEG MI8259_IRQ_ISA_BEG
 208 #define TOSHIBA_RBTX4927_IRQ_ISA_END MI8259_IRQ_ISA_END
 209 #define TOSHIBA_RBTX4927_IRQ_ISA_MID ((TOSHIBA_RBTX4927_IRQ_ISA_BEG+TOSHIBA_RBTX4927_IRQ_ISA_END+1)/2)
 210
 211
 212 #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
 213 #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
 214 #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA (TOSHIBA_RBTX4927_IRQ_ISA_BEG+2)
 215
 216 extern int tx4927_using_backplane;
 217
 218 #ifdef CONFIG_TOSHIBA_FPCIB0
 219 extern void enable_8259A_irq(unsigned int irq);
 220 extern void disable_8259A_irq(unsigned int irq);
 221 extern void mask_and_ack_8259A(unsigned int irq);
 222 #endif
 223
 224 static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
 225 static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
 226 static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq);
 227
 228 #ifdef CONFIG_TOSHIBA_FPCIB0
 229 static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
 230 static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq);
 231 static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq);
 232 static void toshiba_rbtx4927_irq_isa_end(unsigned int irq);
 233 #endif
 234
 235 #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
 236 static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
 237         .typename = TOSHIBA_RBTX4927_IOC_NAME,
 238         .ack = toshiba_rbtx4927_irq_ioc_disable,
 239         .mask = toshiba_rbtx4927_irq_ioc_disable,
 240         .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
 241         .unmask = toshiba_rbtx4927_irq_ioc_enable,
 242         .end = toshiba_rbtx4927_irq_ioc_end,
 243 };
 244 #define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000
 245 #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006
 246
 247
 248 #ifdef CONFIG_TOSHIBA_FPCIB0
 249 #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA"
 250 static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
 251         .typename = TOSHIBA_RBTX4927_ISA_NAME,
 252         .ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
 253         .mask = toshiba_rbtx4927_irq_isa_disable,
 254         .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
 255         .unmask = toshiba_rbtx4927_irq_isa_enable,
 256         .end = toshiba_rbtx4927_irq_isa_end,
 257 };
 258 #endif
 259
 260
 261 u32 bit2num(u32 num)
 262 {
 263         u32 i;
 264
 265         for (i = 0; i < (sizeof(num) * 8); i++) {
 266                 if (num & (1 << i)) {
 267                         return (i);
 268                 }
 269         }
 270         return (0);
 271 }
 272
 273 int toshiba_rbtx4927_irq_nested(int sw_irq)
 274 {
 275         u32 level3;
 276         u32 level4;
 277         u32 level5;
 278
 279         level3 = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
 280         if (level3) {
 281                 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
 282                 if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
 283                         goto RETURN;
 284                 }
 285         }
 286 #ifdef CONFIG_TOSHIBA_FPCIB0
 287         {
 288                 if (tx4927_using_backplane) {
 289                         outb(0x0A, 0x20);
 290                         level4 = inb(0x20) & 0xff;
 291                         if (level4) {
 292                                 sw_irq =
 293                                     TOSHIBA_RBTX4927_IRQ_ISA_BEG +
 294                                     bit2num(level4);
 295                                 if (sw_irq !=
 296                                     TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA) {
 297                                         goto RETURN;
 298                                 }
 299                         }
 300
 301                         outb(0x0A, 0xA0);
 302                         level5 = inb(0xA0) & 0xff;
 303                         if (level5) {
 304                                 sw_irq =
 305                                     TOSHIBA_RBTX4927_IRQ_ISA_MID +
 306                                     bit2num(level5);
 307                                 goto RETURN;
 308                         }
 309                 }
 310         }
 311 #endif
 312
 313       RETURN:
 314         return (sw_irq);
 315 }
 316
 317 //#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
 318 #define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
 319 static struct irqaction toshiba_rbtx4927_irq_ioc_action =
 320 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
 321 #ifdef CONFIG_TOSHIBA_FPCIB0
 322 static struct irqaction toshiba_rbtx4927_irq_isa_master =
 323 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/M");
 324 static struct irqaction toshiba_rbtx4927_irq_isa_slave =
 325 TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_ISA_NAME "/S");
 326 #endif
 327
 328
 329 /**********************************************************************************/
 330 /* Functions for ioc                                                              */
 331 /**********************************************************************************/
 332
 333
 334 static void __init toshiba_rbtx4927_irq_ioc_init(void)
 335 {
 336         int i;
 337
 338         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
 339                                      "beg=%d end=%d\n",
 340                                      TOSHIBA_RBTX4927_IRQ_IOC_BEG,
 341                                      TOSHIBA_RBTX4927_IRQ_IOC_END);
 342
 343         for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
 344              i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
 345                 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
 346                                          handle_level_irq);
 347
 348         setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
 349                   &toshiba_rbtx4927_irq_ioc_action);
 350 }
 351
 352 static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
 353 {
 354         volatile unsigned char v;
 355
 356         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
 357                                      "irq=%d\n", irq);
 358
 359         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
 360             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
 361                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 362                                              "bad irq=%d\n", irq);
 363                 panic("\n");
 364         }
 365
 366         v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
 367         v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
 368         TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
 369 }
 370
 371
 372 static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
 373 {
 374         volatile unsigned char v;
 375
 376         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
 377                                      "irq=%d\n", irq);
 378
 379         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
 380             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
 381                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 382                                              "bad irq=%d\n", irq);
 383                 panic("\n");
 384         }
 385
 386         v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
 387         v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
 388         TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
 389 }
 390
 391 static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq)
 392 {
 393         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ,
 394                                      "irq=%d\n", irq);
 395
 396         if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
 397             || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
 398                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 399                                              "bad irq=%d\n", irq);
 400                 panic("\n");
 401         }
 402
 403         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 404                 toshiba_rbtx4927_irq_ioc_enable(irq);
 405         }
 406 }
 407
 408
 409 /**********************************************************************************/
 410 /* Functions for isa                                                              */
 411 /**********************************************************************************/
 412
 413
 414 #ifdef CONFIG_TOSHIBA_FPCIB0
 415 static void __init toshiba_rbtx4927_irq_isa_init(void)
 416 {
 417         int i;
 418
 419         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_INIT,
 420                                      "beg=%d end=%d\n",
 421                                      TOSHIBA_RBTX4927_IRQ_ISA_BEG,
 422                                      TOSHIBA_RBTX4927_IRQ_ISA_END);
 423
 424         for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG;
 425              i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++)
 426                 set_irq_chip(i, &toshiba_rbtx4927_irq_isa_type);
 427
 428         setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
 429                   &toshiba_rbtx4927_irq_isa_master);
 430         setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_ISA,
 431                   &toshiba_rbtx4927_irq_isa_slave);
 432
 433         /* make sure we are looking at IRR (not ISR) */
 434         outb(0x0A, 0x20);
 435         outb(0x0A, 0xA0);
 436 }
 437 #endif
 438
 439
 440 #ifdef CONFIG_TOSHIBA_FPCIB0
 441 static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq)
 442 {
 443         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENABLE,
 444                                      "irq=%d\n", irq);
 445
 446         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
 447             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
 448                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 449                                              "bad irq=%d\n", irq);
 450                 panic("\n");
 451         }
 452
 453         enable_8259A_irq(irq);
 454 }
 455 #endif
 456
 457
 458 #ifdef CONFIG_TOSHIBA_FPCIB0
 459 static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq)
 460 {
 461         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_DISABLE,
 462                                      "irq=%d\n", irq);
 463
 464         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
 465             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
 466                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 467                                              "bad irq=%d\n", irq);
 468                 panic("\n");
 469         }
 470
 471         disable_8259A_irq(irq);
 472 }
 473 #endif
 474
 475
 476 #ifdef CONFIG_TOSHIBA_FPCIB0
 477 static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq)
 478 {
 479         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_MASK,
 480                                      "irq=%d\n", irq);
 481
 482         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
 483             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
 484                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 485                                              "bad irq=%d\n", irq);
 486                 panic("\n");
 487         }
 488
 489         mask_and_ack_8259A(irq);
 490 }
 491 #endif
 492
 493
 494 #ifdef CONFIG_TOSHIBA_FPCIB0
 495 static void toshiba_rbtx4927_irq_isa_end(unsigned int irq)
 496 {
 497         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ,
 498                                      "irq=%d\n", irq);
 499
 500         if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
 501             || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
 502                 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
 503                                              "bad irq=%d\n", irq);
 504                 panic("\n");
 505         }
 506
 507         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 508                 toshiba_rbtx4927_irq_isa_enable(irq);
 509         }
 510 }
 511 #endif
 512
 513
 514 void __init arch_init_irq(void)
 515 {
 516         extern void tx4927_irq_init(void);
 517
 518         tx4927_irq_init();
 519         toshiba_rbtx4927_irq_ioc_init();
 520 #ifdef CONFIG_TOSHIBA_FPCIB0
 521         {
 522                 if (tx4927_using_backplane) {
 523                         toshiba_rbtx4927_irq_isa_init();
 524                 }
 525         }
 526 #endif
 527
 528         wbflush();
 529 }
 530
 531 void toshiba_rbtx4927_irq_dump(char *key)
 532 {
 533 #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
 534         {
 535                 u32 i, j = 0;
 536                 for (i = 0; i < NR_IRQS; i++) {
 537                         if (strcmp(irq_desc[i].chip->typename, "none")
 538                             == 0)
 539                                 continue;
 540
 541                         if ((i >= 1)
 542                             && (irq_desc[i - 1].chip->typename ==
 543                                 irq_desc[i].chip->typename)) {
 544                                 j++;
 545                         } else {
 546                                 j = 0;
 547                         }
 548                         TOSHIBA_RBTX4927_IRQ_DPRINTK
 549                             (TOSHIBA_RBTX4927_IRQ_INFO,
 550                              "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
 551                              key, i, i, irq_desc[i].status,
 552                              (u32) irq_desc[i].chip,
 553                              (u32) irq_desc[i].action,
 554                              (u32) (irq_desc[i].action ? irq_desc[i].
 555                                     action->handler : 0),
 556                              irq_desc[i].depth,
 557                              irq_desc[i].chip->typename, j);
 558                 }
 559         }
 560 #endif
 561 }
 562
 563 void toshiba_rbtx4927_irq_dump_pics(char *s)
 564 {
 565         u32 level0_m;
 566         u32 level0_s;
 567         u32 level1_m;
 568         u32 level1_s;
 569         u32 level2;
 570         u32 level2_p;
 571         u32 level2_s;
 572         u32 level3_m;
 573         u32 level3_s;
 574         u32 level4_m;
 575         u32 level4_s;
 576         u32 level5_m;
 577         u32 level5_s;
 578
 579         if (s == NULL)
 580                 s = "null";
 581
 582         level0_m = (read_c0_status() & 0x0000ff00) >> 8;
 583         level0_s = (read_c0_cause() & 0x0000ff00) >> 8;
 584
 585         level1_m = level0_m;
 586         level1_s = level0_s & 0x87;
 587
 588         level2 = TX4927_RD(0xff1ff6a0);
 589         level2_p = (((level2 & 0x10000)) ? 0 : 1);
 590         level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
 591
 592         level3_m = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
 593         level3_s = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
 594
 595         level4_m = inb(0x21);
 596         outb(0x0A, 0x20);
 597         level4_s = inb(0x20);
 598
 599         level5_m = inb(0xa1);
 600         outb(0x0A, 0xa0);
 601         level5_s = inb(0xa0);
 602
 603         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 604                                      "dump_raw_pic() ");
 605         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 606                                      "cp0:m=0x%02x/s=0x%02x ", level0_m,
 607                                      level0_s);
 608         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 609                                      "cp0:m=0x%02x/s=0x%02x ", level1_m,
 610                                      level1_s);
 611         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 612                                      "pic:e=0x%02x/s=0x%02x ", level2_p,
 613                                      level2_s);
 614         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 615                                      "ioc:m=0x%02x/s=0x%02x ", level3_m,
 616                                      level3_s);
 617         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 618                                      "sbm:m=0x%02x/s=0x%02x ", level4_m,
 619                                      level4_s);
 620         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
 621                                      "sbs:m=0x%02x/s=0x%02x ", level5_m,
 622                                      level5_s);
 623         TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
 624                                      s);
 625 }