1 /* uctrl.c: TS102 Microcontroller interface on Tadpole Sparcbook 3
3 * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
4 * Copyright 2008 David S. Miller (davem@davemloft.net)
7 #include <linux/module.h>
8 #include <linux/errno.h>
9 #include <linux/delay.h>
10 #include <linux/interrupt.h>
11 #include <linux/slab.h>
12 #include <linux/smp_lock.h>
13 #include <linux/ioport.h>
14 #include <linux/init.h>
15 #include <linux/miscdevice.h>
18 #include <linux/of_device.h>
20 #include <asm/openprom.h>
21 #include <asm/oplib.h>
22 #include <asm/system.h>
25 #include <asm/pgtable.h>
27 #define UCTRL_MINOR 174
31 #define dprintk(x) printk x
59 /* Bits for uctrl_intr register */
60 #define UCTRL_INTR_TXE_REQ 0x01 /* transmit FIFO empty int req */
61 #define UCTRL_INTR_TXNF_REQ 0x02 /* transmit FIFO not full int req */
62 #define UCTRL_INTR_RXNE_REQ 0x04 /* receive FIFO not empty int req */
63 #define UCTRL_INTR_RXO_REQ 0x08 /* receive FIFO overflow int req */
64 #define UCTRL_INTR_TXE_MSK 0x10 /* transmit FIFO empty mask */
65 #define UCTRL_INTR_TXNF_MSK 0x20 /* transmit FIFO not full mask */
66 #define UCTRL_INTR_RXNE_MSK 0x40 /* receive FIFO not empty mask */
67 #define UCTRL_INTR_RXO_MSK 0x80 /* receive FIFO overflow mask */
69 /* Bits for uctrl_stat register */
70 #define UCTRL_STAT_TXE_STA 0x01 /* transmit FIFO empty status */
71 #define UCTRL_STAT_TXNF_STA 0x02 /* transmit FIFO not full status */
72 #define UCTRL_STAT_RXNE_STA 0x04 /* receive FIFO not empty status */
73 #define UCTRL_STAT_RXO_STA 0x08 /* receive FIFO overflow status */
75 static const char *uctrl_extstatus[16] = {
76 "main power available",
77 "internal battery attached",
78 "external battery attached",
79 "external VGA attached",
80 "external keyboard attached",
81 "external mouse attached",
83 "internal battery currently charging",
84 "external battery currently charging",
85 "internal battery currently discharging",
86 "external battery currently discharging",
89 /* Everything required for one transaction with the uctrl */
99 u8 current_temp; /* 0x07 */
100 u8 reset_status; /* 0x0b */
101 u16 event_status; /* 0x0c */
102 u16 error_status; /* 0x10 */
103 u16 external_status; /* 0x11, 0x1b */
104 u8 internal_charge; /* 0x18 */
105 u8 external_charge; /* 0x19 */
106 u16 control_lcd; /* 0x20 */
107 u8 control_bitport; /* 0x21 */
108 u8 speaker_volume; /* 0x23 */
109 u8 control_tft_brightness; /* 0x24 */
110 u8 control_kbd_repeat_delay; /* 0x28 */
111 u8 control_kbd_repeat_period; /* 0x29 */
112 u8 control_screen_contrast; /* 0x2F */
116 READ_SERIAL_NUMBER=0x1,
117 READ_ETHERNET_ADDRESS=0x2,
118 READ_HARDWARE_VERSION=0x3,
119 READ_MICROCONTROLLER_VERSION=0x4,
120 READ_MAX_TEMPERATURE=0x5,
121 READ_MIN_TEMPERATURE=0x6,
122 READ_CURRENT_TEMPERATURE=0x7,
123 READ_SYSTEM_VARIANT=0x8,
124 READ_POWERON_CYCLES=0x9,
125 READ_POWERON_SECONDS=0xA,
126 READ_RESET_STATUS=0xB,
127 READ_EVENT_STATUS=0xC,
128 READ_REAL_TIME_CLOCK=0xD,
129 READ_EXTERNAL_VGA_PORT=0xE,
130 READ_MICROCONTROLLER_ROM_CHECKSUM=0xF,
131 READ_ERROR_STATUS=0x10,
132 READ_EXTERNAL_STATUS=0x11,
133 READ_USER_CONFIGURATION_AREA=0x12,
134 READ_MICROCONTROLLER_VOLTAGE=0x13,
135 READ_INTERNAL_BATTERY_VOLTAGE=0x14,
136 READ_DCIN_VOLTAGE=0x15,
137 READ_HORIZONTAL_POINTER_VOLTAGE=0x16,
138 READ_VERTICAL_POINTER_VOLTAGE=0x17,
139 READ_INTERNAL_BATTERY_CHARGE_LEVEL=0x18,
140 READ_EXTERNAL_BATTERY_CHARGE_LEVEL=0x19,
141 READ_REAL_TIME_CLOCK_ALARM=0x1A,
142 READ_EVENT_STATUS_NO_RESET=0x1B,
143 READ_INTERNAL_KEYBOARD_LAYOUT=0x1C,
144 READ_EXTERNAL_KEYBOARD_LAYOUT=0x1D,
145 READ_EEPROM_STATUS=0x1E,
147 CONTROL_BITPORT=0x21,
149 CONTROL_TFT_BRIGHTNESS=0x24,
150 CONTROL_WATCHDOG=0x25,
151 CONTROL_FACTORY_EEPROM_AREA=0x26,
152 CONTROL_KBD_TIME_UNTIL_REPEAT=0x28,
153 CONTROL_KBD_TIME_BETWEEN_REPEATS=0x29,
154 CONTROL_TIMEZONE=0x2A,
155 CONTROL_MARK_SPACE_RATIO=0x2B,
156 CONTROL_DIAGNOSTIC_MODE=0x2E,
157 CONTROL_SCREEN_CONTRAST=0x2F,
159 SET_DIAGNOSTIC_STATUS=0x32,
160 CLEAR_KEY_COMBINATION_TABLE=0x33,
161 PERFORM_SOFTWARE_RESET=0x34,
162 SET_REAL_TIME_CLOCK=0x35,
163 RECALIBRATE_POINTING_STICK=0x36,
164 SET_BELL_FREQUENCY=0x37,
165 SET_INTERNAL_BATTERY_CHARGE_RATE=0x39,
166 SET_EXTERNAL_BATTERY_CHARGE_RATE=0x3A,
167 SET_REAL_TIME_CLOCK_ALARM=0x3B,
170 WRITE_TO_STATUS_DISPLAY=0x42,
171 DEFINE_SPECIAL_CHARACTER=0x43,
172 DEFINE_KEY_COMBINATION_ENTRY=0x50,
173 DEFINE_STRING_TABLE_ENTRY=0x51,
174 DEFINE_STATUS_SCREEN_DISPLAY=0x52,
175 PERFORM_EMU_COMMANDS=0x64,
176 READ_EMU_REGISTER=0x65,
177 WRITE_EMU_REGISTER=0x66,
180 READ_BQ_REGISTER=0x69,
181 WRITE_BQ_REGISTER=0x6A,
182 SET_USER_PASSWORD=0x70,
183 VERIFY_USER_PASSWORD=0x71,
184 GET_SYSTEM_PASSWORD_KEY=0x72,
185 VERIFY_SYSTEM_PASSWORD=0x73,
190 static struct uctrl_driver {
191 struct uctrl_regs __iomem *regs;
194 struct uctrl_status status;
197 static void uctrl_get_event_status(struct uctrl_driver *);
198 static void uctrl_get_external_status(struct uctrl_driver *);
201 uctrl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
211 uctrl_open(struct inode *inode, struct file *file)
214 uctrl_get_event_status(global_driver);
215 uctrl_get_external_status(global_driver);
220 static irqreturn_t uctrl_interrupt(int irq, void *dev_id)
225 static const struct file_operations uctrl_fops = {
226 .owner = THIS_MODULE,
228 .unlocked_ioctl = uctrl_ioctl,
232 static struct miscdevice uctrl_dev = {
238 /* Wait for space to write, then write to it */
239 #define WRITEUCTLDATA(value) \
242 for (i = 0; i < 10000; i++) { \
243 if (UCTRL_STAT_TXNF_STA & sbus_readl(&driver->regs->uctrl_stat)) \
246 dprintk(("write data 0x%02x\n", value)); \
247 sbus_writel(value, &driver->regs->uctrl_data); \
250 /* Wait for something to read, read it, then clear the bit */
251 #define READUCTLDATA(value) \
255 for (i = 0; i < 10000; i++) { \
256 if ((UCTRL_STAT_RXNE_STA & sbus_readl(&driver->regs->uctrl_stat)) == 0) \
260 value = sbus_readl(&driver->regs->uctrl_data); \
261 dprintk(("read data 0x%02x\n", value)); \
262 sbus_writel(UCTRL_STAT_RXNE_STA, &driver->regs->uctrl_stat); \
265 static void uctrl_do_txn(struct uctrl_driver *driver, struct uctrl_txn *txn)
267 int stat, incnt, outcnt, bytecnt, intr;
270 stat = sbus_readl(&driver->regs->uctrl_stat);
271 intr = sbus_readl(&driver->regs->uctrl_intr);
272 sbus_writel(stat, &driver->regs->uctrl_stat);
274 dprintk(("interrupt stat 0x%x int 0x%x\n", stat, intr));
277 outcnt = txn->outbits;
278 byte = (txn->opcode << 8);
283 byte = (txn->inbuf[bytecnt] << 8);
291 dprintk(("ack was %x\n", (byte >> 8)));
296 txn->outbuf[bytecnt] = (byte >> 8);
297 dprintk(("set byte to %02x\n", byte));
303 static void uctrl_get_event_status(struct uctrl_driver *driver)
305 struct uctrl_txn txn;
308 txn.opcode = READ_EVENT_STATUS;
312 txn.outbuf = outbits;
314 uctrl_do_txn(driver, &txn);
316 dprintk(("bytes %x %x\n", (outbits[0] & 0xff), (outbits[1] & 0xff)));
317 driver->status.event_status =
318 ((outbits[0] & 0xff) << 8) | (outbits[1] & 0xff);
319 dprintk(("ev is %x\n", driver->status.event_status));
322 static void uctrl_get_external_status(struct uctrl_driver *driver)
324 struct uctrl_txn txn;
328 txn.opcode = READ_EXTERNAL_STATUS;
332 txn.outbuf = outbits;
334 uctrl_do_txn(driver, &txn);
336 dprintk(("bytes %x %x\n", (outbits[0] & 0xff), (outbits[1] & 0xff)));
337 driver->status.external_status =
338 ((outbits[0] * 256) + (outbits[1]));
339 dprintk(("ex is %x\n", driver->status.external_status));
340 v = driver->status.external_status;
341 for (i = 0; v != 0; i++, v >>= 1) {
343 dprintk(("%s%s", " ", uctrl_extstatus[i]));
350 static int __devinit uctrl_probe(struct of_device *op,
351 const struct of_device_id *match)
353 struct uctrl_driver *p;
356 p = kzalloc(sizeof(*p), GFP_KERNEL);
358 printk(KERN_ERR "uctrl: Unable to allocate device struct.\n");
362 p->regs = of_ioremap(&op->resource[0], 0,
363 resource_size(&op->resource[0]),
366 printk(KERN_ERR "uctrl: Unable to map registers.\n");
370 p->irq = op->irqs[0];
371 err = request_irq(p->irq, uctrl_interrupt, 0, "uctrl", p);
373 printk(KERN_ERR "uctrl: Unable to register irq.\n");
377 err = misc_register(&uctrl_dev);
379 printk(KERN_ERR "uctrl: Unable to register misc device.\n");
383 sbus_writel(UCTRL_INTR_RXNE_REQ|UCTRL_INTR_RXNE_MSK, &p->regs->uctrl_intr);
384 printk(KERN_INFO "%s: uctrl regs[0x%p] (irq %d)\n",
385 op->node->full_name, p->regs, p->irq);
386 uctrl_get_event_status(p);
387 uctrl_get_external_status(p);
389 dev_set_drvdata(&op->dev, p);
399 of_iounmap(&op->resource[0], p->regs, resource_size(&op->resource[0]));
406 static int __devexit uctrl_remove(struct of_device *op)
408 struct uctrl_driver *p = dev_get_drvdata(&op->dev);
411 misc_deregister(&uctrl_dev);
413 of_iounmap(&op->resource[0], p->regs, resource_size(&op->resource[0]));
419 static const struct of_device_id uctrl_match[] = {
425 MODULE_DEVICE_TABLE(of, uctrl_match);
427 static struct of_platform_driver uctrl_driver = {
429 .match_table = uctrl_match,
430 .probe = uctrl_probe,
431 .remove = __devexit_p(uctrl_remove),
435 static int __init uctrl_init(void)
437 return of_register_driver(&uctrl_driver, &of_bus_type);
440 static void __exit uctrl_exit(void)
442 of_unregister_driver(&uctrl_driver);
445 module_init(uctrl_init);
446 module_exit(uctrl_exit);
447 MODULE_LICENSE("GPL");