2 * linux/arch/arm/mm/copypage-v6.c
4 * Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/init.h>
11 #include <linux/spinlock.h>
15 #include <asm/pgtable.h>
16 #include <asm/shmparam.h>
17 #include <asm/tlbflush.h>
18 #include <asm/cacheflush.h>
19 #include <asm/cachetype.h>
27 #define from_address (0xffff8000)
28 #define to_address (0xffffc000)
30 static DEFINE_SPINLOCK(v6_lock);
33 * Copy the user page. No aliasing to deal with so we can just
34 * attack the kernel's existing mapping of these pages.
36 static void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr)
38 copy_page(kto, kfrom);
42 * Clear the user page. No aliasing to deal with so we can just
43 * attack the kernel's existing mapping of this page.
45 static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
51 * Copy the page, taking account of the cache colour.
53 static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
55 unsigned int offset = CACHE_COLOUR(vaddr);
56 unsigned long from, to;
57 struct page *page = virt_to_page(kfrom);
59 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
60 __flush_dcache_page(page_mapping(page), page);
63 * Discard data in the kernel mapping for the new page.
64 * FIXME: needs this MCRR to be supported.
66 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
69 "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
73 * Now copy the page using the same cache colour as the
74 * pages ultimate destination.
78 set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL), 0);
79 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL), 0);
81 from = from_address + (offset << PAGE_SHIFT);
82 to = to_address + (offset << PAGE_SHIFT);
84 flush_tlb_kernel_page(from);
85 flush_tlb_kernel_page(to);
87 copy_page((void *)to, (void *)from);
89 spin_unlock(&v6_lock);
93 * Clear the user page. We need to deal with the aliasing issues,
94 * so remap the kernel page into the same cache colour as the user
97 static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
99 unsigned int offset = CACHE_COLOUR(vaddr);
100 unsigned long to = to_address + (offset << PAGE_SHIFT);
103 * Discard data in the kernel mapping for the new page
104 * FIXME: needs this MCRR to be supported.
106 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
109 "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES)
113 * Now clear the page using the same cache colour as
114 * the pages ultimate destination.
118 set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0);
119 flush_tlb_kernel_page(to);
120 clear_page((void *)to);
122 spin_unlock(&v6_lock);
125 struct cpu_user_fns v6_user_fns __initdata = {
126 .cpu_clear_user_page = v6_clear_user_page_nonaliasing,
127 .cpu_copy_user_page = v6_copy_user_page_nonaliasing,
130 static int __init v6_userpage_init(void)
132 if (cache_is_vipt_aliasing()) {
133 cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing;
134 cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing;
140 core_initcall(v6_userpage_init);