Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
[linux-2.6] / arch / powerpc / boot / dts / mpc8349emitxgp.dts
1 /*
2  * MPC8349E-mITX-GP Device Tree Source
3  *
4  * Copyright 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8349EMITXGP";
16         compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 serial0 = &serial0;
23                 serial1 = &serial1;
24                 pci0 = &pci0;
25         };
26
27         cpus {
28                 #address-cells = <1>;
29                 #size-cells = <0>;
30
31                 PowerPC,8349@0 {
32                         device_type = "cpu";
33                         reg = <0x0>;
34                         d-cache-line-size = <32>;
35                         i-cache-line-size = <32>;
36                         d-cache-size = <32768>;
37                         i-cache-size = <32768>;
38                         timebase-frequency = <0>;       // from bootloader
39                         bus-frequency = <0>;            // from bootloader
40                         clock-frequency = <0>;          // from bootloader
41                 };
42         };
43
44         memory {
45                 device_type = "memory";
46                 reg = <0x00000000 0x10000000>;
47         };
48
49         soc8349@e0000000 {
50                 #address-cells = <1>;
51                 #size-cells = <1>;
52                 device_type = "soc";
53                 compatible = "simple-bus";
54                 ranges = <0x0 0xe0000000 0x00100000>;
55                 reg = <0xe0000000 0x00000200>;
56                 bus-frequency = <0>;                    // from bootloader
57
58                 wdt@200 {
59                         device_type = "watchdog";
60                         compatible = "mpc83xx_wdt";
61                         reg = <0x200 0x100>;
62                 };
63
64                 i2c@3000 {
65                         #address-cells = <1>;
66                         #size-cells = <0>;
67                         cell-index = <0>;
68                         compatible = "fsl-i2c";
69                         reg = <0x3000 0x100>;
70                         interrupts = <14 0x8>;
71                         interrupt-parent = <&ipic>;
72                         dfsrr;
73                 };
74
75                 i2c@3100 {
76                         #address-cells = <1>;
77                         #size-cells = <0>;
78                         cell-index = <1>;
79                         compatible = "fsl-i2c";
80                         reg = <0x3100 0x100>;
81                         interrupts = <15 0x8>;
82                         interrupt-parent = <&ipic>;
83                         dfsrr;
84                 };
85
86                 spi@7000 {
87                         cell-index = <0>;
88                         compatible = "fsl,spi";
89                         reg = <0x7000 0x1000>;
90                         interrupts = <16 0x8>;
91                         interrupt-parent = <&ipic>;
92                         mode = "cpu";
93                 };
94
95                 dma@82a8 {
96                         #address-cells = <1>;
97                         #size-cells = <1>;
98                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
99                         reg = <0x82a8 4>;
100                         ranges = <0 0x8100 0x1a8>;
101                         interrupt-parent = <&ipic>;
102                         interrupts = <71 8>;
103                         cell-index = <0>;
104                         dma-channel@0 {
105                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
106                                 reg = <0 0x80>;
107                                 interrupt-parent = <&ipic>;
108                                 interrupts = <71 8>;
109                         };
110                         dma-channel@80 {
111                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
112                                 reg = <0x80 0x80>;
113                                 interrupt-parent = <&ipic>;
114                                 interrupts = <71 8>;
115                         };
116                         dma-channel@100 {
117                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118                                 reg = <0x100 0x80>;
119                                 interrupt-parent = <&ipic>;
120                                 interrupts = <71 8>;
121                         };
122                         dma-channel@180 {
123                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124                                 reg = <0x180 0x28>;
125                                 interrupt-parent = <&ipic>;
126                                 interrupts = <71 8>;
127                         };
128                 };
129
130                 usb@23000 {
131                         compatible = "fsl-usb2-dr";
132                         reg = <0x23000 0x1000>;
133                         #address-cells = <1>;
134                         #size-cells = <0>;
135                         interrupt-parent = <&ipic>;
136                         interrupts = <38 0x8>;
137                         dr_mode = "otg";
138                         phy_type = "ulpi";
139                 };
140
141                 mdio@24520 {
142                         #address-cells = <1>;
143                         #size-cells = <0>;
144                         compatible = "fsl,gianfar-mdio";
145                         reg = <0x24520 0x20>;
146
147                         /* Vitesse 8201 */
148                         phy1c: ethernet-phy@1c {
149                                 interrupt-parent = <&ipic>;
150                                 interrupts = <18 0x8>;
151                                 reg = <0x1c>;
152                                 device_type = "ethernet-phy";
153                         };
154                 };
155
156                 enet0: ethernet@24000 {
157                         cell-index = <0>;
158                         device_type = "network";
159                         model = "TSEC";
160                         compatible = "gianfar";
161                         reg = <0x24000 0x1000>;
162                         local-mac-address = [ 00 00 00 00 00 00 ];
163                         interrupts = <32 0x8 33 0x8 34 0x8>;
164                         interrupt-parent = <&ipic>;
165                         phy-handle = <&phy1c>;
166                         linux,network-index = <0>;
167                 };
168
169                 serial0: serial@4500 {
170                         cell-index = <0>;
171                         device_type = "serial";
172                         compatible = "ns16550";
173                         reg = <0x4500 0x100>;
174                         clock-frequency = <0>;          // from bootloader
175                         interrupts = <9 0x8>;
176                         interrupt-parent = <&ipic>;
177                 };
178
179                 serial1: serial@4600 {
180                         cell-index = <1>;
181                         device_type = "serial";
182                         compatible = "ns16550";
183                         reg = <0x4600 0x100>;
184                         clock-frequency = <0>;          // from bootloader
185                         interrupts = <10 0x8>;
186                         interrupt-parent = <&ipic>;
187                 };
188
189                 crypto@30000 {
190                         compatible = "fsl,sec2.0";
191                         reg = <0x30000 0x10000>;
192                         interrupts = <11 0x8>;
193                         interrupt-parent = <&ipic>;
194                         fsl,num-channels = <4>;
195                         fsl,channel-fifo-len = <24>;
196                         fsl,exec-units-mask = <0x7e>;
197                         fsl,descriptor-types-mask = <0x01010ebf>;
198                 };
199
200                 ipic: pic@700 {
201                         interrupt-controller;
202                         #address-cells = <0>;
203                         #interrupt-cells = <2>;
204                         reg = <0x700 0x100>;
205                         device_type = "ipic";
206                 };
207         };
208
209         pci0: pci@e0008600 {
210                 cell-index = <2>;
211                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
212                 interrupt-map = <
213                                 /* IDSEL 0x0F - PCI Slot */
214                                 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
215                                 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
216                                  >;
217                 interrupt-parent = <&ipic>;
218                 interrupts = <67 0x8>;
219                 bus-range = <0x1 0x1>;
220                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
221                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
222                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
223                 clock-frequency = <66666666>;
224                 #interrupt-cells = <1>;
225                 #size-cells = <2>;
226                 #address-cells = <3>;
227                 reg = <0xe0008600 0x100>;
228                 compatible = "fsl,mpc8349-pci";
229                 device_type = "pci";
230         };
231 };