1 #ifndef _ASM_ARCH_IRQ_H
2 #define _ASM_ARCH_IRQ_H
4 #include <linux/config.h>
5 #include "hwregs/intr_vect.h"
7 /* Number of non-cpu interrupts. */
8 #define NR_IRQS 0x50 /* Exceptions + IRQs */
9 #define NR_REAL_IRQS 0x20 /* IRQs */
10 #define FIRST_IRQ 0x31 /* Exception number for first IRQ */
13 /* Global IRQ vector. */
14 typedef void (*irqvectptr)(void);
16 struct etrax_interrupt_vector {
20 extern struct etrax_interrupt_vector *etrax_irv; /* head.S */
22 void mask_irq(int irq);
23 void unmask_irq(int irq);
25 void set_exception_vector(int n, irqvectptr addr);
27 /* Save registers so that they match pt_regs. */
30 "move $erp,[$sp]\n\t" \
32 "move $srp,[$sp]\n\t" \
34 "move $ccs,[$sp]\n\t" \
36 "move $spc,[$sp]\n\t" \
38 "move $mof,[$sp]\n\t" \
40 "move $srs,[$sp]\n\t" \
42 "move.d $acr,[$sp]\n\t" \
44 "movem $r13,[$sp]\n\t" \
49 #define STR(x) STR2(x)
51 #define IRQ_NAME2(nr) nr##_interrupt(void)
52 #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
55 * The reason for setting the S-bit when debugging the kernel is that we want
56 * hardware breakpoints to remain active while we are in an exception handler.
57 * Note that we cannot simply copy S1, since we may come here from user-space,
58 * or any context where the S-bit wasn't set.
60 #ifdef CONFIG_ETRAX_KGDB
62 "move $ccs, $r10\n\t" \
63 "or.d (1<<9), $r10\n\t" \
70 * Make sure the causing IRQ is blocked, then call do_IRQ. After that, unblock
71 * and jump to ret_from_intr which is found in entry.S.
73 * The reason for blocking the IRQ is to allow an sti() before the handler,
74 * which will acknowledge the interrupt, is run. The actual blocking is made
77 #define BUILD_IRQ(nr, mask) \
81 "IRQ" #nr "_interrupt:\n\t" \
84 "move.d "#nr",$r10\n\t" \
85 "move.d $sp,$r12\n\t" \
86 "jsr crisv32_do_IRQ\n\t" \
88 "jump ret_from_intr\n\t" \
91 * This is subtle. The timer interrupt is crucial and it should not be disabled
92 * for too long. However, if it had been a normal interrupt as per BUILD_IRQ, it
93 * would have been BLOCK'ed, and then softirq's are run before we return here to
94 * UNBLOCK. If the softirq's take too much time to run, the timer irq won't run
95 * and the watchdog will kill us.
97 * Furthermore, if a lot of other irq's occur before we return here, the
98 * multiple_irq handler is run and it prioritizes the timer interrupt. However
99 * if we had BLOCK'edit here, we would not get the multiple_irq at all.
101 * The non-blocking here is based on the knowledge that the timer interrupt is
102 * registred as a fast interrupt (SA_INTERRUPT) so that we _know_ there will not
103 * be an sti() before the timer irq handler is run to acknowledge the interrupt.
105 #define BUILD_TIMER_IRQ(nr, mask) \
109 "IRQ" #nr "_interrupt:\n\t" \
112 "move.d "#nr",$r10\n\t" \
113 "move.d $sp,$r12\n\t" \
114 "jsr crisv32_do_IRQ\n\t" \
116 "jump ret_from_intr\n\t" \
119 #endif /* __ASSEMBLY__ */
120 #endif /* _ASM_ARCH_IRQ_H */