2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2006 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
25 * onenand_oob_64 - oob info for large (2KB) page
27 static struct nand_ecclayout onenand_oob_64 = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37 {34, 3}, {46, 2}, {50, 3}, {62, 2}
42 * onenand_oob_32 - oob info for middle (1KB) page
44 static struct nand_ecclayout onenand_oob_32 = {
50 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
53 static const unsigned char ffchars[] = {
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
65 * onenand_readw - [OneNAND Interface] Read OneNAND register
66 * @param addr address to read
68 * Read OneNAND register
70 static unsigned short onenand_readw(void __iomem *addr)
76 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77 * @param value value to write
78 * @param addr address to write
80 * Write OneNAND register with value
82 static void onenand_writew(unsigned short value, void __iomem *addr)
88 * onenand_block_address - [DEFAULT] Get block address
89 * @param this onenand chip data structure
90 * @param block the block
91 * @return translated block address if DDP, otherwise same
93 * Setup Start Address 1 Register (F100h)
95 static int onenand_block_address(struct onenand_chip *this, int block)
97 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
98 /* Device Flash Core select, NAND Flash Block Address */
101 if (block & this->density_mask)
104 return (dfs << ONENAND_DDP_SHIFT) |
105 (block & (this->density_mask - 1));
112 * onenand_bufferram_address - [DEFAULT] Get bufferram address
113 * @param this onenand chip data structure
114 * @param block the block
115 * @return set DBS value if DDP, otherwise 0
117 * Setup Start Address 2 Register (F101h) for DDP
119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
121 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
122 /* Device BufferRAM Select */
125 if (block & this->density_mask)
128 return (dbs << ONENAND_DDP_SHIFT);
135 * onenand_page_address - [DEFAULT] Get page address
136 * @param page the page address
137 * @param sector the sector address
138 * @return combined page and sector address
140 * Setup Start Address 8 Register (F107h)
142 static int onenand_page_address(int page, int sector)
144 /* Flash Page Address, Flash Sector Address */
147 fpa = page & ONENAND_FPA_MASK;
148 fsa = sector & ONENAND_FSA_MASK;
150 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
154 * onenand_buffer_address - [DEFAULT] Get buffer address
155 * @param dataram1 DataRAM index
156 * @param sectors the sector address
157 * @param count the number of sectors
158 * @return the start buffer value
160 * Setup Start Buffer Register (F200h)
162 static int onenand_buffer_address(int dataram1, int sectors, int count)
166 /* BufferRAM Sector Address */
167 bsa = sectors & ONENAND_BSA_MASK;
170 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
172 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
174 /* BufferRAM Sector Count */
175 bsc = count & ONENAND_BSC_MASK;
177 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
181 * onenand_command - [DEFAULT] Send command to OneNAND device
182 * @param mtd MTD device structure
183 * @param cmd the command to be sent
184 * @param addr offset to read from or write to
185 * @param len number of bytes to read or write
187 * Send command to OneNAND device. This function is used for middle/large page
188 * devices (1KB/2KB Bytes per page)
190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
192 struct onenand_chip *this = mtd->priv;
193 int value, readcmd = 0, block_cmd = 0;
195 /* Now we use page size operation */
196 int sectors = 4, count = 4;
198 /* Address translation */
200 case ONENAND_CMD_UNLOCK:
201 case ONENAND_CMD_LOCK:
202 case ONENAND_CMD_LOCK_TIGHT:
203 case ONENAND_CMD_UNLOCK_ALL:
208 case ONENAND_CMD_ERASE:
209 case ONENAND_CMD_BUFFERRAM:
210 case ONENAND_CMD_OTP_ACCESS:
212 block = (int) (addr >> this->erase_shift);
217 block = (int) (addr >> this->erase_shift);
218 page = (int) (addr >> this->page_shift);
219 page &= this->page_mask;
223 /* NOTE: The setting order of the registers is very important! */
224 if (cmd == ONENAND_CMD_BUFFERRAM) {
225 /* Select DataRAM for DDP */
226 value = onenand_bufferram_address(this, block);
227 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
229 /* Switch to the next data buffer */
230 ONENAND_SET_NEXT_BUFFERRAM(this);
236 /* Write 'DFS, FBA' of Flash */
237 value = onenand_block_address(this, block);
238 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
241 /* Select DataRAM for DDP */
242 value = onenand_bufferram_address(this, block);
243 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
251 case ONENAND_CMD_READ:
252 case ONENAND_CMD_READOOB:
253 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
258 dataram = ONENAND_CURRENT_BUFFERRAM(this);
262 /* Write 'FPA, FSA' of Flash */
263 value = onenand_page_address(page, sectors);
264 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
266 /* Write 'BSA, BSC' of DataRAM */
267 value = onenand_buffer_address(dataram, sectors, count);
268 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
271 /* Select DataRAM for DDP */
272 value = onenand_bufferram_address(this, block);
273 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
277 /* Interrupt clear */
278 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
281 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
287 * onenand_wait - [DEFAULT] wait until the command is done
288 * @param mtd MTD device structure
289 * @param state state to select the max. timeout value
291 * Wait for command done. This applies to all OneNAND command
292 * Read can take up to 30us, erase up to 2ms and program up to 350us
293 * according to general OneNAND specs
295 static int onenand_wait(struct mtd_info *mtd, int state)
297 struct onenand_chip * this = mtd->priv;
298 unsigned long timeout;
299 unsigned int flags = ONENAND_INT_MASTER;
300 unsigned int interrupt = 0;
301 unsigned int ctrl, ecc;
303 /* The 20 msec is enough */
304 timeout = jiffies + msecs_to_jiffies(20);
305 while (time_before(jiffies, timeout)) {
306 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
308 if (interrupt & flags)
311 if (state != FL_READING)
313 touch_softlockup_watchdog();
315 /* To get correct interrupt status in timeout case */
316 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
318 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
320 if (ctrl & ONENAND_CTRL_ERROR) {
321 /* It maybe occur at initial bad block */
322 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
323 /* Clear other interrupt bits for preventing ECC error */
324 interrupt &= ONENAND_INT_MASTER;
327 if (ctrl & ONENAND_CTRL_LOCK) {
328 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
332 if (interrupt & ONENAND_INT_READ) {
333 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
335 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
336 if (ecc & ONENAND_ECC_2BIT_ALL)
337 mtd->ecc_stats.failed++;
338 else if (ecc & ONENAND_ECC_1BIT_ALL)
339 mtd->ecc_stats.corrected++;
347 * onenand_interrupt - [DEFAULT] onenand interrupt handler
348 * @param irq onenand interrupt number
349 * @param dev_id interrupt data
353 static irqreturn_t onenand_interrupt(int irq, void *data)
355 struct onenand_chip *this = (struct onenand_chip *) data;
357 /* To handle shared interrupt */
358 if (!this->complete.done)
359 complete(&this->complete);
365 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
366 * @param mtd MTD device structure
367 * @param state state to select the max. timeout value
369 * Wait for command done.
371 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
373 struct onenand_chip *this = mtd->priv;
375 /* To prevent soft lockup */
376 touch_softlockup_watchdog();
378 wait_for_completion(&this->complete);
380 return onenand_wait(mtd, state);
384 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
385 * @param mtd MTD device structure
386 * @param state state to select the max. timeout value
388 * Try interrupt based wait (It is used one-time)
390 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
392 struct onenand_chip *this = mtd->priv;
393 unsigned long remain, timeout;
395 /* We use interrupt wait first */
396 this->wait = onenand_interrupt_wait;
398 /* To prevent soft lockup */
399 touch_softlockup_watchdog();
401 timeout = msecs_to_jiffies(100);
402 remain = wait_for_completion_timeout(&this->complete, timeout);
404 printk(KERN_INFO "OneNAND: There's no interrupt. "
405 "We use the normal wait\n");
407 /* Release the irq */
408 free_irq(this->irq, this);
410 this->wait = onenand_wait;
413 return onenand_wait(mtd, state);
417 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
418 * @param mtd MTD device structure
420 * There's two method to wait onenand work
421 * 1. polling - read interrupt status register
422 * 2. interrupt - use the kernel interrupt method
424 static void onenand_setup_wait(struct mtd_info *mtd)
426 struct onenand_chip *this = mtd->priv;
429 init_completion(&this->complete);
431 if (this->irq <= 0) {
432 this->wait = onenand_wait;
436 if (request_irq(this->irq, &onenand_interrupt,
437 IRQF_SHARED, "onenand", this)) {
438 /* If we can't get irq, use the normal wait */
439 this->wait = onenand_wait;
443 /* Enable interrupt */
444 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
445 syscfg |= ONENAND_SYS_CFG1_IOBE;
446 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
448 this->wait = onenand_try_interrupt_wait;
452 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
453 * @param mtd MTD data structure
454 * @param area BufferRAM area
455 * @return offset given area
457 * Return BufferRAM offset given area
459 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
461 struct onenand_chip *this = mtd->priv;
463 if (ONENAND_CURRENT_BUFFERRAM(this)) {
464 if (area == ONENAND_DATARAM)
465 return mtd->writesize;
466 if (area == ONENAND_SPARERAM)
474 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
475 * @param mtd MTD data structure
476 * @param area BufferRAM area
477 * @param buffer the databuffer to put/get data
478 * @param offset offset to read from or write to
479 * @param count number of bytes to read/write
481 * Read the BufferRAM area
483 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
484 unsigned char *buffer, int offset, size_t count)
486 struct onenand_chip *this = mtd->priv;
487 void __iomem *bufferram;
489 bufferram = this->base + area;
491 bufferram += onenand_bufferram_offset(mtd, area);
493 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
496 /* Align with word(16-bit) size */
499 /* Read word and save byte */
500 word = this->read_word(bufferram + offset + count);
501 buffer[count] = (word & 0xff);
504 memcpy(buffer, bufferram + offset, count);
510 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
511 * @param mtd MTD data structure
512 * @param area BufferRAM area
513 * @param buffer the databuffer to put/get data
514 * @param offset offset to read from or write to
515 * @param count number of bytes to read/write
517 * Read the BufferRAM area with Sync. Burst Mode
519 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
520 unsigned char *buffer, int offset, size_t count)
522 struct onenand_chip *this = mtd->priv;
523 void __iomem *bufferram;
525 bufferram = this->base + area;
527 bufferram += onenand_bufferram_offset(mtd, area);
529 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
531 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
534 /* Align with word(16-bit) size */
537 /* Read word and save byte */
538 word = this->read_word(bufferram + offset + count);
539 buffer[count] = (word & 0xff);
542 memcpy(buffer, bufferram + offset, count);
544 this->mmcontrol(mtd, 0);
550 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
551 * @param mtd MTD data structure
552 * @param area BufferRAM area
553 * @param buffer the databuffer to put/get data
554 * @param offset offset to read from or write to
555 * @param count number of bytes to read/write
557 * Write the BufferRAM area
559 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
560 const unsigned char *buffer, int offset, size_t count)
562 struct onenand_chip *this = mtd->priv;
563 void __iomem *bufferram;
565 bufferram = this->base + area;
567 bufferram += onenand_bufferram_offset(mtd, area);
569 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
573 /* Align with word(16-bit) size */
576 /* Calculate byte access offset */
577 byte_offset = offset + count;
579 /* Read word and save byte */
580 word = this->read_word(bufferram + byte_offset);
581 word = (word & ~0xff) | buffer[count];
582 this->write_word(word, bufferram + byte_offset);
585 memcpy(bufferram + offset, buffer, count);
591 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
592 * @param mtd MTD data structure
593 * @param addr address to check
594 * @return 1 if there are valid data, otherwise 0
596 * Check bufferram if there is data we required
598 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
600 struct onenand_chip *this = mtd->priv;
604 block = (int) (addr >> this->erase_shift);
605 page = (int) (addr >> this->page_shift);
606 page &= this->page_mask;
608 i = ONENAND_CURRENT_BUFFERRAM(this);
610 /* Is there valid data? */
611 if (this->bufferram[i].block == block &&
612 this->bufferram[i].page == page &&
613 this->bufferram[i].valid)
620 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
621 * @param mtd MTD data structure
622 * @param addr address to update
623 * @param valid valid flag
625 * Update BufferRAM information
627 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
630 struct onenand_chip *this = mtd->priv;
634 block = (int) (addr >> this->erase_shift);
635 page = (int) (addr >> this->page_shift);
636 page &= this->page_mask;
638 /* Invalidate BufferRAM */
639 for (i = 0; i < MAX_BUFFERRAM; i++) {
640 if (this->bufferram[i].block == block &&
641 this->bufferram[i].page == page)
642 this->bufferram[i].valid = 0;
645 /* Update BufferRAM */
646 i = ONENAND_CURRENT_BUFFERRAM(this);
647 this->bufferram[i].block = block;
648 this->bufferram[i].page = page;
649 this->bufferram[i].valid = valid;
655 * onenand_get_device - [GENERIC] Get chip for selected access
656 * @param mtd MTD device structure
657 * @param new_state the state which is requested
659 * Get the device and lock it for exclusive access
661 static int onenand_get_device(struct mtd_info *mtd, int new_state)
663 struct onenand_chip *this = mtd->priv;
664 DECLARE_WAITQUEUE(wait, current);
667 * Grab the lock and see if the device is available
670 spin_lock(&this->chip_lock);
671 if (this->state == FL_READY) {
672 this->state = new_state;
673 spin_unlock(&this->chip_lock);
676 if (new_state == FL_PM_SUSPENDED) {
677 spin_unlock(&this->chip_lock);
678 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
680 set_current_state(TASK_UNINTERRUPTIBLE);
681 add_wait_queue(&this->wq, &wait);
682 spin_unlock(&this->chip_lock);
684 remove_wait_queue(&this->wq, &wait);
691 * onenand_release_device - [GENERIC] release chip
692 * @param mtd MTD device structure
694 * Deselect, release chip lock and wake up anyone waiting on the device
696 static void onenand_release_device(struct mtd_info *mtd)
698 struct onenand_chip *this = mtd->priv;
700 /* Release the chip */
701 spin_lock(&this->chip_lock);
702 this->state = FL_READY;
704 spin_unlock(&this->chip_lock);
708 * onenand_read - [MTD Interface] Read data from flash
709 * @param mtd MTD device structure
710 * @param from offset to read from
711 * @param len number of bytes to read
712 * @param retlen pointer to variable to store the number of read bytes
713 * @param buf the databuffer to put data
717 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
718 size_t *retlen, u_char *buf)
720 struct onenand_chip *this = mtd->priv;
721 struct mtd_ecc_stats stats;
722 int read = 0, column;
726 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
728 /* Do not allow reads past end of device */
729 if ((from + len) > mtd->size) {
730 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
735 /* Grab the lock and see if the device is available */
736 onenand_get_device(mtd, FL_READING);
738 /* TODO handling oob */
740 stats = mtd->ecc_stats;
742 thislen = min_t(int, mtd->writesize, len - read);
744 column = from & (mtd->writesize - 1);
745 if (column + thislen > mtd->writesize)
746 thislen = mtd->writesize - column;
748 if (!onenand_check_bufferram(mtd, from)) {
749 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
751 ret = this->wait(mtd, FL_READING);
752 /* First copy data and check return value for ECC handling */
753 onenand_update_bufferram(mtd, from, 1);
756 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
764 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
773 /* Deselect and wake up anyone waiting on the device */
774 onenand_release_device(mtd);
777 * Return success, if no ECC failures, else -EBADMSG
778 * fs driver will take care of that, because
779 * retlen == desired len and result == -EBADMSG
783 if (mtd->ecc_stats.failed - stats.failed)
786 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
790 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
791 * @param mtd MTD device structure
792 * @param from offset to read from
793 * @param len number of bytes to read
794 * @param retlen pointer to variable to store the number of read bytes
795 * @param buf the databuffer to put data
797 * OneNAND read out-of-band data from the spare area
799 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
800 size_t *retlen, u_char *buf)
802 struct onenand_chip *this = mtd->priv;
803 int read = 0, thislen, column;
806 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
808 /* Initialize return length value */
811 /* Do not allow reads past end of device */
812 if (unlikely((from + len) > mtd->size)) {
813 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
817 /* Grab the lock and see if the device is available */
818 onenand_get_device(mtd, FL_READING);
820 column = from & (mtd->oobsize - 1);
823 thislen = mtd->oobsize - column;
824 thislen = min_t(int, thislen, len);
826 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
828 onenand_update_bufferram(mtd, from, 0);
830 ret = this->wait(mtd, FL_READING);
831 /* First copy data and check return value for ECC handling */
833 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
841 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
850 from += mtd->writesize;
856 /* Deselect and wake up anyone waiting on the device */
857 onenand_release_device(mtd);
864 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
865 * @mtd: MTD device structure
866 * @from: offset to read from
867 * @ops: oob operation description structure
869 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
870 struct mtd_oob_ops *ops)
872 BUG_ON(ops->mode != MTD_OOB_PLACE);
874 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
875 &ops->oobretlen, ops->oobbuf);
878 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
880 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
881 * @param mtd MTD device structure
882 * @param buf the databuffer to verify
883 * @param to offset to read from
884 * @param len number of bytes to read and compare
887 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
889 struct onenand_chip *this = mtd->priv;
890 char *readp = this->page_buf;
891 int column = to & (mtd->oobsize - 1);
894 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
895 onenand_update_bufferram(mtd, to, 0);
896 status = this->wait(mtd, FL_READING);
900 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
902 for(i = 0; i < len; i++)
903 if (buf[i] != 0xFF && buf[i] != readp[i])
910 * onenand_verify_page - [GENERIC] verify the chip contents after a write
911 * @param mtd MTD device structure
912 * @param buf the databuffer to verify
914 * Check DataRAM area directly
916 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
918 struct onenand_chip *this = mtd->priv;
919 void __iomem *dataram0, *dataram1;
922 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
924 ret = this->wait(mtd, FL_READING);
928 onenand_update_bufferram(mtd, addr, 1);
930 /* Check, if the two dataram areas are same */
931 dataram0 = this->base + ONENAND_DATARAM;
932 dataram1 = dataram0 + mtd->writesize;
934 if (memcmp(dataram0, dataram1, mtd->writesize))
940 #define onenand_verify_page(...) (0)
941 #define onenand_verify_oob(...) (0)
944 #define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
947 * onenand_write - [MTD Interface] write buffer to FLASH
948 * @param mtd MTD device structure
949 * @param to offset to write to
950 * @param len number of bytes to write
951 * @param retlen pointer to variable to store the number of written bytes
952 * @param buf the data to write
956 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
957 size_t *retlen, const u_char *buf)
959 struct onenand_chip *this = mtd->priv;
963 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
965 /* Initialize retlen, in case of early exit */
968 /* Do not allow writes past end of device */
969 if (unlikely((to + len) > mtd->size)) {
970 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
974 /* Reject writes, which are not page aligned */
975 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
976 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
980 /* Grab the lock and see if the device is available */
981 onenand_get_device(mtd, FL_WRITING);
983 /* Loop until all data write */
984 while (written < len) {
985 int thislen = min_t(int, mtd->writesize, len - written);
987 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
989 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
990 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
992 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
994 onenand_update_bufferram(mtd, to, 1);
996 ret = this->wait(mtd, FL_WRITING);
998 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1004 /* Only check verify write turn on */
1005 ret = onenand_verify_page(mtd, (u_char *) buf, to);
1007 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1019 /* Deselect and wake up anyone waiting on the device */
1020 onenand_release_device(mtd);
1028 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1029 * @param mtd MTD device structure
1030 * @param to offset to write to
1031 * @param len number of bytes to write
1032 * @param retlen pointer to variable to store the number of written bytes
1033 * @param buf the data to write
1035 * OneNAND write out-of-band
1037 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1038 size_t *retlen, const u_char *buf)
1040 struct onenand_chip *this = mtd->priv;
1041 int column, ret = 0;
1044 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1046 /* Initialize retlen, in case of early exit */
1049 /* Do not allow writes past end of device */
1050 if (unlikely((to + len) > mtd->size)) {
1051 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1055 /* Grab the lock and see if the device is available */
1056 onenand_get_device(mtd, FL_WRITING);
1058 /* Loop until all data write */
1059 while (written < len) {
1060 int thislen = min_t(int, mtd->oobsize, len - written);
1062 column = to & (mtd->oobsize - 1);
1064 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1066 /* We send data to spare ram with oobsize
1067 * to prevent byte access */
1068 memset(this->page_buf, 0xff, mtd->oobsize);
1069 memcpy(this->page_buf + column, buf, thislen);
1070 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1072 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1074 onenand_update_bufferram(mtd, to, 0);
1076 ret = this->wait(mtd, FL_WRITING);
1078 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1082 ret = onenand_verify_oob(mtd, buf, to, thislen);
1084 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1098 /* Deselect and wake up anyone waiting on the device */
1099 onenand_release_device(mtd);
1107 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1108 * @mtd: MTD device structure
1109 * @from: offset to read from
1110 * @ops: oob operation description structure
1112 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1113 struct mtd_oob_ops *ops)
1115 BUG_ON(ops->mode != MTD_OOB_PLACE);
1117 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1118 &ops->oobretlen, ops->oobbuf);
1122 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1123 * @param mtd MTD device structure
1124 * @param ofs offset from device start
1125 * @param getchip 0, if the chip is already selected
1126 * @param allowbbt 1, if its allowed to access the bbt area
1128 * Check, if the block is bad. Either by reading the bad block table or
1129 * calling of the scan function.
1131 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1133 struct onenand_chip *this = mtd->priv;
1134 struct bbm_info *bbm = this->bbm;
1136 /* Return info from the table */
1137 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1141 * onenand_erase - [MTD Interface] erase block(s)
1142 * @param mtd MTD device structure
1143 * @param instr erase instruction
1145 * Erase one ore more blocks
1147 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1149 struct onenand_chip *this = mtd->priv;
1150 unsigned int block_size;
1155 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1157 block_size = (1 << this->erase_shift);
1159 /* Start address must align on block boundary */
1160 if (unlikely(instr->addr & (block_size - 1))) {
1161 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1165 /* Length must align on block boundary */
1166 if (unlikely(instr->len & (block_size - 1))) {
1167 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1171 /* Do not allow erase past end of device */
1172 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1173 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1177 instr->fail_addr = 0xffffffff;
1179 /* Grab the lock and see if the device is available */
1180 onenand_get_device(mtd, FL_ERASING);
1182 /* Loop throught the pages */
1186 instr->state = MTD_ERASING;
1190 /* Check if we have a bad block, we do not erase bad blocks */
1191 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1192 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1193 instr->state = MTD_ERASE_FAILED;
1197 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1199 ret = this->wait(mtd, FL_ERASING);
1200 /* Check, if it is write protected */
1203 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1205 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1206 instr->state = MTD_ERASE_FAILED;
1207 instr->fail_addr = addr;
1215 instr->state = MTD_ERASE_DONE;
1219 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1220 /* Do call back function */
1222 mtd_erase_callback(instr);
1224 /* Deselect and wake up anyone waiting on the device */
1225 onenand_release_device(mtd);
1231 * onenand_sync - [MTD Interface] sync
1232 * @param mtd MTD device structure
1234 * Sync is actually a wait for chip ready function
1236 static void onenand_sync(struct mtd_info *mtd)
1238 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1240 /* Grab the lock and see if the device is available */
1241 onenand_get_device(mtd, FL_SYNCING);
1243 /* Release it and go back */
1244 onenand_release_device(mtd);
1248 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1249 * @param mtd MTD device structure
1250 * @param ofs offset relative to mtd start
1252 * Check whether the block is bad
1254 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1256 /* Check for invalid offset */
1257 if (ofs > mtd->size)
1260 return onenand_block_checkbad(mtd, ofs, 1, 0);
1264 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1265 * @param mtd MTD device structure
1266 * @param ofs offset from device start
1268 * This is the default implementation, which can be overridden by
1269 * a hardware specific driver.
1271 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1273 struct onenand_chip *this = mtd->priv;
1274 struct bbm_info *bbm = this->bbm;
1275 u_char buf[2] = {0, 0};
1279 /* Get block number */
1280 block = ((int) ofs) >> bbm->bbt_erase_shift;
1282 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1284 /* We write two bytes, so we dont have to mess with 16 bit access */
1285 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1286 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1290 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1291 * @param mtd MTD device structure
1292 * @param ofs offset relative to mtd start
1294 * Mark the block as bad
1296 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1298 struct onenand_chip *this = mtd->priv;
1301 ret = onenand_block_isbad(mtd, ofs);
1303 /* If it was bad already, return success and do nothing */
1309 return this->block_markbad(mtd, ofs);
1313 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1314 * @param mtd MTD device structure
1315 * @param ofs offset relative to mtd start
1316 * @param len number of bytes to lock or unlock
1318 * Lock or unlock one or more blocks
1320 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1322 struct onenand_chip *this = mtd->priv;
1323 int start, end, block, value, status;
1326 start = ofs >> this->erase_shift;
1327 end = len >> this->erase_shift;
1329 if (cmd == ONENAND_CMD_LOCK)
1330 wp_status_mask = ONENAND_WP_LS;
1332 wp_status_mask = ONENAND_WP_US;
1334 /* Continuous lock scheme */
1335 if (this->options & ONENAND_HAS_CONT_LOCK) {
1336 /* Set start block address */
1337 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1338 /* Set end block address */
1339 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1340 /* Write lock command */
1341 this->command(mtd, cmd, 0, 0);
1343 /* There's no return value */
1344 this->wait(mtd, FL_LOCKING);
1347 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1348 & ONENAND_CTRL_ONGO)
1351 /* Check lock status */
1352 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1353 if (!(status & wp_status_mask))
1354 printk(KERN_ERR "wp status = 0x%x\n", status);
1359 /* Block lock scheme */
1360 for (block = start; block < start + end; block++) {
1361 /* Set block address */
1362 value = onenand_block_address(this, block);
1363 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1364 /* Select DataRAM for DDP */
1365 value = onenand_bufferram_address(this, block);
1366 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1367 /* Set start block address */
1368 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1369 /* Write lock command */
1370 this->command(mtd, cmd, 0, 0);
1372 /* There's no return value */
1373 this->wait(mtd, FL_LOCKING);
1376 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1377 & ONENAND_CTRL_ONGO)
1380 /* Check lock status */
1381 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1382 if (!(status & wp_status_mask))
1383 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1390 * onenand_lock - [MTD Interface] Lock block(s)
1391 * @param mtd MTD device structure
1392 * @param ofs offset relative to mtd start
1393 * @param len number of bytes to unlock
1395 * Lock one or more blocks
1397 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1399 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1403 * onenand_unlock - [MTD Interface] Unlock block(s)
1404 * @param mtd MTD device structure
1405 * @param ofs offset relative to mtd start
1406 * @param len number of bytes to unlock
1408 * Unlock one or more blocks
1410 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1412 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1416 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1417 * @param this onenand chip data structure
1421 static void onenand_check_lock_status(struct onenand_chip *this)
1423 unsigned int value, block, status;
1426 end = this->chipsize >> this->erase_shift;
1427 for (block = 0; block < end; block++) {
1428 /* Set block address */
1429 value = onenand_block_address(this, block);
1430 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1431 /* Select DataRAM for DDP */
1432 value = onenand_bufferram_address(this, block);
1433 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1434 /* Set start block address */
1435 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1437 /* Check lock status */
1438 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1439 if (!(status & ONENAND_WP_US))
1440 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1445 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1446 * @param mtd MTD device structure
1450 static int onenand_unlock_all(struct mtd_info *mtd)
1452 struct onenand_chip *this = mtd->priv;
1454 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1455 /* Write unlock command */
1456 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1458 /* There's no return value */
1459 this->wait(mtd, FL_LOCKING);
1462 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1463 & ONENAND_CTRL_ONGO)
1466 /* Workaround for all block unlock in DDP */
1467 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1471 /* 1st block on another chip */
1472 ofs = this->chipsize >> 1;
1473 len = 1 << this->erase_shift;
1475 onenand_unlock(mtd, ofs, len);
1478 onenand_check_lock_status(this);
1483 onenand_unlock(mtd, 0x0, this->chipsize);
1488 #ifdef CONFIG_MTD_ONENAND_OTP
1490 /* Interal OTP operation */
1491 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1492 size_t *retlen, u_char *buf);
1495 * do_otp_read - [DEFAULT] Read OTP block area
1496 * @param mtd MTD device structure
1497 * @param from The offset to read
1498 * @param len number of bytes to read
1499 * @param retlen pointer to variable to store the number of readbytes
1500 * @param buf the databuffer to put/get data
1502 * Read OTP block area.
1504 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1505 size_t *retlen, u_char *buf)
1507 struct onenand_chip *this = mtd->priv;
1510 /* Enter OTP access mode */
1511 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1512 this->wait(mtd, FL_OTPING);
1514 ret = mtd->read(mtd, from, len, retlen, buf);
1516 /* Exit OTP access mode */
1517 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1518 this->wait(mtd, FL_RESETING);
1524 * do_otp_write - [DEFAULT] Write OTP block area
1525 * @param mtd MTD device structure
1526 * @param from The offset to write
1527 * @param len number of bytes to write
1528 * @param retlen pointer to variable to store the number of write bytes
1529 * @param buf the databuffer to put/get data
1531 * Write OTP block area.
1533 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1534 size_t *retlen, u_char *buf)
1536 struct onenand_chip *this = mtd->priv;
1537 unsigned char *pbuf = buf;
1540 /* Force buffer page aligned */
1541 if (len < mtd->writesize) {
1542 memcpy(this->page_buf, buf, len);
1543 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1544 pbuf = this->page_buf;
1545 len = mtd->writesize;
1548 /* Enter OTP access mode */
1549 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1550 this->wait(mtd, FL_OTPING);
1552 ret = mtd->write(mtd, from, len, retlen, pbuf);
1554 /* Exit OTP access mode */
1555 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1556 this->wait(mtd, FL_RESETING);
1562 * do_otp_lock - [DEFAULT] Lock OTP block area
1563 * @param mtd MTD device structure
1564 * @param from The offset to lock
1565 * @param len number of bytes to lock
1566 * @param retlen pointer to variable to store the number of lock bytes
1567 * @param buf the databuffer to put/get data
1569 * Lock OTP block area.
1571 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1572 size_t *retlen, u_char *buf)
1574 struct onenand_chip *this = mtd->priv;
1577 /* Enter OTP access mode */
1578 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1579 this->wait(mtd, FL_OTPING);
1581 ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1583 /* Exit OTP access mode */
1584 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1585 this->wait(mtd, FL_RESETING);
1591 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1592 * @param mtd MTD device structure
1593 * @param from The offset to read/write
1594 * @param len number of bytes to read/write
1595 * @param retlen pointer to variable to store the number of read bytes
1596 * @param buf the databuffer to put/get data
1597 * @param action do given action
1598 * @param mode specify user and factory
1600 * Handle OTP operation.
1602 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1603 size_t *retlen, u_char *buf,
1604 otp_op_t action, int mode)
1606 struct onenand_chip *this = mtd->priv;
1613 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1614 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1619 if (mode == MTD_OTP_FACTORY) {
1620 from += mtd->writesize * otp_pages;
1621 otp_pages = 64 - otp_pages;
1624 /* Check User/Factory boundary */
1625 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1628 while (len > 0 && otp_pages > 0) {
1629 if (!action) { /* OTP Info functions */
1630 struct otp_info *otpinfo;
1632 len -= sizeof(struct otp_info);
1636 otpinfo = (struct otp_info *) buf;
1637 otpinfo->start = from;
1638 otpinfo->length = mtd->writesize;
1639 otpinfo->locked = 0;
1641 from += mtd->writesize;
1642 buf += sizeof(struct otp_info);
1643 *retlen += sizeof(struct otp_info);
1648 ret = action(mtd, from, len, &tmp_retlen, buf);
1664 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1665 * @param mtd MTD device structure
1666 * @param buf the databuffer to put/get data
1667 * @param len number of bytes to read
1669 * Read factory OTP info.
1671 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1672 struct otp_info *buf, size_t len)
1677 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1679 return ret ? : retlen;
1683 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1684 * @param mtd MTD device structure
1685 * @param from The offset to read
1686 * @param len number of bytes to read
1687 * @param retlen pointer to variable to store the number of read bytes
1688 * @param buf the databuffer to put/get data
1690 * Read factory OTP area.
1692 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1693 size_t len, size_t *retlen, u_char *buf)
1695 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1699 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1700 * @param mtd MTD device structure
1701 * @param buf the databuffer to put/get data
1702 * @param len number of bytes to read
1704 * Read user OTP info.
1706 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1707 struct otp_info *buf, size_t len)
1712 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1714 return ret ? : retlen;
1718 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1719 * @param mtd MTD device structure
1720 * @param from The offset to read
1721 * @param len number of bytes to read
1722 * @param retlen pointer to variable to store the number of read bytes
1723 * @param buf the databuffer to put/get data
1725 * Read user OTP area.
1727 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1728 size_t len, size_t *retlen, u_char *buf)
1730 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1734 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1735 * @param mtd MTD device structure
1736 * @param from The offset to write
1737 * @param len number of bytes to write
1738 * @param retlen pointer to variable to store the number of write bytes
1739 * @param buf the databuffer to put/get data
1741 * Write user OTP area.
1743 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1744 size_t len, size_t *retlen, u_char *buf)
1746 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1750 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1751 * @param mtd MTD device structure
1752 * @param from The offset to lock
1753 * @param len number of bytes to unlock
1755 * Write lock mark on spare area in page 0 in OTP block
1757 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1760 unsigned char oob_buf[64];
1764 memset(oob_buf, 0xff, mtd->oobsize);
1766 * Note: OTP lock operation
1767 * OTP block : 0xXXFC
1768 * 1st block : 0xXXF3 (If chip support)
1769 * Both : 0xXXF0 (If chip support)
1771 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1774 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1775 * We write 16 bytes spare area instead of 2 bytes.
1780 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1782 return ret ? : retlen;
1784 #endif /* CONFIG_MTD_ONENAND_OTP */
1787 * onenand_lock_scheme - Check and set OneNAND lock scheme
1788 * @param mtd MTD data structure
1790 * Check and set OneNAND lock scheme
1792 static void onenand_lock_scheme(struct mtd_info *mtd)
1794 struct onenand_chip *this = mtd->priv;
1795 unsigned int density, process;
1797 /* Lock scheme depends on density and process */
1798 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1799 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1802 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1803 /* A-Die has all block unlock */
1805 printk(KERN_DEBUG "Chip support all block unlock\n");
1806 this->options |= ONENAND_HAS_UNLOCK_ALL;
1809 /* Some OneNAND has continues lock scheme */
1811 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1812 this->options |= ONENAND_HAS_CONT_LOCK;
1818 * onenand_print_device_info - Print device ID
1819 * @param device device ID
1823 static void onenand_print_device_info(int device, int version)
1825 int vcc, demuxed, ddp, density;
1827 vcc = device & ONENAND_DEVICE_VCC_MASK;
1828 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1829 ddp = device & ONENAND_DEVICE_IS_DDP;
1830 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1831 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1832 demuxed ? "" : "Muxed ",
1835 vcc ? "2.65/3.3" : "1.8",
1837 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1840 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1841 {ONENAND_MFR_SAMSUNG, "Samsung"},
1845 * onenand_check_maf - Check manufacturer ID
1846 * @param manuf manufacturer ID
1848 * Check manufacturer ID
1850 static int onenand_check_maf(int manuf)
1852 int size = ARRAY_SIZE(onenand_manuf_ids);
1856 for (i = 0; i < size; i++)
1857 if (manuf == onenand_manuf_ids[i].id)
1861 name = onenand_manuf_ids[i].name;
1865 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1871 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1872 * @param mtd MTD device structure
1874 * OneNAND detection method:
1875 * Compare the the values from command with ones from register
1877 static int onenand_probe(struct mtd_info *mtd)
1879 struct onenand_chip *this = mtd->priv;
1880 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1884 /* Save system configuration 1 */
1885 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1886 /* Clear Sync. Burst Read mode to read BootRAM */
1887 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1889 /* Send the command for reading device ID from BootRAM */
1890 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1892 /* Read manufacturer and device IDs from BootRAM */
1893 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1894 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1896 /* Reset OneNAND to read default register values */
1897 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1899 this->wait(mtd, FL_RESETING);
1901 /* Restore system configuration 1 */
1902 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1904 /* Check manufacturer ID */
1905 if (onenand_check_maf(bram_maf_id))
1908 /* Read manufacturer and device IDs from Register */
1909 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1910 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1911 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1913 /* Check OneNAND device */
1914 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1917 /* Flash device information */
1918 onenand_print_device_info(dev_id, ver_id);
1919 this->device_id = dev_id;
1920 this->version_id = ver_id;
1922 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1923 this->chipsize = (16 << density) << 20;
1924 /* Set density mask. it is used for DDP */
1925 this->density_mask = (1 << (density + 6));
1927 /* OneNAND page size & block size */
1928 /* The data buffer size is equal to page size */
1929 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1930 mtd->oobsize = mtd->writesize >> 5;
1931 /* Pagers per block is always 64 in OneNAND */
1932 mtd->erasesize = mtd->writesize << 6;
1934 this->erase_shift = ffs(mtd->erasesize) - 1;
1935 this->page_shift = ffs(mtd->writesize) - 1;
1936 this->ppb_shift = (this->erase_shift - this->page_shift);
1937 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1939 /* REVIST: Multichip handling */
1941 mtd->size = this->chipsize;
1943 /* Check OneNAND lock scheme */
1944 onenand_lock_scheme(mtd);
1950 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1951 * @param mtd MTD device structure
1953 static int onenand_suspend(struct mtd_info *mtd)
1955 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1959 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1960 * @param mtd MTD device structure
1962 static void onenand_resume(struct mtd_info *mtd)
1964 struct onenand_chip *this = mtd->priv;
1966 if (this->state == FL_PM_SUSPENDED)
1967 onenand_release_device(mtd);
1969 printk(KERN_ERR "resume() called for the chip which is not"
1970 "in suspended state\n");
1974 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1975 * @param mtd MTD device structure
1976 * @param maxchips Number of chips to scan for
1978 * This fills out all the not initialized function pointers
1979 * with the defaults.
1980 * The flash ID is read and the mtd/chip structures are
1981 * filled with the appropriate values.
1983 int onenand_scan(struct mtd_info *mtd, int maxchips)
1985 struct onenand_chip *this = mtd->priv;
1987 if (!this->read_word)
1988 this->read_word = onenand_readw;
1989 if (!this->write_word)
1990 this->write_word = onenand_writew;
1993 this->command = onenand_command;
1995 onenand_setup_wait(mtd);
1997 if (!this->read_bufferram)
1998 this->read_bufferram = onenand_read_bufferram;
1999 if (!this->write_bufferram)
2000 this->write_bufferram = onenand_write_bufferram;
2002 if (!this->block_markbad)
2003 this->block_markbad = onenand_default_block_markbad;
2004 if (!this->scan_bbt)
2005 this->scan_bbt = onenand_default_bbt;
2007 if (onenand_probe(mtd))
2010 /* Set Sync. Burst Read after probing */
2011 if (this->mmcontrol) {
2012 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2013 this->read_bufferram = onenand_sync_read_bufferram;
2016 /* Allocate buffers, if necessary */
2017 if (!this->page_buf) {
2019 len = mtd->writesize + mtd->oobsize;
2020 this->page_buf = kmalloc(len, GFP_KERNEL);
2021 if (!this->page_buf) {
2022 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2025 this->options |= ONENAND_PAGEBUF_ALLOC;
2028 this->state = FL_READY;
2029 init_waitqueue_head(&this->wq);
2030 spin_lock_init(&this->chip_lock);
2032 switch (mtd->oobsize) {
2034 this->ecclayout = &onenand_oob_64;
2038 this->ecclayout = &onenand_oob_32;
2042 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2044 /* To prevent kernel oops */
2045 this->ecclayout = &onenand_oob_32;
2049 mtd->ecclayout = this->ecclayout;
2051 /* Fill in remaining MTD driver data */
2052 mtd->type = MTD_NANDFLASH;
2053 mtd->flags = MTD_CAP_NANDFLASH;
2054 mtd->ecctype = MTD_ECC_SW;
2055 mtd->erase = onenand_erase;
2057 mtd->unpoint = NULL;
2058 mtd->read = onenand_read;
2059 mtd->write = onenand_write;
2060 mtd->read_oob = onenand_read_oob;
2061 mtd->write_oob = onenand_write_oob;
2062 #ifdef CONFIG_MTD_ONENAND_OTP
2063 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2064 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2065 mtd->get_user_prot_info = onenand_get_user_prot_info;
2066 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2067 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2068 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2070 mtd->sync = onenand_sync;
2071 mtd->lock = onenand_lock;
2072 mtd->unlock = onenand_unlock;
2073 mtd->suspend = onenand_suspend;
2074 mtd->resume = onenand_resume;
2075 mtd->block_isbad = onenand_block_isbad;
2076 mtd->block_markbad = onenand_block_markbad;
2077 mtd->owner = THIS_MODULE;
2079 /* Unlock whole block */
2080 onenand_unlock_all(mtd);
2082 return this->scan_bbt(mtd);
2086 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2087 * @param mtd MTD device structure
2089 void onenand_release(struct mtd_info *mtd)
2091 struct onenand_chip *this = mtd->priv;
2093 #ifdef CONFIG_MTD_PARTITIONS
2094 /* Deregister partitions */
2095 del_mtd_partitions (mtd);
2097 /* Deregister the device */
2098 del_mtd_device (mtd);
2100 /* Free bad block table memory, if allocated */
2103 /* Buffer allocated by onenand_scan */
2104 if (this->options & ONENAND_PAGEBUF_ALLOC)
2105 kfree(this->page_buf);
2108 EXPORT_SYMBOL_GPL(onenand_scan);
2109 EXPORT_SYMBOL_GPL(onenand_release);
2111 MODULE_LICENSE("GPL");
2112 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2113 MODULE_DESCRIPTION("Generic OneNAND flash driver code");