4 * Copyright (C) 2004 Intel
5 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #define OSC_QUERY_TYPE 0
12 #define OSC_SUPPORT_TYPE 1
13 #define OSC_CONTROL_TYPE 2
14 #define OSC_SUPPORT_MASKS 0x1f
19 #define OSC_QUERY_ENABLE 1
20 #define OSC_REQUEST_ERROR 2
21 #define OSC_INVALID_UUID_ERROR 4
22 #define OSC_INVALID_REVISION_ERROR 8
23 #define OSC_CAPABILITIES_MASK_ERROR 16
26 * _OSC DW1 Definition (OS Support Fields)
28 #define OSC_EXT_PCI_CONFIG_SUPPORT 1
29 #define OSC_ACTIVE_STATE_PWR_SUPPORT 2
30 #define OSC_CLOCK_PWR_CAPABILITY_SUPPORT 4
31 #define OSC_PCI_SEGMENT_GROUPS_SUPPORT 8
32 #define OSC_MSI_SUPPORT 16
35 * _OSC DW1 Definition (OS Control Fields)
37 #define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 1
38 #define OSC_SHPC_NATIVE_HP_CONTROL 2
39 #define OSC_PCI_EXPRESS_PME_CONTROL 4
40 #define OSC_PCI_EXPRESS_AER_CONTROL 8
41 #define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL 16
43 #define OSC_CONTROL_MASKS (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | \
44 OSC_SHPC_NATIVE_HP_CONTROL | \
45 OSC_PCI_EXPRESS_PME_CONTROL | \
46 OSC_PCI_EXPRESS_AER_CONTROL | \
47 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
50 extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags);
51 extern acpi_status __pci_osc_support_set(u32 flags, const char *hid);
52 static inline acpi_status pci_osc_support_set(u32 flags)
54 return __pci_osc_support_set(flags, PCI_ROOT_HID_STRING);
56 static inline acpi_status pcie_osc_support_set(u32 flags)
58 return __pci_osc_support_set(flags, PCI_EXPRESS_ROOT_HID_STRING);
61 #if !defined(AE_ERROR)
62 typedef u32 acpi_status;
63 #define AE_ERROR (acpi_status) (0x0001)
65 static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
67 static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;}
68 static inline acpi_status pcie_osc_support_set(u32 flags) {return AE_ERROR;}
71 #endif /* _PCI_ACPI_H_ */