Merge with /usr/src/ntfs-2.6.git
[linux-2.6] / drivers / media / dvb / frontends / nxt2002.c
1 /*
2     Support for B2C2/BBTI Technisat Air2PC - ATSC
3
4     Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net>
5
6     This program is free software; you can redistribute it and/or modify
7     it under the terms of the GNU General Public License as published by
8     the Free Software Foundation; either version 2 of the License, or
9     (at your option) any later version.
10
11     This program is distributed in the hope that it will be useful,
12     but WITHOUT ANY WARRANTY; without even the implied warranty of
13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14     GNU General Public License for more details.
15
16     You should have received a copy of the GNU General Public License
17     along with this program; if not, write to the Free Software
18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20 */
21
22 /*
23  * This driver needs external firmware. Please use the command
24  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to
25  * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
26  */
27 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
28 #define CRC_CCIT_MASK 0x1021
29
30 #include <linux/init.h>
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/device.h>
34 #include <linux/firmware.h>
35
36 #include "dvb_frontend.h"
37 #include "nxt2002.h"
38
39 struct nxt2002_state {
40
41         struct i2c_adapter* i2c;
42         struct dvb_frontend_ops ops;
43         const struct nxt2002_config* config;
44         struct dvb_frontend frontend;
45
46         /* demodulator private data */
47         u8 initialised:1;
48 };
49
50 static int debug;
51 #define dprintk(args...) \
52         do { \
53                 if (debug) printk(KERN_DEBUG "nxt2002: " args); \
54         } while (0)
55
56 static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len)
57 {
58         /* probbably a much better way or doing this */
59         u8 buf2 [256],x;
60         int err;
61         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
62
63         buf2[0] = reg;
64         for (x = 0 ; x < len ; x++)
65                 buf2[x+1] = buf[x];
66
67         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
68                 printk ("%s: i2c write error (addr %02x, err == %i)\n",
69                         __FUNCTION__, state->config->demod_address, err);
70                 return -EREMOTEIO;
71         }
72
73         return 0;
74 }
75
76 static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len)
77 {
78         u8 reg2 [] = { reg };
79
80         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
81                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
82
83         int err;
84
85         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
86                 printk ("%s: i2c read error (addr %02x, err == %i)\n",
87                         __FUNCTION__, state->config->demod_address, err);
88                 return -EREMOTEIO;
89         }
90
91         return 0;
92 }
93
94 static u16 nxt2002_crc(u16 crc, u8 c)
95 {
96
97         u8 i;
98         u16 input = (u16) c & 0xFF;
99
100         input<<=8;
101         for(i=0 ;i<8 ;i++) {
102                 if((crc ^ input) & 0x8000)
103                         crc=(crc<<1)^CRC_CCIT_MASK;
104                 else
105                         crc<<=1;
106         input<<=1;
107         }
108         return crc;
109 }
110
111 static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
112 {
113         u8 buf;
114         dprintk("%s\n", __FUNCTION__);
115
116         /* set multi register length */
117         i2c_writebytes(state,0x34,&len,1);
118
119         /* set mutli register register */
120         i2c_writebytes(state,0x35,&reg,1);
121
122         /* send the actual data */
123         i2c_writebytes(state,0x36,data,len);
124
125         /* toggle the multireg write bit*/
126         buf = 0x02;
127         i2c_writebytes(state,0x21,&buf,1);
128
129         i2c_readbytes(state,0x21,&buf,1);
130
131         if ((buf & 0x02) == 0)
132                 return 0;
133
134         dprintk("Error writing multireg register %02X\n",reg);
135
136         return 0;
137 }
138
139 static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
140 {
141         u8 len2;
142         dprintk("%s\n", __FUNCTION__);
143
144         /* set multi register length */
145         len2 = len & 0x80;
146         i2c_writebytes(state,0x34,&len2,1);
147
148         /* set mutli register register */
149         i2c_writebytes(state,0x35,&reg,1);
150
151         /* send the actual data */
152         i2c_readbytes(state,reg,data,len);
153
154         return 0;
155 }
156
157 static void nxt2002_microcontroller_stop (struct nxt2002_state* state)
158 {
159         u8 buf[2],counter = 0;
160         dprintk("%s\n", __FUNCTION__);
161
162         buf[0] = 0x80;
163         i2c_writebytes(state,0x22,buf,1);
164
165         while (counter < 20) {
166                 i2c_readbytes(state,0x31,buf,1);
167                 if (buf[0] & 0x40)
168                         return;
169                 msleep(10);
170                 counter++;
171         }
172
173         dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n");
174         return;
175 }
176
177 static void nxt2002_microcontroller_start (struct nxt2002_state* state)
178 {
179         u8 buf;
180         dprintk("%s\n", __FUNCTION__);
181
182         buf = 0x00;
183         i2c_writebytes(state,0x22,&buf,1);
184 }
185
186 static int nxt2002_writetuner (struct nxt2002_state* state, u8* data)
187 {
188         u8 buf,count = 0;
189
190         dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]);
191
192         dprintk("%s\n", __FUNCTION__);
193         /* stop the micro first */
194         nxt2002_microcontroller_stop(state);
195
196         /* set the i2c transfer speed to the tuner */
197         buf = 0x03;
198         i2c_writebytes(state,0x20,&buf,1);
199
200         /* setup to transfer 4 bytes via i2c */
201         buf = 0x04;
202         i2c_writebytes(state,0x34,&buf,1);
203
204         /* write actual tuner bytes */
205         i2c_writebytes(state,0x36,data,4);
206
207         /* set tuner i2c address */
208         buf = 0xC2;
209         i2c_writebytes(state,0x35,&buf,1);
210
211         /* write UC Opmode to begin transfer */
212         buf = 0x80;
213         i2c_writebytes(state,0x21,&buf,1);
214
215         while (count < 20) {
216                 i2c_readbytes(state,0x21,&buf,1);
217                 if ((buf & 0x80)== 0x00)
218                         return 0;
219                 msleep(100);
220                 count++;
221         }
222
223         printk("nxt2002: timeout error writing tuner\n");
224         return 0;
225 }
226
227 static void nxt2002_agc_reset(struct nxt2002_state* state)
228 {
229         u8 buf;
230         dprintk("%s\n", __FUNCTION__);
231
232         buf = 0x08;
233         i2c_writebytes(state,0x08,&buf,1);
234
235         buf = 0x00;
236         i2c_writebytes(state,0x08,&buf,1);
237
238         return;
239 }
240
241 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
242 {
243
244         struct nxt2002_state* state = fe->demodulator_priv;
245         u8 buf[256],written = 0,chunkpos = 0;
246         u16 rambase,position,crc = 0;
247
248         dprintk("%s\n", __FUNCTION__);
249         dprintk("Firmware is %zu bytes\n",fw->size);
250
251         /* Get the RAM base for this nxt2002 */
252         i2c_readbytes(state,0x10,buf,1);
253
254         if (buf[0] & 0x10)
255                 rambase = 0x1000;
256         else
257                 rambase = 0x0000;
258
259         dprintk("rambase on this nxt2002 is %04X\n",rambase);
260
261         /* Hold the micro in reset while loading firmware */
262         buf[0] = 0x80;
263         i2c_writebytes(state,0x2B,buf,1);
264
265         for (position = 0; position < fw->size ; position++) {
266                 if (written == 0) {
267                         crc = 0;
268                         chunkpos = 0x28;
269                         buf[0] = ((rambase + position) >> 8);
270                         buf[1] = (rambase + position) & 0xFF;
271                         buf[2] = 0x81;
272                         /* write starting address */
273                         i2c_writebytes(state,0x29,buf,3);
274                 }
275                 written++;
276                 chunkpos++;
277
278                 if ((written % 4) == 0)
279                         i2c_writebytes(state,chunkpos,&fw->data[position-3],4);
280
281                 crc = nxt2002_crc(crc,fw->data[position]);
282
283                 if ((written == 255) || (position+1 == fw->size)) {
284                         /* write remaining bytes of firmware */
285                         i2c_writebytes(state, chunkpos+4-(written %4),
286                                 &fw->data[position-(written %4) + 1],
287                                 written %4);
288                         buf[0] = crc << 8;
289                         buf[1] = crc & 0xFF;
290
291                         /* write crc */
292                         i2c_writebytes(state,0x2C,buf,2);
293
294                         /* do a read to stop things */
295                         i2c_readbytes(state,0x2A,buf,1);
296
297                         /* set transfer mode to complete */
298                         buf[0] = 0x80;
299                         i2c_writebytes(state,0x2B,buf,1);
300
301                         written = 0;
302                 }
303         }
304
305         printk ("done.\n");
306         return 0;
307 };
308
309 static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe,
310                                              struct dvb_frontend_parameters *p)
311 {
312         struct nxt2002_state* state = fe->demodulator_priv;
313         u32 freq = 0;
314         u16 tunerfreq = 0;
315         u8 buf[4];
316
317         freq = 44000 + ( p->frequency / 1000 );
318
319         dprintk("freq = %d      p->frequency = %d\n",freq,p->frequency);
320
321         tunerfreq = freq * 24/4000;
322
323         buf[0] = (tunerfreq >> 8) & 0x7F;
324         buf[1] = (tunerfreq & 0xFF);
325
326         if (p->frequency <= 214000000) {
327                 buf[2] = 0x84 + (0x06 << 3);
328                 buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02;
329         } else if (p->frequency <= 721000000) {
330                 buf[2] = 0x84 + (0x07 << 3);
331                 buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08;
332         } else if (p->frequency <= 841000000) {
333                 buf[2] = 0x84 + (0x0E << 3);
334                 buf[3] = 0x08;
335         } else {
336                 buf[2] = 0x84 + (0x0F << 3);
337                 buf[3] = 0x02;
338         }
339
340         /* write frequency information */
341         nxt2002_writetuner(state,buf);
342
343         /* reset the agc now that tuning has been completed */
344         nxt2002_agc_reset(state);
345
346         /* set target power level */
347         switch (p->u.vsb.modulation) {
348                 case QAM_64:
349                 case QAM_256:
350                                 buf[0] = 0x74;
351                                 break;
352                 case VSB_8:
353                                 buf[0] = 0x70;
354                                 break;
355                 default:
356                                 return -EINVAL;
357                                 break;
358         }
359         i2c_writebytes(state,0x42,buf,1);
360
361         /* configure sdm */
362         buf[0] = 0x87;
363         i2c_writebytes(state,0x57,buf,1);
364
365         /* write sdm1 input */
366         buf[0] = 0x10;
367         buf[1] = 0x00;
368         nxt2002_writereg_multibyte(state,0x58,buf,2);
369
370         /* write sdmx input */
371         switch (p->u.vsb.modulation) {
372                 case QAM_64:
373                                 buf[0] = 0x68;
374                                 break;
375                 case QAM_256:
376                                 buf[0] = 0x64;
377                                 break;
378                 case VSB_8:
379                                 buf[0] = 0x60;
380                                 break;
381                 default:
382                                 return -EINVAL;
383                                 break;
384         }
385         buf[1] = 0x00;
386         nxt2002_writereg_multibyte(state,0x5C,buf,2);
387
388         /* write adc power lpf fc */
389         buf[0] = 0x05;
390         i2c_writebytes(state,0x43,buf,1);
391
392         /* write adc power lpf fc */
393         buf[0] = 0x05;
394         i2c_writebytes(state,0x43,buf,1);
395
396         /* write accumulator2 input */
397         buf[0] = 0x80;
398         buf[1] = 0x00;
399         nxt2002_writereg_multibyte(state,0x4B,buf,2);
400
401         /* write kg1 */
402         buf[0] = 0x00;
403         i2c_writebytes(state,0x4D,buf,1);
404
405         /* write sdm12 lpf fc */
406         buf[0] = 0x44;
407         i2c_writebytes(state,0x55,buf,1);
408
409         /* write agc control reg */
410         buf[0] = 0x04;
411         i2c_writebytes(state,0x41,buf,1);
412
413         /* write agc ucgp0 */
414         switch (p->u.vsb.modulation) {
415                 case QAM_64:
416                                 buf[0] = 0x02;
417                                 break;
418                 case QAM_256:
419                                 buf[0] = 0x03;
420                                 break;
421                 case VSB_8:
422                                 buf[0] = 0x00;
423                                 break;
424                 default:
425                                 return -EINVAL;
426                                 break;
427         }
428         i2c_writebytes(state,0x30,buf,1);
429
430         /* write agc control reg */
431         buf[0] = 0x00;
432         i2c_writebytes(state,0x41,buf,1);
433
434         /* write accumulator2 input */
435         buf[0] = 0x80;
436         buf[1] = 0x00;
437         nxt2002_writereg_multibyte(state,0x49,buf,2);
438         nxt2002_writereg_multibyte(state,0x4B,buf,2);
439
440         /* write agc control reg */
441         buf[0] = 0x04;
442         i2c_writebytes(state,0x41,buf,1);
443
444         nxt2002_microcontroller_start(state);
445
446         /* adjacent channel detection should be done here, but I don't
447         have any stations with this need so I cannot test it */
448
449         return 0;
450 }
451
452 static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status)
453 {
454         struct nxt2002_state* state = fe->demodulator_priv;
455         u8 lock;
456         i2c_readbytes(state,0x31,&lock,1);
457
458         *status = 0;
459         if (lock & 0x20) {
460                 *status |= FE_HAS_SIGNAL;
461                 *status |= FE_HAS_CARRIER;
462                 *status |= FE_HAS_VITERBI;
463                 *status |= FE_HAS_SYNC;
464                 *status |= FE_HAS_LOCK;
465         }
466         return 0;
467 }
468
469 static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber)
470 {
471         struct nxt2002_state* state = fe->demodulator_priv;
472         u8 b[3];
473
474         nxt2002_readreg_multibyte(state,0xE6,b,3);
475
476         *ber = ((b[0] << 8) + b[1]) * 8;
477
478         return 0;
479 }
480
481 static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength)
482 {
483         struct nxt2002_state* state = fe->demodulator_priv;
484         u8 b[2];
485         u16 temp = 0;
486
487         /* setup to read cluster variance */
488         b[0] = 0x00;
489         i2c_writebytes(state,0xA1,b,1);
490
491         /* get multreg val */
492         nxt2002_readreg_multibyte(state,0xA6,b,2);
493
494         temp = (b[0] << 8) | b[1];
495         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
496
497         return 0;
498 }
499
500 static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr)
501 {
502
503         struct nxt2002_state* state = fe->demodulator_priv;
504         u8 b[2];
505         u16 temp = 0, temp2;
506         u32 snrdb = 0;
507
508         /* setup to read cluster variance */
509         b[0] = 0x00;
510         i2c_writebytes(state,0xA1,b,1);
511
512         /* get multreg val from 0xA6 */
513         nxt2002_readreg_multibyte(state,0xA6,b,2);
514
515         temp = (b[0] << 8) | b[1];
516         temp2 = 0x7FFF - temp;
517
518         /* snr will be in db */
519         if (temp2 > 0x7F00)
520                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
521         else if (temp2 > 0x7EC0)
522                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
523         else if (temp2 > 0x7C00)
524                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
525         else
526                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
527
528         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
529
530         *snr = snrdb * (0xFFFF/32000);
531
532         return 0;
533 }
534
535 static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
536 {
537         struct nxt2002_state* state = fe->demodulator_priv;
538         u8 b[3];
539
540         nxt2002_readreg_multibyte(state,0xE6,b,3);
541         *ucblocks = b[2];
542
543         return 0;
544 }
545
546 static int nxt2002_sleep(struct dvb_frontend* fe)
547 {
548         return 0;
549 }
550
551 static int nxt2002_init(struct dvb_frontend* fe)
552 {
553         struct nxt2002_state* state = fe->demodulator_priv;
554         const struct firmware *fw;
555         int ret;
556         u8 buf[2];
557
558         if (!state->initialised) {
559                 /* request the firmware, this will block until someone uploads it */
560                 printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
561                 ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE);
562                 printk("nxt2002: Waiting for firmware upload(2)...\n");
563                 if (ret) {
564                         printk("nxt2002: no firmware upload (timeout or file not found?)\n");
565                         return ret;
566                 }
567
568                 ret = nxt2002_load_firmware(fe, fw);
569                 if (ret) {
570                         printk("nxt2002: writing firmware to device failed\n");
571                         release_firmware(fw);
572                         return ret;
573                 }
574                 printk("nxt2002: firmware upload complete\n");
575
576                 /* Put the micro into reset */
577                 nxt2002_microcontroller_stop(state);
578
579                 /* ensure transfer is complete */
580                 buf[0]=0;
581                 i2c_writebytes(state,0x2B,buf,1);
582
583                 /* Put the micro into reset for real this time */
584                 nxt2002_microcontroller_stop(state);
585
586                 /* soft reset everything (agc,frontend,eq,fec)*/
587                 buf[0] = 0x0F;
588                 i2c_writebytes(state,0x08,buf,1);
589                 buf[0] = 0x00;
590                 i2c_writebytes(state,0x08,buf,1);
591
592                 /* write agc sdm configure */
593                 buf[0] = 0xF1;
594                 i2c_writebytes(state,0x57,buf,1);
595
596                 /* write mod output format */
597                 buf[0] = 0x20;
598                 i2c_writebytes(state,0x09,buf,1);
599
600                 /* write fec mpeg mode */
601                 buf[0] = 0x7E;
602                 buf[1] = 0x00;
603                 i2c_writebytes(state,0xE9,buf,2);
604
605                 /* write mux selection */
606                 buf[0] = 0x00;
607                 i2c_writebytes(state,0xCC,buf,1);
608
609                 state->initialised = 1;
610         }
611
612         return 0;
613 }
614
615 static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
616 {
617         fesettings->min_delay_ms = 500;
618         fesettings->step_size = 0;
619         fesettings->max_drift = 0;
620         return 0;
621 }
622
623 static void nxt2002_release(struct dvb_frontend* fe)
624 {
625         struct nxt2002_state* state = fe->demodulator_priv;
626         kfree(state);
627 }
628
629 static struct dvb_frontend_ops nxt2002_ops;
630
631 struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
632                                    struct i2c_adapter* i2c)
633 {
634         struct nxt2002_state* state = NULL;
635         u8 buf [] = {0,0,0,0,0};
636
637         /* allocate memory for the internal state */
638         state = kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL);
639         if (state == NULL) goto error;
640
641         /* setup the state */
642         state->config = config;
643         state->i2c = i2c;
644         memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops));
645         state->initialised = 0;
646
647         /* Check the first 5 registers to ensure this a revision we can handle */
648
649         i2c_readbytes(state, 0x00, buf, 5);
650         if (buf[0] != 0x04) goto error;         /* device id */
651         if (buf[1] != 0x02) goto error;         /* fab id */
652         if (buf[2] != 0x11) goto error;         /* month */
653         if (buf[3] != 0x20) goto error;         /* year msb */
654         if (buf[4] != 0x00) goto error;         /* year lsb */
655
656         /* create dvb_frontend */
657         state->frontend.ops = &state->ops;
658         state->frontend.demodulator_priv = state;
659         return &state->frontend;
660
661 error:
662         kfree(state);
663         return NULL;
664 }
665
666 static struct dvb_frontend_ops nxt2002_ops = {
667
668         .info = {
669                 .name = "Nextwave nxt2002 VSB/QAM frontend",
670                 .type = FE_ATSC,
671                 .frequency_min =  54000000,
672                 .frequency_max = 860000000,
673                 /* stepsize is just a guess */
674                 .frequency_stepsize = 166666,
675                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
676                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
677                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
678         },
679
680         .release = nxt2002_release,
681
682         .init = nxt2002_init,
683         .sleep = nxt2002_sleep,
684
685         .set_frontend = nxt2002_setup_frontend_parameters,
686         .get_tune_settings = nxt2002_get_tune_settings,
687
688         .read_status = nxt2002_read_status,
689         .read_ber = nxt2002_read_ber,
690         .read_signal_strength = nxt2002_read_signal_strength,
691         .read_snr = nxt2002_read_snr,
692         .read_ucblocks = nxt2002_read_ucblocks,
693
694 };
695
696 module_param(debug, int, 0644);
697 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
698
699 MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
700 MODULE_AUTHOR("Taylor Jacob");
701 MODULE_LICENSE("GPL");
702
703 EXPORT_SYMBOL(nxt2002_attach);