1 #ifndef ASM_X86__PCI_64_H
2 #define ASM_X86__PCI_64_H
6 #ifdef CONFIG_CALGARY_IOMMU
7 static inline void *pci_iommu(struct pci_bus *bus)
9 struct pci_sysdata *sd = bus->sysdata;
13 static inline void set_pci_iommu(struct pci_bus *bus, void *val)
15 struct pci_sysdata *sd = bus->sysdata;
18 #endif /* CONFIG_CALGARY_IOMMU */
20 extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
21 int reg, int len, u32 *value);
22 extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
23 int reg, int len, u32 value);
25 extern void dma32_reserve_bootmem(void);
26 extern void pci_iommu_alloc(void);
28 /* The PCI address space does equal the physical memory
29 * address space. The networking and block device layers use
30 * this boolean for bounce buffer decisions
32 * On AMD64 it mostly equals, but we set it to zero if a hardware
33 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
35 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
37 #if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
39 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
41 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
43 #define pci_unmap_addr(PTR, ADDR_NAME) \
45 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
46 (((PTR)->ADDR_NAME) = (VAL))
47 #define pci_unmap_len(PTR, LEN_NAME) \
49 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
50 (((PTR)->LEN_NAME) = (VAL))
55 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
56 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
57 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
58 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
59 #define pci_unmap_len(PTR, LEN_NAME) (0)
60 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
64 #endif /* __KERNEL__ */
66 #endif /* ASM_X86__PCI_64_H */