git.oblomov.eu Git - linux-2.6/blob - drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/ipv6.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/mii.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/pci.h>
  41 #include <linux/delay.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/if_ether.h>
  44 #ifdef CONFIG_DCA
  45 #include <linux/dca.h>
  46 #endif
  47 #include "igb.h"
  48
  49 #define DRV_VERSION "1.2.45-k2"
  50 char igb_driver_name[] = "igb";
  51 char igb_driver_version[] = DRV_VERSION;
  52 static const char igb_driver_string[] =
  53                                 "Intel(R) Gigabit Ethernet Network Driver";
  54 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
  55
  56 static const struct e1000_info *igb_info_tbl[] = {
  57         [board_82575] = &e1000_82575_info,
  58 };
  59
  60 static struct pci_device_id igb_pci_tbl[] = {
  61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  68         /* required last entry */
  69         {0, }
  70 };
  71
  72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  73
  74 void igb_reset(struct igb_adapter *);
  75 static int igb_setup_all_tx_resources(struct igb_adapter *);
  76 static int igb_setup_all_rx_resources(struct igb_adapter *);
  77 static void igb_free_all_tx_resources(struct igb_adapter *);
  78 static void igb_free_all_rx_resources(struct igb_adapter *);
  79 static void igb_free_tx_resources(struct igb_ring *);
  80 static void igb_free_rx_resources(struct igb_ring *);
  81 void igb_update_stats(struct igb_adapter *);
  82 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  83 static void __devexit igb_remove(struct pci_dev *pdev);
  84 static int igb_sw_init(struct igb_adapter *);
  85 static int igb_open(struct net_device *);
  86 static int igb_close(struct net_device *);
  87 static void igb_configure_tx(struct igb_adapter *);
  88 static void igb_configure_rx(struct igb_adapter *);
  89 static void igb_setup_rctl(struct igb_adapter *);
  90 static void igb_clean_all_tx_rings(struct igb_adapter *);
  91 static void igb_clean_all_rx_rings(struct igb_adapter *);
  92 static void igb_clean_tx_ring(struct igb_ring *);
  93 static void igb_clean_rx_ring(struct igb_ring *);
  94 static void igb_set_multi(struct net_device *);
  95 static void igb_update_phy_info(unsigned long);
  96 static void igb_watchdog(unsigned long);
  97 static void igb_watchdog_task(struct work_struct *);
  98 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  99                                   struct igb_ring *);
 100 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
 101 static struct net_device_stats *igb_get_stats(struct net_device *);
 102 static int igb_change_mtu(struct net_device *, int);
 103 static int igb_set_mac(struct net_device *, void *);
 104 static irqreturn_t igb_intr(int irq, void *);
 105 static irqreturn_t igb_intr_msi(int irq, void *);
 106 static irqreturn_t igb_msix_other(int irq, void *);
 107 static irqreturn_t igb_msix_rx(int irq, void *);
 108 static irqreturn_t igb_msix_tx(int irq, void *);
 109 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 110 #ifdef CONFIG_DCA
 111 static void igb_update_rx_dca(struct igb_ring *);
 112 static void igb_update_tx_dca(struct igb_ring *);
 113 static void igb_setup_dca(struct igb_adapter *);
 114 #endif /* CONFIG_DCA */
 115 static bool igb_clean_tx_irq(struct igb_ring *);
 116 static int igb_poll(struct napi_struct *, int);
 117 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
 118 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
 119 #ifdef CONFIG_IGB_LRO
 120 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
 121 #endif
 122 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 123 static void igb_tx_timeout(struct net_device *);
 124 static void igb_reset_task(struct work_struct *);
 125 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 126 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 127 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 128 static void igb_restore_vlan(struct igb_adapter *);
 129
 130 static int igb_suspend(struct pci_dev *, pm_message_t);
 131 #ifdef CONFIG_PM
 132 static int igb_resume(struct pci_dev *);
 133 #endif
 134 static void igb_shutdown(struct pci_dev *);
 135 #ifdef CONFIG_DCA
 136 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 137 static struct notifier_block dca_notifier = {
 138         .notifier_call  = igb_notify_dca,
 139         .next           = NULL,
 140         .priority       = 0
 141 };
 142 #endif
 143
 144 #ifdef CONFIG_NET_POLL_CONTROLLER
 145 /* for netdump / net console */
 146 static void igb_netpoll(struct net_device *);
 147 #endif
 148
 149 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 150                      pci_channel_state_t);
 151 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 152 static void igb_io_resume(struct pci_dev *);
 153
 154 static struct pci_error_handlers igb_err_handler = {
 155         .error_detected = igb_io_error_detected,
 156         .slot_reset = igb_io_slot_reset,
 157         .resume = igb_io_resume,
 158 };
 159
 160
 161 static struct pci_driver igb_driver = {
 162         .name     = igb_driver_name,
 163         .id_table = igb_pci_tbl,
 164         .probe    = igb_probe,
 165         .remove   = __devexit_p(igb_remove),
 166 #ifdef CONFIG_PM
 167         /* Power Managment Hooks */
 168         .suspend  = igb_suspend,
 169         .resume   = igb_resume,
 170 #endif
 171         .shutdown = igb_shutdown,
 172         .err_handler = &igb_err_handler
 173 };
 174
 175 static int global_quad_port_a; /* global quad port a indication */
 176
 177 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 178 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 179 MODULE_LICENSE("GPL");
 180 MODULE_VERSION(DRV_VERSION);
 181
 182 #ifdef DEBUG
 183 /**
 184  * igb_get_hw_dev_name - return device name string
 185  * used by hardware layer to print debugging information
 186  **/
 187 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 188 {
 189         struct igb_adapter *adapter = hw->back;
 190         return adapter->netdev->name;
 191 }
 192 #endif
 193
 194 /**
 195  * igb_init_module - Driver Registration Routine
 196  *
 197  * igb_init_module is the first routine called when the driver is
 198  * loaded. All it does is register with the PCI subsystem.
 199  **/
 200 static int __init igb_init_module(void)
 201 {
 202         int ret;
 203         printk(KERN_INFO "%s - version %s\n",
 204                igb_driver_string, igb_driver_version);
 205
 206         printk(KERN_INFO "%s\n", igb_copyright);
 207
 208         global_quad_port_a = 0;
 209
 210         ret = pci_register_driver(&igb_driver);
 211 #ifdef CONFIG_DCA
 212         dca_register_notify(&dca_notifier);
 213 #endif
 214         return ret;
 215 }
 216
 217 module_init(igb_init_module);
 218
 219 /**
 220  * igb_exit_module - Driver Exit Cleanup Routine
 221  *
 222  * igb_exit_module is called just before the driver is removed
 223  * from memory.
 224  **/
 225 static void __exit igb_exit_module(void)
 226 {
 227 #ifdef CONFIG_DCA
 228         dca_unregister_notify(&dca_notifier);
 229 #endif
 230         pci_unregister_driver(&igb_driver);
 231 }
 232
 233 module_exit(igb_exit_module);
 234
 235 /**
 236  * igb_alloc_queues - Allocate memory for all rings
 237  * @adapter: board private structure to initialize
 238  *
 239  * We allocate one ring per queue at run-time since we don't know the
 240  * number of queues at compile-time.
 241  **/
 242 static int igb_alloc_queues(struct igb_adapter *adapter)
 243 {
 244         int i;
 245
 246         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 247                                    sizeof(struct igb_ring), GFP_KERNEL);
 248         if (!adapter->tx_ring)
 249                 return -ENOMEM;
 250
 251         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 252                                    sizeof(struct igb_ring), GFP_KERNEL);
 253         if (!adapter->rx_ring) {
 254                 kfree(adapter->tx_ring);
 255                 return -ENOMEM;
 256         }
 257
 258         adapter->rx_ring->buddy = adapter->tx_ring;
 259
 260         for (i = 0; i < adapter->num_tx_queues; i++) {
 261                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 262                 ring->adapter = adapter;
 263                 ring->queue_index = i;
 264         }
 265         for (i = 0; i < adapter->num_rx_queues; i++) {
 266                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 267                 ring->adapter = adapter;
 268                 ring->queue_index = i;
 269                 ring->itr_register = E1000_ITR;
 270
 271                 /* set a default napi handler for each rx_ring */
 272                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
 273         }
 274         return 0;
 275 }
 276
 277 static void igb_free_queues(struct igb_adapter *adapter)
 278 {
 279         int i;
 280
 281         for (i = 0; i < adapter->num_rx_queues; i++)
 282                 netif_napi_del(&adapter->rx_ring[i].napi);
 283
 284         kfree(adapter->tx_ring);
 285         kfree(adapter->rx_ring);
 286 }
 287
 288 #define IGB_N0_QUEUE -1
 289 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 290                               int tx_queue, int msix_vector)
 291 {
 292         u32 msixbm = 0;
 293         struct e1000_hw *hw = &adapter->hw;
 294         u32 ivar, index;
 295
 296         switch (hw->mac.type) {
 297         case e1000_82575:
 298                 /* The 82575 assigns vectors using a bitmask, which matches the
 299                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 300                    or more queues to a vector, we write the appropriate bits
 301                    into the MSIXBM register for that vector. */
 302                 if (rx_queue > IGB_N0_QUEUE) {
 303                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 304                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 305                 }
 306                 if (tx_queue > IGB_N0_QUEUE) {
 307                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 308                         adapter->tx_ring[tx_queue].eims_value =
 309                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 310                 }
 311                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 312                 break;
 313         case e1000_82576:
 314                 /* The 82576 uses a table-based method for assigning vectors.
 315                    Each queue has a single entry in the table to which we write
 316                    a vector number along with a "valid" bit.  Sadly, the layout
 317                    of the table is somewhat counterintuitive. */
 318                 if (rx_queue > IGB_N0_QUEUE) {
 319                         index = (rx_queue & 0x7);
 320                         ivar = array_rd32(E1000_IVAR0, index);
 321                         if (rx_queue < 8) {
 322                                 /* vector goes into low byte of register */
 323                                 ivar = ivar & 0xFFFFFF00;
 324                                 ivar |= msix_vector | E1000_IVAR_VALID;
 325                         } else {
 326                                 /* vector goes into third byte of register */
 327                                 ivar = ivar & 0xFF00FFFF;
 328                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
 329                         }
 330                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
 331                         array_wr32(E1000_IVAR0, index, ivar);
 332                 }
 333                 if (tx_queue > IGB_N0_QUEUE) {
 334                         index = (tx_queue & 0x7);
 335                         ivar = array_rd32(E1000_IVAR0, index);
 336                         if (tx_queue < 8) {
 337                                 /* vector goes into second byte of register */
 338                                 ivar = ivar & 0xFFFF00FF;
 339                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
 340                         } else {
 341                                 /* vector goes into high byte of register */
 342                                 ivar = ivar & 0x00FFFFFF;
 343                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
 344                         }
 345                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
 346                         array_wr32(E1000_IVAR0, index, ivar);
 347                 }
 348                 break;
 349         default:
 350                 BUG();
 351                 break;
 352         }
 353 }
 354
 355 /**
 356  * igb_configure_msix - Configure MSI-X hardware
 357  *
 358  * igb_configure_msix sets up the hardware to properly
 359  * generate MSI-X interrupts.
 360  **/
 361 static void igb_configure_msix(struct igb_adapter *adapter)
 362 {
 363         u32 tmp;
 364         int i, vector = 0;
 365         struct e1000_hw *hw = &adapter->hw;
 366
 367         adapter->eims_enable_mask = 0;
 368         if (hw->mac.type == e1000_82576)
 369                 /* Turn on MSI-X capability first, or our settings
 370                  * won't stick.  And it will take days to debug. */
 371                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 372                                    E1000_GPIE_PBA | E1000_GPIE_EIAME |
 373                                    E1000_GPIE_NSICR);
 374
 375         for (i = 0; i < adapter->num_tx_queues; i++) {
 376                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 377                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 378                 adapter->eims_enable_mask |= tx_ring->eims_value;
 379                 if (tx_ring->itr_val)
 380                         writel(tx_ring->itr_val,
 381                                hw->hw_addr + tx_ring->itr_register);
 382                 else
 383                         writel(1, hw->hw_addr + tx_ring->itr_register);
 384         }
 385
 386         for (i = 0; i < adapter->num_rx_queues; i++) {
 387                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 388                 rx_ring->buddy = NULL;
 389                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 390                 adapter->eims_enable_mask |= rx_ring->eims_value;
 391                 if (rx_ring->itr_val)
 392                         writel(rx_ring->itr_val,
 393                                hw->hw_addr + rx_ring->itr_register);
 394                 else
 395                         writel(1, hw->hw_addr + rx_ring->itr_register);
 396         }
 397
 398
 399         /* set vector for other causes, i.e. link changes */
 400         switch (hw->mac.type) {
 401         case e1000_82575:
 402                 array_wr32(E1000_MSIXBM(0), vector++,
 403                                       E1000_EIMS_OTHER);
 404
 405                 tmp = rd32(E1000_CTRL_EXT);
 406                 /* enable MSI-X PBA support*/
 407                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 408
 409                 /* Auto-Mask interrupts upon ICR read. */
 410                 tmp |= E1000_CTRL_EXT_EIAME;
 411                 tmp |= E1000_CTRL_EXT_IRCA;
 412
 413                 wr32(E1000_CTRL_EXT, tmp);
 414                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 415                 adapter->eims_other = E1000_EIMS_OTHER;
 416
 417                 break;
 418
 419         case e1000_82576:
 420                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 421                 wr32(E1000_IVAR_MISC, tmp);
 422
 423                 adapter->eims_enable_mask = (1 << (vector)) - 1;
 424                 adapter->eims_other = 1 << (vector - 1);
 425                 break;
 426         default:
 427                 /* do nothing, since nothing else supports MSI-X */
 428                 break;
 429         } /* switch (hw->mac.type) */
 430         wrfl();
 431 }
 432
 433 /**
 434  * igb_request_msix - Initialize MSI-X interrupts
 435  *
 436  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 437  * kernel.
 438  **/
 439 static int igb_request_msix(struct igb_adapter *adapter)
 440 {
 441         struct net_device *netdev = adapter->netdev;
 442         int i, err = 0, vector = 0;
 443
 444         vector = 0;
 445
 446         for (i = 0; i < adapter->num_tx_queues; i++) {
 447                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 448                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
 449                 err = request_irq(adapter->msix_entries[vector].vector,
 450                                   &igb_msix_tx, 0, ring->name,
 451                                   &(adapter->tx_ring[i]));
 452                 if (err)
 453                         goto out;
 454                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 455                 ring->itr_val = 976; /* ~4000 ints/sec */
 456                 vector++;
 457         }
 458         for (i = 0; i < adapter->num_rx_queues; i++) {
 459                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 460                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 461                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
 462                 else
 463                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 464                 err = request_irq(adapter->msix_entries[vector].vector,
 465                                   &igb_msix_rx, 0, ring->name,
 466                                   &(adapter->rx_ring[i]));
 467                 if (err)
 468                         goto out;
 469                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 470                 ring->itr_val = adapter->itr;
 471                 /* overwrite the poll routine for MSIX, we've already done
 472                  * netif_napi_add */
 473                 ring->napi.poll = &igb_clean_rx_ring_msix;
 474                 vector++;
 475         }
 476
 477         err = request_irq(adapter->msix_entries[vector].vector,
 478                           &igb_msix_other, 0, netdev->name, netdev);
 479         if (err)
 480                 goto out;
 481
 482         igb_configure_msix(adapter);
 483         return 0;
 484 out:
 485         return err;
 486 }
 487
 488 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 489 {
 490         if (adapter->msix_entries) {
 491                 pci_disable_msix(adapter->pdev);
 492                 kfree(adapter->msix_entries);
 493                 adapter->msix_entries = NULL;
 494         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
 495                 pci_disable_msi(adapter->pdev);
 496         return;
 497 }
 498
 499
 500 /**
 501  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 502  *
 503  * Attempt to configure interrupts using the best available
 504  * capabilities of the hardware and kernel.
 505  **/
 506 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 507 {
 508         int err;
 509         int numvecs, i;
 510
 511         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 512         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 513                                         GFP_KERNEL);
 514         if (!adapter->msix_entries)
 515                 goto msi_only;
 516
 517         for (i = 0; i < numvecs; i++)
 518                 adapter->msix_entries[i].entry = i;
 519
 520         err = pci_enable_msix(adapter->pdev,
 521                               adapter->msix_entries,
 522                               numvecs);
 523         if (err == 0)
 524                 return;
 525
 526         igb_reset_interrupt_capability(adapter);
 527
 528         /* If we can't do MSI-X, try MSI */
 529 msi_only:
 530         adapter->num_rx_queues = 1;
 531         adapter->num_tx_queues = 1;
 532         if (!pci_enable_msi(adapter->pdev))
 533                 adapter->flags |= IGB_FLAG_HAS_MSI;
 534
 535         /* Notify the stack of the (possibly) reduced Tx Queue count. */
 536         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
 537         return;
 538 }
 539
 540 /**
 541  * igb_request_irq - initialize interrupts
 542  *
 543  * Attempts to configure interrupts using the best available
 544  * capabilities of the hardware and kernel.
 545  **/
 546 static int igb_request_irq(struct igb_adapter *adapter)
 547 {
 548         struct net_device *netdev = adapter->netdev;
 549         struct e1000_hw *hw = &adapter->hw;
 550         int err = 0;
 551
 552         if (adapter->msix_entries) {
 553                 err = igb_request_msix(adapter);
 554                 if (!err)
 555                         goto request_done;
 556                 /* fall back to MSI */
 557                 igb_reset_interrupt_capability(adapter);
 558                 if (!pci_enable_msi(adapter->pdev))
 559                         adapter->flags |= IGB_FLAG_HAS_MSI;
 560                 igb_free_all_tx_resources(adapter);
 561                 igb_free_all_rx_resources(adapter);
 562                 adapter->num_rx_queues = 1;
 563                 igb_alloc_queues(adapter);
 564         } else {
 565                 switch (hw->mac.type) {
 566                 case e1000_82575:
 567                         wr32(E1000_MSIXBM(0),
 568                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
 569                         break;
 570                 case e1000_82576:
 571                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
 572                         break;
 573                 default:
 574                         break;
 575                 }
 576         }
 577
 578         if (adapter->flags & IGB_FLAG_HAS_MSI) {
 579                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 580                                   netdev->name, netdev);
 581                 if (!err)
 582                         goto request_done;
 583                 /* fall back to legacy interrupts */
 584                 igb_reset_interrupt_capability(adapter);
 585                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
 586         }
 587
 588         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 589                           netdev->name, netdev);
 590
 591         if (err)
 592                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 593                         err);
 594
 595 request_done:
 596         return err;
 597 }
 598
 599 static void igb_free_irq(struct igb_adapter *adapter)
 600 {
 601         struct net_device *netdev = adapter->netdev;
 602
 603         if (adapter->msix_entries) {
 604                 int vector = 0, i;
 605
 606                 for (i = 0; i < adapter->num_tx_queues; i++)
 607                         free_irq(adapter->msix_entries[vector++].vector,
 608                                 &(adapter->tx_ring[i]));
 609                 for (i = 0; i < adapter->num_rx_queues; i++)
 610                         free_irq(adapter->msix_entries[vector++].vector,
 611                                 &(adapter->rx_ring[i]));
 612
 613                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 614                 return;
 615         }
 616
 617         free_irq(adapter->pdev->irq, netdev);
 618 }
 619
 620 /**
 621  * igb_irq_disable - Mask off interrupt generation on the NIC
 622  * @adapter: board private structure
 623  **/
 624 static void igb_irq_disable(struct igb_adapter *adapter)
 625 {
 626         struct e1000_hw *hw = &adapter->hw;
 627
 628         if (adapter->msix_entries) {
 629                 wr32(E1000_EIAM, 0);
 630                 wr32(E1000_EIMC, ~0);
 631                 wr32(E1000_EIAC, 0);
 632         }
 633
 634         wr32(E1000_IAM, 0);
 635         wr32(E1000_IMC, ~0);
 636         wrfl();
 637         synchronize_irq(adapter->pdev->irq);
 638 }
 639
 640 /**
 641  * igb_irq_enable - Enable default interrupt generation settings
 642  * @adapter: board private structure
 643  **/
 644 static void igb_irq_enable(struct igb_adapter *adapter)
 645 {
 646         struct e1000_hw *hw = &adapter->hw;
 647
 648         if (adapter->msix_entries) {
 649                 wr32(E1000_EIAC, adapter->eims_enable_mask);
 650                 wr32(E1000_EIAM, adapter->eims_enable_mask);
 651                 wr32(E1000_EIMS, adapter->eims_enable_mask);
 652                 wr32(E1000_IMS, E1000_IMS_LSC);
 653         } else {
 654                 wr32(E1000_IMS, IMS_ENABLE_MASK);
 655                 wr32(E1000_IAM, IMS_ENABLE_MASK);
 656         }
 657 }
 658
 659 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 660 {
 661         struct net_device *netdev = adapter->netdev;
 662         u16 vid = adapter->hw.mng_cookie.vlan_id;
 663         u16 old_vid = adapter->mng_vlan_id;
 664         if (adapter->vlgrp) {
 665                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 666                         if (adapter->hw.mng_cookie.status &
 667                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 668                                 igb_vlan_rx_add_vid(netdev, vid);
 669                                 adapter->mng_vlan_id = vid;
 670                         } else
 671                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 672
 673                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 674                                         (vid != old_vid) &&
 675                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 676                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 677                 } else
 678                         adapter->mng_vlan_id = vid;
 679         }
 680 }
 681
 682 /**
 683  * igb_release_hw_control - release control of the h/w to f/w
 684  * @adapter: address of board private structure
 685  *
 686  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 687  * For ASF and Pass Through versions of f/w this means that the
 688  * driver is no longer loaded.
 689  *
 690  **/
 691 static void igb_release_hw_control(struct igb_adapter *adapter)
 692 {
 693         struct e1000_hw *hw = &adapter->hw;
 694         u32 ctrl_ext;
 695
 696         /* Let firmware take over control of h/w */
 697         ctrl_ext = rd32(E1000_CTRL_EXT);
 698         wr32(E1000_CTRL_EXT,
 699                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 700 }
 701
 702
 703 /**
 704  * igb_get_hw_control - get control of the h/w from f/w
 705  * @adapter: address of board private structure
 706  *
 707  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 708  * For ASF and Pass Through versions of f/w this means that
 709  * the driver is loaded.
 710  *
 711  **/
 712 static void igb_get_hw_control(struct igb_adapter *adapter)
 713 {
 714         struct e1000_hw *hw = &adapter->hw;
 715         u32 ctrl_ext;
 716
 717         /* Let firmware know the driver has taken over */
 718         ctrl_ext = rd32(E1000_CTRL_EXT);
 719         wr32(E1000_CTRL_EXT,
 720                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 721 }
 722
 723 /**
 724  * igb_configure - configure the hardware for RX and TX
 725  * @adapter: private board structure
 726  **/
 727 static void igb_configure(struct igb_adapter *adapter)
 728 {
 729         struct net_device *netdev = adapter->netdev;
 730         int i;
 731
 732         igb_get_hw_control(adapter);
 733         igb_set_multi(netdev);
 734
 735         igb_restore_vlan(adapter);
 736
 737         igb_configure_tx(adapter);
 738         igb_setup_rctl(adapter);
 739         igb_configure_rx(adapter);
 740
 741         igb_rx_fifo_flush_82575(&adapter->hw);
 742
 743         /* call IGB_DESC_UNUSED which always leaves
 744          * at least 1 descriptor unused to make sure
 745          * next_to_use != next_to_clean */
 746         for (i = 0; i < adapter->num_rx_queues; i++) {
 747                 struct igb_ring *ring = &adapter->rx_ring[i];
 748                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
 749         }
 750
 751
 752         adapter->tx_queue_len = netdev->tx_queue_len;
 753 }
 754
 755
 756 /**
 757  * igb_up - Open the interface and prepare it to handle traffic
 758  * @adapter: board private structure
 759  **/
 760
 761 int igb_up(struct igb_adapter *adapter)
 762 {
 763         struct e1000_hw *hw = &adapter->hw;
 764         int i;
 765
 766         /* hardware has been reset, we need to reload some things */
 767         igb_configure(adapter);
 768
 769         clear_bit(__IGB_DOWN, &adapter->state);
 770
 771         for (i = 0; i < adapter->num_rx_queues; i++)
 772                 napi_enable(&adapter->rx_ring[i].napi);
 773         if (adapter->msix_entries)
 774                 igb_configure_msix(adapter);
 775
 776         /* Clear any pending interrupts. */
 777         rd32(E1000_ICR);
 778         igb_irq_enable(adapter);
 779
 780         /* Fire a link change interrupt to start the watchdog. */
 781         wr32(E1000_ICS, E1000_ICS_LSC);
 782         return 0;
 783 }
 784
 785 void igb_down(struct igb_adapter *adapter)
 786 {
 787         struct e1000_hw *hw = &adapter->hw;
 788         struct net_device *netdev = adapter->netdev;
 789         u32 tctl, rctl;
 790         int i;
 791
 792         /* signal that we're down so the interrupt handler does not
 793          * reschedule our watchdog timer */
 794         set_bit(__IGB_DOWN, &adapter->state);
 795
 796         /* disable receives in the hardware */
 797         rctl = rd32(E1000_RCTL);
 798         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 799         /* flush and sleep below */
 800
 801         netif_tx_stop_all_queues(netdev);
 802
 803         /* disable transmits in the hardware */
 804         tctl = rd32(E1000_TCTL);
 805         tctl &= ~E1000_TCTL_EN;
 806         wr32(E1000_TCTL, tctl);
 807         /* flush both disables and wait for them to finish */
 808         wrfl();
 809         msleep(10);
 810
 811         for (i = 0; i < adapter->num_rx_queues; i++)
 812                 napi_disable(&adapter->rx_ring[i].napi);
 813
 814         igb_irq_disable(adapter);
 815
 816         del_timer_sync(&adapter->watchdog_timer);
 817         del_timer_sync(&adapter->phy_info_timer);
 818
 819         netdev->tx_queue_len = adapter->tx_queue_len;
 820         netif_carrier_off(netdev);
 821         adapter->link_speed = 0;
 822         adapter->link_duplex = 0;
 823
 824         if (!pci_channel_offline(adapter->pdev))
 825                 igb_reset(adapter);
 826         igb_clean_all_tx_rings(adapter);
 827         igb_clean_all_rx_rings(adapter);
 828 }
 829
 830 void igb_reinit_locked(struct igb_adapter *adapter)
 831 {
 832         WARN_ON(in_interrupt());
 833         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 834                 msleep(1);
 835         igb_down(adapter);
 836         igb_up(adapter);
 837         clear_bit(__IGB_RESETTING, &adapter->state);
 838 }
 839
 840 void igb_reset(struct igb_adapter *adapter)
 841 {
 842         struct e1000_hw *hw = &adapter->hw;
 843         struct e1000_mac_info *mac = &hw->mac;
 844         struct e1000_fc_info *fc = &hw->fc;
 845         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 846         u16 hwm;
 847
 848         /* Repartition Pba for greater than 9k mtu
 849          * To take effect CTRL.RST is required.
 850          */
 851         if (mac->type != e1000_82576) {
 852         pba = E1000_PBA_34K;
 853         }
 854         else {
 855                 pba = E1000_PBA_64K;
 856         }
 857
 858         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
 859             (mac->type < e1000_82576)) {
 860                 /* adjust PBA for jumbo frames */
 861                 wr32(E1000_PBA, pba);
 862
 863                 /* To maintain wire speed transmits, the Tx FIFO should be
 864                  * large enough to accommodate two full transmit packets,
 865                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 866                  * the Rx FIFO should be large enough to accommodate at least
 867                  * one full receive packet and is similarly rounded up and
 868                  * expressed in KB. */
 869                 pba = rd32(E1000_PBA);
 870                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 871                 tx_space = pba >> 16;
 872                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 873                 pba &= 0xffff;
 874                 /* the tx fifo also stores 16 bytes of information about the tx
 875                  * but don't include ethernet FCS because hardware appends it */
 876                 min_tx_space = (adapter->max_frame_size +
 877                                 sizeof(struct e1000_tx_desc) -
 878                                 ETH_FCS_LEN) * 2;
 879                 min_tx_space = ALIGN(min_tx_space, 1024);
 880                 min_tx_space >>= 10;
 881                 /* software strips receive CRC, so leave room for it */
 882                 min_rx_space = adapter->max_frame_size;
 883                 min_rx_space = ALIGN(min_rx_space, 1024);
 884                 min_rx_space >>= 10;
 885
 886                 /* If current Tx allocation is less than the min Tx FIFO size,
 887                  * and the min Tx FIFO size is less than the current Rx FIFO
 888                  * allocation, take space away from current Rx allocation */
 889                 if (tx_space < min_tx_space &&
 890                     ((min_tx_space - tx_space) < pba)) {
 891                         pba = pba - (min_tx_space - tx_space);
 892
 893                         /* if short on rx space, rx wins and must trump tx
 894                          * adjustment */
 895                         if (pba < min_rx_space)
 896                                 pba = min_rx_space;
 897                 }
 898                 wr32(E1000_PBA, pba);
 899         }
 900
 901         /* flow control settings */
 902         /* The high water mark must be low enough to fit one full frame
 903          * (or the size used for early receive) above it in the Rx FIFO.
 904          * Set it to the lower of:
 905          * - 90% of the Rx FIFO size, or
 906          * - the full Rx FIFO size minus one full frame */
 907         hwm = min(((pba << 10) * 9 / 10),
 908                         ((pba << 10) - 2 * adapter->max_frame_size));
 909
 910         if (mac->type < e1000_82576) {
 911                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 912                 fc->low_water = fc->high_water - 8;
 913         } else {
 914                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
 915                 fc->low_water = fc->high_water - 16;
 916         }
 917         fc->pause_time = 0xFFFF;
 918         fc->send_xon = 1;
 919         fc->type = fc->original_type;
 920
 921         /* Allow time for pending master requests to run */
 922         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 923         wr32(E1000_WUC, 0);
 924
 925         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 926                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 927
 928         igb_update_mng_vlan(adapter);
 929
 930         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 931         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 932
 933         igb_reset_adaptive(&adapter->hw);
 934         if (adapter->hw.phy.ops.get_phy_info)
 935                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
 936 }
 937
 938 /**
 939  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
 940  * @pdev: PCI device information struct
 941  *
 942  * Returns true if an adapter needs ioport resources
 943  **/
 944 static int igb_is_need_ioport(struct pci_dev *pdev)
 945 {
 946         switch (pdev->device) {
 947         /* Currently there are no adapters that need ioport resources */
 948         default:
 949                 return false;
 950         }
 951 }
 952
 953 /**
 954  * igb_probe - Device Initialization Routine
 955  * @pdev: PCI device information struct
 956  * @ent: entry in igb_pci_tbl
 957  *
 958  * Returns 0 on success, negative on failure
 959  *
 960  * igb_probe initializes an adapter identified by a pci_dev structure.
 961  * The OS initialization, configuring of the adapter private structure,
 962  * and a hardware reset occur.
 963  **/
 964 static int __devinit igb_probe(struct pci_dev *pdev,
 965                                const struct pci_device_id *ent)
 966 {
 967         struct net_device *netdev;
 968         struct igb_adapter *adapter;
 969         struct e1000_hw *hw;
 970         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 971         unsigned long mmio_start, mmio_len;
 972         int i, err, pci_using_dac;
 973         u16 eeprom_data = 0;
 974         u16 eeprom_apme_mask = IGB_EEPROM_APME;
 975         u32 part_num;
 976         int bars, need_ioport;
 977
 978         /* do not allocate ioport bars when not needed */
 979         need_ioport = igb_is_need_ioport(pdev);
 980         if (need_ioport) {
 981                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
 982                 err = pci_enable_device(pdev);
 983         } else {
 984                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
 985                 err = pci_enable_device_mem(pdev);
 986         }
 987         if (err)
 988                 return err;
 989
 990         pci_using_dac = 0;
 991         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 992         if (!err) {
 993                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 994                 if (!err)
 995                         pci_using_dac = 1;
 996         } else {
 997                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 998                 if (err) {
 999                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1000                         if (err) {
1001                                 dev_err(&pdev->dev, "No usable DMA "
1002                                         "configuration, aborting\n");
1003                                 goto err_dma;
1004                         }
1005                 }
1006         }
1007
1008         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1009         if (err)
1010                 goto err_pci_reg;
1011
1012         pci_set_master(pdev);
1013         pci_save_state(pdev);
1014
1015         err = -ENOMEM;
1016         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1017         if (!netdev)
1018                 goto err_alloc_etherdev;
1019
1020         SET_NETDEV_DEV(netdev, &pdev->dev);
1021
1022         pci_set_drvdata(pdev, netdev);
1023         adapter = netdev_priv(netdev);
1024         adapter->netdev = netdev;
1025         adapter->pdev = pdev;
1026         hw = &adapter->hw;
1027         hw->back = adapter;
1028         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1029         adapter->bars = bars;
1030         adapter->need_ioport = need_ioport;
1031
1032         mmio_start = pci_resource_start(pdev, 0);
1033         mmio_len = pci_resource_len(pdev, 0);
1034
1035         err = -EIO;
1036         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1037         if (!adapter->hw.hw_addr)
1038                 goto err_ioremap;
1039
1040         netdev->open = &igb_open;
1041         netdev->stop = &igb_close;
1042         netdev->get_stats = &igb_get_stats;
1043         netdev->set_multicast_list = &igb_set_multi;
1044         netdev->set_mac_address = &igb_set_mac;
1045         netdev->change_mtu = &igb_change_mtu;
1046         netdev->do_ioctl = &igb_ioctl;
1047         igb_set_ethtool_ops(netdev);
1048         netdev->tx_timeout = &igb_tx_timeout;
1049         netdev->watchdog_timeo = 5 * HZ;
1050         netdev->vlan_rx_register = igb_vlan_rx_register;
1051         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1052         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1053 #ifdef CONFIG_NET_POLL_CONTROLLER
1054         netdev->poll_controller = igb_netpoll;
1055 #endif
1056         netdev->hard_start_xmit = &igb_xmit_frame_adv;
1057
1058         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1059
1060         netdev->mem_start = mmio_start;
1061         netdev->mem_end = mmio_start + mmio_len;
1062
1063         /* PCI config space info */
1064         hw->vendor_id = pdev->vendor;
1065         hw->device_id = pdev->device;
1066         hw->revision_id = pdev->revision;
1067         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1068         hw->subsystem_device_id = pdev->subsystem_device;
1069
1070         /* setup the private structure */
1071         hw->back = adapter;
1072         /* Copy the default MAC, PHY and NVM function pointers */
1073         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1074         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1075         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1076         /* Initialize skew-specific constants */
1077         err = ei->get_invariants(hw);
1078         if (err)
1079                 goto err_hw_init;
1080
1081         err = igb_sw_init(adapter);
1082         if (err)
1083                 goto err_sw_init;
1084
1085         igb_get_bus_info_pcie(hw);
1086
1087         /* set flags */
1088         switch (hw->mac.type) {
1089         case e1000_82576:
1090         case e1000_82575:
1091                 adapter->flags |= IGB_FLAG_HAS_DCA;
1092                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1093                 break;
1094         default:
1095                 break;
1096         }
1097
1098         hw->phy.autoneg_wait_to_complete = false;
1099         hw->mac.adaptive_ifs = true;
1100
1101         /* Copper options */
1102         if (hw->phy.media_type == e1000_media_type_copper) {
1103                 hw->phy.mdix = AUTO_ALL_MODES;
1104                 hw->phy.disable_polarity_correction = false;
1105                 hw->phy.ms_type = e1000_ms_hw_default;
1106         }
1107
1108         if (igb_check_reset_block(hw))
1109                 dev_info(&pdev->dev,
1110                         "PHY reset is blocked due to SOL/IDER session.\n");
1111
1112         netdev->features = NETIF_F_SG |
1113                            NETIF_F_HW_CSUM |
1114                            NETIF_F_HW_VLAN_TX |
1115                            NETIF_F_HW_VLAN_RX |
1116                            NETIF_F_HW_VLAN_FILTER;
1117
1118         netdev->features |= NETIF_F_TSO;
1119         netdev->features |= NETIF_F_TSO6;
1120
1121 #ifdef CONFIG_IGB_LRO
1122         netdev->features |= NETIF_F_LRO;
1123 #endif
1124
1125         netdev->vlan_features |= NETIF_F_TSO;
1126         netdev->vlan_features |= NETIF_F_TSO6;
1127         netdev->vlan_features |= NETIF_F_HW_CSUM;
1128         netdev->vlan_features |= NETIF_F_SG;
1129
1130         if (pci_using_dac)
1131                 netdev->features |= NETIF_F_HIGHDMA;
1132
1133         netdev->features |= NETIF_F_LLTX;
1134         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1135
1136         /* before reading the NVM, reset the controller to put the device in a
1137          * known good starting state */
1138         hw->mac.ops.reset_hw(hw);
1139
1140         /* make sure the NVM is good */
1141         if (igb_validate_nvm_checksum(hw) < 0) {
1142                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1143                 err = -EIO;
1144                 goto err_eeprom;
1145         }
1146
1147         /* copy the MAC address out of the NVM */
1148         if (hw->mac.ops.read_mac_addr(hw))
1149                 dev_err(&pdev->dev, "NVM Read Error\n");
1150
1151         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1152         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1153
1154         if (!is_valid_ether_addr(netdev->perm_addr)) {
1155                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1156                 err = -EIO;
1157                 goto err_eeprom;
1158         }
1159
1160         init_timer(&adapter->watchdog_timer);
1161         adapter->watchdog_timer.function = &igb_watchdog;
1162         adapter->watchdog_timer.data = (unsigned long) adapter;
1163
1164         init_timer(&adapter->phy_info_timer);
1165         adapter->phy_info_timer.function = &igb_update_phy_info;
1166         adapter->phy_info_timer.data = (unsigned long) adapter;
1167
1168         INIT_WORK(&adapter->reset_task, igb_reset_task);
1169         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1170
1171         /* Initialize link & ring properties that are user-changeable */
1172         adapter->tx_ring->count = 256;
1173         for (i = 0; i < adapter->num_tx_queues; i++)
1174                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1175         adapter->rx_ring->count = 256;
1176         for (i = 0; i < adapter->num_rx_queues; i++)
1177                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1178
1179         adapter->fc_autoneg = true;
1180         hw->mac.autoneg = true;
1181         hw->phy.autoneg_advertised = 0x2f;
1182
1183         hw->fc.original_type = e1000_fc_default;
1184         hw->fc.type = e1000_fc_default;
1185
1186         adapter->itr_setting = 3;
1187         adapter->itr = IGB_START_ITR;
1188
1189         igb_validate_mdi_setting(hw);
1190
1191         adapter->rx_csum = 1;
1192
1193         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1194          * enable the ACPI Magic Packet filter
1195          */
1196
1197         if (hw->bus.func == 0 ||
1198             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1199                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1200                                      &eeprom_data);
1201
1202         if (eeprom_data & eeprom_apme_mask)
1203                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1204
1205         /* now that we have the eeprom settings, apply the special cases where
1206          * the eeprom may be wrong or the board simply won't support wake on
1207          * lan on a particular port */
1208         switch (pdev->device) {
1209         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1210                 adapter->eeprom_wol = 0;
1211                 break;
1212         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1213         case E1000_DEV_ID_82576_FIBER:
1214         case E1000_DEV_ID_82576_SERDES:
1215                 /* Wake events only supported on port A for dual fiber
1216                  * regardless of eeprom setting */
1217                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1218                         adapter->eeprom_wol = 0;
1219                 break;
1220         case E1000_DEV_ID_82576_QUAD_COPPER:
1221                 /* if quad port adapter, disable WoL on all but port A */
1222                 if (global_quad_port_a != 0)
1223                         adapter->eeprom_wol = 0;
1224                 else
1225                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
1226                 /* Reset for multiple quad port adapters */
1227                 if (++global_quad_port_a == 4)
1228                         global_quad_port_a = 0;
1229                 break;
1230         }
1231
1232         /* initialize the wol settings based on the eeprom settings */
1233         adapter->wol = adapter->eeprom_wol;
1234
1235         /* reset the hardware with the new settings */
1236         igb_reset(adapter);
1237
1238         /* let the f/w know that the h/w is now under the control of the
1239          * driver. */
1240         igb_get_hw_control(adapter);
1241
1242         /* tell the stack to leave us alone until igb_open() is called */
1243         netif_carrier_off(netdev);
1244         netif_tx_stop_all_queues(netdev);
1245
1246         strcpy(netdev->name, "eth%d");
1247         err = register_netdev(netdev);
1248         if (err)
1249                 goto err_register;
1250
1251 #ifdef CONFIG_DCA
1252         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1253             (dca_add_requester(&pdev->dev) == 0)) {
1254                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1255                 dev_info(&pdev->dev, "DCA enabled\n");
1256                 /* Always use CB2 mode, difference is masked
1257                  * in the CB driver. */
1258                 wr32(E1000_DCA_CTRL, 2);
1259                 igb_setup_dca(adapter);
1260         }
1261 #endif
1262
1263         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1264         /* print bus type/speed/width info */
1265         dev_info(&pdev->dev,
1266                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1267                  netdev->name,
1268                  ((hw->bus.speed == e1000_bus_speed_2500)
1269                   ? "2.5Gb/s" : "unknown"),
1270                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1271                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1272                   ? "Width x1" : "unknown"),
1273                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1274                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1275
1276         igb_read_part_num(hw, &part_num);
1277         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1278                 (part_num >> 8), (part_num & 0xff));
1279
1280         dev_info(&pdev->dev,
1281                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1282                 adapter->msix_entries ? "MSI-X" :
1283                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1284                 adapter->num_rx_queues, adapter->num_tx_queues);
1285
1286         return 0;
1287
1288 err_register:
1289         igb_release_hw_control(adapter);
1290 err_eeprom:
1291         if (!igb_check_reset_block(hw))
1292                 hw->phy.ops.reset_phy(hw);
1293
1294         if (hw->flash_address)
1295                 iounmap(hw->flash_address);
1296
1297         igb_remove_device(hw);
1298         igb_free_queues(adapter);
1299 err_sw_init:
1300 err_hw_init:
1301         iounmap(hw->hw_addr);
1302 err_ioremap:
1303         free_netdev(netdev);
1304 err_alloc_etherdev:
1305         pci_release_selected_regions(pdev, bars);
1306 err_pci_reg:
1307 err_dma:
1308         pci_disable_device(pdev);
1309         return err;
1310 }
1311
1312 /**
1313  * igb_remove - Device Removal Routine
1314  * @pdev: PCI device information struct
1315  *
1316  * igb_remove is called by the PCI subsystem to alert the driver
1317  * that it should release a PCI device.  The could be caused by a
1318  * Hot-Plug event, or because the driver is going to be removed from
1319  * memory.
1320  **/
1321 static void __devexit igb_remove(struct pci_dev *pdev)
1322 {
1323         struct net_device *netdev = pci_get_drvdata(pdev);
1324         struct igb_adapter *adapter = netdev_priv(netdev);
1325 #ifdef CONFIG_DCA
1326         struct e1000_hw *hw = &adapter->hw;
1327 #endif
1328
1329         /* flush_scheduled work may reschedule our watchdog task, so
1330          * explicitly disable watchdog tasks from being rescheduled  */
1331         set_bit(__IGB_DOWN, &adapter->state);
1332         del_timer_sync(&adapter->watchdog_timer);
1333         del_timer_sync(&adapter->phy_info_timer);
1334
1335         flush_scheduled_work();
1336
1337 #ifdef CONFIG_DCA
1338         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1339                 dev_info(&pdev->dev, "DCA disabled\n");
1340                 dca_remove_requester(&pdev->dev);
1341                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1342                 wr32(E1000_DCA_CTRL, 1);
1343         }
1344 #endif
1345
1346         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1347          * would have already happened in close and is redundant. */
1348         igb_release_hw_control(adapter);
1349
1350         unregister_netdev(netdev);
1351
1352         if (adapter->hw.phy.ops.reset_phy &&
1353             !igb_check_reset_block(&adapter->hw))
1354                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1355
1356         igb_remove_device(&adapter->hw);
1357         igb_reset_interrupt_capability(adapter);
1358
1359         igb_free_queues(adapter);
1360
1361         iounmap(adapter->hw.hw_addr);
1362         if (adapter->hw.flash_address)
1363                 iounmap(adapter->hw.flash_address);
1364         pci_release_selected_regions(pdev, adapter->bars);
1365
1366         free_netdev(netdev);
1367
1368         pci_disable_device(pdev);
1369 }
1370
1371 /**
1372  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1373  * @adapter: board private structure to initialize
1374  *
1375  * igb_sw_init initializes the Adapter private data structure.
1376  * Fields are initialized based on PCI device information and
1377  * OS network device settings (MTU size).
1378  **/
1379 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1380 {
1381         struct e1000_hw *hw = &adapter->hw;
1382         struct net_device *netdev = adapter->netdev;
1383         struct pci_dev *pdev = adapter->pdev;
1384
1385         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1386
1387         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1388         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1389         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1390         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1391
1392         /* Number of supported queues. */
1393         /* Having more queues than CPUs doesn't make sense. */
1394         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1395         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1396
1397         /* This call may decrease the number of queues depending on
1398          * interrupt mode. */
1399         igb_set_interrupt_capability(adapter);
1400
1401         if (igb_alloc_queues(adapter)) {
1402                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1403                 return -ENOMEM;
1404         }
1405
1406         /* Explicitly disable IRQ since the NIC can be in any state. */
1407         igb_irq_disable(adapter);
1408
1409         set_bit(__IGB_DOWN, &adapter->state);
1410         return 0;
1411 }
1412
1413 /**
1414  * igb_open - Called when a network interface is made active
1415  * @netdev: network interface device structure
1416  *
1417  * Returns 0 on success, negative value on failure
1418  *
1419  * The open entry point is called when a network interface is made
1420  * active by the system (IFF_UP).  At this point all resources needed
1421  * for transmit and receive operations are allocated, the interrupt
1422  * handler is registered with the OS, the watchdog timer is started,
1423  * and the stack is notified that the interface is ready.
1424  **/
1425 static int igb_open(struct net_device *netdev)
1426 {
1427         struct igb_adapter *adapter = netdev_priv(netdev);
1428         struct e1000_hw *hw = &adapter->hw;
1429         int err;
1430         int i;
1431
1432         /* disallow open during test */
1433         if (test_bit(__IGB_TESTING, &adapter->state))
1434                 return -EBUSY;
1435
1436         /* allocate transmit descriptors */
1437         err = igb_setup_all_tx_resources(adapter);
1438         if (err)
1439                 goto err_setup_tx;
1440
1441         /* allocate receive descriptors */
1442         err = igb_setup_all_rx_resources(adapter);
1443         if (err)
1444                 goto err_setup_rx;
1445
1446         /* e1000_power_up_phy(adapter); */
1447
1448         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1449         if ((adapter->hw.mng_cookie.status &
1450              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1451                 igb_update_mng_vlan(adapter);
1452
1453         /* before we allocate an interrupt, we must be ready to handle it.
1454          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1455          * as soon as we call pci_request_irq, so we have to setup our
1456          * clean_rx handler before we do so.  */
1457         igb_configure(adapter);
1458
1459         err = igb_request_irq(adapter);
1460         if (err)
1461                 goto err_req_irq;
1462
1463         /* From here on the code is the same as igb_up() */
1464         clear_bit(__IGB_DOWN, &adapter->state);
1465
1466         for (i = 0; i < adapter->num_rx_queues; i++)
1467                 napi_enable(&adapter->rx_ring[i].napi);
1468
1469         /* Clear any pending interrupts. */
1470         rd32(E1000_ICR);
1471
1472         igb_irq_enable(adapter);
1473
1474         netif_tx_start_all_queues(netdev);
1475
1476         /* Fire a link status change interrupt to start the watchdog. */
1477         wr32(E1000_ICS, E1000_ICS_LSC);
1478
1479         return 0;
1480
1481 err_req_irq:
1482         igb_release_hw_control(adapter);
1483         /* e1000_power_down_phy(adapter); */
1484         igb_free_all_rx_resources(adapter);
1485 err_setup_rx:
1486         igb_free_all_tx_resources(adapter);
1487 err_setup_tx:
1488         igb_reset(adapter);
1489
1490         return err;
1491 }
1492
1493 /**
1494  * igb_close - Disables a network interface
1495  * @netdev: network interface device structure
1496  *
1497  * Returns 0, this is not allowed to fail
1498  *
1499  * The close entry point is called when an interface is de-activated
1500  * by the OS.  The hardware is still under the driver's control, but
1501  * needs to be disabled.  A global MAC reset is issued to stop the
1502  * hardware, and all transmit and receive resources are freed.
1503  **/
1504 static int igb_close(struct net_device *netdev)
1505 {
1506         struct igb_adapter *adapter = netdev_priv(netdev);
1507
1508         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1509         igb_down(adapter);
1510
1511         igb_free_irq(adapter);
1512
1513         igb_free_all_tx_resources(adapter);
1514         igb_free_all_rx_resources(adapter);
1515
1516         /* kill manageability vlan ID if supported, but not if a vlan with
1517          * the same ID is registered on the host OS (let 8021q kill it) */
1518         if ((adapter->hw.mng_cookie.status &
1519                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1520              !(adapter->vlgrp &&
1521                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1522                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1523
1524         return 0;
1525 }
1526
1527 /**
1528  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1529  * @adapter: board private structure
1530  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1531  *
1532  * Return 0 on success, negative on failure
1533  **/
1534
1535 int igb_setup_tx_resources(struct igb_adapter *adapter,
1536                            struct igb_ring *tx_ring)
1537 {
1538         struct pci_dev *pdev = adapter->pdev;
1539         int size;
1540
1541         size = sizeof(struct igb_buffer) * tx_ring->count;
1542         tx_ring->buffer_info = vmalloc(size);
1543         if (!tx_ring->buffer_info)
1544                 goto err;
1545         memset(tx_ring->buffer_info, 0, size);
1546
1547         /* round up to nearest 4K */
1548         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1549                         + sizeof(u32);
1550         tx_ring->size = ALIGN(tx_ring->size, 4096);
1551
1552         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1553                                              &tx_ring->dma);
1554
1555         if (!tx_ring->desc)
1556                 goto err;
1557
1558         tx_ring->adapter = adapter;
1559         tx_ring->next_to_use = 0;
1560         tx_ring->next_to_clean = 0;
1561         return 0;
1562
1563 err:
1564         vfree(tx_ring->buffer_info);
1565         dev_err(&adapter->pdev->dev,
1566                 "Unable to allocate memory for the transmit descriptor ring\n");
1567         return -ENOMEM;
1568 }
1569
1570 /**
1571  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1572  *                                (Descriptors) for all queues
1573  * @adapter: board private structure
1574  *
1575  * Return 0 on success, negative on failure
1576  **/
1577 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1578 {
1579         int i, err = 0;
1580         int r_idx;
1581
1582         for (i = 0; i < adapter->num_tx_queues; i++) {
1583                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1584                 if (err) {
1585                         dev_err(&adapter->pdev->dev,
1586                                 "Allocation for Tx Queue %u failed\n", i);
1587                         for (i--; i >= 0; i--)
1588                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1589                         break;
1590                 }
1591         }
1592
1593         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1594                 r_idx = i % adapter->num_tx_queues;
1595                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1596         }
1597         return err;
1598 }
1599
1600 /**
1601  * igb_configure_tx - Configure transmit Unit after Reset
1602  * @adapter: board private structure
1603  *
1604  * Configure the Tx unit of the MAC after a reset.
1605  **/
1606 static void igb_configure_tx(struct igb_adapter *adapter)
1607 {
1608         u64 tdba, tdwba;
1609         struct e1000_hw *hw = &adapter->hw;
1610         u32 tctl;
1611         u32 txdctl, txctrl;
1612         int i;
1613
1614         for (i = 0; i < adapter->num_tx_queues; i++) {
1615                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1616
1617                 wr32(E1000_TDLEN(i),
1618                                 ring->count * sizeof(struct e1000_tx_desc));
1619                 tdba = ring->dma;
1620                 wr32(E1000_TDBAL(i),
1621                                 tdba & 0x00000000ffffffffULL);
1622                 wr32(E1000_TDBAH(i), tdba >> 32);
1623
1624                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1625                 tdwba |= 1; /* enable head wb */
1626                 wr32(E1000_TDWBAL(i),
1627                                 tdwba & 0x00000000ffffffffULL);
1628                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1629
1630                 ring->head = E1000_TDH(i);
1631                 ring->tail = E1000_TDT(i);
1632                 writel(0, hw->hw_addr + ring->tail);
1633                 writel(0, hw->hw_addr + ring->head);
1634                 txdctl = rd32(E1000_TXDCTL(i));
1635                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1636                 wr32(E1000_TXDCTL(i), txdctl);
1637
1638                 /* Turn off Relaxed Ordering on head write-backs.  The
1639                  * writebacks MUST be delivered in order or it will
1640                  * completely screw up our bookeeping.
1641                  */
1642                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1643                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1644                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1645         }
1646
1647
1648
1649         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1650
1651         /* Program the Transmit Control Register */
1652
1653         tctl = rd32(E1000_TCTL);
1654         tctl &= ~E1000_TCTL_CT;
1655         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1656                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1657
1658         igb_config_collision_dist(hw);
1659
1660         /* Setup Transmit Descriptor Settings for eop descriptor */
1661         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1662
1663         /* Enable transmits */
1664         tctl |= E1000_TCTL_EN;
1665
1666         wr32(E1000_TCTL, tctl);
1667 }
1668
1669 /**
1670  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1671  * @adapter: board private structure
1672  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1673  *
1674  * Returns 0 on success, negative on failure
1675  **/
1676
1677 int igb_setup_rx_resources(struct igb_adapter *adapter,
1678                            struct igb_ring *rx_ring)
1679 {
1680         struct pci_dev *pdev = adapter->pdev;
1681         int size, desc_len;
1682
1683 #ifdef CONFIG_IGB_LRO
1684         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1685         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1686         if (!rx_ring->lro_mgr.lro_arr)
1687                 goto err;
1688         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1689 #endif
1690
1691         size = sizeof(struct igb_buffer) * rx_ring->count;
1692         rx_ring->buffer_info = vmalloc(size);
1693         if (!rx_ring->buffer_info)
1694                 goto err;
1695         memset(rx_ring->buffer_info, 0, size);
1696
1697         desc_len = sizeof(union e1000_adv_rx_desc);
1698
1699         /* Round up to nearest 4K */
1700         rx_ring->size = rx_ring->count * desc_len;
1701         rx_ring->size = ALIGN(rx_ring->size, 4096);
1702
1703         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1704                                              &rx_ring->dma);
1705
1706         if (!rx_ring->desc)
1707                 goto err;
1708
1709         rx_ring->next_to_clean = 0;
1710         rx_ring->next_to_use = 0;
1711
1712         rx_ring->adapter = adapter;
1713
1714         return 0;
1715
1716 err:
1717 #ifdef CONFIG_IGB_LRO
1718         vfree(rx_ring->lro_mgr.lro_arr);
1719         rx_ring->lro_mgr.lro_arr = NULL;
1720 #endif
1721         vfree(rx_ring->buffer_info);
1722         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1723                 "the receive descriptor ring\n");
1724         return -ENOMEM;
1725 }
1726
1727 /**
1728  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1729  *                                (Descriptors) for all queues
1730  * @adapter: board private structure
1731  *
1732  * Return 0 on success, negative on failure
1733  **/
1734 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1735 {
1736         int i, err = 0;
1737
1738         for (i = 0; i < adapter->num_rx_queues; i++) {
1739                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1740                 if (err) {
1741                         dev_err(&adapter->pdev->dev,
1742                                 "Allocation for Rx Queue %u failed\n", i);
1743                         for (i--; i >= 0; i--)
1744                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1745                         break;
1746                 }
1747         }
1748
1749         return err;
1750 }
1751
1752 /**
1753  * igb_setup_rctl - configure the receive control registers
1754  * @adapter: Board private structure
1755  **/
1756 static void igb_setup_rctl(struct igb_adapter *adapter)
1757 {
1758         struct e1000_hw *hw = &adapter->hw;
1759         u32 rctl;
1760         u32 srrctl = 0;
1761         int i;
1762
1763         rctl = rd32(E1000_RCTL);
1764
1765         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1766
1767         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1768                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1769                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1770
1771         /*
1772          * enable stripping of CRC. It's unlikely this will break BMC
1773          * redirection as it did with e1000. Newer features require
1774          * that the HW strips the CRC.
1775         */
1776         rctl |= E1000_RCTL_SECRC;
1777
1778         rctl &= ~E1000_RCTL_SBP;
1779
1780         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1781                 rctl &= ~E1000_RCTL_LPE;
1782         else
1783                 rctl |= E1000_RCTL_LPE;
1784         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1785                 /* Setup buffer sizes */
1786                 rctl &= ~E1000_RCTL_SZ_4096;
1787                 rctl |= E1000_RCTL_BSEX;
1788                 switch (adapter->rx_buffer_len) {
1789                 case IGB_RXBUFFER_256:
1790                         rctl |= E1000_RCTL_SZ_256;
1791                         rctl &= ~E1000_RCTL_BSEX;
1792                         break;
1793                 case IGB_RXBUFFER_512:
1794                         rctl |= E1000_RCTL_SZ_512;
1795                         rctl &= ~E1000_RCTL_BSEX;
1796                         break;
1797                 case IGB_RXBUFFER_1024:
1798                         rctl |= E1000_RCTL_SZ_1024;
1799                         rctl &= ~E1000_RCTL_BSEX;
1800                         break;
1801                 case IGB_RXBUFFER_2048:
1802                 default:
1803                         rctl |= E1000_RCTL_SZ_2048;
1804                         rctl &= ~E1000_RCTL_BSEX;
1805                         break;
1806                 }
1807         } else {
1808                 rctl &= ~E1000_RCTL_BSEX;
1809                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1810         }
1811
1812         /* 82575 and greater support packet-split where the protocol
1813          * header is placed in skb->data and the packet data is
1814          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1815          * In the case of a non-split, skb->data is linearly filled,
1816          * followed by the page buffers.  Therefore, skb->data is
1817          * sized to hold the largest protocol header.
1818          */
1819         /* allocations using alloc_page take too long for regular MTU
1820          * so only enable packet split for jumbo frames */
1821         if (rctl & E1000_RCTL_LPE) {
1822                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1823                 srrctl |= adapter->rx_ps_hdr_size <<
1824                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1825                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1826         } else {
1827                 adapter->rx_ps_hdr_size = 0;
1828                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1829         }
1830
1831         for (i = 0; i < adapter->num_rx_queues; i++)
1832                 wr32(E1000_SRRCTL(i), srrctl);
1833
1834         wr32(E1000_RCTL, rctl);
1835 }
1836
1837 /**
1838  * igb_configure_rx - Configure receive Unit after Reset
1839  * @adapter: board private structure
1840  *
1841  * Configure the Rx unit of the MAC after a reset.
1842  **/
1843 static void igb_configure_rx(struct igb_adapter *adapter)
1844 {
1845         u64 rdba;
1846         struct e1000_hw *hw = &adapter->hw;
1847         u32 rctl, rxcsum;
1848         u32 rxdctl;
1849         int i;
1850
1851         /* disable receives while setting up the descriptors */
1852         rctl = rd32(E1000_RCTL);
1853         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1854         wrfl();
1855         mdelay(10);
1856
1857         if (adapter->itr_setting > 3)
1858                 wr32(E1000_ITR, adapter->itr);
1859
1860         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1861          * the Base and Length of the Rx Descriptor Ring */
1862         for (i = 0; i < adapter->num_rx_queues; i++) {
1863                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1864                 rdba = ring->dma;
1865                 wr32(E1000_RDBAL(i),
1866                                 rdba & 0x00000000ffffffffULL);
1867                 wr32(E1000_RDBAH(i), rdba >> 32);
1868                 wr32(E1000_RDLEN(i),
1869                                ring->count * sizeof(union e1000_adv_rx_desc));
1870
1871                 ring->head = E1000_RDH(i);
1872                 ring->tail = E1000_RDT(i);
1873                 writel(0, hw->hw_addr + ring->tail);
1874                 writel(0, hw->hw_addr + ring->head);
1875
1876                 rxdctl = rd32(E1000_RXDCTL(i));
1877                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1878                 rxdctl &= 0xFFF00000;
1879                 rxdctl |= IGB_RX_PTHRESH;
1880                 rxdctl |= IGB_RX_HTHRESH << 8;
1881                 rxdctl |= IGB_RX_WTHRESH << 16;
1882                 wr32(E1000_RXDCTL(i), rxdctl);
1883 #ifdef CONFIG_IGB_LRO
1884                 /* Intitial LRO Settings */
1885                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1886                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1887                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1888                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1889                 ring->lro_mgr.dev = adapter->netdev;
1890                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1891                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1892 #endif
1893         }
1894
1895         if (adapter->num_rx_queues > 1) {
1896                 u32 random[10];
1897                 u32 mrqc;
1898                 u32 j, shift;
1899                 union e1000_reta {
1900                         u32 dword;
1901                         u8  bytes[4];
1902                 } reta;
1903
1904                 get_random_bytes(&random[0], 40);
1905
1906                 if (hw->mac.type >= e1000_82576)
1907                         shift = 0;
1908                 else
1909                         shift = 6;
1910                 for (j = 0; j < (32 * 4); j++) {
1911                         reta.bytes[j & 3] =
1912                                 (j % adapter->num_rx_queues) << shift;
1913                         if ((j & 3) == 3)
1914                                 writel(reta.dword,
1915                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1916                 }
1917                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1918
1919                 /* Fill out hash function seeds */
1920                 for (j = 0; j < 10; j++)
1921                         array_wr32(E1000_RSSRK(0), j, random[j]);
1922
1923                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1924                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1925                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1926                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1927                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1928                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1929                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1930                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1931
1932
1933                 wr32(E1000_MRQC, mrqc);
1934
1935                 /* Multiqueue and raw packet checksumming are mutually
1936                  * exclusive.  Note that this not the same as TCP/IP
1937                  * checksumming, which works fine. */
1938                 rxcsum = rd32(E1000_RXCSUM);
1939                 rxcsum |= E1000_RXCSUM_PCSD;
1940                 wr32(E1000_RXCSUM, rxcsum);
1941         } else {
1942                 /* Enable Receive Checksum Offload for TCP and UDP */
1943                 rxcsum = rd32(E1000_RXCSUM);
1944                 if (adapter->rx_csum) {
1945                         rxcsum |= E1000_RXCSUM_TUOFL;
1946
1947                         /* Enable IPv4 payload checksum for UDP fragments
1948                          * Must be used in conjunction with packet-split. */
1949                         if (adapter->rx_ps_hdr_size)
1950                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1951                 } else {
1952                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1953                         /* don't need to clear IPPCSE as it defaults to 0 */
1954                 }
1955                 wr32(E1000_RXCSUM, rxcsum);
1956         }
1957
1958         if (adapter->vlgrp)
1959                 wr32(E1000_RLPML,
1960                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1961         else
1962                 wr32(E1000_RLPML, adapter->max_frame_size);
1963
1964         /* Enable Receives */
1965         wr32(E1000_RCTL, rctl);
1966 }
1967
1968 /**
1969  * igb_free_tx_resources - Free Tx Resources per Queue
1970  * @adapter: board private structure
1971  * @tx_ring: Tx descriptor ring for a specific queue
1972  *
1973  * Free all transmit software resources
1974  **/
1975 static void igb_free_tx_resources(struct igb_ring *tx_ring)
1976 {
1977         struct pci_dev *pdev = tx_ring->adapter->pdev;
1978
1979         igb_clean_tx_ring(tx_ring);
1980
1981         vfree(tx_ring->buffer_info);
1982         tx_ring->buffer_info = NULL;
1983
1984         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1985
1986         tx_ring->desc = NULL;
1987 }
1988
1989 /**
1990  * igb_free_all_tx_resources - Free Tx Resources for All Queues
1991  * @adapter: board private structure
1992  *
1993  * Free all transmit software resources
1994  **/
1995 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1996 {
1997         int i;
1998
1999         for (i = 0; i < adapter->num_tx_queues; i++)
2000                 igb_free_tx_resources(&adapter->tx_ring[i]);
2001 }
2002
2003 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2004                                            struct igb_buffer *buffer_info)
2005 {
2006         if (buffer_info->dma) {
2007                 pci_unmap_page(adapter->pdev,
2008                                 buffer_info->dma,
2009                                 buffer_info->length,
2010                                 PCI_DMA_TODEVICE);
2011                 buffer_info->dma = 0;
2012         }
2013         if (buffer_info->skb) {
2014                 dev_kfree_skb_any(buffer_info->skb);
2015                 buffer_info->skb = NULL;
2016         }
2017         buffer_info->time_stamp = 0;
2018         /* buffer_info must be completely set up in the transmit path */
2019 }
2020
2021 /**
2022  * igb_clean_tx_ring - Free Tx Buffers
2023  * @adapter: board private structure
2024  * @tx_ring: ring to be cleaned
2025  **/
2026 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2027 {
2028         struct igb_adapter *adapter = tx_ring->adapter;
2029         struct igb_buffer *buffer_info;
2030         unsigned long size;
2031         unsigned int i;
2032
2033         if (!tx_ring->buffer_info)
2034                 return;
2035         /* Free all the Tx ring sk_buffs */
2036
2037         for (i = 0; i < tx_ring->count; i++) {
2038                 buffer_info = &tx_ring->buffer_info[i];
2039                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2040         }
2041
2042         size = sizeof(struct igb_buffer) * tx_ring->count;
2043         memset(tx_ring->buffer_info, 0, size);
2044
2045         /* Zero out the descriptor ring */
2046
2047         memset(tx_ring->desc, 0, tx_ring->size);
2048
2049         tx_ring->next_to_use = 0;
2050         tx_ring->next_to_clean = 0;
2051
2052         writel(0, adapter->hw.hw_addr + tx_ring->head);
2053         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2054 }
2055
2056 /**
2057  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2058  * @adapter: board private structure
2059  **/
2060 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2061 {
2062         int i;
2063
2064         for (i = 0; i < adapter->num_tx_queues; i++)
2065                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2066 }
2067
2068 /**
2069  * igb_free_rx_resources - Free Rx Resources
2070  * @adapter: board private structure
2071  * @rx_ring: ring to clean the resources from
2072  *
2073  * Free all receive software resources
2074  **/
2075 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2076 {
2077         struct pci_dev *pdev = rx_ring->adapter->pdev;
2078
2079         igb_clean_rx_ring(rx_ring);
2080
2081         vfree(rx_ring->buffer_info);
2082         rx_ring->buffer_info = NULL;
2083
2084 #ifdef CONFIG_IGB_LRO
2085         vfree(rx_ring->lro_mgr.lro_arr);
2086         rx_ring->lro_mgr.lro_arr = NULL;
2087 #endif
2088
2089         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2090
2091         rx_ring->desc = NULL;
2092 }
2093
2094 /**
2095  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2096  * @adapter: board private structure
2097  *
2098  * Free all receive software resources
2099  **/
2100 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2101 {
2102         int i;
2103
2104         for (i = 0; i < adapter->num_rx_queues; i++)
2105                 igb_free_rx_resources(&adapter->rx_ring[i]);
2106 }
2107
2108 /**
2109  * igb_clean_rx_ring - Free Rx Buffers per Queue
2110  * @adapter: board private structure
2111  * @rx_ring: ring to free buffers from
2112  **/
2113 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2114 {
2115         struct igb_adapter *adapter = rx_ring->adapter;
2116         struct igb_buffer *buffer_info;
2117         struct pci_dev *pdev = adapter->pdev;
2118         unsigned long size;
2119         unsigned int i;
2120
2121         if (!rx_ring->buffer_info)
2122                 return;
2123         /* Free all the Rx ring sk_buffs */
2124         for (i = 0; i < rx_ring->count; i++) {
2125                 buffer_info = &rx_ring->buffer_info[i];
2126                 if (buffer_info->dma) {
2127                         if (adapter->rx_ps_hdr_size)
2128                                 pci_unmap_single(pdev, buffer_info->dma,
2129                                                  adapter->rx_ps_hdr_size,
2130                                                  PCI_DMA_FROMDEVICE);
2131                         else
2132                                 pci_unmap_single(pdev, buffer_info->dma,
2133                                                  adapter->rx_buffer_len,
2134                                                  PCI_DMA_FROMDEVICE);
2135                         buffer_info->dma = 0;
2136                 }
2137
2138                 if (buffer_info->skb) {
2139                         dev_kfree_skb(buffer_info->skb);
2140                         buffer_info->skb = NULL;
2141                 }
2142                 if (buffer_info->page) {
2143                         if (buffer_info->page_dma)
2144                                 pci_unmap_page(pdev, buffer_info->page_dma,
2145                                                PAGE_SIZE / 2,
2146                                                PCI_DMA_FROMDEVICE);
2147                         put_page(buffer_info->page);
2148                         buffer_info->page = NULL;
2149                         buffer_info->page_dma = 0;
2150                         buffer_info->page_offset = 0;
2151                 }
2152         }
2153
2154         size = sizeof(struct igb_buffer) * rx_ring->count;
2155         memset(rx_ring->buffer_info, 0, size);
2156
2157         /* Zero out the descriptor ring */
2158         memset(rx_ring->desc, 0, rx_ring->size);
2159
2160         rx_ring->next_to_clean = 0;
2161         rx_ring->next_to_use = 0;
2162
2163         writel(0, adapter->hw.hw_addr + rx_ring->head);
2164         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2165 }
2166
2167 /**
2168  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2169  * @adapter: board private structure
2170  **/
2171 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2172 {
2173         int i;
2174
2175         for (i = 0; i < adapter->num_rx_queues; i++)
2176                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2177 }
2178
2179 /**
2180  * igb_set_mac - Change the Ethernet Address of the NIC
2181  * @netdev: network interface device structure
2182  * @p: pointer to an address structure
2183  *
2184  * Returns 0 on success, negative on failure
2185  **/
2186 static int igb_set_mac(struct net_device *netdev, void *p)
2187 {
2188         struct igb_adapter *adapter = netdev_priv(netdev);
2189         struct sockaddr *addr = p;
2190
2191         if (!is_valid_ether_addr(addr->sa_data))
2192                 return -EADDRNOTAVAIL;
2193
2194         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2195         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2196
2197         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2198
2199         return 0;
2200 }
2201
2202 /**
2203  * igb_set_multi - Multicast and Promiscuous mode set
2204  * @netdev: network interface device structure
2205  *
2206  * The set_multi entry point is called whenever the multicast address
2207  * list or the network interface flags are updated.  This routine is
2208  * responsible for configuring the hardware for proper multicast,
2209  * promiscuous mode, and all-multi behavior.
2210  **/
2211 static void igb_set_multi(struct net_device *netdev)
2212 {
2213         struct igb_adapter *adapter = netdev_priv(netdev);
2214         struct e1000_hw *hw = &adapter->hw;
2215         struct e1000_mac_info *mac = &hw->mac;
2216         struct dev_mc_list *mc_ptr;
2217         u8  *mta_list;
2218         u32 rctl;
2219         int i;
2220
2221         /* Check for Promiscuous and All Multicast modes */
2222
2223         rctl = rd32(E1000_RCTL);
2224
2225         if (netdev->flags & IFF_PROMISC) {
2226                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2227                 rctl &= ~E1000_RCTL_VFE;
2228         } else {
2229                 if (netdev->flags & IFF_ALLMULTI) {
2230                         rctl |= E1000_RCTL_MPE;
2231                         rctl &= ~E1000_RCTL_UPE;
2232                 } else
2233                         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2234                 rctl |= E1000_RCTL_VFE;
2235         }
2236         wr32(E1000_RCTL, rctl);
2237
2238         if (!netdev->mc_count) {
2239                 /* nothing to program, so clear mc list */
2240                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2241                                           mac->rar_entry_count);
2242                 return;
2243         }
2244
2245         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2246         if (!mta_list)
2247                 return;
2248
2249         /* The shared function expects a packed array of only addresses. */
2250         mc_ptr = netdev->mc_list;
2251
2252         for (i = 0; i < netdev->mc_count; i++) {
2253                 if (!mc_ptr)
2254                         break;
2255                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2256                 mc_ptr = mc_ptr->next;
2257         }
2258         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2259                                       mac->rar_entry_count);
2260         kfree(mta_list);
2261 }
2262
2263 /* Need to wait a few seconds after link up to get diagnostic information from
2264  * the phy */
2265 static void igb_update_phy_info(unsigned long data)
2266 {
2267         struct igb_adapter *adapter = (struct igb_adapter *) data;
2268         if (adapter->hw.phy.ops.get_phy_info)
2269                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2270 }
2271
2272 /**
2273  * igb_watchdog - Timer Call-back
2274  * @data: pointer to adapter cast into an unsigned long
2275  **/
2276 static void igb_watchdog(unsigned long data)
2277 {
2278         struct igb_adapter *adapter = (struct igb_adapter *)data;
2279         /* Do the rest outside of interrupt context */
2280         schedule_work(&adapter->watchdog_task);
2281 }
2282
2283 static void igb_watchdog_task(struct work_struct *work)
2284 {
2285         struct igb_adapter *adapter = container_of(work,
2286                                         struct igb_adapter, watchdog_task);
2287         struct e1000_hw *hw = &adapter->hw;
2288
2289         struct net_device *netdev = adapter->netdev;
2290         struct igb_ring *tx_ring = adapter->tx_ring;
2291         struct e1000_mac_info *mac = &adapter->hw.mac;
2292         u32 link;
2293         s32 ret_val;
2294
2295         if ((netif_carrier_ok(netdev)) &&
2296             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2297                 goto link_up;
2298
2299         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2300         if ((ret_val == E1000_ERR_PHY) &&
2301             (hw->phy.type == e1000_phy_igp_3) &&
2302             (rd32(E1000_CTRL) &
2303              E1000_PHY_CTRL_GBE_DISABLE))
2304                 dev_info(&adapter->pdev->dev,
2305                          "Gigabit has been disabled, downgrading speed\n");
2306
2307         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2308             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2309                 link = mac->serdes_has_link;
2310         else
2311                 link = rd32(E1000_STATUS) &
2312                                       E1000_STATUS_LU;
2313
2314         if (link) {
2315                 if (!netif_carrier_ok(netdev)) {
2316                         u32 ctrl;
2317                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2318                                                    &adapter->link_speed,
2319                                                    &adapter->link_duplex);
2320
2321                         ctrl = rd32(E1000_CTRL);
2322                         dev_info(&adapter->pdev->dev,
2323                                  "NIC Link is Up %d Mbps %s, "
2324                                  "Flow Control: %s\n",
2325                                  adapter->link_speed,
2326                                  adapter->link_duplex == FULL_DUPLEX ?
2327                                  "Full Duplex" : "Half Duplex",
2328                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2329                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2330                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2331                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2332
2333                         /* tweak tx_queue_len according to speed/duplex and
2334                          * adjust the timeout factor */
2335                         netdev->tx_queue_len = adapter->tx_queue_len;
2336                         adapter->tx_timeout_factor = 1;
2337                         switch (adapter->link_speed) {
2338                         case SPEED_10:
2339                                 netdev->tx_queue_len = 10;
2340                                 adapter->tx_timeout_factor = 14;
2341                                 break;
2342                         case SPEED_100:
2343                                 netdev->tx_queue_len = 100;
2344                                 /* maybe add some timeout factor ? */
2345                                 break;
2346                         }
2347
2348                         netif_carrier_on(netdev);
2349                         netif_tx_wake_all_queues(netdev);
2350
2351                         if (!test_bit(__IGB_DOWN, &adapter->state))
2352                                 mod_timer(&adapter->phy_info_timer,
2353                                           round_jiffies(jiffies + 2 * HZ));
2354                 }
2355         } else {
2356                 if (netif_carrier_ok(netdev)) {
2357                         adapter->link_speed = 0;
2358                         adapter->link_duplex = 0;
2359                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2360                         netif_carrier_off(netdev);
2361                         netif_tx_stop_all_queues(netdev);
2362                         if (!test_bit(__IGB_DOWN, &adapter->state))
2363                                 mod_timer(&adapter->phy_info_timer,
2364                                           round_jiffies(jiffies + 2 * HZ));
2365                 }
2366         }
2367
2368 link_up:
2369         igb_update_stats(adapter);
2370
2371         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2372         adapter->tpt_old = adapter->stats.tpt;
2373         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2374         adapter->colc_old = adapter->stats.colc;
2375
2376         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2377         adapter->gorc_old = adapter->stats.gorc;
2378         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2379         adapter->gotc_old = adapter->stats.gotc;
2380
2381         igb_update_adaptive(&adapter->hw);
2382
2383         if (!netif_carrier_ok(netdev)) {
2384                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2385                         /* We've lost link, so the controller stops DMA,
2386                          * but we've got queued Tx work that's never going
2387                          * to get done, so reset controller to flush Tx.
2388                          * (Do the reset outside of interrupt context). */
2389                         adapter->tx_timeout_count++;
2390                         schedule_work(&adapter->reset_task);
2391                 }
2392         }
2393
2394         /* Cause software interrupt to ensure rx ring is cleaned */
2395         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2396
2397         /* Force detection of hung controller every watchdog period */
2398         tx_ring->detect_tx_hung = true;
2399
2400         /* Reset the timer */
2401         if (!test_bit(__IGB_DOWN, &adapter->state))
2402                 mod_timer(&adapter->watchdog_timer,
2403                           round_jiffies(jiffies + 2 * HZ));
2404 }
2405
2406 enum latency_range {
2407         lowest_latency = 0,
2408         low_latency = 1,
2409         bulk_latency = 2,
2410         latency_invalid = 255
2411 };
2412
2413
2414 /**
2415  * igb_update_ring_itr - update the dynamic ITR value based on packet size
2416  *
2417  *      Stores a new ITR value based on strictly on packet size.  This
2418  *      algorithm is less sophisticated than that used in igb_update_itr,
2419  *      due to the difficulty of synchronizing statistics across multiple
2420  *      receive rings.  The divisors and thresholds used by this fuction
2421  *      were determined based on theoretical maximum wire speed and testing
2422  *      data, in order to minimize response time while increasing bulk
2423  *      throughput.
2424  *      This functionality is controlled by the InterruptThrottleRate module
2425  *      parameter (see igb_param.c)
2426  *      NOTE:  This function is called only when operating in a multiqueue
2427  *             receive environment.
2428  * @rx_ring: pointer to ring
2429  **/
2430 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2431 {
2432         int new_val = rx_ring->itr_val;
2433         int avg_wire_size = 0;
2434         struct igb_adapter *adapter = rx_ring->adapter;
2435
2436         if (!rx_ring->total_packets)
2437                 goto clear_counts; /* no packets, so don't do anything */
2438
2439         /* For non-gigabit speeds, just fix the interrupt rate at 4000
2440          * ints/sec - ITR timer value of 120 ticks.
2441          */
2442         if (adapter->link_speed != SPEED_1000) {
2443                 new_val = 120;
2444                 goto set_itr_val;
2445         }
2446         avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2447
2448         /* Add 24 bytes to size to account for CRC, preamble, and gap */
2449         avg_wire_size += 24;
2450
2451         /* Don't starve jumbo frames */
2452         avg_wire_size = min(avg_wire_size, 3000);
2453
2454         /* Give a little boost to mid-size frames */
2455         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2456                 new_val = avg_wire_size / 3;
2457         else
2458                 new_val = avg_wire_size / 2;
2459
2460 set_itr_val:
2461         if (new_val != rx_ring->itr_val) {
2462                 rx_ring->itr_val = new_val;
2463                 rx_ring->set_itr = 1;
2464         }
2465 clear_counts:
2466         rx_ring->total_bytes = 0;
2467         rx_ring->total_packets = 0;
2468 }
2469
2470 /**
2471  * igb_update_itr - update the dynamic ITR value based on statistics
2472  *      Stores a new ITR value based on packets and byte
2473  *      counts during the last interrupt.  The advantage of per interrupt
2474  *      computation is faster updates and more accurate ITR for the current
2475  *      traffic pattern.  Constants in this function were computed
2476  *      based on theoretical maximum wire speed and thresholds were set based
2477  *      on testing data as well as attempting to minimize response time
2478  *      while increasing bulk throughput.
2479  *      this functionality is controlled by the InterruptThrottleRate module
2480  *      parameter (see igb_param.c)
2481  *      NOTE:  These calculations are only valid when operating in a single-
2482  *             queue environment.
2483  * @adapter: pointer to adapter
2484  * @itr_setting: current adapter->itr
2485  * @packets: the number of packets during this measurement interval
2486  * @bytes: the number of bytes during this measurement interval
2487  **/
2488 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2489                                    int packets, int bytes)
2490 {
2491         unsigned int retval = itr_setting;
2492
2493         if (packets == 0)
2494                 goto update_itr_done;
2495
2496         switch (itr_setting) {
2497         case lowest_latency:
2498                 /* handle TSO and jumbo frames */
2499                 if (bytes/packets > 8000)
2500                         retval = bulk_latency;
2501                 else if ((packets < 5) && (bytes > 512))
2502                         retval = low_latency;
2503                 break;
2504         case low_latency:  /* 50 usec aka 20000 ints/s */
2505                 if (bytes > 10000) {
2506                         /* this if handles the TSO accounting */
2507                         if (bytes/packets > 8000) {
2508                                 retval = bulk_latency;
2509                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2510                                 retval = bulk_latency;
2511                         } else if ((packets > 35)) {
2512                                 retval = lowest_latency;
2513                         }
2514                 } else if (bytes/packets > 2000) {
2515                         retval = bulk_latency;
2516                 } else if (packets <= 2 && bytes < 512) {
2517                         retval = lowest_latency;
2518                 }
2519                 break;
2520         case bulk_latency: /* 250 usec aka 4000 ints/s */
2521                 if (bytes > 25000) {
2522                         if (packets > 35)
2523                                 retval = low_latency;
2524                 } else if (bytes < 6000) {
2525                         retval = low_latency;
2526                 }
2527                 break;
2528         }
2529
2530 update_itr_done:
2531         return retval;
2532 }
2533
2534 static void igb_set_itr(struct igb_adapter *adapter)
2535 {
2536         u16 current_itr;
2537         u32 new_itr = adapter->itr;
2538
2539         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2540         if (adapter->link_speed != SPEED_1000) {
2541                 current_itr = 0;
2542                 new_itr = 4000;
2543                 goto set_itr_now;
2544         }
2545
2546         adapter->rx_itr = igb_update_itr(adapter,
2547                                     adapter->rx_itr,
2548                                     adapter->rx_ring->total_packets,
2549                                     adapter->rx_ring->total_bytes);
2550
2551         if (adapter->rx_ring->buddy) {
2552                 adapter->tx_itr = igb_update_itr(adapter,
2553                                             adapter->tx_itr,
2554                                             adapter->tx_ring->total_packets,
2555                                             adapter->tx_ring->total_bytes);
2556
2557                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2558         } else {
2559                 current_itr = adapter->rx_itr;
2560         }
2561
2562         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2563         if (adapter->itr_setting == 3 &&
2564             current_itr == lowest_latency)
2565                 current_itr = low_latency;
2566
2567         switch (current_itr) {
2568         /* counts and packets in update_itr are dependent on these numbers */
2569         case lowest_latency:
2570                 new_itr = 70000;
2571                 break;
2572         case low_latency:
2573                 new_itr = 20000; /* aka hwitr = ~200 */
2574                 break;
2575         case bulk_latency:
2576                 new_itr = 4000;
2577                 break;
2578         default:
2579                 break;
2580         }
2581
2582 set_itr_now:
2583         adapter->rx_ring->total_bytes = 0;
2584         adapter->rx_ring->total_packets = 0;
2585         if (adapter->rx_ring->buddy) {
2586                 adapter->rx_ring->buddy->total_bytes = 0;
2587                 adapter->rx_ring->buddy->total_packets = 0;
2588         }
2589
2590         if (new_itr != adapter->itr) {
2591                 /* this attempts to bias the interrupt rate towards Bulk
2592                  * by adding intermediate steps when interrupt rate is
2593                  * increasing */
2594                 new_itr = new_itr > adapter->itr ?
2595                              min(adapter->itr + (new_itr >> 2), new_itr) :
2596                              new_itr;
2597                 /* Don't write the value here; it resets the adapter's
2598                  * internal timer, and causes us to delay far longer than
2599                  * we should between interrupts.  Instead, we write the ITR
2600                  * value at the beginning of the next interrupt so the timing
2601                  * ends up being correct.
2602                  */
2603                 adapter->itr = new_itr;
2604                 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2605                 adapter->rx_ring->set_itr = 1;
2606         }
2607
2608         return;
2609 }
2610
2611
2612 #define IGB_TX_FLAGS_CSUM               0x00000001
2613 #define IGB_TX_FLAGS_VLAN               0x00000002
2614 #define IGB_TX_FLAGS_TSO                0x00000004
2615 #define IGB_TX_FLAGS_IPV4               0x00000008
2616 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2617 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2618
2619 static inline int igb_tso_adv(struct igb_adapter *adapter,
2620                               struct igb_ring *tx_ring,
2621                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2622 {
2623         struct e1000_adv_tx_context_desc *context_desc;
2624         unsigned int i;
2625         int err;
2626         struct igb_buffer *buffer_info;
2627         u32 info = 0, tu_cmd = 0;
2628         u32 mss_l4len_idx, l4len;
2629         *hdr_len = 0;
2630
2631         if (skb_header_cloned(skb)) {
2632                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2633                 if (err)
2634                         return err;
2635         }
2636
2637         l4len = tcp_hdrlen(skb);
2638         *hdr_len += l4len;
2639
2640         if (skb->protocol == htons(ETH_P_IP)) {
2641                 struct iphdr *iph = ip_hdr(skb);
2642                 iph->tot_len = 0;
2643                 iph->check = 0;
2644                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2645                                                          iph->daddr, 0,
2646                                                          IPPROTO_TCP,
2647                                                          0);
2648         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2649                 ipv6_hdr(skb)->payload_len = 0;
2650                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2651                                                        &ipv6_hdr(skb)->daddr,
2652                                                        0, IPPROTO_TCP, 0);
2653         }
2654
2655         i = tx_ring->next_to_use;
2656
2657         buffer_info = &tx_ring->buffer_info[i];
2658         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2659         /* VLAN MACLEN IPLEN */
2660         if (tx_flags & IGB_TX_FLAGS_VLAN)
2661                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2662         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2663         *hdr_len += skb_network_offset(skb);
2664         info |= skb_network_header_len(skb);
2665         *hdr_len += skb_network_header_len(skb);
2666         context_desc->vlan_macip_lens = cpu_to_le32(info);
2667
2668         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2669         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2670
2671         if (skb->protocol == htons(ETH_P_IP))
2672                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2673         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2674
2675         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2676
2677         /* MSS L4LEN IDX */
2678         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2679         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2680
2681         /* Context index must be unique per ring. */
2682         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2683                 mss_l4len_idx |= tx_ring->queue_index << 4;
2684
2685         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2686         context_desc->seqnum_seed = 0;
2687
2688         buffer_info->time_stamp = jiffies;
2689         buffer_info->dma = 0;
2690         i++;
2691         if (i == tx_ring->count)
2692                 i = 0;
2693
2694         tx_ring->next_to_use = i;
2695
2696         return true;
2697 }
2698
2699 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2700                                         struct igb_ring *tx_ring,
2701                                         struct sk_buff *skb, u32 tx_flags)
2702 {
2703         struct e1000_adv_tx_context_desc *context_desc;
2704         unsigned int i;
2705         struct igb_buffer *buffer_info;
2706         u32 info = 0, tu_cmd = 0;
2707
2708         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2709             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2710                 i = tx_ring->next_to_use;
2711                 buffer_info = &tx_ring->buffer_info[i];
2712                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2713
2714                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2715                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2716                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2717                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2718                         info |= skb_network_header_len(skb);
2719
2720                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2721
2722                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2723
2724                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2725                         switch (skb->protocol) {
2726                         case __constant_htons(ETH_P_IP):
2727                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2728                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2729                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2730                                 break;
2731                         case __constant_htons(ETH_P_IPV6):
2732                                 /* XXX what about other V6 headers?? */
2733                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2734                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2735                                 break;
2736                         default:
2737                                 if (unlikely(net_ratelimit()))
2738                                         dev_warn(&adapter->pdev->dev,
2739                                             "partial checksum but proto=%x!\n",
2740                                             skb->protocol);
2741                                 break;
2742                         }
2743                 }
2744
2745                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2746                 context_desc->seqnum_seed = 0;
2747                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2748                         context_desc->mss_l4len_idx =
2749                                 cpu_to_le32(tx_ring->queue_index << 4);
2750
2751                 buffer_info->time_stamp = jiffies;
2752                 buffer_info->dma = 0;
2753
2754                 i++;
2755                 if (i == tx_ring->count)
2756                         i = 0;
2757                 tx_ring->next_to_use = i;
2758
2759                 return true;
2760         }
2761
2762
2763         return false;
2764 }
2765
2766 #define IGB_MAX_TXD_PWR 16
2767 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2768
2769 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2770                                  struct igb_ring *tx_ring,
2771                                  struct sk_buff *skb)
2772 {
2773         struct igb_buffer *buffer_info;
2774         unsigned int len = skb_headlen(skb);
2775         unsigned int count = 0, i;
2776         unsigned int f;
2777
2778         i = tx_ring->next_to_use;
2779
2780         buffer_info = &tx_ring->buffer_info[i];
2781         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2782         buffer_info->length = len;
2783         /* set time_stamp *before* dma to help avoid a possible race */
2784         buffer_info->time_stamp = jiffies;
2785         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2786                                           PCI_DMA_TODEVICE);
2787         count++;
2788         i++;
2789         if (i == tx_ring->count)
2790                 i = 0;
2791
2792         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2793                 struct skb_frag_struct *frag;
2794
2795                 frag = &skb_shinfo(skb)->frags[f];
2796                 len = frag->size;
2797
2798                 buffer_info = &tx_ring->buffer_info[i];
2799                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2800                 buffer_info->length = len;
2801                 buffer_info->time_stamp = jiffies;
2802                 buffer_info->dma = pci_map_page(adapter->pdev,
2803                                                 frag->page,
2804                                                 frag->page_offset,
2805                                                 len,
2806                                                 PCI_DMA_TODEVICE);
2807
2808                 count++;
2809                 i++;
2810                 if (i == tx_ring->count)
2811                         i = 0;
2812         }
2813
2814         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2815         tx_ring->buffer_info[i].skb = skb;
2816
2817         return count;
2818 }
2819
2820 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2821                                     struct igb_ring *tx_ring,
2822                                     int tx_flags, int count, u32 paylen,
2823                                     u8 hdr_len)
2824 {
2825         union e1000_adv_tx_desc *tx_desc = NULL;
2826         struct igb_buffer *buffer_info;
2827         u32 olinfo_status = 0, cmd_type_len;
2828         unsigned int i;
2829
2830         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2831                         E1000_ADVTXD_DCMD_DEXT);
2832
2833         if (tx_flags & IGB_TX_FLAGS_VLAN)
2834                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2835
2836         if (tx_flags & IGB_TX_FLAGS_TSO) {
2837                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2838
2839                 /* insert tcp checksum */
2840                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2841
2842                 /* insert ip checksum */
2843                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2844                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2845
2846         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2847                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2848         }
2849
2850         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2851             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2852                          IGB_TX_FLAGS_VLAN)))
2853                 olinfo_status |= tx_ring->queue_index << 4;
2854
2855         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2856
2857         i = tx_ring->next_to_use;
2858         while (count--) {
2859                 buffer_info = &tx_ring->buffer_info[i];
2860                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2861                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2862                 tx_desc->read.cmd_type_len =
2863                         cpu_to_le32(cmd_type_len | buffer_info->length);
2864                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2865                 i++;
2866                 if (i == tx_ring->count)
2867                         i = 0;
2868         }
2869
2870         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2871         /* Force memory writes to complete before letting h/w
2872          * know there are new descriptors to fetch.  (Only
2873          * applicable for weak-ordered memory model archs,
2874          * such as IA-64). */
2875         wmb();
2876
2877         tx_ring->next_to_use = i;
2878         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2879         /* we need this if more than one processor can write to our tail
2880          * at a time, it syncronizes IO on IA64/Altix systems */
2881         mmiowb();
2882 }
2883
2884 static int __igb_maybe_stop_tx(struct net_device *netdev,
2885                                struct igb_ring *tx_ring, int size)
2886 {
2887         struct igb_adapter *adapter = netdev_priv(netdev);
2888
2889         netif_stop_subqueue(netdev, tx_ring->queue_index);
2890
2891         /* Herbert's original patch had:
2892          *  smp_mb__after_netif_stop_queue();
2893          * but since that doesn't exist yet, just open code it. */
2894         smp_mb();
2895
2896         /* We need to check again in a case another CPU has just
2897          * made room available. */
2898         if (IGB_DESC_UNUSED(tx_ring) < size)
2899                 return -EBUSY;
2900
2901         /* A reprieve! */
2902         netif_wake_subqueue(netdev, tx_ring->queue_index);
2903         ++adapter->restart_queue;
2904         return 0;
2905 }
2906
2907 static int igb_maybe_stop_tx(struct net_device *netdev,
2908                              struct igb_ring *tx_ring, int size)
2909 {
2910         if (IGB_DESC_UNUSED(tx_ring) >= size)
2911                 return 0;
2912         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2913 }
2914
2915 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2916
2917 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2918                                    struct net_device *netdev,
2919                                    struct igb_ring *tx_ring)
2920 {
2921         struct igb_adapter *adapter = netdev_priv(netdev);
2922         unsigned int tx_flags = 0;
2923         unsigned int len;
2924         u8 hdr_len = 0;
2925         int tso = 0;
2926
2927         len = skb_headlen(skb);
2928
2929         if (test_bit(__IGB_DOWN, &adapter->state)) {
2930                 dev_kfree_skb_any(skb);
2931                 return NETDEV_TX_OK;
2932         }
2933
2934         if (skb->len <= 0) {
2935                 dev_kfree_skb_any(skb);
2936                 return NETDEV_TX_OK;
2937         }
2938
2939         /* need: 1 descriptor per page,
2940          *       + 2 desc gap to keep tail from touching head,
2941          *       + 1 desc for skb->data,
2942          *       + 1 desc for context descriptor,
2943          * otherwise try next time */
2944         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2945                 /* this is a hard error */
2946                 return NETDEV_TX_BUSY;
2947         }
2948         skb_orphan(skb);
2949
2950         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2951                 tx_flags |= IGB_TX_FLAGS_VLAN;
2952                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2953         }
2954
2955         if (skb->protocol == htons(ETH_P_IP))
2956                 tx_flags |= IGB_TX_FLAGS_IPV4;
2957
2958         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2959                                               &hdr_len) : 0;
2960
2961         if (tso < 0) {
2962                 dev_kfree_skb_any(skb);
2963                 return NETDEV_TX_OK;
2964         }
2965
2966         if (tso)
2967                 tx_flags |= IGB_TX_FLAGS_TSO;
2968         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2969                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2970                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2971
2972         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2973                          igb_tx_map_adv(adapter, tx_ring, skb),
2974                          skb->len, hdr_len);
2975
2976         netdev->trans_start = jiffies;
2977
2978         /* Make sure there is space in the ring for the next send. */
2979         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2980
2981         return NETDEV_TX_OK;
2982 }
2983
2984 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2985 {
2986         struct igb_adapter *adapter = netdev_priv(netdev);
2987         struct igb_ring *tx_ring;
2988
2989         int r_idx = 0;
2990         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
2991         tx_ring = adapter->multi_tx_table[r_idx];
2992
2993         /* This goes back to the question of how to logically map a tx queue
2994          * to a flow.  Right now, performance is impacted slightly negatively
2995          * if using multiple tx queues.  If the stack breaks away from a
2996          * single qdisc implementation, we can look at this again. */
2997         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2998 }
2999
3000 /**
3001  * igb_tx_timeout - Respond to a Tx Hang
3002  * @netdev: network interface device structure
3003  **/
3004 static void igb_tx_timeout(struct net_device *netdev)
3005 {
3006         struct igb_adapter *adapter = netdev_priv(netdev);
3007         struct e1000_hw *hw = &adapter->hw;
3008
3009         /* Do the reset outside of interrupt context */
3010         adapter->tx_timeout_count++;
3011         schedule_work(&adapter->reset_task);
3012         wr32(E1000_EICS, adapter->eims_enable_mask &
3013                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3014 }
3015
3016 static void igb_reset_task(struct work_struct *work)
3017 {
3018         struct igb_adapter *adapter;
3019         adapter = container_of(work, struct igb_adapter, reset_task);
3020
3021         igb_reinit_locked(adapter);
3022 }
3023
3024 /**
3025  * igb_get_stats - Get System Network Statistics
3026  * @netdev: network interface device structure
3027  *
3028  * Returns the address of the device statistics structure.
3029  * The statistics are actually updated from the timer callback.
3030  **/
3031 static struct net_device_stats *
3032 igb_get_stats(struct net_device *netdev)
3033 {
3034         struct igb_adapter *adapter = netdev_priv(netdev);
3035
3036         /* only return the current stats */
3037         return &adapter->net_stats;
3038 }
3039
3040 /**
3041  * igb_change_mtu - Change the Maximum Transfer Unit
3042  * @netdev: network interface device structure
3043  * @new_mtu: new value for maximum frame size
3044  *
3045  * Returns 0 on success, negative on failure
3046  **/
3047 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3048 {
3049         struct igb_adapter *adapter = netdev_priv(netdev);
3050         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3051
3052         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3053             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3054                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3055                 return -EINVAL;
3056         }
3057
3058 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3059         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3060                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3061                 return -EINVAL;
3062         }
3063
3064         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3065                 msleep(1);
3066         /* igb_down has a dependency on max_frame_size */
3067         adapter->max_frame_size = max_frame;
3068         if (netif_running(netdev))
3069                 igb_down(adapter);
3070
3071         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3072          * means we reserve 2 more, this pushes us to allocate from the next
3073          * larger slab size.
3074          * i.e. RXBUFFER_2048 --> size-4096 slab
3075          */
3076
3077         if (max_frame <= IGB_RXBUFFER_256)
3078                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3079         else if (max_frame <= IGB_RXBUFFER_512)
3080                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3081         else if (max_frame <= IGB_RXBUFFER_1024)
3082                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3083         else if (max_frame <= IGB_RXBUFFER_2048)
3084                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3085         else
3086 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3087                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3088 #else
3089                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3090 #endif
3091         /* adjust allocation if LPE protects us, and we aren't using SBP */
3092         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3093              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3094                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3095
3096         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3097                  netdev->mtu, new_mtu);
3098         netdev->mtu = new_mtu;
3099
3100         if (netif_running(netdev))
3101                 igb_up(adapter);
3102         else
3103                 igb_reset(adapter);
3104
3105         clear_bit(__IGB_RESETTING, &adapter->state);
3106
3107         return 0;
3108 }
3109
3110 /**
3111  * igb_update_stats - Update the board statistics counters
3112  * @adapter: board private structure
3113  **/
3114
3115 void igb_update_stats(struct igb_adapter *adapter)
3116 {
3117         struct e1000_hw *hw = &adapter->hw;
3118         struct pci_dev *pdev = adapter->pdev;
3119         u16 phy_tmp;
3120
3121 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3122
3123         /*
3124          * Prevent stats update while adapter is being reset, or if the pci
3125          * connection is down.
3126          */
3127         if (adapter->link_speed == 0)
3128                 return;
3129         if (pci_channel_offline(pdev))
3130                 return;
3131
3132         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3133         adapter->stats.gprc += rd32(E1000_GPRC);
3134         adapter->stats.gorc += rd32(E1000_GORCL);
3135         rd32(E1000_GORCH); /* clear GORCL */
3136         adapter->stats.bprc += rd32(E1000_BPRC);
3137         adapter->stats.mprc += rd32(E1000_MPRC);
3138         adapter->stats.roc += rd32(E1000_ROC);
3139
3140         adapter->stats.prc64 += rd32(E1000_PRC64);
3141         adapter->stats.prc127 += rd32(E1000_PRC127);
3142         adapter->stats.prc255 += rd32(E1000_PRC255);
3143         adapter->stats.prc511 += rd32(E1000_PRC511);
3144         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3145         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3146         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3147         adapter->stats.sec += rd32(E1000_SEC);
3148
3149         adapter->stats.mpc += rd32(E1000_MPC);
3150         adapter->stats.scc += rd32(E1000_SCC);
3151         adapter->stats.ecol += rd32(E1000_ECOL);
3152         adapter->stats.mcc += rd32(E1000_MCC);
3153         adapter->stats.latecol += rd32(E1000_LATECOL);
3154         adapter->stats.dc += rd32(E1000_DC);
3155         adapter->stats.rlec += rd32(E1000_RLEC);
3156         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3157         adapter->stats.xontxc += rd32(E1000_XONTXC);
3158         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3159         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3160         adapter->stats.fcruc += rd32(E1000_FCRUC);
3161         adapter->stats.gptc += rd32(E1000_GPTC);
3162         adapter->stats.gotc += rd32(E1000_GOTCL);
3163         rd32(E1000_GOTCH); /* clear GOTCL */
3164         adapter->stats.rnbc += rd32(E1000_RNBC);
3165         adapter->stats.ruc += rd32(E1000_RUC);
3166         adapter->stats.rfc += rd32(E1000_RFC);
3167         adapter->stats.rjc += rd32(E1000_RJC);
3168         adapter->stats.tor += rd32(E1000_TORH);
3169         adapter->stats.tot += rd32(E1000_TOTH);
3170         adapter->stats.tpr += rd32(E1000_TPR);
3171
3172         adapter->stats.ptc64 += rd32(E1000_PTC64);
3173         adapter->stats.ptc127 += rd32(E1000_PTC127);
3174         adapter->stats.ptc255 += rd32(E1000_PTC255);
3175         adapter->stats.ptc511 += rd32(E1000_PTC511);
3176         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3177         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3178
3179         adapter->stats.mptc += rd32(E1000_MPTC);
3180         adapter->stats.bptc += rd32(E1000_BPTC);
3181
3182         /* used for adaptive IFS */
3183
3184         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3185         adapter->stats.tpt += hw->mac.tx_packet_delta;
3186         hw->mac.collision_delta = rd32(E1000_COLC);
3187         adapter->stats.colc += hw->mac.collision_delta;
3188
3189         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3190         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3191         adapter->stats.tncrs += rd32(E1000_TNCRS);
3192         adapter->stats.tsctc += rd32(E1000_TSCTC);
3193         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3194
3195         adapter->stats.iac += rd32(E1000_IAC);
3196         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3197         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3198         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3199         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3200         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3201         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3202         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3203         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3204
3205         /* Fill out the OS statistics structure */
3206         adapter->net_stats.multicast = adapter->stats.mprc;
3207         adapter->net_stats.collisions = adapter->stats.colc;
3208
3209         /* Rx Errors */
3210
3211         /* RLEC on some newer hardware can be incorrect so build
3212         * our own version based on RUC and ROC */
3213         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3214                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3215                 adapter->stats.ruc + adapter->stats.roc +
3216                 adapter->stats.cexterr;
3217         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3218                                               adapter->stats.roc;
3219         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3220         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3221         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3222
3223         /* Tx Errors */
3224         adapter->net_stats.tx_errors = adapter->stats.ecol +
3225                                        adapter->stats.latecol;
3226         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3227         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3228         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3229
3230         /* Tx Dropped needs to be maintained elsewhere */
3231
3232         /* Phy Stats */
3233         if (hw->phy.media_type == e1000_media_type_copper) {
3234                 if ((adapter->link_speed == SPEED_1000) &&
3235                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3236                                               &phy_tmp))) {
3237                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3238                         adapter->phy_stats.idle_errors += phy_tmp;
3239                 }
3240         }
3241
3242         /* Management Stats */
3243         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3244         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3245         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3246 }
3247
3248
3249 static irqreturn_t igb_msix_other(int irq, void *data)
3250 {
3251         struct net_device *netdev = data;
3252         struct igb_adapter *adapter = netdev_priv(netdev);
3253         struct e1000_hw *hw = &adapter->hw;
3254         u32 icr = rd32(E1000_ICR);
3255
3256         /* reading ICR causes bit 31 of EICR to be cleared */
3257         if (!(icr & E1000_ICR_LSC))
3258                 goto no_link_interrupt;
3259         hw->mac.get_link_status = 1;
3260         /* guard against interrupt when we're going down */
3261         if (!test_bit(__IGB_DOWN, &adapter->state))
3262                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3263
3264 no_link_interrupt:
3265         wr32(E1000_IMS, E1000_IMS_LSC);
3266         wr32(E1000_EIMS, adapter->eims_other);
3267
3268         return IRQ_HANDLED;
3269 }
3270
3271 static irqreturn_t igb_msix_tx(int irq, void *data)
3272 {
3273         struct igb_ring *tx_ring = data;
3274         struct igb_adapter *adapter = tx_ring->adapter;
3275         struct e1000_hw *hw = &adapter->hw;
3276
3277 #ifdef CONFIG_DCA
3278         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3279                 igb_update_tx_dca(tx_ring);
3280 #endif
3281         tx_ring->total_bytes = 0;
3282         tx_ring->total_packets = 0;
3283
3284         /* auto mask will automatically reenable the interrupt when we write
3285          * EICS */
3286         if (!igb_clean_tx_irq(tx_ring))
3287                 /* Ring was not completely cleaned, so fire another interrupt */
3288                 wr32(E1000_EICS, tx_ring->eims_value);
3289         else
3290                 wr32(E1000_EIMS, tx_ring->eims_value);
3291
3292         return IRQ_HANDLED;
3293 }
3294
3295 static void igb_write_itr(struct igb_ring *ring)
3296 {
3297         struct e1000_hw *hw = &ring->adapter->hw;
3298         if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3299                 switch (hw->mac.type) {
3300                 case e1000_82576:
3301                         wr32(ring->itr_register,
3302                              ring->itr_val |
3303                              0x80000000);
3304                         break;
3305                 default:
3306                         wr32(ring->itr_register,
3307                              ring->itr_val |
3308                              (ring->itr_val << 16));
3309                         break;
3310                 }
3311                 ring->set_itr = 0;
3312         }
3313 }
3314
3315 static irqreturn_t igb_msix_rx(int irq, void *data)
3316 {
3317         struct igb_ring *rx_ring = data;
3318         struct igb_adapter *adapter = rx_ring->adapter;
3319
3320         /* Write the ITR value calculated at the end of the
3321          * previous interrupt.
3322          */
3323
3324         igb_write_itr(rx_ring);
3325
3326         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3327                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3328
3329 #ifdef CONFIG_DCA
3330         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3331                 igb_update_rx_dca(rx_ring);
3332 #endif
3333                 return IRQ_HANDLED;
3334 }
3335
3336 #ifdef CONFIG_DCA
3337 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3338 {
3339         u32 dca_rxctrl;
3340         struct igb_adapter *adapter = rx_ring->adapter;
3341         struct e1000_hw *hw = &adapter->hw;
3342         int cpu = get_cpu();
3343         int q = rx_ring - adapter->rx_ring;
3344
3345         if (rx_ring->cpu != cpu) {
3346                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3347                 if (hw->mac.type == e1000_82576) {
3348                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3349                         dca_rxctrl |= dca_get_tag(cpu) <<
3350                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3351                 } else {
3352                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3353                         dca_rxctrl |= dca_get_tag(cpu);
3354                 }
3355                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3356                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3357                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3358                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3359                 rx_ring->cpu = cpu;
3360         }
3361         put_cpu();
3362 }
3363
3364 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3365 {
3366         u32 dca_txctrl;
3367         struct igb_adapter *adapter = tx_ring->adapter;
3368         struct e1000_hw *hw = &adapter->hw;
3369         int cpu = get_cpu();
3370         int q = tx_ring - adapter->tx_ring;
3371
3372         if (tx_ring->cpu != cpu) {
3373                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3374                 if (hw->mac.type == e1000_82576) {
3375                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3376                         dca_txctrl |= dca_get_tag(cpu) <<
3377                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3378                 } else {
3379                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3380                         dca_txctrl |= dca_get_tag(cpu);
3381                 }
3382                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3383                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3384                 tx_ring->cpu = cpu;
3385         }
3386         put_cpu();
3387 }
3388
3389 static void igb_setup_dca(struct igb_adapter *adapter)
3390 {
3391         int i;
3392
3393         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3394                 return;
3395
3396         for (i = 0; i < adapter->num_tx_queues; i++) {
3397                 adapter->tx_ring[i].cpu = -1;
3398                 igb_update_tx_dca(&adapter->tx_ring[i]);
3399         }
3400         for (i = 0; i < adapter->num_rx_queues; i++) {
3401                 adapter->rx_ring[i].cpu = -1;
3402                 igb_update_rx_dca(&adapter->rx_ring[i]);
3403         }
3404 }
3405
3406 static int __igb_notify_dca(struct device *dev, void *data)
3407 {
3408         struct net_device *netdev = dev_get_drvdata(dev);
3409         struct igb_adapter *adapter = netdev_priv(netdev);
3410         struct e1000_hw *hw = &adapter->hw;
3411         unsigned long event = *(unsigned long *)data;
3412
3413         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3414                 goto out;
3415
3416         switch (event) {
3417         case DCA_PROVIDER_ADD:
3418                 /* if already enabled, don't do it again */
3419                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3420                         break;
3421                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3422                 /* Always use CB2 mode, difference is masked
3423                  * in the CB driver. */
3424                 wr32(E1000_DCA_CTRL, 2);
3425                 if (dca_add_requester(dev) == 0) {
3426                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3427                         igb_setup_dca(adapter);
3428                         break;
3429                 }
3430                 /* Fall Through since DCA is disabled. */
3431         case DCA_PROVIDER_REMOVE:
3432                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3433                         /* without this a class_device is left
3434                          * hanging around in the sysfs model */
3435                         dca_remove_requester(dev);
3436                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3437                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3438                         wr32(E1000_DCA_CTRL, 1);
3439                 }
3440                 break;
3441         }
3442 out:
3443         return 0;
3444 }
3445
3446 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3447                           void *p)
3448 {
3449         int ret_val;
3450
3451         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3452                                          __igb_notify_dca);
3453
3454         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3455 }
3456 #endif /* CONFIG_DCA */
3457
3458 /**
3459  * igb_intr_msi - Interrupt Handler
3460  * @irq: interrupt number
3461  * @data: pointer to a network interface device structure
3462  **/
3463 static irqreturn_t igb_intr_msi(int irq, void *data)
3464 {
3465         struct net_device *netdev = data;
3466         struct igb_adapter *adapter = netdev_priv(netdev);
3467         struct e1000_hw *hw = &adapter->hw;
3468         /* read ICR disables interrupts using IAM */
3469         u32 icr = rd32(E1000_ICR);
3470
3471         igb_write_itr(adapter->rx_ring);
3472
3473         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3474                 hw->mac.get_link_status = 1;
3475                 if (!test_bit(__IGB_DOWN, &adapter->state))
3476                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3477         }
3478
3479         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3480
3481         return IRQ_HANDLED;
3482 }
3483
3484 /**
3485  * igb_intr - Interrupt Handler
3486  * @irq: interrupt number
3487  * @data: pointer to a network interface device structure
3488  **/
3489 static irqreturn_t igb_intr(int irq, void *data)
3490 {
3491         struct net_device *netdev = data;
3492         struct igb_adapter *adapter = netdev_priv(netdev);
3493         struct e1000_hw *hw = &adapter->hw;
3494         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3495          * need for the IMC write */
3496         u32 icr = rd32(E1000_ICR);
3497         u32 eicr = 0;
3498         if (!icr)
3499                 return IRQ_NONE;  /* Not our interrupt */
3500
3501         igb_write_itr(adapter->rx_ring);
3502
3503         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3504          * not set, then the adapter didn't send an interrupt */
3505         if (!(icr & E1000_ICR_INT_ASSERTED))
3506                 return IRQ_NONE;
3507
3508         eicr = rd32(E1000_EICR);
3509
3510         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3511                 hw->mac.get_link_status = 1;
3512                 /* guard against interrupt when we're going down */
3513                 if (!test_bit(__IGB_DOWN, &adapter->state))
3514                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3515         }
3516
3517         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3518
3519         return IRQ_HANDLED;
3520 }
3521
3522 /**
3523  * igb_poll - NAPI Rx polling callback
3524  * @napi: napi polling structure
3525  * @budget: count of how many packets we should handle
3526  **/
3527 static int igb_poll(struct napi_struct *napi, int budget)
3528 {
3529         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3530         struct igb_adapter *adapter = rx_ring->adapter;
3531         struct net_device *netdev = adapter->netdev;
3532         int tx_clean_complete, work_done = 0;
3533
3534         /* this poll routine only supports one tx and one rx queue */
3535 #ifdef CONFIG_DCA
3536         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3537                 igb_update_tx_dca(&adapter->tx_ring[0]);
3538 #endif
3539         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3540
3541 #ifdef CONFIG_DCA
3542         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3543                 igb_update_rx_dca(&adapter->rx_ring[0]);
3544 #endif
3545         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3546
3547         /* If no Tx and not enough Rx work done, exit the polling mode */
3548         if ((tx_clean_complete && (work_done < budget)) ||
3549             !netif_running(netdev)) {
3550                 if (adapter->itr_setting & 3)
3551                         igb_set_itr(adapter);
3552                 netif_rx_complete(netdev, napi);
3553                 if (!test_bit(__IGB_DOWN, &adapter->state))
3554                         igb_irq_enable(adapter);
3555                 return 0;
3556         }
3557
3558         return 1;
3559 }
3560
3561 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3562 {
3563         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3564         struct igb_adapter *adapter = rx_ring->adapter;
3565         struct e1000_hw *hw = &adapter->hw;
3566         struct net_device *netdev = adapter->netdev;
3567         int work_done = 0;
3568
3569         /* Keep link state information with original netdev */
3570         if (!netif_carrier_ok(netdev))
3571                 goto quit_polling;
3572
3573 #ifdef CONFIG_DCA
3574         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3575                 igb_update_rx_dca(rx_ring);
3576 #endif
3577         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3578
3579
3580         /* If not enough Rx work done, exit the polling mode */
3581         if ((work_done == 0) || !netif_running(netdev)) {
3582 quit_polling:
3583                 netif_rx_complete(netdev, napi);
3584
3585                 if (adapter->itr_setting & 3) {
3586                         if (adapter->num_rx_queues == 1)
3587                                 igb_set_itr(adapter);
3588                         else
3589                                 igb_update_ring_itr(rx_ring);
3590                 }
3591
3592                 if (!test_bit(__IGB_DOWN, &adapter->state))
3593                         wr32(E1000_EIMS, rx_ring->eims_value);
3594
3595                 return 0;
3596         }
3597
3598         return 1;
3599 }
3600
3601 static inline u32 get_head(struct igb_ring *tx_ring)
3602 {
3603         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3604         return le32_to_cpu(*(volatile __le32 *)end);
3605 }
3606
3607 /**
3608  * igb_clean_tx_irq - Reclaim resources after transmit completes
3609  * @adapter: board private structure
3610  * returns true if ring is completely cleaned
3611  **/
3612 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3613 {
3614         struct igb_adapter *adapter = tx_ring->adapter;
3615         struct e1000_hw *hw = &adapter->hw;
3616         struct net_device *netdev = adapter->netdev;
3617         struct e1000_tx_desc *tx_desc;
3618         struct igb_buffer *buffer_info;
3619         struct sk_buff *skb;
3620         unsigned int i;
3621         u32 head, oldhead;
3622         unsigned int count = 0;
3623         bool cleaned = false;
3624         bool retval = true;
3625         unsigned int total_bytes = 0, total_packets = 0;
3626
3627         rmb();
3628         head = get_head(tx_ring);
3629         i = tx_ring->next_to_clean;
3630         while (1) {
3631                 while (i != head) {
3632                         cleaned = true;
3633                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3634                         buffer_info = &tx_ring->buffer_info[i];
3635                         skb = buffer_info->skb;
3636
3637                         if (skb) {
3638                                 unsigned int segs, bytecount;
3639                                 /* gso_segs is currently only valid for tcp */
3640                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3641                                 /* multiply data chunks by size of headers */
3642                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3643                                             skb->len;
3644                                 total_packets += segs;
3645                                 total_bytes += bytecount;
3646                         }
3647
3648                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3649                         tx_desc->upper.data = 0;
3650
3651                         i++;
3652                         if (i == tx_ring->count)
3653                                 i = 0;
3654
3655                         count++;
3656                         if (count == IGB_MAX_TX_CLEAN) {
3657                                 retval = false;
3658                                 goto done_cleaning;
3659                         }
3660                 }
3661                 oldhead = head;
3662                 rmb();
3663                 head = get_head(tx_ring);
3664                 if (head == oldhead)
3665                         goto done_cleaning;
3666         }  /* while (1) */
3667
3668 done_cleaning:
3669         tx_ring->next_to_clean = i;
3670
3671         if (unlikely(cleaned &&
3672                      netif_carrier_ok(netdev) &&
3673                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3674                 /* Make sure that anybody stopping the queue after this
3675                  * sees the new next_to_clean.
3676                  */
3677                 smp_mb();
3678                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3679                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3680                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3681                         ++adapter->restart_queue;
3682                 }
3683         }
3684
3685         if (tx_ring->detect_tx_hung) {
3686                 /* Detect a transmit hang in hardware, this serializes the
3687                  * check with the clearing of time_stamp and movement of i */
3688                 tx_ring->detect_tx_hung = false;
3689                 if (tx_ring->buffer_info[i].time_stamp &&
3690                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3691                                (adapter->tx_timeout_factor * HZ))
3692                     && !(rd32(E1000_STATUS) &
3693                          E1000_STATUS_TXOFF)) {
3694
3695                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3696                         /* detected Tx unit hang */
3697                         dev_err(&adapter->pdev->dev,
3698                                 "Detected Tx Unit Hang\n"
3699                                 "  Tx Queue             <%d>\n"
3700                                 "  TDH                  <%x>\n"
3701                                 "  TDT                  <%x>\n"
3702                                 "  next_to_use          <%x>\n"
3703                                 "  next_to_clean        <%x>\n"
3704                                 "  head (WB)            <%x>\n"
3705                                 "buffer_info[next_to_clean]\n"
3706                                 "  time_stamp           <%lx>\n"
3707                                 "  jiffies              <%lx>\n"
3708                                 "  desc.status          <%x>\n",
3709                                 tx_ring->queue_index,
3710                                 readl(adapter->hw.hw_addr + tx_ring->head),
3711                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3712                                 tx_ring->next_to_use,
3713                                 tx_ring->next_to_clean,
3714                                 head,
3715                                 tx_ring->buffer_info[i].time_stamp,
3716                                 jiffies,
3717                                 tx_desc->upper.fields.status);
3718                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3719                 }
3720         }
3721         tx_ring->total_bytes += total_bytes;
3722         tx_ring->total_packets += total_packets;
3723         tx_ring->tx_stats.bytes += total_bytes;
3724         tx_ring->tx_stats.packets += total_packets;
3725         adapter->net_stats.tx_bytes += total_bytes;
3726         adapter->net_stats.tx_packets += total_packets;
3727         return retval;
3728 }
3729
3730 #ifdef CONFIG_IGB_LRO
3731  /**
3732  * igb_get_skb_hdr - helper function for LRO header processing
3733  * @skb: pointer to sk_buff to be added to LRO packet
3734  * @iphdr: pointer to ip header structure
3735  * @tcph: pointer to tcp header structure
3736  * @hdr_flags: pointer to header flags
3737  * @priv: pointer to the receive descriptor for the current sk_buff
3738  **/
3739 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3740                            u64 *hdr_flags, void *priv)
3741 {
3742         union e1000_adv_rx_desc *rx_desc = priv;
3743         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3744                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3745
3746         /* Verify that this is a valid IPv4 TCP packet */
3747         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3748                           E1000_RXDADV_PKTTYPE_TCP))
3749                 return -1;
3750
3751         /* Set network headers */
3752         skb_reset_network_header(skb);
3753         skb_set_transport_header(skb, ip_hdrlen(skb));
3754         *iphdr = ip_hdr(skb);
3755         *tcph = tcp_hdr(skb);
3756         *hdr_flags = LRO_IPV4 | LRO_TCP;
3757
3758         return 0;
3759
3760 }
3761 #endif /* CONFIG_IGB_LRO */
3762
3763 /**
3764  * igb_receive_skb - helper function to handle rx indications
3765  * @ring: pointer to receive ring receving this packet
3766  * @status: descriptor status field as written by hardware
3767  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3768  * @skb: pointer to sk_buff to be indicated to stack
3769  **/
3770 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3771                             union e1000_adv_rx_desc * rx_desc,
3772                             struct sk_buff *skb)
3773 {
3774         struct igb_adapter * adapter = ring->adapter;
3775         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3776
3777 #ifdef CONFIG_IGB_LRO
3778         if (adapter->netdev->features & NETIF_F_LRO &&
3779             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3780                 if (vlan_extracted)
3781                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3782                                            adapter->vlgrp,
3783                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3784                                            rx_desc);
3785                 else
3786                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3787                 ring->lro_used = 1;
3788         } else {
3789 #endif
3790                 if (vlan_extracted)
3791                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3792                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3793                 else
3794
3795                         netif_receive_skb(skb);
3796 #ifdef CONFIG_IGB_LRO
3797         }
3798 #endif
3799 }
3800
3801
3802 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3803                                        u32 status_err, struct sk_buff *skb)
3804 {
3805         skb->ip_summed = CHECKSUM_NONE;
3806
3807         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3808         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3809                 return;
3810         /* TCP/UDP checksum error bit is set */
3811         if (status_err &
3812             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3813                 /* let the stack verify checksum errors */
3814                 adapter->hw_csum_err++;
3815                 return;
3816         }
3817         /* It must be a TCP or UDP packet with a valid checksum */
3818         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3819                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3820
3821         adapter->hw_csum_good++;
3822 }
3823
3824 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3825                                  int *work_done, int budget)
3826 {
3827         struct igb_adapter *adapter = rx_ring->adapter;
3828         struct net_device *netdev = adapter->netdev;
3829         struct pci_dev *pdev = adapter->pdev;
3830         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3831         struct igb_buffer *buffer_info , *next_buffer;
3832         struct sk_buff *skb;
3833         unsigned int i;
3834         u32 length, hlen, staterr;
3835         bool cleaned = false;
3836         int cleaned_count = 0;
3837         unsigned int total_bytes = 0, total_packets = 0;
3838
3839         i = rx_ring->next_to_clean;
3840         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3841         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3842
3843         while (staterr & E1000_RXD_STAT_DD) {
3844                 if (*work_done >= budget)
3845                         break;
3846                 (*work_done)++;
3847                 buffer_info = &rx_ring->buffer_info[i];
3848
3849                 /* HW will not DMA in data larger than the given buffer, even
3850                  * if it parses the (NFS, of course) header to be larger.  In
3851                  * that case, it fills the header buffer and spills the rest
3852                  * into the page.
3853                  */
3854                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3855                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3856                 if (hlen > adapter->rx_ps_hdr_size)
3857                         hlen = adapter->rx_ps_hdr_size;
3858
3859                 length = le16_to_cpu(rx_desc->wb.upper.length);
3860                 cleaned = true;
3861                 cleaned_count++;
3862
3863                 skb = buffer_info->skb;
3864                 prefetch(skb->data - NET_IP_ALIGN);
3865                 buffer_info->skb = NULL;
3866                 if (!adapter->rx_ps_hdr_size) {
3867                         pci_unmap_single(pdev, buffer_info->dma,
3868                                          adapter->rx_buffer_len +
3869                                            NET_IP_ALIGN,
3870                                          PCI_DMA_FROMDEVICE);
3871                         skb_put(skb, length);
3872                         goto send_up;
3873                 }
3874
3875                 if (!skb_shinfo(skb)->nr_frags) {
3876                         pci_unmap_single(pdev, buffer_info->dma,
3877                                          adapter->rx_ps_hdr_size +
3878                                            NET_IP_ALIGN,
3879                                          PCI_DMA_FROMDEVICE);
3880                         skb_put(skb, hlen);
3881                 }
3882
3883                 if (length) {
3884                         pci_unmap_page(pdev, buffer_info->page_dma,
3885                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3886                         buffer_info->page_dma = 0;
3887
3888                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3889                                                 buffer_info->page,
3890                                                 buffer_info->page_offset,
3891                                                 length);
3892
3893                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3894                             (page_count(buffer_info->page) != 1))
3895                                 buffer_info->page = NULL;
3896                         else
3897                                 get_page(buffer_info->page);
3898
3899                         skb->len += length;
3900                         skb->data_len += length;
3901
3902                         skb->truesize += length;
3903                 }
3904 send_up:
3905                 i++;
3906                 if (i == rx_ring->count)
3907                         i = 0;
3908                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3909                 prefetch(next_rxd);
3910                 next_buffer = &rx_ring->buffer_info[i];
3911
3912                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3913                         buffer_info->skb = xchg(&next_buffer->skb, skb);
3914                         buffer_info->dma = xchg(&next_buffer->dma, 0);
3915                         goto next_desc;
3916                 }
3917
3918                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3919                         dev_kfree_skb_irq(skb);
3920                         goto next_desc;
3921                 }
3922
3923                 total_bytes += skb->len;
3924                 total_packets++;
3925
3926                 igb_rx_checksum_adv(adapter, staterr, skb);
3927
3928                 skb->protocol = eth_type_trans(skb, netdev);
3929
3930                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3931
3932                 netdev->last_rx = jiffies;
3933
3934 next_desc:
3935                 rx_desc->wb.upper.status_error = 0;
3936
3937                 /* return some buffers to hardware, one at a time is too slow */
3938                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3939                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3940                         cleaned_count = 0;
3941                 }
3942
3943                 /* use prefetched values */
3944                 rx_desc = next_rxd;
3945                 buffer_info = next_buffer;
3946
3947                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3948         }
3949
3950         rx_ring->next_to_clean = i;
3951         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3952
3953 #ifdef CONFIG_IGB_LRO
3954         if (rx_ring->lro_used) {
3955                 lro_flush_all(&rx_ring->lro_mgr);
3956                 rx_ring->lro_used = 0;
3957         }
3958 #endif
3959
3960         if (cleaned_count)
3961                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3962
3963         rx_ring->total_packets += total_packets;
3964         rx_ring->total_bytes += total_bytes;
3965         rx_ring->rx_stats.packets += total_packets;
3966         rx_ring->rx_stats.bytes += total_bytes;
3967         adapter->net_stats.rx_bytes += total_bytes;
3968         adapter->net_stats.rx_packets += total_packets;
3969         return cleaned;
3970 }
3971
3972
3973 /**
3974  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3975  * @adapter: address of board private structure
3976  **/
3977 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3978                                      int cleaned_count)
3979 {
3980         struct igb_adapter *adapter = rx_ring->adapter;
3981         struct net_device *netdev = adapter->netdev;
3982         struct pci_dev *pdev = adapter->pdev;
3983         union e1000_adv_rx_desc *rx_desc;
3984         struct igb_buffer *buffer_info;
3985         struct sk_buff *skb;
3986         unsigned int i;
3987
3988         i = rx_ring->next_to_use;
3989         buffer_info = &rx_ring->buffer_info[i];
3990
3991         while (cleaned_count--) {
3992                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3993
3994                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
3995                         if (!buffer_info->page) {
3996                                 buffer_info->page = alloc_page(GFP_ATOMIC);
3997                                 if (!buffer_info->page) {
3998                                         adapter->alloc_rx_buff_failed++;
3999                                         goto no_buffers;
4000                                 }
4001                                 buffer_info->page_offset = 0;
4002                         } else {
4003                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4004                         }
4005                         buffer_info->page_dma =
4006                                 pci_map_page(pdev,
4007                                              buffer_info->page,
4008                                              buffer_info->page_offset,
4009                                              PAGE_SIZE / 2,
4010                                              PCI_DMA_FROMDEVICE);
4011                 }
4012
4013                 if (!buffer_info->skb) {
4014                         int bufsz;
4015
4016                         if (adapter->rx_ps_hdr_size)
4017                                 bufsz = adapter->rx_ps_hdr_size;
4018                         else
4019                                 bufsz = adapter->rx_buffer_len;
4020                         bufsz += NET_IP_ALIGN;
4021                         skb = netdev_alloc_skb(netdev, bufsz);
4022
4023                         if (!skb) {
4024                                 adapter->alloc_rx_buff_failed++;
4025                                 goto no_buffers;
4026                         }
4027
4028                         /* Make buffer alignment 2 beyond a 16 byte boundary
4029                          * this will result in a 16 byte aligned IP header after
4030                          * the 14 byte MAC header is removed
4031                          */
4032                         skb_reserve(skb, NET_IP_ALIGN);
4033
4034                         buffer_info->skb = skb;
4035                         buffer_info->dma = pci_map_single(pdev, skb->data,
4036                                                           bufsz,
4037                                                           PCI_DMA_FROMDEVICE);
4038
4039                 }
4040                 /* Refresh the desc even if buffer_addrs didn't change because
4041                  * each write-back erases this info. */
4042                 if (adapter->rx_ps_hdr_size) {
4043                         rx_desc->read.pkt_addr =
4044                              cpu_to_le64(buffer_info->page_dma);
4045                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4046                 } else {
4047                         rx_desc->read.pkt_addr =
4048                              cpu_to_le64(buffer_info->dma);
4049                         rx_desc->read.hdr_addr = 0;
4050                 }
4051
4052                 i++;
4053                 if (i == rx_ring->count)
4054                         i = 0;
4055                 buffer_info = &rx_ring->buffer_info[i];
4056         }
4057
4058 no_buffers:
4059         if (rx_ring->next_to_use != i) {
4060                 rx_ring->next_to_use = i;
4061                 if (i == 0)
4062                         i = (rx_ring->count - 1);
4063                 else
4064                         i--;
4065
4066                 /* Force memory writes to complete before letting h/w
4067                  * know there are new descriptors to fetch.  (Only
4068                  * applicable for weak-ordered memory model archs,
4069                  * such as IA-64). */
4070                 wmb();
4071                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4072         }
4073 }
4074
4075 /**
4076  * igb_mii_ioctl -
4077  * @netdev:
4078  * @ifreq:
4079  * @cmd:
4080  **/
4081 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4082 {
4083         struct igb_adapter *adapter = netdev_priv(netdev);
4084         struct mii_ioctl_data *data = if_mii(ifr);
4085
4086         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4087                 return -EOPNOTSUPP;
4088
4089         switch (cmd) {
4090         case SIOCGMIIPHY:
4091                 data->phy_id = adapter->hw.phy.addr;
4092                 break;
4093         case SIOCGMIIREG:
4094                 if (!capable(CAP_NET_ADMIN))
4095                         return -EPERM;
4096                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4097                                                      data->reg_num
4098                                                      & 0x1F, &data->val_out))
4099                         return -EIO;
4100                 break;
4101         case SIOCSMIIREG:
4102         default:
4103                 return -EOPNOTSUPP;
4104         }
4105         return 0;
4106 }
4107
4108 /**
4109  * igb_ioctl -
4110  * @netdev:
4111  * @ifreq:
4112  * @cmd:
4113  **/
4114 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4115 {
4116         switch (cmd) {
4117         case SIOCGMIIPHY:
4118         case SIOCGMIIREG:
4119         case SIOCSMIIREG:
4120                 return igb_mii_ioctl(netdev, ifr, cmd);
4121         default:
4122                 return -EOPNOTSUPP;
4123         }
4124 }
4125
4126 static void igb_vlan_rx_register(struct net_device *netdev,
4127                                  struct vlan_group *grp)
4128 {
4129         struct igb_adapter *adapter = netdev_priv(netdev);
4130         struct e1000_hw *hw = &adapter->hw;
4131         u32 ctrl, rctl;
4132
4133         igb_irq_disable(adapter);
4134         adapter->vlgrp = grp;
4135
4136         if (grp) {
4137                 /* enable VLAN tag insert/strip */
4138                 ctrl = rd32(E1000_CTRL);
4139                 ctrl |= E1000_CTRL_VME;
4140                 wr32(E1000_CTRL, ctrl);
4141
4142                 /* enable VLAN receive filtering */
4143                 rctl = rd32(E1000_RCTL);
4144                 rctl &= ~E1000_RCTL_CFIEN;
4145                 wr32(E1000_RCTL, rctl);
4146                 igb_update_mng_vlan(adapter);
4147                 wr32(E1000_RLPML,
4148                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4149         } else {
4150                 /* disable VLAN tag insert/strip */
4151                 ctrl = rd32(E1000_CTRL);
4152                 ctrl &= ~E1000_CTRL_VME;
4153                 wr32(E1000_CTRL, ctrl);
4154
4155                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4156                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4157                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4158                 }
4159                 wr32(E1000_RLPML,
4160                                 adapter->max_frame_size);
4161         }
4162
4163         if (!test_bit(__IGB_DOWN, &adapter->state))
4164                 igb_irq_enable(adapter);
4165 }
4166
4167 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4168 {
4169         struct igb_adapter *adapter = netdev_priv(netdev);
4170         struct e1000_hw *hw = &adapter->hw;
4171         u32 vfta, index;
4172
4173         if ((adapter->hw.mng_cookie.status &
4174              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4175             (vid == adapter->mng_vlan_id))
4176                 return;
4177         /* add VID to filter table */
4178         index = (vid >> 5) & 0x7F;
4179         vfta = array_rd32(E1000_VFTA, index);
4180         vfta |= (1 << (vid & 0x1F));
4181         igb_write_vfta(&adapter->hw, index, vfta);
4182 }
4183
4184 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4185 {
4186         struct igb_adapter *adapter = netdev_priv(netdev);
4187         struct e1000_hw *hw = &adapter->hw;
4188         u32 vfta, index;
4189
4190         igb_irq_disable(adapter);
4191         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4192
4193         if (!test_bit(__IGB_DOWN, &adapter->state))
4194                 igb_irq_enable(adapter);
4195
4196         if ((adapter->hw.mng_cookie.status &
4197              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4198             (vid == adapter->mng_vlan_id)) {
4199                 /* release control to f/w */
4200                 igb_release_hw_control(adapter);
4201                 return;
4202         }
4203
4204         /* remove VID from filter table */
4205         index = (vid >> 5) & 0x7F;
4206         vfta = array_rd32(E1000_VFTA, index);
4207         vfta &= ~(1 << (vid & 0x1F));
4208         igb_write_vfta(&adapter->hw, index, vfta);
4209 }
4210
4211 static void igb_restore_vlan(struct igb_adapter *adapter)
4212 {
4213         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4214
4215         if (adapter->vlgrp) {
4216                 u16 vid;
4217                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4218                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4219                                 continue;
4220                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4221                 }
4222         }
4223 }
4224
4225 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4226 {
4227         struct e1000_mac_info *mac = &adapter->hw.mac;
4228
4229         mac->autoneg = 0;
4230
4231         /* Fiber NICs only allow 1000 gbps Full duplex */
4232         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4233                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4234                 dev_err(&adapter->pdev->dev,
4235                         "Unsupported Speed/Duplex configuration\n");
4236                 return -EINVAL;
4237         }
4238
4239         switch (spddplx) {
4240         case SPEED_10 + DUPLEX_HALF:
4241                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4242                 break;
4243         case SPEED_10 + DUPLEX_FULL:
4244                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4245                 break;
4246         case SPEED_100 + DUPLEX_HALF:
4247                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4248                 break;
4249         case SPEED_100 + DUPLEX_FULL:
4250                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4251                 break;
4252         case SPEED_1000 + DUPLEX_FULL:
4253                 mac->autoneg = 1;
4254                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4255                 break;
4256         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4257         default:
4258                 dev_err(&adapter->pdev->dev,
4259                         "Unsupported Speed/Duplex configuration\n");
4260                 return -EINVAL;
4261         }
4262         return 0;
4263 }
4264
4265
4266 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4267 {
4268         struct net_device *netdev = pci_get_drvdata(pdev);
4269         struct igb_adapter *adapter = netdev_priv(netdev);
4270         struct e1000_hw *hw = &adapter->hw;
4271         u32 ctrl, rctl, status;
4272         u32 wufc = adapter->wol;
4273 #ifdef CONFIG_PM
4274         int retval = 0;
4275 #endif
4276
4277         netif_device_detach(netdev);
4278
4279         if (netif_running(netdev))
4280                 igb_close(netdev);
4281
4282         igb_reset_interrupt_capability(adapter);
4283
4284         igb_free_queues(adapter);
4285
4286 #ifdef CONFIG_PM
4287         retval = pci_save_state(pdev);
4288         if (retval)
4289                 return retval;
4290 #endif
4291
4292         status = rd32(E1000_STATUS);
4293         if (status & E1000_STATUS_LU)
4294                 wufc &= ~E1000_WUFC_LNKC;
4295
4296         if (wufc) {
4297                 igb_setup_rctl(adapter);
4298                 igb_set_multi(netdev);
4299
4300                 /* turn on all-multi mode if wake on multicast is enabled */
4301                 if (wufc & E1000_WUFC_MC) {
4302                         rctl = rd32(E1000_RCTL);
4303                         rctl |= E1000_RCTL_MPE;
4304                         wr32(E1000_RCTL, rctl);
4305                 }
4306
4307                 ctrl = rd32(E1000_CTRL);
4308                 /* advertise wake from D3Cold */
4309                 #define E1000_CTRL_ADVD3WUC 0x00100000
4310                 /* phy power management enable */
4311                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4312                 ctrl |= E1000_CTRL_ADVD3WUC;
4313                 wr32(E1000_CTRL, ctrl);
4314
4315                 /* Allow time for pending master requests to run */
4316                 igb_disable_pcie_master(&adapter->hw);
4317
4318                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4319                 wr32(E1000_WUFC, wufc);
4320         } else {
4321                 wr32(E1000_WUC, 0);
4322                 wr32(E1000_WUFC, 0);
4323         }
4324
4325         /* make sure adapter isn't asleep if manageability/wol is enabled */
4326         if (wufc || adapter->en_mng_pt) {
4327                 pci_enable_wake(pdev, PCI_D3hot, 1);
4328                 pci_enable_wake(pdev, PCI_D3cold, 1);
4329         } else {
4330                 igb_shutdown_fiber_serdes_link_82575(hw);
4331                 pci_enable_wake(pdev, PCI_D3hot, 0);
4332                 pci_enable_wake(pdev, PCI_D3cold, 0);
4333         }
4334
4335         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4336          * would have already happened in close and is redundant. */
4337         igb_release_hw_control(adapter);
4338
4339         pci_disable_device(pdev);
4340
4341         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4342
4343         return 0;
4344 }
4345
4346 #ifdef CONFIG_PM
4347 static int igb_resume(struct pci_dev *pdev)
4348 {
4349         struct net_device *netdev = pci_get_drvdata(pdev);
4350         struct igb_adapter *adapter = netdev_priv(netdev);
4351         struct e1000_hw *hw = &adapter->hw;
4352         u32 err;
4353
4354         pci_set_power_state(pdev, PCI_D0);
4355         pci_restore_state(pdev);
4356
4357         if (adapter->need_ioport)
4358                 err = pci_enable_device(pdev);
4359         else
4360                 err = pci_enable_device_mem(pdev);
4361         if (err) {
4362                 dev_err(&pdev->dev,
4363                         "igb: Cannot enable PCI device from suspend\n");
4364                 return err;
4365         }
4366         pci_set_master(pdev);
4367
4368         pci_enable_wake(pdev, PCI_D3hot, 0);
4369         pci_enable_wake(pdev, PCI_D3cold, 0);
4370
4371         igb_set_interrupt_capability(adapter);
4372
4373         if (igb_alloc_queues(adapter)) {
4374                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4375                 return -ENOMEM;
4376         }
4377
4378         /* e1000_power_up_phy(adapter); */
4379
4380         igb_reset(adapter);
4381         wr32(E1000_WUS, ~0);
4382
4383         if (netif_running(netdev)) {
4384                 err = igb_open(netdev);
4385                 if (err)
4386                         return err;
4387         }
4388
4389         netif_device_attach(netdev);
4390
4391         /* let the f/w know that the h/w is now under the control of the
4392          * driver. */
4393         igb_get_hw_control(adapter);
4394
4395         return 0;
4396 }
4397 #endif
4398
4399 static void igb_shutdown(struct pci_dev *pdev)
4400 {
4401         igb_suspend(pdev, PMSG_SUSPEND);
4402 }
4403
4404 #ifdef CONFIG_NET_POLL_CONTROLLER
4405 /*
4406  * Polling 'interrupt' - used by things like netconsole to send skbs
4407  * without having to re-enable interrupts. It's not called while
4408  * the interrupt routine is executing.
4409  */
4410 static void igb_netpoll(struct net_device *netdev)
4411 {
4412         struct igb_adapter *adapter = netdev_priv(netdev);
4413         int i;
4414         int work_done = 0;
4415
4416         igb_irq_disable(adapter);
4417         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4418
4419         for (i = 0; i < adapter->num_tx_queues; i++)
4420                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4421
4422         for (i = 0; i < adapter->num_rx_queues; i++)
4423                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4424                                      &work_done,
4425                                      adapter->rx_ring[i].napi.weight);
4426
4427         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4428         igb_irq_enable(adapter);
4429 }
4430 #endif /* CONFIG_NET_POLL_CONTROLLER */
4431
4432 /**
4433  * igb_io_error_detected - called when PCI error is detected
4434  * @pdev: Pointer to PCI device
4435  * @state: The current pci connection state
4436  *
4437  * This function is called after a PCI bus error affecting
4438  * this device has been detected.
4439  */
4440 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4441                                               pci_channel_state_t state)
4442 {
4443         struct net_device *netdev = pci_get_drvdata(pdev);
4444         struct igb_adapter *adapter = netdev_priv(netdev);
4445
4446         netif_device_detach(netdev);
4447
4448         if (netif_running(netdev))
4449                 igb_down(adapter);
4450         pci_disable_device(pdev);
4451
4452         /* Request a slot slot reset. */
4453         return PCI_ERS_RESULT_NEED_RESET;
4454 }
4455
4456 /**
4457  * igb_io_slot_reset - called after the pci bus has been reset.
4458  * @pdev: Pointer to PCI device
4459  *
4460  * Restart the card from scratch, as if from a cold-boot. Implementation
4461  * resembles the first-half of the igb_resume routine.
4462  */
4463 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4464 {
4465         struct net_device *netdev = pci_get_drvdata(pdev);
4466         struct igb_adapter *adapter = netdev_priv(netdev);
4467         struct e1000_hw *hw = &adapter->hw;
4468         int err;
4469
4470         if (adapter->need_ioport)
4471                 err = pci_enable_device(pdev);
4472         else
4473                 err = pci_enable_device_mem(pdev);
4474         if (err) {
4475                 dev_err(&pdev->dev,
4476                         "Cannot re-enable PCI device after reset.\n");
4477                 return PCI_ERS_RESULT_DISCONNECT;
4478         }
4479         pci_set_master(pdev);
4480         pci_restore_state(pdev);
4481
4482         pci_enable_wake(pdev, PCI_D3hot, 0);
4483         pci_enable_wake(pdev, PCI_D3cold, 0);
4484
4485         igb_reset(adapter);
4486         wr32(E1000_WUS, ~0);
4487
4488         return PCI_ERS_RESULT_RECOVERED;
4489 }
4490
4491 /**
4492  * igb_io_resume - called when traffic can start flowing again.
4493  * @pdev: Pointer to PCI device
4494  *
4495  * This callback is called when the error recovery driver tells us that
4496  * its OK to resume normal operation. Implementation resembles the
4497  * second-half of the igb_resume routine.
4498  */
4499 static void igb_io_resume(struct pci_dev *pdev)
4500 {
4501         struct net_device *netdev = pci_get_drvdata(pdev);
4502         struct igb_adapter *adapter = netdev_priv(netdev);
4503
4504         if (netif_running(netdev)) {
4505                 if (igb_up(adapter)) {
4506                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4507                         return;
4508                 }
4509         }
4510
4511         netif_device_attach(netdev);
4512
4513         /* let the f/w know that the h/w is now under the control of the
4514          * driver. */
4515         igb_get_hw_control(adapter);
4516
4517 }
4518
4519 /* igb_main.c */