git.oblomov.eu Git - linux-2.6/blob - arch/sh/kernel/cpu/sh4a/setup-sh7723.c

   1 /*
   2  * SH7723 Setup
   3  *
   4  *  Copyright (C) 2008  Paul Mundt
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10 #include <linux/platform_device.h>
  11 #include <linux/init.h>
  12 #include <linux/serial.h>
  13 #include <linux/mm.h>
  14 #include <linux/serial_sci.h>
  15 #include <linux/uio_driver.h>
  16 #include <asm/mmzone.h>
  17
  18 static struct uio_info vpu_platform_data = {
  19         .name = "VPU5",
  20         .version = "0",
  21         .irq = 60,
  22 };
  23
  24 static struct resource vpu_resources[] = {
  25         [0] = {
  26                 .name   = "VPU",
  27                 .start  = 0xfe900000,
  28                 .end    = 0xfe902807,
  29                 .flags  = IORESOURCE_MEM,
  30         },
  31 };
  32
  33 static struct platform_device vpu_device = {
  34         .name           = "uio_pdrv_genirq",
  35         .id             = 0,
  36         .dev = {
  37                 .platform_data  = &vpu_platform_data,
  38         },
  39         .resource       = vpu_resources,
  40         .num_resources  = ARRAY_SIZE(vpu_resources),
  41 };
  42
  43 static struct uio_info veu0_platform_data = {
  44         .name = "VEU",
  45         .version = "0",
  46         .irq = 54,
  47 };
  48
  49 static struct resource veu0_resources[] = {
  50         [0] = {
  51                 .name   = "VEU2H0",
  52                 .start  = 0xfe920000,
  53                 .end    = 0xfe92027b,
  54                 .flags  = IORESOURCE_MEM,
  55         },
  56 };
  57
  58 static struct platform_device veu0_device = {
  59         .name           = "uio_pdrv_genirq",
  60         .id             = 1,
  61         .dev = {
  62                 .platform_data  = &veu0_platform_data,
  63         },
  64         .resource       = veu0_resources,
  65         .num_resources  = ARRAY_SIZE(veu0_resources),
  66 };
  67
  68 static struct uio_info veu1_platform_data = {
  69         .name = "VEU",
  70         .version = "0",
  71         .irq = 27,
  72 };
  73
  74 static struct resource veu1_resources[] = {
  75         [0] = {
  76                 .name   = "VEU2H1",
  77                 .start  = 0xfe924000,
  78                 .end    = 0xfe92427b,
  79                 .flags  = IORESOURCE_MEM,
  80         },
  81 };
  82
  83 static struct platform_device veu1_device = {
  84         .name           = "uio_pdrv_genirq",
  85         .id             = 2,
  86         .dev = {
  87                 .platform_data  = &veu1_platform_data,
  88         },
  89         .resource       = veu1_resources,
  90         .num_resources  = ARRAY_SIZE(veu1_resources),
  91 };
  92
  93 static struct plat_sci_port sci_platform_data[] = {
  94         {
  95                 .mapbase        = 0xffe00000,
  96                 .flags          = UPF_BOOT_AUTOCONF,
  97                 .type           = PORT_SCIF,
  98                 .irqs           = { 80, 80, 80, 80 },
  99         },{
 100                 .mapbase        = 0xffe10000,
 101                 .flags          = UPF_BOOT_AUTOCONF,
 102                 .type           = PORT_SCIF,
 103                 .irqs           = { 81, 81, 81, 81 },
 104         },{
 105                 .mapbase        = 0xffe20000,
 106                 .flags          = UPF_BOOT_AUTOCONF,
 107                 .type           = PORT_SCIF,
 108                 .irqs           = { 82, 82, 82, 82 },
 109         },{
 110                 .mapbase        = 0xa4e30000,
 111                 .flags          = UPF_BOOT_AUTOCONF,
 112                 .type           = PORT_SCI,
 113                 .irqs           = { 56, 56, 56, 56 },
 114         },{
 115                 .mapbase        = 0xa4e40000,
 116                 .flags          = UPF_BOOT_AUTOCONF,
 117                 .type           = PORT_SCI,
 118                 .irqs           = { 88, 88, 88, 88 },
 119         },{
 120                 .mapbase        = 0xa4e50000,
 121                 .flags          = UPF_BOOT_AUTOCONF,
 122                 .type           = PORT_SCI,
 123                 .irqs           = { 109, 109, 109, 109 },
 124         }, {
 125                 .flags = 0,
 126         }
 127 };
 128
 129 static struct platform_device sci_device = {
 130         .name           = "sh-sci",
 131         .id             = -1,
 132         .dev            = {
 133                 .platform_data  = sci_platform_data,
 134         },
 135 };
 136
 137 static struct resource rtc_resources[] = {
 138         [0] = {
 139                 .start  = 0xa465fec0,
 140                 .end    = 0xa465fec0 + 0x58 - 1,
 141                 .flags  = IORESOURCE_IO,
 142         },
 143         [1] = {
 144                 /* Period IRQ */
 145                 .start  = 69,
 146                 .flags  = IORESOURCE_IRQ,
 147         },
 148         [2] = {
 149                 /* Carry IRQ */
 150                 .start  = 70,
 151                 .flags  = IORESOURCE_IRQ,
 152         },
 153         [3] = {
 154                 /* Alarm IRQ */
 155                 .start  = 68,
 156                 .flags  = IORESOURCE_IRQ,
 157         },
 158 };
 159
 160 static struct platform_device rtc_device = {
 161         .name           = "sh-rtc",
 162         .id             = -1,
 163         .num_resources  = ARRAY_SIZE(rtc_resources),
 164         .resource       = rtc_resources,
 165 };
 166
 167 static struct resource sh7723_usb_host_resources[] = {
 168         [0] = {
 169                 .name   = "r8a66597_hcd",
 170                 .start  = 0xa4d80000,
 171                 .end    = 0xa4d800ff,
 172                 .flags  = IORESOURCE_MEM,
 173         },
 174         [1] = {
 175                 .start  = 65,
 176                 .end    = 65,
 177                 .flags  = IORESOURCE_IRQ,
 178         },
 179 };
 180
 181 static struct platform_device sh7723_usb_host_device = {
 182         .name           = "r8a66597_hcd",
 183         .id             = 0,
 184         .dev = {
 185                 .dma_mask               = NULL,         /*  not use dma */
 186                 .coherent_dma_mask      = 0xffffffff,
 187         },
 188         .num_resources  = ARRAY_SIZE(sh7723_usb_host_resources),
 189         .resource       = sh7723_usb_host_resources,
 190 };
 191
 192 static struct resource iic_resources[] = {
 193         [0] = {
 194                 .name   = "IIC",
 195                 .start  = 0x04470000,
 196                 .end    = 0x04470017,
 197                 .flags  = IORESOURCE_MEM,
 198         },
 199         [1] = {
 200                 .start  = 96,
 201                 .end    = 99,
 202                 .flags  = IORESOURCE_IRQ,
 203        },
 204 };
 205
 206 static struct platform_device iic_device = {
 207         .name           = "i2c-sh_mobile",
 208         .num_resources  = ARRAY_SIZE(iic_resources),
 209         .resource       = iic_resources,
 210 };
 211
 212 static struct platform_device *sh7723_devices[] __initdata = {
 213         &sci_device,
 214         &rtc_device,
 215         &iic_device,
 216         &sh7723_usb_host_device,
 217         &vpu_device,
 218         &veu0_device,
 219         &veu1_device,
 220 };
 221
 222 static int __init sh7723_devices_setup(void)
 223 {
 224         return platform_add_devices(sh7723_devices,
 225                                     ARRAY_SIZE(sh7723_devices));
 226 }
 227 __initcall(sh7723_devices_setup);
 228
 229 enum {
 230         UNUSED=0,
 231
 232         /* interrupt sources */
 233         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
 234         HUDI,
 235         DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3,
 236         _2DG_TRI,_2DG_INI,_2DG_CEI,
 237         DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3,
 238         VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI,
 239         SCIFA_SCIFA0,
 240         VPU_VPUI,
 241         TPU_TPUI,
 242         ADC_ADI,
 243         USB_USI0,
 244         RTC_ATI,RTC_PRI,RTC_CUI,
 245         DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR,
 246         DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR,
 247         KEYSC_KEYI,
 248         SCIF_SCIF0,SCIF_SCIF1,SCIF_SCIF2,
 249         MSIOF_MSIOFI0,MSIOF_MSIOFI1,
 250         SCIFA_SCIFA1,
 251         FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I,
 252         I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI,
 253         SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2,
 254         CMT_CMTI,
 255         TSIF_TSIFI,
 256         SIU_SIUI,
 257         SCIFA_SCIFA2,
 258         TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
 259         IRDA_IRDAI,
 260         ATAPI_ATAPII,
 261         SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2,
 262         VEU2H1_VEU2HI,
 263         LCDC_LCDCI,
 264         TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2,
 265
 266         /* interrupt groups */
 267         DMAC1A, DMAC0A, VIO, DMAC0B, FLCTL, I2C, _2DG,
 268         SDHI1, RTC, DMAC1B, SDHI0,
 269 };
 270
 271 static struct intc_vect vectors[] __initdata = {
 272         INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
 273         INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
 274         INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
 275         INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
 276
 277         INTC_VECT(DMAC1A_DEI0,0x700),
 278         INTC_VECT(DMAC1A_DEI1,0x720),
 279         INTC_VECT(DMAC1A_DEI2,0x740),
 280         INTC_VECT(DMAC1A_DEI3,0x760),
 281
 282         INTC_VECT(_2DG_TRI, 0x780),
 283         INTC_VECT(_2DG_INI, 0x7A0),
 284         INTC_VECT(_2DG_CEI, 0x7C0),
 285
 286         INTC_VECT(DMAC0A_DEI0,0x800),
 287         INTC_VECT(DMAC0A_DEI1,0x820),
 288         INTC_VECT(DMAC0A_DEI2,0x840),
 289         INTC_VECT(DMAC0A_DEI3,0x860),
 290
 291         INTC_VECT(VIO_CEUI,0x880),
 292         INTC_VECT(VIO_BEUI,0x8A0),
 293         INTC_VECT(VIO_VEU2HI,0x8C0),
 294         INTC_VECT(VIO_VOUI,0x8E0),
 295
 296         INTC_VECT(SCIFA_SCIFA0,0x900),
 297         INTC_VECT(VPU_VPUI,0x980),
 298         INTC_VECT(TPU_TPUI,0x9A0),
 299         INTC_VECT(ADC_ADI,0x9E0),
 300         INTC_VECT(USB_USI0,0xA20),
 301
 302         INTC_VECT(RTC_ATI,0xA80),
 303         INTC_VECT(RTC_PRI,0xAA0),
 304         INTC_VECT(RTC_CUI,0xAC0),
 305
 306         INTC_VECT(DMAC1B_DEI4,0xB00),
 307         INTC_VECT(DMAC1B_DEI5,0xB20),
 308         INTC_VECT(DMAC1B_DADERR,0xB40),
 309
 310         INTC_VECT(DMAC0B_DEI4,0xB80),
 311         INTC_VECT(DMAC0B_DEI5,0xBA0),
 312         INTC_VECT(DMAC0B_DADERR,0xBC0),
 313
 314         INTC_VECT(KEYSC_KEYI,0xBE0),
 315         INTC_VECT(SCIF_SCIF0,0xC00),
 316         INTC_VECT(SCIF_SCIF1,0xC20),
 317         INTC_VECT(SCIF_SCIF2,0xC40),
 318         INTC_VECT(MSIOF_MSIOFI0,0xC80),
 319         INTC_VECT(MSIOF_MSIOFI1,0xCA0),
 320         INTC_VECT(SCIFA_SCIFA1,0xD00),
 321
 322         INTC_VECT(FLCTL_FLSTEI,0xD80),
 323         INTC_VECT(FLCTL_FLTENDI,0xDA0),
 324         INTC_VECT(FLCTL_FLTREQ0I,0xDC0),
 325         INTC_VECT(FLCTL_FLTREQ1I,0xDE0),
 326
 327         INTC_VECT(I2C_ALI,0xE00),
 328         INTC_VECT(I2C_TACKI,0xE20),
 329         INTC_VECT(I2C_WAITI,0xE40),
 330         INTC_VECT(I2C_DTEI,0xE60),
 331
 332         INTC_VECT(SDHI0_SDHII0,0xE80),
 333         INTC_VECT(SDHI0_SDHII1,0xEA0),
 334         INTC_VECT(SDHI0_SDHII2,0xEC0),
 335
 336         INTC_VECT(CMT_CMTI,0xF00),
 337         INTC_VECT(TSIF_TSIFI,0xF20),
 338         INTC_VECT(SIU_SIUI,0xF80),
 339         INTC_VECT(SCIFA_SCIFA2,0xFA0),
 340
 341         INTC_VECT(TMU0_TUNI0,0x400),
 342         INTC_VECT(TMU0_TUNI1,0x420),
 343         INTC_VECT(TMU0_TUNI2,0x440),
 344
 345         INTC_VECT(IRDA_IRDAI,0x480),
 346         INTC_VECT(ATAPI_ATAPII,0x4A0),
 347
 348         INTC_VECT(SDHI1_SDHII0,0x4E0),
 349         INTC_VECT(SDHI1_SDHII1,0x500),
 350         INTC_VECT(SDHI1_SDHII2,0x520),
 351
 352         INTC_VECT(VEU2H1_VEU2HI,0x560),
 353         INTC_VECT(LCDC_LCDCI,0x580),
 354
 355         INTC_VECT(TMU1_TUNI0,0x920),
 356         INTC_VECT(TMU1_TUNI1,0x940),
 357         INTC_VECT(TMU1_TUNI2,0x960),
 358
 359 };
 360
 361 static struct intc_group groups[] __initdata = {
 362         INTC_GROUP(DMAC1A,DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3),
 363         INTC_GROUP(DMAC0A,DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3),
 364         INTC_GROUP(VIO, VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI),
 365         INTC_GROUP(DMAC0B, DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR),
 366         INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I),
 367         INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
 368         INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI),
 369         INTC_GROUP(SDHI1, SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2),
 370         INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),
 371         INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR),
 372         INTC_GROUP(SDHI0,SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2),
 373 };
 374
 375 static struct intc_mask_reg mask_registers[] __initdata = {
 376         { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
 377           { 0,  TMU1_TUNI2,TMU1_TUNI1,TMU1_TUNI0,0,SDHI1_SDHII2,SDHI1_SDHII1,SDHI1_SDHII0} },
 378         { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
 379           { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
 380         { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
 381           { 0, 0, 0, VPU_VPUI,0,0,0,SCIFA_SCIFA0 } },
 382         { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
 383           { DMAC1A_DEI3,DMAC1A_DEI2,DMAC1A_DEI1,DMAC1A_DEI0,0,0,0,IRDA_IRDAI } },
 384         { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
 385           { 0,TMU0_TUNI2,TMU0_TUNI1,TMU0_TUNI0,VEU2H1_VEU2HI,0,0,LCDC_LCDCI } },
 386         { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
 387           { KEYSC_KEYI,DMAC0B_DADERR,DMAC0B_DEI5,DMAC0B_DEI4,0,SCIF_SCIF2,SCIF_SCIF1,SCIF_SCIF0 } },
 388         { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
 389           { 0,0,0,SCIFA_SCIFA1,ADC_ADI,0,MSIOF_MSIOFI1,MSIOF_MSIOFI0 } },
 390         { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
 391           { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
 392             FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
 393         { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
 394           { 0,SDHI0_SDHII2,SDHI0_SDHII1,SDHI0_SDHII0,0,0,SCIFA_SCIFA2,SIU_SIUI } },
 395         { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
 396           { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
 397         { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
 398           { 0, DMAC1B_DADERR,DMAC1B_DEI5,DMAC1B_DEI4,0,RTC_ATI,RTC_PRI,RTC_CUI } },
 399         { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
 400           { 0,_2DG_CEI,_2DG_INI,_2DG_TRI,0,TPU_TPUI,0,TSIF_TSIFI } },
 401         { 0xa40800b0, 0xa40800f0, 8, /* IMR12 / IMCR12 */
 402           { 0,0,0,0,0,0,0,ATAPI_ATAPII } },
 403         { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
 404           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 405 };
 406
 407 static struct intc_prio_reg prio_registers[] __initdata = {
 408         { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, IRDA_IRDAI } },
 409         { 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2H1_VEU2HI, LCDC_LCDCI, DMAC1A, 0} },
 410         { 0xa4080008, 0, 16, 4, /* IPRC */ { TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, 0} },
 411         { 0xa408000c, 0, 16, 4, /* IPRD */ { } },
 412         { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0A, VIO, SCIFA_SCIFA0, VPU_VPUI } },
 413         { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC_KEYI, DMAC0B, USB_USI0, CMT_CMTI } },
 414         { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF_SCIF0, SCIF_SCIF1, SCIF_SCIF2,0 } },
 415         { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0,MSIOF_MSIOFI1, FLCTL, I2C } },
 416         { 0xa4080020, 0, 16, 4, /* IPRI */ { SCIFA_SCIFA1,0,TSIF_TSIFI,_2DG } },
 417         { 0xa4080024, 0, 16, 4, /* IPRJ */ { ADC_ADI,0,SIU_SIUI,SDHI1 } },
 418         { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } },
 419         { 0xa408002c, 0, 16, 4, /* IPRL */ { SCIFA_SCIFA2,0,TPU_TPUI,ATAPI_ATAPII } },
 420         { 0xa4140010, 0, 32, 4, /* INTPRI00 */
 421           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 422 };
 423
 424 static struct intc_sense_reg sense_registers[] __initdata = {
 425         { 0xa414001c, 16, 2, /* ICR1 */
 426           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 427 };
 428
 429 static struct intc_mask_reg ack_registers[] __initdata = {
 430         { 0xa4140024, 0, 8, /* INTREQ00 */
 431           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 432 };
 433
 434 static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups,
 435                              mask_registers, prio_registers, sense_registers,
 436                              ack_registers);
 437
 438 void __init plat_irq_setup(void)
 439 {
 440         register_intc_controller(&intc_desc);
 441 }