2 * 8253/8254 interval timer emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2006 Intel Corporation
6 * Copyright (c) 2007 Keir Fraser, XenSource Inc
7 * Copyright (c) 2008 Intel Corporation
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 * Sheng Yang <sheng.yang@intel.com>
29 * Based on QEMU and Xen.
32 #include <linux/kvm_host.h>
38 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
40 #define mod_64(x, y) ((x) % (y))
43 #define RW_STATE_LSB 1
44 #define RW_STATE_MSB 2
45 #define RW_STATE_WORD0 3
46 #define RW_STATE_WORD1 4
48 /* Compute with 96 bit intermediate result: (a*b)/c */
49 static u64 muldiv64(u64 a, u32 b, u32 c)
60 rl = (u64)u.l.low * (u64)b;
61 rh = (u64)u.l.high * (u64)b;
63 res.l.high = div64_u64(rh, c);
64 res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
68 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
70 struct kvm_kpit_channel_state *c =
71 &kvm->arch.vpit->pit_state.channels[channel];
73 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
79 /* XXX: just disable/enable counting */
85 /* Restart counting on rising edge. */
87 c->count_load_time = ktime_get();
94 int pit_get_gate(struct kvm *kvm, int channel)
96 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
98 return kvm->arch.vpit->pit_state.channels[channel].gate;
101 static int pit_get_count(struct kvm *kvm, int channel)
103 struct kvm_kpit_channel_state *c =
104 &kvm->arch.vpit->pit_state.channels[channel];
108 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
110 t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
111 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
118 counter = (c->count - d) & 0xffff;
121 /* XXX: may be incorrect for odd counts */
122 counter = c->count - (mod_64((2 * d), c->count));
125 counter = c->count - mod_64(d, c->count);
131 static int pit_get_out(struct kvm *kvm, int channel)
133 struct kvm_kpit_channel_state *c =
134 &kvm->arch.vpit->pit_state.channels[channel];
138 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
140 t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
141 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
146 out = (d >= c->count);
149 out = (d < c->count);
152 out = ((mod_64(d, c->count) == 0) && (d != 0));
155 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
159 out = (d == c->count);
166 static void pit_latch_count(struct kvm *kvm, int channel)
168 struct kvm_kpit_channel_state *c =
169 &kvm->arch.vpit->pit_state.channels[channel];
171 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
173 if (!c->count_latched) {
174 c->latched_count = pit_get_count(kvm, channel);
175 c->count_latched = c->rw_mode;
179 static void pit_latch_status(struct kvm *kvm, int channel)
181 struct kvm_kpit_channel_state *c =
182 &kvm->arch.vpit->pit_state.channels[channel];
184 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
186 if (!c->status_latched) {
187 /* TODO: Return NULL COUNT (bit 6). */
188 c->status = ((pit_get_out(kvm, channel) << 7) |
192 c->status_latched = 1;
196 int __pit_timer_fn(struct kvm_kpit_state *ps)
198 struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
199 struct kvm_kpit_timer *pt = &ps->pit_timer;
201 atomic_inc(&pt->pending);
202 smp_mb__after_atomic_inc();
203 if (vcpu0 && waitqueue_active(&vcpu0->wq)) {
204 vcpu0->arch.mp_state = KVM_MP_STATE_RUNNABLE;
205 wake_up_interruptible(&vcpu0->wq);
208 pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period);
209 pt->scheduled = ktime_to_ns(pt->timer.expires);
211 return (pt->period == 0 ? 0 : 1);
214 int pit_has_pending_timer(struct kvm_vcpu *vcpu)
216 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
218 if (pit && vcpu->vcpu_id == 0 && pit->pit_state.inject_pending)
219 return atomic_read(&pit->pit_state.pit_timer.pending);
224 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
226 struct kvm_kpit_state *ps;
227 int restart_timer = 0;
229 ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
231 restart_timer = __pit_timer_fn(ps);
234 return HRTIMER_RESTART;
236 return HRTIMER_NORESTART;
239 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
241 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
242 struct hrtimer *timer;
244 if (vcpu->vcpu_id != 0 || !pit)
247 timer = &pit->pit_state.pit_timer.timer;
248 if (hrtimer_cancel(timer))
249 hrtimer_start(timer, timer->expires, HRTIMER_MODE_ABS);
252 static void destroy_pit_timer(struct kvm_kpit_timer *pt)
254 pr_debug("pit: execute del timer!\n");
255 hrtimer_cancel(&pt->timer);
258 static void create_pit_timer(struct kvm_kpit_timer *pt, u32 val, int is_period)
262 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
264 pr_debug("pit: create pit timer, interval is %llu nsec\n", interval);
266 /* TODO The new value only affected after the retriggered */
267 hrtimer_cancel(&pt->timer);
268 pt->period = (is_period == 0) ? 0 : interval;
269 pt->timer.function = pit_timer_fn;
270 atomic_set(&pt->pending, 0);
272 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
276 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
278 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
280 WARN_ON(!mutex_is_locked(&ps->lock));
282 pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
285 * Though spec said the state of 8254 is undefined after power-up,
286 * seems some tricky OS like Windows XP depends on IRQ0 interrupt
288 * So here setting initialize rate for it, and not a specific number
293 ps->channels[channel].count_load_time = ktime_get();
294 ps->channels[channel].count = val;
299 /* Two types of timer
300 * mode 1 is one shot, mode 2 is period, otherwise del timer */
301 switch (ps->channels[0].mode) {
303 /* FIXME: enhance mode 4 precision */
305 create_pit_timer(&ps->pit_timer, val, 0);
308 create_pit_timer(&ps->pit_timer, val, 1);
311 destroy_pit_timer(&ps->pit_timer);
315 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val)
317 mutex_lock(&kvm->arch.vpit->pit_state.lock);
318 pit_load_count(kvm, channel, val);
319 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
322 static void pit_ioport_write(struct kvm_io_device *this,
323 gpa_t addr, int len, const void *data)
325 struct kvm_pit *pit = (struct kvm_pit *)this->private;
326 struct kvm_kpit_state *pit_state = &pit->pit_state;
327 struct kvm *kvm = pit->kvm;
329 struct kvm_kpit_channel_state *s;
330 u32 val = *(u32 *) data;
333 addr &= KVM_PIT_CHANNEL_MASK;
335 mutex_lock(&pit_state->lock);
338 pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n",
339 (unsigned int)addr, len, val);
344 /* Read-Back Command. */
345 for (channel = 0; channel < 3; channel++) {
346 s = &pit_state->channels[channel];
347 if (val & (2 << channel)) {
349 pit_latch_count(kvm, channel);
351 pit_latch_status(kvm, channel);
355 /* Select Counter <channel>. */
356 s = &pit_state->channels[channel];
357 access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
359 pit_latch_count(kvm, channel);
362 s->read_state = access;
363 s->write_state = access;
364 s->mode = (val >> 1) & 7;
372 s = &pit_state->channels[addr];
373 switch (s->write_state) {
376 pit_load_count(kvm, addr, val);
379 pit_load_count(kvm, addr, val << 8);
382 s->write_latch = val;
383 s->write_state = RW_STATE_WORD1;
386 pit_load_count(kvm, addr, s->write_latch | (val << 8));
387 s->write_state = RW_STATE_WORD0;
392 mutex_unlock(&pit_state->lock);
395 static void pit_ioport_read(struct kvm_io_device *this,
396 gpa_t addr, int len, void *data)
398 struct kvm_pit *pit = (struct kvm_pit *)this->private;
399 struct kvm_kpit_state *pit_state = &pit->pit_state;
400 struct kvm *kvm = pit->kvm;
402 struct kvm_kpit_channel_state *s;
404 addr &= KVM_PIT_CHANNEL_MASK;
405 s = &pit_state->channels[addr];
407 mutex_lock(&pit_state->lock);
409 if (s->status_latched) {
410 s->status_latched = 0;
412 } else if (s->count_latched) {
413 switch (s->count_latched) {
416 ret = s->latched_count & 0xff;
417 s->count_latched = 0;
420 ret = s->latched_count >> 8;
421 s->count_latched = 0;
424 ret = s->latched_count & 0xff;
425 s->count_latched = RW_STATE_MSB;
429 switch (s->read_state) {
432 count = pit_get_count(kvm, addr);
436 count = pit_get_count(kvm, addr);
437 ret = (count >> 8) & 0xff;
440 count = pit_get_count(kvm, addr);
442 s->read_state = RW_STATE_WORD1;
445 count = pit_get_count(kvm, addr);
446 ret = (count >> 8) & 0xff;
447 s->read_state = RW_STATE_WORD0;
452 if (len > sizeof(ret))
454 memcpy(data, (char *)&ret, len);
456 mutex_unlock(&pit_state->lock);
459 static int pit_in_range(struct kvm_io_device *this, gpa_t addr)
461 return ((addr >= KVM_PIT_BASE_ADDRESS) &&
462 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
465 static void speaker_ioport_write(struct kvm_io_device *this,
466 gpa_t addr, int len, const void *data)
468 struct kvm_pit *pit = (struct kvm_pit *)this->private;
469 struct kvm_kpit_state *pit_state = &pit->pit_state;
470 struct kvm *kvm = pit->kvm;
471 u32 val = *(u32 *) data;
473 mutex_lock(&pit_state->lock);
474 pit_state->speaker_data_on = (val >> 1) & 1;
475 pit_set_gate(kvm, 2, val & 1);
476 mutex_unlock(&pit_state->lock);
479 static void speaker_ioport_read(struct kvm_io_device *this,
480 gpa_t addr, int len, void *data)
482 struct kvm_pit *pit = (struct kvm_pit *)this->private;
483 struct kvm_kpit_state *pit_state = &pit->pit_state;
484 struct kvm *kvm = pit->kvm;
485 unsigned int refresh_clock;
488 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
489 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
491 mutex_lock(&pit_state->lock);
492 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
493 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
494 if (len > sizeof(ret))
496 memcpy(data, (char *)&ret, len);
497 mutex_unlock(&pit_state->lock);
500 static int speaker_in_range(struct kvm_io_device *this, gpa_t addr)
502 return (addr == KVM_SPEAKER_BASE_ADDRESS);
505 void kvm_pit_reset(struct kvm_pit *pit)
508 struct kvm_kpit_channel_state *c;
510 mutex_lock(&pit->pit_state.lock);
511 for (i = 0; i < 3; i++) {
512 c = &pit->pit_state.channels[i];
515 pit_load_count(pit->kvm, i, 0);
517 mutex_unlock(&pit->pit_state.lock);
519 atomic_set(&pit->pit_state.pit_timer.pending, 0);
520 pit->pit_state.inject_pending = 1;
523 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
526 struct kvm_kpit_state *pit_state;
528 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
532 mutex_init(&pit->pit_state.lock);
533 mutex_lock(&pit->pit_state.lock);
535 /* Initialize PIO device */
536 pit->dev.read = pit_ioport_read;
537 pit->dev.write = pit_ioport_write;
538 pit->dev.in_range = pit_in_range;
539 pit->dev.private = pit;
540 kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
542 pit->speaker_dev.read = speaker_ioport_read;
543 pit->speaker_dev.write = speaker_ioport_write;
544 pit->speaker_dev.in_range = speaker_in_range;
545 pit->speaker_dev.private = pit;
546 kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev);
548 kvm->arch.vpit = pit;
551 pit_state = &pit->pit_state;
552 pit_state->pit = pit;
553 hrtimer_init(&pit_state->pit_timer.timer,
554 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
555 mutex_unlock(&pit->pit_state.lock);
562 void kvm_free_pit(struct kvm *kvm)
564 struct hrtimer *timer;
566 if (kvm->arch.vpit) {
567 mutex_lock(&kvm->arch.vpit->pit_state.lock);
568 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
569 hrtimer_cancel(timer);
570 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
571 kfree(kvm->arch.vpit);
575 void __inject_pit_timer_intr(struct kvm *kvm)
577 mutex_lock(&kvm->lock);
578 kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 1);
579 kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 0);
580 kvm_pic_set_irq(pic_irqchip(kvm), 0, 1);
581 kvm_pic_set_irq(pic_irqchip(kvm), 0, 0);
582 mutex_unlock(&kvm->lock);
585 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
587 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
588 struct kvm *kvm = vcpu->kvm;
589 struct kvm_kpit_state *ps;
592 ps = &pit->pit_state;
594 /* Try to inject pending interrupts when:
596 * 2. Last interrupt was accepted or waited for too long time*/
597 if (atomic_read(&ps->pit_timer.pending) &&
598 (ps->inject_pending ||
599 (jiffies - ps->last_injected_time
600 >= KVM_MAX_PIT_INTR_INTERVAL))) {
601 ps->inject_pending = 0;
602 __inject_pit_timer_intr(kvm);
603 ps->last_injected_time = jiffies;
608 void kvm_pit_timer_intr_post(struct kvm_vcpu *vcpu, int vec)
610 struct kvm_arch *arch = &vcpu->kvm->arch;
611 struct kvm_kpit_state *ps;
613 if (vcpu && arch->vpit) {
614 ps = &arch->vpit->pit_state;
615 if (atomic_read(&ps->pit_timer.pending) &&
616 (((arch->vpic->pics[0].imr & 1) == 0 &&
617 arch->vpic->pics[0].irq_base == vec) ||
618 (arch->vioapic->redirtbl[0].fields.vector == vec &&
619 arch->vioapic->redirtbl[0].fields.mask != 1))) {
620 ps->inject_pending = 1;
621 atomic_dec(&ps->pit_timer.pending);
622 ps->channels[0].count_load_time = ktime_get();