2 * linux/arch/arm/mach-realview/realview_pb11mp.c
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
27 #include <asm/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/hardware/icst307.h>
34 #include <asm/hardware/cache-l2x0.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/flash.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/mmc.h>
40 #include <asm/mach/time.h>
42 #include <asm/arch/board-pb11mp.h>
43 #include <asm/arch/irqs.h>
48 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
50 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
51 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
55 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
56 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
60 .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
61 .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
65 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
66 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
70 .virtual = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
71 .pfn = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
75 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
76 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
80 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
81 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
85 .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
86 .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
90 .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
91 .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
95 #ifdef CONFIG_DEBUG_LL
97 .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
98 .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
105 static void __init realview_pb11mp_map_io(void)
107 iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
111 * RealView PB11MPCore AMBA devices
114 #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ }
115 #define GPIO2_DMA { 0, 0 }
116 #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ }
117 #define GPIO3_DMA { 0, 0 }
118 #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ }
119 #define AACI_DMA { 0x80, 0x81 }
120 #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
121 #define MMCI0_DMA { 0x84, 0 }
122 #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ }
123 #define KMI0_DMA { 0, 0 }
124 #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ }
125 #define KMI1_DMA { 0, 0 }
126 #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ }
127 #define PB11MP_SMC_DMA { 0, 0 }
128 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
129 #define MPMC_DMA { 0, 0 }
130 #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ }
131 #define PB11MP_CLCD_DMA { 0, 0 }
132 #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ }
133 #define DMAC_DMA { 0, 0 }
134 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
135 #define SCTL_DMA { 0, 0 }
136 #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ }
137 #define PB11MP_WATCHDOG_DMA { 0, 0 }
138 #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ }
139 #define PB11MP_GPIO0_DMA { 0, 0 }
140 #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ }
141 #define GPIO1_DMA { 0, 0 }
142 #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ }
143 #define PB11MP_RTC_DMA { 0, 0 }
144 #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ }
145 #define SCI_DMA { 7, 6 }
146 #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ }
147 #define PB11MP_UART0_DMA { 15, 14 }
148 #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ }
149 #define PB11MP_UART1_DMA { 13, 12 }
150 #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ }
151 #define PB11MP_UART2_DMA { 11, 10 }
152 #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ }
153 #define PB11MP_UART3_DMA { 0x86, 0x87 }
154 #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ }
155 #define PB11MP_SSP_DMA { 9, 8 }
157 /* FPGA Primecells */
158 AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
159 AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
160 AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
161 AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
162 AMBA_DEVICE(uart3, "fpga:09", PB11MP_UART3, NULL);
164 /* DevChip Primecells */
165 AMBA_DEVICE(smc, "dev:00", PB11MP_SMC, NULL);
166 AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
167 AMBA_DEVICE(wdog, "dev:e1", PB11MP_WATCHDOG, NULL);
168 AMBA_DEVICE(gpio0, "dev:e4", PB11MP_GPIO0, NULL);
169 AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
170 AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
171 AMBA_DEVICE(rtc, "dev:e8", PB11MP_RTC, NULL);
172 AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
173 AMBA_DEVICE(uart0, "dev:f1", PB11MP_UART0, NULL);
174 AMBA_DEVICE(uart1, "dev:f2", PB11MP_UART1, NULL);
175 AMBA_DEVICE(uart2, "dev:f3", PB11MP_UART2, NULL);
176 AMBA_DEVICE(ssp0, "dev:f4", PB11MP_SSP, NULL);
178 /* Primecells on the NEC ISSP chip */
179 AMBA_DEVICE(clcd, "issp:20", PB11MP_CLCD, &clcd_plat_data);
180 AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
182 static struct amba_device *amba_devs[] __initdata = {
205 * RealView PB11MPCore platform devices
207 static struct resource realview_pb11mp_flash_resource[] = {
209 .start = REALVIEW_PB11MP_FLASH0_BASE,
210 .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
211 .flags = IORESOURCE_MEM,
214 .start = REALVIEW_PB11MP_FLASH1_BASE,
215 .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
216 .flags = IORESOURCE_MEM,
220 static struct resource realview_pb11mp_smsc911x_resources[] = {
222 .start = REALVIEW_PB11MP_ETH_BASE,
223 .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
224 .flags = IORESOURCE_MEM,
227 .start = IRQ_TC11MP_ETH,
228 .end = IRQ_TC11MP_ETH,
229 .flags = IORESOURCE_IRQ,
233 static struct platform_device realview_pb11mp_smsc911x_device = {
236 .num_resources = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
237 .resource = realview_pb11mp_smsc911x_resources,
240 struct resource realview_pb11mp_cf_resources[] = {
242 .start = REALVIEW_PB11MP_CF_BASE,
243 .end = REALVIEW_PB11MP_CF_BASE + SZ_4K - 1,
244 .flags = IORESOURCE_MEM,
247 .start = REALVIEW_PB11MP_CF_MEM_BASE,
248 .end = REALVIEW_PB11MP_CF_MEM_BASE + SZ_4K - 1,
249 .flags = IORESOURCE_MEM,
252 .start = -1, /* FIXME: Find correct irq */
254 .flags = IORESOURCE_IRQ,
258 struct platform_device realview_pb11mp_cf_device = {
259 .name = "compactflash",
261 .num_resources = ARRAY_SIZE(realview_pb11mp_cf_resources),
262 .resource = realview_pb11mp_cf_resources,
265 static void __init gic_init_irq(void)
267 unsigned int pldctrl;
269 /* new irq mode with no DCC */
270 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
271 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
273 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
274 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
276 /* ARM11MPCore test chip GIC, primary */
277 gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
278 gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
279 gic_cpu_init(0, gic_cpu_base_addr);
281 /* board GIC, secondary */
282 gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
283 gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
284 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
287 static void __init realview_pb11mp_timer_init(void)
289 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
290 timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
291 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
292 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
294 #ifdef CONFIG_LOCAL_TIMERS
295 twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE);
296 twd_size = REALVIEW_TC11MP_TWD_SIZE;
298 realview_timer_init(IRQ_TC11MP_TIMER0_1);
301 static struct sys_timer realview_pb11mp_timer = {
302 .init = realview_pb11mp_timer_init,
305 static void __init realview_pb11mp_init(void)
309 #ifdef CONFIG_CACHE_L2X0
310 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
311 * Bits: .... ...0 0111 1001 0000 .... .... .... */
312 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
315 clk_register(&realview_clcd_clk);
317 realview_flash_register(realview_pb11mp_flash_resource,
318 ARRAY_SIZE(realview_pb11mp_flash_resource));
319 platform_device_register(&realview_pb11mp_smsc911x_device);
320 platform_device_register(&realview_i2c_device);
321 platform_device_register(&realview_pb11mp_cf_device);
323 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
324 struct amba_device *d = amba_devs[i];
325 amba_device_register(d, &iomem_resource);
329 leds_event = realview_leds_event;
333 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
334 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
335 .phys_io = REALVIEW_PB11MP_UART0_BASE,
336 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
337 .boot_params = 0x00000100,
338 .map_io = realview_pb11mp_map_io,
339 .init_irq = gic_init_irq,
340 .timer = &realview_pb11mp_timer,
341 .init_machine = realview_pb11mp_init,