Merge branch 'next'
[linux-2.6] / drivers / serial / 68360serial.c
1 /*
2  *  UART driver for 68360 CPM SCC or SMC
3  *  Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4  *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5  *  Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
6  *
7  * I used the serial.c driver as the framework for this driver.
8  * Give credit to those guys.
9  * The original code was written for the MBX860 board.  I tried to make
10  * it generic, but there may be some assumptions in the structures that
11  * have to be fixed later.
12  * To save porting time, I did not bother to change any object names
13  * that are not accessed outside of this file.
14  * It still needs lots of work........When it was easy, I included code
15  * to support the SCCs, but this has never been tested, nor is it complete.
16  * Only the SCCs support modem control, so that is not complete either.
17  *
18  * This module exports the following rs232 io functions:
19  *
20  *      int rs_360_init(void);
21  */
22
23 #include <linux/module.h>
24 #include <linux/errno.h>
25 #include <linux/signal.h>
26 #include <linux/sched.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serialP.h> 
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/mm.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <asm/irq.h>
41 #include <asm/m68360.h>
42 #include <asm/commproc.h>
43
44  
45 #ifdef CONFIG_KGDB
46 extern void breakpoint(void);
47 extern void set_debug_traps(void);
48 extern int  kgdb_output_string (const char* s, unsigned int count);
49 #endif
50
51
52 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
53 #include <linux/console.h>
54 #include <linux/jiffies.h>
55
56 /* this defines the index into rs_table for the port to use
57  */
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT      1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
62
63 #if 0
64 /* SCC2 for console
65  */
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT      2
68 #endif
69
70
71 #define TX_WAKEUP       ASYNC_SHARE_IRQ
72
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
75
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
78
79 /*
80  * Serial driver configuration section.  Here are the various options:
81  */
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
85
86 /* Set of debugging defines */
87
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
92
93 #define _INLINE_ inline
94   
95 #define DBG_CNT(s)
96
97 /* We overload some of the items in the data structure to meet our
98  * needs.  For example, the port address is the CPM parameter ram
99  * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
100  * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
101  * a flag indicating SCC or SMC, and the number is used as an index into
102  * the CPM parameter area for this device.
103  * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
104  * not currently used.  I should probably use it to indicate the port
105  * type of SMC or SCC.
106  * The SMCs do not support any modem control signals.
107  */
108 #define smc_scc_num     hub6
109 #define NUM_IS_SCC      ((int)0x00010000)
110 #define PORT_NUM(P)     ((P) & 0x0000ffff)
111
112
113 #if defined (CONFIG_UCQUICC)
114
115 volatile extern void *_periph_base;
116 /* sipex transceiver
117  *   mode bits for       are on pins
118  *
119  *    SCC2                d16..19
120  *    SCC3                d20..23
121  *    SCC4                d24..27
122  */
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
124
125 static uint sipex_mode_bits = 0x00000000;
126
127 #endif
128
129 /* There is no `serial_state' defined back here in 2.0.
130  * Try to get by with serial_struct
131  */
132 /* #define serial_state serial_struct */
133
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135  * extras: */
136
137 #if 0
138 struct async_icount_24 {
139         __u32   cts, dsr, rng, dcd, tx, rx;
140         __u32   frame, parity, overrun, brk;
141         __u32   buf_overrun;
142 } icount;
143 #endif
144
145 #if 0
146
147 struct serial_state {
148         int     magic;
149         int     baud_base;
150         unsigned long   port;
151         int     irq;
152         int     flags;
153         int     hub6;
154         int     type;
155         int     line;
156         int     revision;       /* Chip revision (950) */
157         int     xmit_fifo_size;
158         int     custom_divisor;
159         int     count;
160         u8      *iomem_base;
161         u16     iomem_reg_shift;
162         unsigned short  close_delay;
163         unsigned short  closing_wait; /* time to wait before closing */
164         struct async_icount_24     icount; 
165         int     io_type;
166         struct async_struct *info;
167 };
168 #endif
169
170 #define SSTATE_MAGIC 0x5302
171
172
173
174 /* SMC2 is sometimes used for low performance TDM interfaces.  Define
175  * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176  * Define this as 0 if you wish to use SMC2 for something else.
177  */
178 #define USE_SMC2 1
179
180 #if 0
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE    (USE_SMC2 + 1)  /* SCC base tty "number" */
183
184 /* Define which SCC is the first one to use for a serial port.  These
185  * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186  * for Ethernet, and the first available SCC for serial UART is SCC2.
187  * NOTE:  IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188  * interrupt vectors in the table below to match.
189  */
190 #define SCC_IDX_BASE    1       /* table index */
191 #endif
192
193
194 /* Processors other than the 860 only get SMCs configured by default.
195  * Either they don't have SCCs or they are allocated somewhere else.
196  * Of course, there are now 860s without some SCCs, so we will need to
197  * address that someday.
198  * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199  * stereo codec parts, and we use SMC2 to help support that.
200  */
201 static struct serial_state rs_table[] = {
202 /*  type   line   PORT           IRQ       FLAGS  smc_scc_num (F.K.A. hub6) */
203         {  0,     0, PRSLOT_SMC1, CPMVEC_SMC1,   0,    0 }    /* SMC1 ttyS0 */
204 #if USE_SMC2
205         ,{ 0,     0, PRSLOT_SMC2, CPMVEC_SMC2,   0,    1 }     /* SMC2 ttyS1 */
206 #endif
207
208 #if defined(CONFIG_SERIAL_68360_SCC)
209         ,{ 0,     0, PRSLOT_SCC2, CPMVEC_SCC2,   0, (NUM_IS_SCC | 1) }    /* SCC2 ttyS2 */
210         ,{ 0,     0, PRSLOT_SCC3, CPMVEC_SCC3,   0, (NUM_IS_SCC | 2) }    /* SCC3 ttyS3 */
211         ,{ 0,     0, PRSLOT_SCC4, CPMVEC_SCC4,   0, (NUM_IS_SCC | 3) }    /* SCC4 ttyS4 */
212 #endif
213 };
214
215 #define NR_PORTS        (sizeof(rs_table)/sizeof(struct serial_state))
216
217 /* The number of buffer descriptors and their sizes.
218  */
219 #define RX_NUM_FIFO     4
220 #define RX_BUF_SIZE     32
221 #define TX_NUM_FIFO     4
222 #define TX_BUF_SIZE     32
223
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
226
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
228
229 /* The async_struct in serial.h does not really give us what we
230  * need, so define our own here.
231  */
232 typedef struct serial_info {
233         int                     magic;
234         int                     flags;
235
236         struct serial_state     *state;
237         /* struct serial_struct *state; */
238         /* struct async_struct  *state; */
239         
240         struct tty_struct       *tty;
241         int                     read_status_mask;
242         int                     ignore_status_mask;
243         int                     timeout;
244         int                     line;
245         int                     x_char; /* xon/xoff character */
246         int                     close_delay;
247         unsigned short          closing_wait;
248         unsigned short          closing_wait2;
249         unsigned long           event;
250         unsigned long           last_active;
251         int                     blocked_open; /* # of blocked opens */
252         struct work_struct      tqueue;
253         struct work_struct      tqueue_hangup;
254         wait_queue_head_t       open_wait; 
255         wait_queue_head_t       close_wait; 
256
257         
258 /* CPM Buffer Descriptor pointers.
259         */
260         QUICC_BD                        *rx_bd_base;
261         QUICC_BD                        *rx_cur;
262         QUICC_BD                        *tx_bd_base;
263         QUICC_BD                        *tx_cur;
264 } ser_info_t;
265
266
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t  quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
271
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
274
275 static inline int serial_paranoia_check(ser_info_t *info,
276                                         char *name, const char *routine)
277 {
278 #ifdef SERIAL_PARANOIA_CHECK
279         static const char *badmagic =
280                 "Warning: bad magic number for serial struct (%s) in %s\n";
281         static const char *badinfo =
282                 "Warning: null async_struct for (%s) in %s\n";
283
284         if (!info) {
285                 printk(badinfo, name, routine);
286                 return 1;
287         }
288         if (info->magic != SERIAL_MAGIC) {
289                 printk(badmagic, name, routine);
290                 return 1;
291         }
292 #endif
293         return 0;
294 }
295
296 /*
297  * This is used to figure out the divisor speeds and the timeouts,
298  * indexed by the termio value.  The generic CPM functions are responsible
299  * for setting and assigning baud rate generators for us.
300  */
301 static int baud_table[] = {
302         0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303         9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
304
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307   #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309   #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311   #define CONSOLE_BAUDRATE 115200
312 #else
313   #warning "console baud rate undefined"
314   #define CONSOLE_BAUDRATE 9600
315 #endif
316
317 /*
318  * ------------------------------------------------------------
319  * rs_stop() and rs_start()
320  *
321  * This routines are called before setting or resetting tty->stopped.
322  * They enable or disable transmitter interrupts, as necessary.
323  * ------------------------------------------------------------
324  */
325 static void rs_360_stop(struct tty_struct *tty)
326 {
327         ser_info_t *info = (ser_info_t *)tty->driver_data;
328         int     idx;
329         unsigned long flags;
330         volatile struct scc_regs *sccp;
331         volatile struct smc_regs *smcp;
332
333         if (serial_paranoia_check(info, tty->name, "rs_stop"))
334                 return;
335         
336         local_irq_save(flags);
337         idx = PORT_NUM(info->state->smc_scc_num);
338         if (info->state->smc_scc_num & NUM_IS_SCC) {
339                 sccp = &pquicc->scc_regs[idx];
340                 sccp->scc_sccm &= ~UART_SCCM_TX;
341         } else {
342                 /* smcp = &cpmp->cp_smc[idx]; */
343                 smcp = &pquicc->smc_regs[idx];
344                 smcp->smc_smcm &= ~SMCM_TX;
345         }
346         local_irq_restore(flags);
347 }
348
349
350 static void rs_360_start(struct tty_struct *tty)
351 {
352         ser_info_t *info = (ser_info_t *)tty->driver_data;
353         int     idx;
354         unsigned long flags;
355         volatile struct scc_regs *sccp;
356         volatile struct smc_regs *smcp;
357
358         if (serial_paranoia_check(info, tty->name, "rs_stop"))
359                 return;
360         
361         local_irq_save(flags);
362         idx = PORT_NUM(info->state->smc_scc_num);
363         if (info->state->smc_scc_num & NUM_IS_SCC) {
364                 sccp = &pquicc->scc_regs[idx];
365                 sccp->scc_sccm |= UART_SCCM_TX;
366         } else {
367                 smcp = &pquicc->smc_regs[idx];
368                 smcp->smc_smcm |= SMCM_TX;
369         }
370         local_irq_restore(flags);
371 }
372
373 /*
374  * ----------------------------------------------------------------------
375  *
376  * Here starts the interrupt handling routines.  All of the following
377  * subroutines are declared as inline and are folded into
378  * rs_interrupt().  They were separated out for readability's sake.
379  *
380  * Note: rs_interrupt() is a "fast" interrupt, which means that it
381  * runs with interrupts turned off.  People who may want to modify
382  * rs_interrupt() should try to keep the interrupt handler as fast as
383  * possible.  After you are done making modifications, it is not a bad
384  * idea to do:
385  * 
386  * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
387  *
388  * and look at the resulting assemble code in serial.s.
389  *
390  *                              - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391  * -----------------------------------------------------------------------
392  */
393
394 static _INLINE_ void receive_chars(ser_info_t *info)
395 {
396         struct tty_struct *tty = info->port.tty;
397         unsigned char ch, flag, *cp;
398         /*int   ignored = 0;*/
399         int     i;
400         ushort  status;
401          struct async_icount *icount; 
402         /* struct       async_icount_24 *icount; */
403         volatile QUICC_BD       *bdp;
404
405         icount = &info->state->icount;
406
407         /* Just loop through the closed BDs and copy the characters into
408          * the buffer.
409          */
410         bdp = info->rx_cur;
411         for (;;) {
412                 if (bdp->status & BD_SC_EMPTY)  /* If this one is empty */
413                         break;                  /*   we are all done */
414
415                 /* The read status mask tell us what we should do with
416                  * incoming characters, especially if errors occur.
417                  * One special case is the use of BD_SC_EMPTY.  If
418                  * this is not set, we are supposed to be ignoring
419                  * inputs.  In this case, just mark the buffer empty and
420                  * continue.
421                  */
422                 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423                         bdp->status |= BD_SC_EMPTY;
424                         bdp->status &=
425                                 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
426
427                         if (bdp->status & BD_SC_WRAP)
428                                 bdp = info->rx_bd_base;
429                         else
430                                 bdp++;
431                         continue;
432                 }
433
434                 /* Get the number of characters and the buffer pointer.
435                 */
436                 i = bdp->length;
437                 /* cp = (unsigned char *)__va(bdp->buf); */
438                 cp = (char *)bdp->buf;
439                 status = bdp->status;
440
441                 while (i-- > 0) {
442                         ch = *cp++;
443                         icount->rx++;
444
445 #ifdef SERIAL_DEBUG_INTR
446                         printk("DR%02x:%02x...", ch, status);
447 #endif
448                         flag = TTY_NORMAL;
449
450                         if (status & (BD_SC_BR | BD_SC_FR |
451                                        BD_SC_PR | BD_SC_OV)) {
452                                 /*
453                                  * For statistics only
454                                  */
455                                 if (status & BD_SC_BR)
456                                         icount->brk++;
457                                 else if (status & BD_SC_PR)
458                                         icount->parity++;
459                                 else if (status & BD_SC_FR)
460                                         icount->frame++;
461                                 if (status & BD_SC_OV)
462                                         icount->overrun++;
463
464                                 /*
465                                  * Now check to see if character should be
466                                  * ignored, and mask off conditions which
467                                  * should be ignored.
468                                 if (status & info->ignore_status_mask) {
469                                         if (++ignored > 100)
470                                                 break;
471                                         continue;
472                                 }
473                                  */
474                                 status &= info->read_status_mask;
475                 
476                                 if (status & (BD_SC_BR)) {
477 #ifdef SERIAL_DEBUG_INTR
478                                         printk("handling break....");
479 #endif
480                                         *tty->flip.flag_buf_ptr = TTY_BREAK;
481                                         if (info->flags & ASYNC_SAK)
482                                                 do_SAK(tty);
483                                 } else if (status & BD_SC_PR)
484                                         flag = TTY_PARITY;
485                                 else if (status & BD_SC_FR)
486                                         flag = TTY_FRAME;
487                         }
488                         tty_insert_flip_char(tty, ch, flag);
489                         if (status & BD_SC_OV)
490                                 /*
491                                  * Overrun is special, since it's
492                                  * reported immediately, and doesn't
493                                  * affect the current character
494                                  */
495                                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
496                 }
497
498                 /* This BD is ready to be used again.  Clear status.
499                  * Get next BD.
500                  */
501                 bdp->status |= BD_SC_EMPTY;
502                 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
503
504                 if (bdp->status & BD_SC_WRAP)
505                         bdp = info->rx_bd_base;
506                 else
507                         bdp++;
508         }
509
510         info->rx_cur = (QUICC_BD *)bdp;
511
512         tty_schedule_flip(tty);
513 }
514
515 static _INLINE_ void receive_break(ser_info_t *info)
516 {
517         struct tty_struct *tty = info->port.tty;
518
519         info->state->icount.brk++;
520         /* Check to see if there is room in the tty buffer for
521          * the break.  If not, we exit now, losing the break.  FIXME
522          */
523         tty_insert_flip_char(tty, 0, TTY_BREAK);
524         tty_schedule_flip(tty);
525 }
526
527 static _INLINE_ void transmit_chars(ser_info_t *info)
528 {
529
530         if ((info->flags & TX_WAKEUP) ||
531             (info->port.tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
532                 schedule_work(&info->tqueue);
533         }
534
535 #ifdef SERIAL_DEBUG_INTR
536         printk("THRE...");
537 #endif
538 }
539
540 #ifdef notdef
541         /* I need to do this for the SCCs, so it is left as a reminder.
542         */
543 static _INLINE_ void check_modem_status(struct async_struct *info)
544 {
545         int     status;
546         /* struct       async_icount *icount; */
547         struct  async_icount_24 *icount;
548         
549         status = serial_in(info, UART_MSR);
550
551         if (status & UART_MSR_ANY_DELTA) {
552                 icount = &info->state->icount;
553                 /* update input line counters */
554                 if (status & UART_MSR_TERI)
555                         icount->rng++;
556                 if (status & UART_MSR_DDSR)
557                         icount->dsr++;
558                 if (status & UART_MSR_DDCD) {
559                         icount->dcd++;
560 #ifdef CONFIG_HARD_PPS
561                         if ((info->flags & ASYNC_HARDPPS_CD) &&
562                             (status & UART_MSR_DCD))
563                                 hardpps();
564 #endif
565                 }
566                 if (status & UART_MSR_DCTS)
567                         icount->cts++;
568                 wake_up_interruptible(&info->delta_msr_wait);
569         }
570
571         if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
572 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
573                 printk("ttys%d CD now %s...", info->line,
574                        (status & UART_MSR_DCD) ? "on" : "off");
575 #endif          
576                 if (status & UART_MSR_DCD)
577                         wake_up_interruptible(&info->open_wait);
578                 else {
579 #ifdef SERIAL_DEBUG_OPEN
580                         printk("scheduling hangup...");
581 #endif
582                         queue_task(&info->tqueue_hangup,
583                                            &tq_scheduler);
584                 }
585         }
586         if (info->flags & ASYNC_CTS_FLOW) {
587                 if (info->port.tty->hw_stopped) {
588                         if (status & UART_MSR_CTS) {
589 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
590                                 printk("CTS tx start...");
591 #endif
592                                 info->port.tty->hw_stopped = 0;
593                                 info->IER |= UART_IER_THRI;
594                                 serial_out(info, UART_IER, info->IER);
595                                 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
596                                 return;
597                         }
598                 } else {
599                         if (!(status & UART_MSR_CTS)) {
600 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
601                                 printk("CTS tx stop...");
602 #endif
603                                 info->port.tty->hw_stopped = 1;
604                                 info->IER &= ~UART_IER_THRI;
605                                 serial_out(info, UART_IER, info->IER);
606                         }
607                 }
608         }
609 }
610 #endif
611
612 /*
613  * This is the serial driver's interrupt routine for a single port
614  */
615 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
616 static void rs_360_interrupt(int vec, void *dev_id)
617 {
618         u_char  events;
619         int     idx;
620         ser_info_t *info;
621         volatile struct smc_regs *smcp;
622         volatile struct scc_regs *sccp;
623         
624         info = dev_id;
625
626         idx = PORT_NUM(info->state->smc_scc_num);
627         if (info->state->smc_scc_num & NUM_IS_SCC) {
628                 sccp = &pquicc->scc_regs[idx];
629                 events = sccp->scc_scce;
630                 if (events & SCCM_RX)
631                         receive_chars(info);
632                 if (events & SCCM_TX)
633                         transmit_chars(info);
634                 sccp->scc_scce = events;
635         } else {
636                 smcp = &pquicc->smc_regs[idx];
637                 events = smcp->smc_smce;
638                 if (events & SMCM_BRKE)
639                         receive_break(info);
640                 if (events & SMCM_RX)
641                         receive_chars(info);
642                 if (events & SMCM_TX)
643                         transmit_chars(info);
644                 smcp->smc_smce = events;
645         }
646         
647 #ifdef SERIAL_DEBUG_INTR
648         printk("rs_interrupt_single(%d, %x)...",
649                                         info->state->smc_scc_num, events);
650 #endif
651 #ifdef modem_control
652         check_modem_status(info);
653 #endif
654         info->last_active = jiffies;
655 #ifdef SERIAL_DEBUG_INTR
656         printk("end.\n");
657 #endif
658 }
659
660
661 /*
662  * -------------------------------------------------------------------
663  * Here ends the serial interrupt routines.
664  * -------------------------------------------------------------------
665  */
666
667
668 static void do_softint(void *private_)
669 {
670         ser_info_t      *info = (ser_info_t *) private_;
671         struct tty_struct       *tty;
672         
673         tty = info->port.tty;
674         if (!tty)
675                 return;
676
677         if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
678                 tty_wakeup(tty);
679 }
680
681
682 /*
683  * This routine is called from the scheduler tqueue when the interrupt
684  * routine has signalled that a hangup has occurred.  The path of
685  * hangup processing is:
686  *
687  *      serial interrupt routine -> (scheduler tqueue) ->
688  *      do_serial_hangup() -> tty->hangup() -> rs_hangup()
689  * 
690  */
691 static void do_serial_hangup(void *private_)
692 {
693         struct async_struct     *info = (struct async_struct *) private_;
694         struct tty_struct       *tty;
695         
696         tty = info->port.tty;
697         if (!tty)
698                 return;
699
700         tty_hangup(tty);
701 }
702
703
704 static int startup(ser_info_t *info)
705 {
706         unsigned long flags;
707         int     retval=0;
708         int     idx;
709         /*struct serial_state *state = info->state;*/
710         volatile struct smc_regs *smcp;
711         volatile struct scc_regs *sccp;
712         volatile struct smc_uart_pram   *up;
713         volatile struct uart_pram           *scup;
714
715
716         local_irq_save(flags);
717
718         if (info->flags & ASYNC_INITIALIZED) {
719                 goto errout;
720         }
721
722 #ifdef maybe
723         if (!state->port || !state->type) {
724                 if (info->port.tty)
725                         set_bit(TTY_IO_ERROR, &info->port.tty->flags);
726                 goto errout;
727         }
728 #endif
729
730 #ifdef SERIAL_DEBUG_OPEN
731         printk("starting up ttys%d (irq %d)...", info->line, state->irq);
732 #endif
733
734
735 #ifdef modem_control
736         info->MCR = 0;
737         if (info->port.tty->termios->c_cflag & CBAUD)
738                 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
739 #endif
740         
741         if (info->port.tty)
742                 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
743
744         /*
745          * and set the speed of the serial port
746          */
747         change_speed(info);
748
749         idx = PORT_NUM(info->state->smc_scc_num);
750         if (info->state->smc_scc_num & NUM_IS_SCC) {
751                 sccp = &pquicc->scc_regs[idx];
752                 scup = &pquicc->pram[info->state->port].scc.pscc.u;
753
754                 scup->mrblr = RX_BUF_SIZE;
755                 scup->max_idl = RX_BUF_SIZE;
756
757                 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
758                 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
759
760         } else {
761                 smcp = &pquicc->smc_regs[idx];
762
763                 /* Enable interrupts and I/O.
764                 */
765                 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
766                 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
767
768                 /* We can tune the buffer length and idle characters
769                  * to take advantage of the entire incoming buffer size.
770                  * If mrblr is something other than 1, maxidl has to be
771                  * non-zero or we never get an interrupt.  The maxidl
772                  * is the number of character times we wait after reception
773                  * of the last character before we decide no more characters
774                  * are coming.
775                  */
776                 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
777                 /* holy unionized structures, Batman: */
778                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
779
780                 up->mrblr = RX_BUF_SIZE;
781                 up->max_idl = RX_BUF_SIZE;
782
783                 up->brkcr = 1;  /* number of break chars */
784         }
785
786         info->flags |= ASYNC_INITIALIZED;
787         local_irq_restore(flags);
788         return 0;
789         
790 errout:
791         local_irq_restore(flags);
792         return retval;
793 }
794
795 /*
796  * This routine will shutdown a serial port; interrupts are disabled, and
797  * DTR is dropped if the hangup on close termio flag is on.
798  */
799 static void shutdown(ser_info_t *info)
800 {
801         unsigned long   flags;
802         struct serial_state *state;
803         int             idx;
804         volatile struct smc_regs        *smcp;
805         volatile struct scc_regs        *sccp;
806
807         if (!(info->flags & ASYNC_INITIALIZED))
808                 return;
809
810         state = info->state;
811
812 #ifdef SERIAL_DEBUG_OPEN
813         printk("Shutting down serial port %d (irq %d)....", info->line,
814                state->irq);
815 #endif
816         
817         local_irq_save(flags);
818
819         idx = PORT_NUM(state->smc_scc_num);
820         if (state->smc_scc_num & NUM_IS_SCC) {
821                 sccp = &pquicc->scc_regs[idx];
822                 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
823 #ifdef CONFIG_SERIAL_CONSOLE
824                 /* We can't disable the transmitter if this is the
825                  * system console.
826                  */
827                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
828 #endif
829                 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
830         } else {
831                 smcp = &pquicc->smc_regs[idx];
832
833                 /* Disable interrupts and I/O.
834                  */
835                 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
836 #ifdef CONFIG_SERIAL_CONSOLE
837                 /* We can't disable the transmitter if this is the
838                  * system console.
839                  */
840                 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
841 #endif
842                         smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
843         }
844         
845         if (info->port.tty)
846                 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
847
848         info->flags &= ~ASYNC_INITIALIZED;
849         local_irq_restore(flags);
850 }
851
852 /*
853  * This routine is called to set the UART divisor registers to match
854  * the specified baud rate for a serial port.
855  */
856 static void change_speed(ser_info_t *info)
857 {
858         int     baud_rate;
859         unsigned cflag, cval, scval, prev_mode;
860         int     i, bits, sbits, idx;
861         unsigned long   flags;
862         struct serial_state *state;
863         volatile struct smc_regs        *smcp;
864         volatile struct scc_regs        *sccp;
865
866         if (!info->port.tty || !info->port.tty->termios)
867                 return;
868         cflag = info->port.tty->termios->c_cflag;
869
870         state = info->state;
871
872         /* Character length programmed into the mode register is the
873          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
874          * 1 or 2 stop bits, minus 1.
875          * The value 'bits' counts this for us.
876          */
877         cval = 0;
878         scval = 0;
879
880         /* byte size and parity */
881         switch (cflag & CSIZE) {
882               case CS5: bits = 5; break;
883               case CS6: bits = 6; break;
884               case CS7: bits = 7; break;
885               case CS8: bits = 8; break;
886               /* Never happens, but GCC is too dumb to figure it out */
887               default:  bits = 8; break;
888         }
889         sbits = bits - 5;
890
891         if (cflag & CSTOPB) {
892                 cval |= SMCMR_SL;       /* Two stops */
893                 scval |= SCU_PMSR_SL;
894                 bits++;
895         }
896         if (cflag & PARENB) {
897                 cval |= SMCMR_PEN;
898                 scval |= SCU_PMSR_PEN;
899                 bits++;
900         }
901         if (!(cflag & PARODD)) {
902                 cval |= SMCMR_PM_EVEN;
903                 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
904         }
905
906         /* Determine divisor based on baud rate */
907         i = cflag & CBAUD;
908         if (i >= (sizeof(baud_table)/sizeof(int)))
909                 baud_rate = 9600;
910         else
911                 baud_rate = baud_table[i];
912
913         info->timeout = (TX_BUF_SIZE*HZ*bits);
914         info->timeout += HZ/50;         /* Add .02 seconds of slop */
915
916 #ifdef modem_control
917         /* CTS flow control flag and modem status interrupts */
918         info->IER &= ~UART_IER_MSI;
919         if (info->flags & ASYNC_HARDPPS_CD)
920                 info->IER |= UART_IER_MSI;
921         if (cflag & CRTSCTS) {
922                 info->flags |= ASYNC_CTS_FLOW;
923                 info->IER |= UART_IER_MSI;
924         } else
925                 info->flags &= ~ASYNC_CTS_FLOW;
926         if (cflag & CLOCAL)
927                 info->flags &= ~ASYNC_CHECK_CD;
928         else {
929                 info->flags |= ASYNC_CHECK_CD;
930                 info->IER |= UART_IER_MSI;
931         }
932         serial_out(info, UART_IER, info->IER);
933 #endif
934
935         /*
936          * Set up parity check flag
937          */
938         info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
939         if (I_INPCK(info->port.tty))
940                 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
941         if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
942                 info->read_status_mask |= BD_SC_BR;
943         
944         /*
945          * Characters to ignore
946          */
947         info->ignore_status_mask = 0;
948         if (I_IGNPAR(info->port.tty))
949                 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
950         if (I_IGNBRK(info->port.tty)) {
951                 info->ignore_status_mask |= BD_SC_BR;
952                 /*
953                  * If we're ignore parity and break indicators, ignore 
954                  * overruns too.  (For real raw support).
955                  */
956                 if (I_IGNPAR(info->port.tty))
957                         info->ignore_status_mask |= BD_SC_OV;
958         }
959         /*
960          * !!! ignore all characters if CREAD is not set
961          */
962         if ((cflag & CREAD) == 0)
963          info->read_status_mask &= ~BD_SC_EMPTY;
964          local_irq_save(flags);
965
966          /* Start bit has not been added (so don't, because we would just
967           * subtract it later), and we need to add one for the number of
968           * stops bits (there is always at least one).
969           */
970          bits++;
971          idx = PORT_NUM(state->smc_scc_num);
972          if (state->smc_scc_num & NUM_IS_SCC) {
973          sccp = &pquicc->scc_regs[idx];
974          sccp->scc_psmr = (sbits << 12) | scval;
975      } else {
976          smcp = &pquicc->smc_regs[idx];
977
978                 /* Set the mode register.  We want to keep a copy of the
979                  * enables, because we want to put them back if they were
980                  * present.
981                  */
982                 prev_mode = smcp->smc_smcmr;
983                 smcp->smc_smcmr = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
984                 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
985         }
986
987         m360_cpm_setbrg((state - rs_table), baud_rate);
988
989         local_irq_restore(flags);
990 }
991
992 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
993 {
994         ser_info_t *info = (ser_info_t *)tty->driver_data;
995         volatile QUICC_BD       *bdp;
996
997         if (serial_paranoia_check(info, tty->name, "rs_put_char"))
998                 return 0;
999
1000         if (!tty)
1001                 return 0;
1002
1003         bdp = info->tx_cur;
1004         while (bdp->status & BD_SC_READY);
1005
1006         /* *((char *)__va(bdp->buf)) = ch; */
1007         *((char *)bdp->buf) = ch;
1008         bdp->length = 1;
1009         bdp->status |= BD_SC_READY;
1010
1011         /* Get next BD.
1012         */
1013         if (bdp->status & BD_SC_WRAP)
1014                 bdp = info->tx_bd_base;
1015         else
1016                 bdp++;
1017
1018         info->tx_cur = (QUICC_BD *)bdp;
1019         return 1;
1020
1021 }
1022
1023 static int rs_360_write(struct tty_struct * tty,
1024                     const unsigned char *buf, int count)
1025 {
1026         int     c, ret = 0;
1027         ser_info_t *info = (ser_info_t *)tty->driver_data;
1028         volatile QUICC_BD *bdp;
1029
1030 #ifdef CONFIG_KGDB
1031         /* Try to let stub handle output. Returns true if it did. */ 
1032         if (kgdb_output_string(buf, count))
1033                 return ret;
1034 #endif
1035
1036         if (serial_paranoia_check(info, tty->name, "rs_write"))
1037                 return 0;
1038
1039         if (!tty) 
1040                 return 0;
1041
1042         bdp = info->tx_cur;
1043
1044         while (1) {
1045                 c = min(count, TX_BUF_SIZE);
1046
1047                 if (c <= 0)
1048                         break;
1049
1050                 if (bdp->status & BD_SC_READY) {
1051                         info->flags |= TX_WAKEUP;
1052                         break;
1053                 }
1054
1055                 /* memcpy(__va(bdp->buf), buf, c); */
1056                 memcpy((void *)bdp->buf, buf, c);
1057
1058                 bdp->length = c;
1059                 bdp->status |= BD_SC_READY;
1060
1061                 buf += c;
1062                 count -= c;
1063                 ret += c;
1064
1065                 /* Get next BD.
1066                 */
1067                 if (bdp->status & BD_SC_WRAP)
1068                         bdp = info->tx_bd_base;
1069                 else
1070                         bdp++;
1071                 info->tx_cur = (QUICC_BD *)bdp;
1072         }
1073         return ret;
1074 }
1075
1076 static int rs_360_write_room(struct tty_struct *tty)
1077 {
1078         ser_info_t *info = (ser_info_t *)tty->driver_data;
1079         int     ret;
1080
1081         if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1082                 return 0;
1083
1084         if ((info->tx_cur->status & BD_SC_READY) == 0) {
1085                 info->flags &= ~TX_WAKEUP;
1086                 ret = TX_BUF_SIZE;
1087         }
1088         else {
1089                 info->flags |= TX_WAKEUP;
1090                 ret = 0;
1091         }
1092         return ret;
1093 }
1094
1095 /* I could track this with transmit counters....maybe later.
1096 */
1097 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1098 {
1099         ser_info_t *info = (ser_info_t *)tty->driver_data;
1100                                 
1101         if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1102                 return 0;
1103         return 0;
1104 }
1105
1106 static void rs_360_flush_buffer(struct tty_struct *tty)
1107 {
1108         ser_info_t *info = (ser_info_t *)tty->driver_data;
1109                                 
1110         if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1111                 return;
1112
1113         /* There is nothing to "flush", whatever we gave the CPM
1114          * is on its way out.
1115          */
1116         tty_wakeup(tty);
1117         info->flags &= ~TX_WAKEUP;
1118 }
1119
1120 /*
1121  * This function is used to send a high-priority XON/XOFF character to
1122  * the device
1123  */
1124 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1125 {
1126         volatile QUICC_BD       *bdp;
1127
1128         ser_info_t *info = (ser_info_t *)tty->driver_data;
1129
1130         if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1131                 return;
1132
1133         bdp = info->tx_cur;
1134         while (bdp->status & BD_SC_READY);
1135
1136         /* *((char *)__va(bdp->buf)) = ch; */
1137         *((char *)bdp->buf) = ch;
1138         bdp->length = 1;
1139         bdp->status |= BD_SC_READY;
1140
1141         /* Get next BD.
1142         */
1143         if (bdp->status & BD_SC_WRAP)
1144                 bdp = info->tx_bd_base;
1145         else
1146                 bdp++;
1147
1148         info->tx_cur = (QUICC_BD *)bdp;
1149 }
1150
1151 /*
1152  * ------------------------------------------------------------
1153  * rs_throttle()
1154  * 
1155  * This routine is called by the upper-layer tty layer to signal that
1156  * incoming characters should be throttled.
1157  * ------------------------------------------------------------
1158  */
1159 static void rs_360_throttle(struct tty_struct * tty)
1160 {
1161         ser_info_t *info = (ser_info_t *)tty->driver_data;
1162 #ifdef SERIAL_DEBUG_THROTTLE
1163         char    buf[64];
1164         
1165         printk("throttle %s: %d....\n", _tty_name(tty, buf),
1166                tty->ldisc.chars_in_buffer(tty));
1167 #endif
1168
1169         if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1170                 return;
1171         
1172         if (I_IXOFF(tty))
1173                 rs_360_send_xchar(tty, STOP_CHAR(tty));
1174
1175 #ifdef modem_control
1176         if (tty->termios->c_cflag & CRTSCTS)
1177                 info->MCR &= ~UART_MCR_RTS;
1178
1179         local_irq_disable();
1180         serial_out(info, UART_MCR, info->MCR);
1181         local_irq_enable();
1182 #endif
1183 }
1184
1185 static void rs_360_unthrottle(struct tty_struct * tty)
1186 {
1187         ser_info_t *info = (ser_info_t *)tty->driver_data;
1188 #ifdef SERIAL_DEBUG_THROTTLE
1189         char    buf[64];
1190         
1191         printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1192                tty->ldisc.chars_in_buffer(tty));
1193 #endif
1194
1195         if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1196                 return;
1197         
1198         if (I_IXOFF(tty)) {
1199                 if (info->x_char)
1200                         info->x_char = 0;
1201                 else
1202                         rs_360_send_xchar(tty, START_CHAR(tty));
1203         }
1204 #ifdef modem_control
1205         if (tty->termios->c_cflag & CRTSCTS)
1206                 info->MCR |= UART_MCR_RTS;
1207         local_irq_disable();
1208         serial_out(info, UART_MCR, info->MCR);
1209         local_irq_enable();
1210 #endif
1211 }
1212
1213 /*
1214  * ------------------------------------------------------------
1215  * rs_ioctl() and friends
1216  * ------------------------------------------------------------
1217  */
1218
1219 #ifdef maybe
1220 /*
1221  * get_lsr_info - get line status register info
1222  *
1223  * Purpose: Let user call ioctl() to get info when the UART physically
1224  *          is emptied.  On bus types like RS485, the transmitter must
1225  *          release the bus after transmitting. This must be done when
1226  *          the transmit shift register is empty, not be done when the
1227  *          transmit holding register is empty.  This functionality
1228  *          allows an RS485 driver to be written in user space. 
1229  */
1230 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1231 {
1232         unsigned char status;
1233         unsigned int result;
1234
1235         local_irq_disable();
1236         status = serial_in(info, UART_LSR);
1237         local_irq_enable();
1238         result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1239         return put_user(result,value);
1240 }
1241 #endif
1242
1243 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1244 {
1245         ser_info_t *info = (ser_info_t *)tty->driver_data;
1246         unsigned int result = 0;
1247 #ifdef modem_control
1248         unsigned char control, status;
1249
1250         if (serial_paranoia_check(info, tty->name, __func__))
1251                 return -ENODEV;
1252
1253         if (tty->flags & (1 << TTY_IO_ERROR))
1254                 return -EIO;
1255
1256         control = info->MCR;
1257         local_irq_disable();
1258         status = serial_in(info, UART_MSR);
1259         local_irq_enable();
1260         result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1261                 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1262 #ifdef TIOCM_OUT1
1263                 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1264                 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1265 #endif
1266                 | ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
1267                 | ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
1268                 | ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
1269                 | ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
1270 #endif
1271         return result;
1272 }
1273
1274 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1275                            unsigned int set, unsigned int clear)
1276 {
1277 #ifdef modem_control
1278         ser_info_t *info = (ser_info_t *)tty->driver_data;
1279         unsigned int arg;
1280
1281         if (serial_paranoia_check(info, tty->name, __func__))
1282                 return -ENODEV;
1283
1284         if (tty->flags & (1 << TTY_IO_ERROR))
1285                 return -EIO;
1286         /* FIXME: locking on info->mcr */
1287         if (set & TIOCM_RTS)
1288                 info->mcr |= UART_MCR_RTS;
1289         if (set & TIOCM_DTR)
1290                 info->mcr |= UART_MCR_DTR;
1291         if (clear & TIOCM_RTS)
1292                 info->MCR &= ~UART_MCR_RTS;
1293         if (clear & TIOCM_DTR)
1294                 info->MCR &= ~UART_MCR_DTR;
1295
1296 #ifdef TIOCM_OUT1
1297         if (set & TIOCM_OUT1)
1298                 info->MCR |= UART_MCR_OUT1;
1299         if (set & TIOCM_OUT2)
1300                 info->MCR |= UART_MCR_OUT2;
1301         if (clear & TIOCM_OUT1)
1302                 info->MCR &= ~UART_MCR_OUT1;
1303         if (clear & TIOCM_OUT2)
1304                 info->MCR &= ~UART_MCR_OUT2;
1305 #endif
1306
1307         local_irq_disable();
1308         serial_out(info, UART_MCR, info->MCR);
1309         local_irq_enable();
1310 #endif
1311         return 0;
1312 }
1313
1314 /* Sending a break is a two step process on the SMC/SCC.  It is accomplished
1315  * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1316  * command.  We take advantage of the begin/end functions to make this
1317  * happen.
1318  */
1319 static ushort   smc_chan_map[] = {
1320         CPM_CR_CH_SMC1,
1321         CPM_CR_CH_SMC2
1322 };
1323
1324 static ushort   scc_chan_map[] = {
1325         CPM_CR_CH_SCC1,
1326         CPM_CR_CH_SCC2,
1327         CPM_CR_CH_SCC3,
1328         CPM_CR_CH_SCC4
1329 };
1330
1331 static void begin_break(ser_info_t *info)
1332 {
1333         volatile QUICC *cp;
1334         ushort  chan;
1335         int     idx;
1336
1337         cp = pquicc;
1338
1339         idx = PORT_NUM(info->state->smc_scc_num);
1340         if (info->state->smc_scc_num & NUM_IS_SCC)
1341                 chan = scc_chan_map[idx];
1342         else
1343                 chan = smc_chan_map[idx];
1344
1345         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1346         while (cp->cp_cr & CPM_CR_FLG);
1347 }
1348
1349 static void end_break(ser_info_t *info)
1350 {
1351         volatile QUICC *cp;
1352         ushort  chan;
1353         int idx;
1354
1355         cp = pquicc;
1356
1357         idx = PORT_NUM(info->state->smc_scc_num);
1358         if (info->state->smc_scc_num & NUM_IS_SCC)
1359                 chan = scc_chan_map[idx];
1360         else
1361                 chan = smc_chan_map[idx];
1362
1363         cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1364         while (cp->cp_cr & CPM_CR_FLG);
1365 }
1366
1367 /*
1368  * This routine sends a break character out the serial port.
1369  */
1370 static void send_break(ser_info_t *info, unsigned int duration)
1371 {
1372 #ifdef SERIAL_DEBUG_SEND_BREAK
1373         printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1374 #endif
1375         begin_break(info);
1376         msleep_interruptible(duration);
1377         end_break(info);
1378 #ifdef SERIAL_DEBUG_SEND_BREAK
1379         printk("done jiffies=%lu\n", jiffies);
1380 #endif
1381 }
1382
1383
1384 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1385                     unsigned int cmd, unsigned long arg)
1386 {
1387         int error;
1388         ser_info_t *info = (ser_info_t *)tty->driver_data;
1389         int retval;
1390         struct async_icount cnow; 
1391         /* struct async_icount_24 cnow;*/       /* kernel counter temps */
1392         struct serial_icounter_struct *p_cuser; /* user space */
1393
1394         if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1395                 return -ENODEV;
1396
1397         if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1398                 if (tty->flags & (1 << TTY_IO_ERROR))
1399                     return -EIO;
1400         }
1401         
1402         switch (cmd) {
1403                 case TCSBRK:    /* SVID version: non-zero arg --> no break */
1404                         retval = tty_check_change(tty);
1405                         if (retval)
1406                                 return retval;
1407                         tty_wait_until_sent(tty, 0);
1408                         if (signal_pending(current))
1409                                 return -EINTR;
1410                         if (!arg) {
1411                                 send_break(info, 250);  /* 1/4 second */
1412                                 if (signal_pending(current))
1413                                         return -EINTR;
1414                         }
1415                         return 0;
1416                 case TCSBRKP:   /* support for POSIX tcsendbreak() */
1417                         retval = tty_check_change(tty);
1418                         if (retval)
1419                                 return retval;
1420                         tty_wait_until_sent(tty, 0);
1421                         if (signal_pending(current))
1422                                 return -EINTR;
1423                         send_break(info, arg ? arg*100 : 250);
1424                         if (signal_pending(current))
1425                                 return -EINTR;
1426                         return 0;
1427                 case TIOCSBRK:
1428                         retval = tty_check_change(tty);
1429                         if (retval)
1430                                 return retval;
1431                         tty_wait_until_sent(tty, 0);
1432                         begin_break(info);
1433                         return 0;
1434                 case TIOCCBRK:
1435                         retval = tty_check_change(tty);
1436                         if (retval)
1437                                 return retval;
1438                         end_break(info);
1439                         return 0;
1440 #ifdef maybe
1441                 case TIOCSERGETLSR: /* Get line status register */
1442                         return get_lsr_info(info, (unsigned int *) arg);
1443 #endif
1444                 /*
1445                  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1446                  * - mask passed in arg for lines of interest
1447                  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1448                  * Caller should use TIOCGICOUNT to see which one it was
1449                  */
1450                  case TIOCMIWAIT:
1451 #ifdef modem_control
1452                         local_irq_disable();
1453                         /* note the counters on entry */
1454                         cprev = info->state->icount;
1455                         local_irq_enable();
1456                         while (1) {
1457                                 interruptible_sleep_on(&info->delta_msr_wait);
1458                                 /* see if a signal did it */
1459                                 if (signal_pending(current))
1460                                         return -ERESTARTSYS;
1461                                 local_irq_disable();
1462                                 cnow = info->state->icount; /* atomic copy */
1463                                 local_irq_enable();
1464                                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
1465                                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1466                                         return -EIO; /* no change => error */
1467                                 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1468                                      ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1469                                      ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
1470                                      ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1471                                         return 0;
1472                                 }
1473                                 cprev = cnow;
1474                         }
1475                         /* NOTREACHED */
1476 #else
1477                         return 0;
1478 #endif
1479
1480                 /* 
1481                  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1482                  * Return: write counters to the user passed counter struct
1483                  * NB: both 1->0 and 0->1 transitions are counted except for
1484                  *     RI where only 0->1 is counted.
1485                  */
1486                 case TIOCGICOUNT:
1487                         local_irq_disable();
1488                         cnow = info->state->icount;
1489                         local_irq_enable();
1490                         p_cuser = (struct serial_icounter_struct *) arg;
1491 /*                      error = put_user(cnow.cts, &p_cuser->cts); */
1492 /*                      if (error) return error; */
1493 /*                      error = put_user(cnow.dsr, &p_cuser->dsr); */
1494 /*                      if (error) return error; */
1495 /*                      error = put_user(cnow.rng, &p_cuser->rng); */
1496 /*                      if (error) return error; */
1497 /*                      error = put_user(cnow.dcd, &p_cuser->dcd); */
1498 /*                      if (error) return error; */
1499
1500                         put_user(cnow.cts, &p_cuser->cts);
1501                         put_user(cnow.dsr, &p_cuser->dsr);
1502                         put_user(cnow.rng, &p_cuser->rng);
1503                         put_user(cnow.dcd, &p_cuser->dcd);
1504                         return 0;
1505
1506                 default:
1507                         return -ENOIOCTLCMD;
1508                 }
1509         return 0;
1510 }
1511
1512 /* FIX UP modem control here someday......
1513 */
1514 static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1515 {
1516         ser_info_t *info = (ser_info_t *)tty->driver_data;
1517
1518         change_speed(info);
1519
1520 #ifdef modem_control
1521         /* Handle transition to B0 status */
1522         if ((old_termios->c_cflag & CBAUD) &&
1523             !(tty->termios->c_cflag & CBAUD)) {
1524                 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1525                 local_irq_disable();
1526                 serial_out(info, UART_MCR, info->MCR);
1527                 local_irq_enable();
1528         }
1529         
1530         /* Handle transition away from B0 status */
1531         if (!(old_termios->c_cflag & CBAUD) &&
1532             (tty->termios->c_cflag & CBAUD)) {
1533                 info->MCR |= UART_MCR_DTR;
1534                 if (!tty->hw_stopped ||
1535                     !(tty->termios->c_cflag & CRTSCTS)) {
1536                         info->MCR |= UART_MCR_RTS;
1537                 }
1538                 local_irq_disable();
1539                 serial_out(info, UART_MCR, info->MCR);
1540                 local_irq_enable();
1541         }
1542         
1543         /* Handle turning off CRTSCTS */
1544         if ((old_termios->c_cflag & CRTSCTS) &&
1545             !(tty->termios->c_cflag & CRTSCTS)) {
1546                 tty->hw_stopped = 0;
1547                 rs_360_start(tty);
1548         }
1549 #endif
1550
1551 #if 0
1552         /*
1553          * No need to wake up processes in open wait, since they
1554          * sample the CLOCAL flag once, and don't recheck it.
1555          * XXX  It's not clear whether the current behavior is correct
1556          * or not.  Hence, this may change.....
1557          */
1558         if (!(old_termios->c_cflag & CLOCAL) &&
1559             (tty->termios->c_cflag & CLOCAL))
1560                 wake_up_interruptible(&info->open_wait);
1561 #endif
1562 }
1563
1564 /*
1565  * ------------------------------------------------------------
1566  * rs_close()
1567  * 
1568  * This routine is called when the serial port gets closed.  First, we
1569  * wait for the last remaining data to be sent.  Then, we unlink its
1570  * async structure from the interrupt chain if necessary, and we free
1571  * that IRQ if nothing is left in the chain.
1572  * ------------------------------------------------------------
1573  */
1574 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1575 {
1576         ser_info_t *info = (ser_info_t *)tty->driver_data;
1577         /* struct async_state *state; */
1578         struct serial_state *state;
1579         unsigned long   flags;
1580         int             idx;
1581         volatile struct smc_regs        *smcp;
1582         volatile struct scc_regs        *sccp;
1583
1584         if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1585                 return;
1586
1587         state = info->state;
1588         
1589         local_irq_save(flags);
1590         
1591         if (tty_hung_up_p(filp)) {
1592                 DBG_CNT("before DEC-hung");
1593                 local_irq_restore(flags);
1594                 return;
1595         }
1596         
1597 #ifdef SERIAL_DEBUG_OPEN
1598         printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1599 #endif
1600         if ((tty->count == 1) && (state->count != 1)) {
1601                 /*
1602                  * Uh, oh.  tty->count is 1, which means that the tty
1603                  * structure will be freed.  state->count should always
1604                  * be one in these conditions.  If it's greater than
1605                  * one, we've got real problems, since it means the
1606                  * serial port won't be shutdown.
1607                  */
1608                 printk("rs_close: bad serial port count; tty->count is 1, "
1609                        "state->count is %d\n", state->count);
1610                 state->count = 1;
1611         }
1612         if (--state->count < 0) {
1613                 printk("rs_close: bad serial port count for ttys%d: %d\n",
1614                        info->line, state->count);
1615                 state->count = 0;
1616         }
1617         if (state->count) {
1618                 DBG_CNT("before DEC-2");
1619                 local_irq_restore(flags);
1620                 return;
1621         }
1622         info->flags |= ASYNC_CLOSING;
1623         /*
1624          * Now we wait for the transmit buffer to clear; and we notify 
1625          * the line discipline to only process XON/XOFF characters.
1626          */
1627         tty->closing = 1;
1628         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1629                 tty_wait_until_sent(tty, info->closing_wait);
1630         /*
1631          * At this point we stop accepting input.  To do this, we
1632          * disable the receive line status interrupts, and tell the
1633          * interrupt driver to stop checking the data ready bit in the
1634          * line status register.
1635          */
1636         info->read_status_mask &= ~BD_SC_EMPTY;
1637         if (info->flags & ASYNC_INITIALIZED) {
1638
1639                 idx = PORT_NUM(info->state->smc_scc_num);
1640                 if (info->state->smc_scc_num & NUM_IS_SCC) {
1641                         sccp = &pquicc->scc_regs[idx];
1642                         sccp->scc_sccm &= ~UART_SCCM_RX;
1643                         sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1644                 } else {
1645                         smcp = &pquicc->smc_regs[idx];
1646                         smcp->smc_smcm &= ~SMCM_RX;
1647                         smcp->smc_smcmr &= ~SMCMR_REN;
1648                 }
1649                 /*
1650                  * Before we drop DTR, make sure the UART transmitter
1651                  * has completely drained; this is especially
1652                  * important if there is a transmit FIFO!
1653                  */
1654                 rs_360_wait_until_sent(tty, info->timeout);
1655         }
1656         shutdown(info);
1657         rs_360_flush_buffer(tty);
1658         tty_ldisc_flush(tty);           
1659         tty->closing = 0;
1660         info->event = 0;
1661         info->port.tty = NULL;
1662         if (info->blocked_open) {
1663                 if (info->close_delay) {
1664                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
1665                 }
1666                 wake_up_interruptible(&info->open_wait);
1667         }
1668         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1669         wake_up_interruptible(&info->close_wait);
1670         local_irq_restore(flags);
1671 }
1672
1673 /*
1674  * rs_wait_until_sent() --- wait until the transmitter is empty
1675  */
1676 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1677 {
1678         ser_info_t *info = (ser_info_t *)tty->driver_data;
1679         unsigned long orig_jiffies, char_time;
1680         /*int lsr;*/
1681         volatile QUICC_BD *bdp;
1682         
1683         if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1684                 return;
1685
1686 #ifdef maybe
1687         if (info->state->type == PORT_UNKNOWN)
1688                 return;
1689 #endif
1690
1691         orig_jiffies = jiffies;
1692         /*
1693          * Set the check interval to be 1/5 of the estimated time to
1694          * send a single character, and make it at least 1.  The check
1695          * interval should also be less than the timeout.
1696          * 
1697          * Note: we have to use pretty tight timings here to satisfy
1698          * the NIST-PCTS.
1699          */
1700         char_time = 1;
1701         if (timeout)
1702                 char_time = min(char_time, (unsigned long)timeout);
1703 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1704         printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1705         printk("jiff=%lu...", jiffies);
1706 #endif
1707
1708         lock_kernel();
1709         /* We go through the loop at least once because we can't tell
1710          * exactly when the last character exits the shifter.  There can
1711          * be at least two characters waiting to be sent after the buffers
1712          * are empty.
1713          */
1714         do {
1715 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1716                 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1717 #endif
1718 /*              current->counter = 0;    make us low-priority */
1719                 msleep_interruptible(jiffies_to_msecs(char_time));
1720                 if (signal_pending(current))
1721                         break;
1722                 if (timeout && (time_after(jiffies, orig_jiffies + timeout)))
1723                         break;
1724                 /* The 'tx_cur' is really the next buffer to send.  We
1725                  * have to back up to the previous BD and wait for it
1726                  * to go.  This isn't perfect, because all this indicates
1727                  * is the buffer is available.  There are still characters
1728                  * in the CPM FIFO.
1729                  */
1730                 bdp = info->tx_cur;
1731                 if (bdp == info->tx_bd_base)
1732                         bdp += (TX_NUM_FIFO-1);
1733                 else
1734                         bdp--;
1735         } while (bdp->status & BD_SC_READY);
1736         current->state = TASK_RUNNING;
1737         unlock_kernel();
1738 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1739         printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1740 #endif
1741 }
1742
1743 /*
1744  * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1745  */
1746 static void rs_360_hangup(struct tty_struct *tty)
1747 {
1748         ser_info_t *info = (ser_info_t *)tty->driver_data;
1749         struct serial_state *state = info->state;
1750         
1751         if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1752                 return;
1753
1754         state = info->state;
1755         
1756         rs_360_flush_buffer(tty);
1757         shutdown(info);
1758         info->event = 0;
1759         state->count = 0;
1760         info->flags &= ~ASYNC_NORMAL_ACTIVE;
1761         info->port.tty = NULL;
1762         wake_up_interruptible(&info->open_wait);
1763 }
1764
1765 /*
1766  * ------------------------------------------------------------
1767  * rs_open() and friends
1768  * ------------------------------------------------------------
1769  */
1770 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1771                            ser_info_t *info)
1772 {
1773 #ifdef DO_THIS_LATER
1774         DECLARE_WAITQUEUE(wait, current);
1775 #endif
1776         struct serial_state *state = info->state;
1777         int             retval;
1778         int             do_clocal = 0;
1779
1780         /*
1781          * If the device is in the middle of being closed, then block
1782          * until it's done, and then try again.
1783          */
1784         if (tty_hung_up_p(filp) ||
1785             (info->flags & ASYNC_CLOSING)) {
1786                 if (info->flags & ASYNC_CLOSING)
1787                         interruptible_sleep_on(&info->close_wait);
1788 #ifdef SERIAL_DO_RESTART
1789                 if (info->flags & ASYNC_HUP_NOTIFY)
1790                         return -EAGAIN;
1791                 else
1792                         return -ERESTARTSYS;
1793 #else
1794                 return -EAGAIN;
1795 #endif
1796         }
1797
1798         /*
1799          * If non-blocking mode is set, or the port is not enabled,
1800          * then make the check up front and then exit.
1801          * If this is an SMC port, we don't have modem control to wait
1802          * for, so just get out here.
1803          */
1804         if ((filp->f_flags & O_NONBLOCK) ||
1805             (tty->flags & (1 << TTY_IO_ERROR)) ||
1806             !(info->state->smc_scc_num & NUM_IS_SCC)) {
1807                 info->flags |= ASYNC_NORMAL_ACTIVE;
1808                 return 0;
1809         }
1810
1811         if (tty->termios->c_cflag & CLOCAL)
1812                 do_clocal = 1;
1813         
1814         /*
1815          * Block waiting for the carrier detect and the line to become
1816          * free (i.e., not in use by the callout).  While we are in
1817          * this loop, state->count is dropped by one, so that
1818          * rs_close() knows when to free things.  We restore it upon
1819          * exit, either normal or abnormal.
1820          */
1821         retval = 0;
1822 #ifdef DO_THIS_LATER
1823         add_wait_queue(&info->open_wait, &wait);
1824 #ifdef SERIAL_DEBUG_OPEN
1825         printk("block_til_ready before block: ttys%d, count = %d\n",
1826                state->line, state->count);
1827 #endif
1828         local_irq_disable();
1829         if (!tty_hung_up_p(filp)) 
1830                 state->count--;
1831         local_irq_enable();
1832         info->blocked_open++;
1833         while (1) {
1834                 local_irq_disable();
1835                 if (tty->termios->c_cflag & CBAUD)
1836                         serial_out(info, UART_MCR,
1837                                    serial_inp(info, UART_MCR) |
1838                                    (UART_MCR_DTR | UART_MCR_RTS));
1839                 local_irq_enable();
1840                 set_current_state(TASK_INTERRUPTIBLE);
1841                 if (tty_hung_up_p(filp) ||
1842                     !(info->flags & ASYNC_INITIALIZED)) {
1843 #ifdef SERIAL_DO_RESTART
1844                         if (info->flags & ASYNC_HUP_NOTIFY)
1845                                 retval = -EAGAIN;
1846                         else
1847                                 retval = -ERESTARTSYS;  
1848 #else
1849                         retval = -EAGAIN;
1850 #endif
1851                         break;
1852                 }
1853                 if (!(info->flags & ASYNC_CLOSING) &&
1854                     (do_clocal || (serial_in(info, UART_MSR) &
1855                                    UART_MSR_DCD)))
1856                         break;
1857                 if (signal_pending(current)) {
1858                         retval = -ERESTARTSYS;
1859                         break;
1860                 }
1861 #ifdef SERIAL_DEBUG_OPEN
1862                 printk("block_til_ready blocking: ttys%d, count = %d\n",
1863                        info->line, state->count);
1864 #endif
1865                 schedule();
1866         }
1867         current->state = TASK_RUNNING;
1868         remove_wait_queue(&info->open_wait, &wait);
1869         if (!tty_hung_up_p(filp))
1870                 state->count++;
1871         info->blocked_open--;
1872 #ifdef SERIAL_DEBUG_OPEN
1873         printk("block_til_ready after blocking: ttys%d, count = %d\n",
1874                info->line, state->count);
1875 #endif
1876 #endif /* DO_THIS_LATER */
1877         if (retval)
1878                 return retval;
1879         info->flags |= ASYNC_NORMAL_ACTIVE;
1880         return 0;
1881 }
1882
1883 static int get_async_struct(int line, ser_info_t **ret_info)
1884 {
1885         struct serial_state *sstate;
1886
1887         sstate = rs_table + line;
1888         if (sstate->info) {
1889                 sstate->count++;
1890                 *ret_info = (ser_info_t *)sstate->info;
1891                 return 0;
1892         }
1893         else {
1894                 return -ENOMEM;
1895         }
1896 }
1897
1898 /*
1899  * This routine is called whenever a serial port is opened.  It
1900  * enables interrupts for a serial port, linking in its async structure into
1901  * the IRQ chain.   It also performs the serial-specific
1902  * initialization for the tty structure.
1903  */
1904 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1905 {
1906         ser_info_t      *info;
1907         int             retval, line;
1908
1909         line = tty->index;
1910         if ((line < 0) || (line >= NR_PORTS))
1911                 return -ENODEV;
1912         retval = get_async_struct(line, &info);
1913         if (retval)
1914                 return retval;
1915         if (serial_paranoia_check(info, tty->name, "rs_open"))
1916                 return -ENODEV;
1917
1918 #ifdef SERIAL_DEBUG_OPEN
1919         printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1920 #endif
1921         tty->driver_data = info;
1922         info->port.tty = tty;
1923
1924         /*
1925          * Start up serial port
1926          */
1927         retval = startup(info);
1928         if (retval)
1929                 return retval;
1930
1931         retval = block_til_ready(tty, filp, info);
1932         if (retval) {
1933 #ifdef SERIAL_DEBUG_OPEN
1934                 printk("rs_open returning after block_til_ready with %d\n",
1935                        retval);
1936 #endif
1937                 return retval;
1938         }
1939
1940 #ifdef SERIAL_DEBUG_OPEN
1941         printk("rs_open %s successful...", tty->name);
1942 #endif
1943         return 0;
1944 }
1945
1946 /*
1947  * /proc fs routines....
1948  */
1949
1950 static inline int line_info(char *buf, struct serial_state *state)
1951 {
1952 #ifdef notdef
1953         struct async_struct *info = state->info, scr_info;
1954         char    stat_buf[30], control, status;
1955 #endif
1956         int     ret;
1957
1958         ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
1959                       state->line,
1960                       (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
1961                       (unsigned int)(state->port), state->irq);
1962
1963         if (!state->port || (state->type == PORT_UNKNOWN)) {
1964                 ret += sprintf(buf+ret, "\n");
1965                 return ret;
1966         }
1967
1968 #ifdef notdef
1969         /*
1970          * Figure out the current RS-232 lines
1971          */
1972         if (!info) {
1973                 info = &scr_info;       /* This is just for serial_{in,out} */
1974
1975                 info->magic = SERIAL_MAGIC;
1976                 info->port = state->port;
1977                 info->flags = state->flags;
1978                 info->quot = 0;
1979                 info->port.tty = NULL;
1980         }
1981         local_irq_disable();
1982         status = serial_in(info, UART_MSR);
1983         control = info ? info->MCR : serial_in(info, UART_MCR);
1984         local_irq_enable();
1985         
1986         stat_buf[0] = 0;
1987         stat_buf[1] = 0;
1988         if (control & UART_MCR_RTS)
1989                 strcat(stat_buf, "|RTS");
1990         if (status & UART_MSR_CTS)
1991                 strcat(stat_buf, "|CTS");
1992         if (control & UART_MCR_DTR)
1993                 strcat(stat_buf, "|DTR");
1994         if (status & UART_MSR_DSR)
1995                 strcat(stat_buf, "|DSR");
1996         if (status & UART_MSR_DCD)
1997                 strcat(stat_buf, "|CD");
1998         if (status & UART_MSR_RI)
1999                 strcat(stat_buf, "|RI");
2000
2001         if (info->quot) {
2002                 ret += sprintf(buf+ret, " baud:%d",
2003                                state->baud_base / info->quot);
2004         }
2005
2006         ret += sprintf(buf+ret, " tx:%d rx:%d",
2007                       state->icount.tx, state->icount.rx);
2008
2009         if (state->icount.frame)
2010                 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2011         
2012         if (state->icount.parity)
2013                 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2014         
2015         if (state->icount.brk)
2016                 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);  
2017
2018         if (state->icount.overrun)
2019                 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2020
2021         /*
2022          * Last thing is the RS-232 status lines
2023          */
2024         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2025 #endif
2026         return ret;
2027 }
2028
2029 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2030                  int *eof, void *data)
2031 {
2032         int i, len = 0;
2033         off_t   begin = 0;
2034
2035         len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2036         for (i = 0; i < NR_PORTS && len < 4000; i++) {
2037                 len += line_info(page + len, &rs_table[i]);
2038                 if (len+begin > off+count)
2039                         goto done;
2040                 if (len+begin < off) {
2041                         begin += len;
2042                         len = 0;
2043                 }
2044         }
2045         *eof = 1;
2046 done:
2047         if (off >= len+begin)
2048                 return 0;
2049         *start = page + (begin-off);
2050         return ((count < begin+len-off) ? count : begin+len-off);
2051 }
2052
2053 /*
2054  * ---------------------------------------------------------------------
2055  * rs_init() and friends
2056  *
2057  * rs_init() is called at boot-time to initialize the serial driver.
2058  * ---------------------------------------------------------------------
2059  */
2060
2061 /*
2062  * This routine prints out the appropriate serial driver version
2063  * number, and identifies which options were configured into this
2064  * driver.
2065  */
2066 static _INLINE_ void show_serial_version(void)
2067 {
2068         printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2069 }
2070
2071
2072 /*
2073  * The serial console driver used during boot.  Note that these names
2074  * clash with those found in "serial.c", so we currently can't support
2075  * the 16xxx uarts and these at the same time.  I will fix this to become
2076  * an indirect function call from tty_io.c (or something).
2077  */
2078
2079 #ifdef CONFIG_SERIAL_CONSOLE
2080
2081 /*
2082  * Print a string to the serial port trying not to disturb any possible
2083  * real use of the port...
2084  */
2085 static void my_console_write(int idx, const char *s,
2086                                 unsigned count)
2087 {
2088         struct          serial_state    *ser;
2089         ser_info_t              *info;
2090         unsigned                i;
2091         QUICC_BD                *bdp, *bdbase;
2092         volatile struct smc_uart_pram   *up;
2093         volatile        u_char          *cp;
2094
2095         ser = rs_table + idx;
2096
2097
2098         /* If the port has been initialized for general use, we have
2099          * to use the buffer descriptors allocated there.  Otherwise,
2100          * we simply use the single buffer allocated.
2101          */
2102         if ((info = (ser_info_t *)ser->info) != NULL) {
2103                 bdp = info->tx_cur;
2104                 bdbase = info->tx_bd_base;
2105         }
2106         else {
2107                 /* Pointer to UART in parameter ram.
2108                 */
2109                 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2110                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2111
2112                 /* Get the address of the host memory buffer.
2113                  */
2114                 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2115         }
2116
2117         /*
2118          * We need to gracefully shut down the transmitter, disable
2119          * interrupts, then send our bytes out.
2120          */
2121
2122         /*
2123          * Now, do each character.  This is not as bad as it looks
2124          * since this is a holding FIFO and not a transmitting FIFO.
2125          * We could add the complexity of filling the entire transmit
2126          * buffer, but we would just wait longer between accesses......
2127          */
2128         for (i = 0; i < count; i++, s++) {
2129                 /* Wait for transmitter fifo to empty.
2130                  * Ready indicates output is ready, and xmt is doing
2131                  * that, not that it is ready for us to send.
2132                  */
2133                 while (bdp->status & BD_SC_READY);
2134
2135                 /* Send the character out.
2136                  */
2137                 cp = bdp->buf;
2138                 *cp = *s;
2139                 
2140                 bdp->length = 1;
2141                 bdp->status |= BD_SC_READY;
2142
2143                 if (bdp->status & BD_SC_WRAP)
2144                         bdp = bdbase;
2145                 else
2146                         bdp++;
2147
2148                 /* if a LF, also do CR... */
2149                 if (*s == 10) {
2150                         while (bdp->status & BD_SC_READY);
2151                         /* cp = __va(bdp->buf); */
2152                         cp = bdp->buf;
2153                         *cp = 13;
2154                         bdp->length = 1;
2155                         bdp->status |= BD_SC_READY;
2156
2157                         if (bdp->status & BD_SC_WRAP) {
2158                                 bdp = bdbase;
2159                         }
2160                         else {
2161                                 bdp++;
2162                         }
2163                 }
2164         }
2165
2166         /*
2167          * Finally, Wait for transmitter & holding register to empty
2168          *  and restore the IER
2169          */
2170         while (bdp->status & BD_SC_READY);
2171
2172         if (info)
2173                 info->tx_cur = (QUICC_BD *)bdp;
2174 }
2175
2176 static void serial_console_write(struct console *c, const char *s,
2177                                 unsigned count)
2178 {
2179 #ifdef CONFIG_KGDB
2180         /* Try to let stub handle output. Returns true if it did. */ 
2181         if (kgdb_output_string(s, count))
2182                 return;
2183 #endif
2184         my_console_write(c->index, s, count);
2185 }
2186
2187
2188
2189 /*void console_print_68360(const char *p)
2190 {
2191         const char *cp = p;
2192         int i;
2193
2194         for (i=0;cp[i]!=0;i++);
2195
2196         serial_console_write (p, i);
2197
2198         //Comment this if you want to have a strict interrupt-driven output
2199         //rs_fair_output();
2200
2201         return;
2202 }*/
2203
2204
2205
2206
2207
2208
2209 #ifdef CONFIG_XMON
2210 int
2211 xmon_360_write(const char *s, unsigned count)
2212 {
2213         my_console_write(0, s, count);
2214         return(count);
2215 }
2216 #endif
2217
2218 #ifdef CONFIG_KGDB
2219 void
2220 putDebugChar(char ch)
2221 {
2222         my_console_write(0, &ch, 1);
2223 }
2224 #endif
2225
2226 /*
2227  * Receive character from the serial port.  This only works well
2228  * before the port is initialized for real use.
2229  */
2230 static int my_console_wait_key(int idx, int xmon, char *obuf)
2231 {
2232         struct serial_state             *ser;
2233         u_char                  c, *cp;
2234         ser_info_t              *info;
2235         QUICC_BD                *bdp;
2236         volatile struct smc_uart_pram   *up;
2237         int                             i;
2238
2239         ser = rs_table + idx;
2240
2241         /* Get the address of the host memory buffer.
2242          * If the port has been initialized for general use, we must
2243          * use information from the port structure.
2244          */
2245         if ((info = (ser_info_t *)ser->info))
2246                 bdp = info->rx_cur;
2247         else
2248                 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2249                 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2250
2251         /* Pointer to UART in parameter ram.
2252          */
2253         /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2254         up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2255
2256         /*
2257          * We need to gracefully shut down the receiver, disable
2258          * interrupts, then read the input.
2259          * XMON just wants a poll.  If no character, return -1, else
2260          * return the character.
2261          */
2262         if (!xmon) {
2263                 while (bdp->status & BD_SC_EMPTY);
2264         }
2265         else {
2266                 if (bdp->status & BD_SC_EMPTY)
2267                         return -1;
2268         }
2269
2270         cp = (char *)bdp->buf;
2271
2272         if (obuf) {
2273                 i = c = bdp->length;
2274                 while (i-- > 0)
2275                         *obuf++ = *cp++;
2276         }
2277         else {
2278                 c = *cp;
2279         }
2280         bdp->status |= BD_SC_EMPTY;
2281
2282         if (info) {
2283                 if (bdp->status & BD_SC_WRAP) {
2284                         bdp = info->rx_bd_base;
2285                 }
2286                 else {
2287                         bdp++;
2288                 }
2289                 info->rx_cur = (QUICC_BD *)bdp;
2290         }
2291
2292         return((int)c);
2293 }
2294
2295 static int serial_console_wait_key(struct console *co)
2296 {
2297         return(my_console_wait_key(co->index, 0, NULL));
2298 }
2299
2300 #ifdef CONFIG_XMON
2301 int
2302 xmon_360_read_poll(void)
2303 {
2304         return(my_console_wait_key(0, 1, NULL));
2305 }
2306
2307 int
2308 xmon_360_read_char(void)
2309 {
2310         return(my_console_wait_key(0, 0, NULL));
2311 }
2312 #endif
2313
2314 #ifdef CONFIG_KGDB
2315 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2316 static int kgdb_chars;
2317
2318 unsigned char
2319 getDebugChar(void)
2320 {
2321         if (kgdb_chars <= 0) {
2322                 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2323                 kgdp = kgdb_buf;
2324         }
2325         kgdb_chars--;
2326
2327         return(*kgdp++);
2328 }
2329
2330 void kgdb_interruptible(int state)
2331 {
2332 }
2333 void kgdb_map_scc(void)
2334 {
2335         struct          serial_state *ser;
2336         uint            mem_addr;
2337         volatile        QUICC_BD                *bdp;
2338         volatile        smc_uart_t      *up;
2339
2340         cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2341
2342         /* To avoid data cache CPM DMA coherency problems, allocate a
2343          * buffer in the CPM DPRAM.  This will work until the CPM and
2344          * serial ports are initialized.  At that time a memory buffer
2345          * will be allocated.
2346          * The port is already initialized from the boot procedure, all
2347          * we do here is give it a different buffer and make it a FIFO.
2348          */
2349
2350         ser = rs_table;
2351
2352         /* Right now, assume we are using SMCs.
2353         */
2354         up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2355
2356         /* Allocate space for an input FIFO, plus a few bytes for output.
2357          * Allocate bytes to maintain word alignment.
2358          */
2359         mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2360
2361         /* Set the physical address of the host memory buffers in
2362          * the buffer descriptors.
2363          */
2364         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2365         bdp->buf = mem_addr;
2366
2367         bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2368         bdp->buf = mem_addr+RX_BUF_SIZE;
2369
2370         up->smc_mrblr = RX_BUF_SIZE;            /* receive buffer length */
2371         up->smc_maxidl = RX_BUF_SIZE;
2372 }
2373 #endif
2374
2375 static struct tty_struct *serial_console_device(struct console *c, int *index)
2376 {
2377         *index = c->index;
2378         return serial_driver;
2379 }
2380
2381
2382 struct console sercons = {
2383         .name           = "ttyS",
2384         .write          = serial_console_write,
2385         .device         = serial_console_device,
2386         .wait_key       = serial_console_wait_key,
2387         .setup          = serial_console_setup,
2388         .flags          = CON_PRINTBUFFER,
2389         .index          = CONFIG_SERIAL_CONSOLE_PORT, 
2390 };
2391
2392
2393
2394 /*
2395  *      Register console.
2396  */
2397 long console_360_init(long kmem_start, long kmem_end)
2398 {
2399         register_console(&sercons);
2400         /*register_console (console_print_68360); - 2.0.38 only required a write
2401       function pointer. */
2402         return kmem_start;
2403 }
2404
2405 #endif
2406
2407 /* Index in baud rate table of the default console baud rate.
2408 */
2409 static  int     baud_idx;
2410
2411 static const struct tty_operations rs_360_ops = {
2412         .owner = THIS_MODULE,
2413         .open = rs_360_open,
2414         .close = rs_360_close,
2415         .write = rs_360_write,
2416         .put_char = rs_360_put_char,
2417         .write_room = rs_360_write_room,
2418         .chars_in_buffer = rs_360_chars_in_buffer,
2419         .flush_buffer = rs_360_flush_buffer,
2420         .ioctl = rs_360_ioctl,
2421         .throttle = rs_360_throttle,
2422         .unthrottle = rs_360_unthrottle,
2423         /* .send_xchar = rs_360_send_xchar, */
2424         .set_termios = rs_360_set_termios,
2425         .stop = rs_360_stop,
2426         .start = rs_360_start,
2427         .hangup = rs_360_hangup,
2428         /* .wait_until_sent = rs_360_wait_until_sent, */
2429         /* .read_proc = rs_360_read_proc, */
2430         .tiocmget = rs_360_tiocmget,
2431         .tiocmset = rs_360_tiocmset,
2432 };
2433
2434 static int __init rs_360_init(void)
2435 {
2436         struct serial_state * state;
2437         ser_info_t      *info;
2438         void       *mem_addr;
2439         uint            dp_addr, iobits;
2440         int                 i, j, idx;
2441         ushort          chan;
2442         QUICC_BD        *bdp;
2443         volatile        QUICC           *cp;
2444         volatile        struct smc_regs *sp;
2445         volatile        struct smc_uart_pram    *up;
2446         volatile        struct scc_regs *scp;
2447         volatile        struct uart_pram        *sup;
2448         /* volatile     immap_t         *immap; */
2449         
2450         serial_driver = alloc_tty_driver(NR_PORTS);
2451         if (!serial_driver)
2452                 return -1;
2453
2454         show_serial_version();
2455
2456         serial_driver->name = "ttyS";
2457         serial_driver->major = TTY_MAJOR;
2458         serial_driver->minor_start = 64;
2459         serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2460         serial_driver->subtype = SERIAL_TYPE_NORMAL;
2461         serial_driver->init_termios = tty_std_termios;
2462         serial_driver->init_termios.c_cflag =
2463                 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2464         serial_driver->flags = TTY_DRIVER_REAL_RAW;
2465         tty_set_operations(serial_driver, &rs_360_ops);
2466         
2467         if (tty_register_driver(serial_driver))
2468                 panic("Couldn't register serial driver\n");
2469
2470         cp = pquicc;    /* Get pointer to Communication Processor */
2471         /* immap = (immap_t *)IMAP_ADDR; */     /* and to internal registers */
2472
2473
2474         /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2475          */
2476         /* The "standard" configuration through the 860.
2477         */
2478 /*      immap->im_ioport.iop_papar |= 0x00fc; */
2479 /*      immap->im_ioport.iop_padir &= ~0x00fc; */
2480 /*      immap->im_ioport.iop_paodr &= ~0x00fc; */
2481         cp->pio_papar |= 0x00fc;
2482         cp->pio_padir &= ~0x00fc;
2483         /* cp->pio_paodr &= ~0x00fc; */
2484
2485
2486         /* Since we don't yet do modem control, connect the port C pins
2487          * as general purpose I/O.  This will assert CTS and CD for the
2488          * SCC ports.
2489          */
2490         /* FIXME: see 360um p.7-365 and 860um p.34-12 
2491          * I can't make sense of these bits - mleslie*/
2492 /*      immap->im_ioport.iop_pcdir |= 0x03c6; */
2493 /*      immap->im_ioport.iop_pcpar &= ~0x03c6; */
2494
2495 /*      cp->pio_pcdir |= 0x03c6; */
2496 /*      cp->pio_pcpar &= ~0x03c6; */
2497
2498
2499
2500         /* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
2501          * BRG4 to SCC3.
2502          */
2503         cp->si_sicr &= ~0x00ffff00;
2504         cp->si_sicr |=  0x001b1200;
2505
2506 #ifdef CONFIG_PP04
2507         /* Frequentis PP04 forced to RS-232 until we know better.
2508          * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2509          */
2510         immap->im_ioport.iop_pcdir |= 0x000c;
2511         immap->im_ioport.iop_pcpar &= ~0x000c;
2512         immap->im_ioport.iop_pcdat &= ~0x000c;
2513
2514         /* This enables the TX driver.
2515         */
2516         cp->cp_pbpar &= ~0x6000;
2517         cp->cp_pbdat &= ~0x6000;
2518 #endif
2519
2520         for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2521                 state->magic = SSTATE_MAGIC;
2522                 state->line = i;
2523                 state->type = PORT_UNKNOWN;
2524                 state->custom_divisor = 0;
2525                 state->close_delay = 5*HZ/10;
2526                 state->closing_wait = 30*HZ;
2527                 state->icount.cts = state->icount.dsr = 
2528                         state->icount.rng = state->icount.dcd = 0;
2529                 state->icount.rx = state->icount.tx = 0;
2530                 state->icount.frame = state->icount.parity = 0;
2531                 state->icount.overrun = state->icount.brk = 0;
2532                 printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
2533                        i, (unsigned int)(state->irq),
2534                        (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2535
2536 #ifdef CONFIG_SERIAL_CONSOLE
2537                 /* If we just printed the message on the console port, and
2538                  * we are about to initialize it for general use, we have
2539                  * to wait a couple of character times for the CR/NL to
2540                  * make it out of the transmit buffer.
2541                  */
2542                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2543                         mdelay(8);
2544
2545
2546 /*              idx = PORT_NUM(info->state->smc_scc_num); */
2547 /*              if (info->state->smc_scc_num & NUM_IS_SCC) */
2548 /*                      chan = scc_chan_map[idx]; */
2549 /*              else */
2550 /*                      chan = smc_chan_map[idx]; */
2551
2552 /*              cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2553 /*              while (cp->cp_cr & CPM_CR_FLG); */
2554
2555 #endif
2556                 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2557                 info = &quicc_ser_info[i];
2558                 if (info) {
2559                         memset (info, 0, sizeof(ser_info_t));
2560                         info->magic = SERIAL_MAGIC;
2561                         info->line = i;
2562                         info->flags = state->flags;
2563                         INIT_WORK(&info->tqueue, do_softint, info);
2564                         INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2565                         init_waitqueue_head(&info->open_wait);
2566                         init_waitqueue_head(&info->close_wait);
2567                         info->state = state;
2568                         state->info = (struct async_struct *)info;
2569
2570                         /* We need to allocate a transmit and receive buffer
2571                          * descriptors from dual port ram, and a character
2572                          * buffer area from host mem.
2573                          */
2574                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2575
2576                         /* Allocate space for FIFOs in the host memory.
2577                          *  (for now this is from a static array of buffers :(
2578                          */
2579                         /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2580                         /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2581                         mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2582
2583                         /* Set the physical address of the host memory
2584                          * buffers in the buffer descriptors, and the
2585                          * virtual address for us to work with.
2586                          */
2587                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2588                         info->rx_cur = info->rx_bd_base = bdp;
2589
2590                         /* initialize rx buffer descriptors */
2591                         for (j=0; j<(RX_NUM_FIFO-1); j++) {
2592                                 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2593                                 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2594                                 mem_addr += RX_BUF_SIZE;
2595                                 bdp++;
2596                         }
2597                         bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2598                         bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2599
2600
2601                         idx = PORT_NUM(info->state->smc_scc_num);
2602                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2603
2604 #if defined (CONFIG_UCQUICC) && 1
2605                                 /* set the transceiver mode to RS232 */
2606                                 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2607                                 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2608                                 *(uint *)_periph_base = sipex_mode_bits;
2609                                 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2610 #endif
2611                         }
2612
2613                         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2614
2615                         /* Allocate space for FIFOs in the host memory.
2616                         */
2617                         /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2618                         /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2619                         mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2620
2621                         /* Set the physical address of the host memory
2622                          * buffers in the buffer descriptors, and the
2623                          * virtual address for us to work with.
2624                          */
2625                         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2626                         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2627                         info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2628
2629                         /* initialize tx buffer descriptors */
2630                         for (j=0; j<(TX_NUM_FIFO-1); j++) {
2631                                 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2632                                 bdp->status = BD_SC_INTRPT;
2633                                 mem_addr += TX_BUF_SIZE;
2634                                 bdp++;
2635                         }
2636                         bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2637                         bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2638
2639                         if (info->state->smc_scc_num & NUM_IS_SCC) {
2640                                 scp = &pquicc->scc_regs[idx];
2641                                 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2642                                 sup->rbase = dp_addr;
2643                                 sup->tbase = dp_addr;
2644
2645                                 /* Set up the uart parameters in the
2646                                  * parameter ram.
2647                                  */
2648                                 sup->rfcr = SMC_EB;
2649                                 sup->tfcr = SMC_EB;
2650
2651                                 /* Set this to 1 for now, so we get single
2652                                  * character interrupts.  Using idle charater
2653                                  * time requires some additional tuning.
2654                                  */
2655                                 sup->mrblr = 1;
2656                                 sup->max_idl = 0;
2657                                 sup->brkcr = 1;
2658                                 sup->parec = 0;
2659                                 sup->frmer = 0;
2660                                 sup->nosec = 0;
2661                                 sup->brkec = 0;
2662                                 sup->uaddr1 = 0;
2663                                 sup->uaddr2 = 0;
2664                                 sup->toseq = 0;
2665                                 {
2666                                         int i;
2667                                         for (i=0;i<8;i++)
2668                                                 sup->cc[i] = 0x8000;
2669                                 }
2670                                 sup->rccm = 0xc0ff;
2671
2672                                 /* Send the CPM an initialize command.
2673                                 */
2674                                 chan = scc_chan_map[idx];
2675
2676                                 /* execute the INIT RX & TX PARAMS command for this channel. */
2677                                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2678                                 while (cp->cp_cr & CPM_CR_FLG);
2679
2680                                 /* Set UART mode, 8 bit, no parity, one stop.
2681                                  * Enable receive and transmit.
2682                                  */
2683                                 scp->scc_gsmr.w.high = 0;
2684                                 scp->scc_gsmr.w.low = 
2685                                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2686
2687                                 /* Disable all interrupts and clear all pending
2688                                  * events.
2689                                  */
2690                                 scp->scc_sccm = 0;
2691                                 scp->scc_scce = 0xffff;
2692                                 scp->scc_dsr = 0x7e7e;
2693                                 scp->scc_psmr = 0x3000;
2694
2695                                 /* If the port is the console, enable Rx and Tx.
2696                                 */
2697 #ifdef CONFIG_SERIAL_CONSOLE
2698                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2699                                         scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2700 #endif
2701                         }
2702                         else {
2703                                 /* Configure SMCs Tx/Rx instead of port B
2704                                  * parallel I/O.
2705                                  */
2706                                 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2707                                 up->rbase = dp_addr;
2708
2709                                 iobits = 0xc0 << (idx * 4);
2710                                 cp->pip_pbpar |= iobits;
2711                                 cp->pip_pbdir &= ~iobits;
2712                                 cp->pip_pbodr &= ~iobits;
2713
2714
2715                                 /* Connect the baud rate generator to the
2716                                  * SMC based upon index in rs_table.  Also
2717                                  * make sure it is connected to NMSI.
2718                                  */
2719                                 cp->si_simode &= ~(0xffff << (idx * 16));
2720                                 cp->si_simode |= (i << ((idx * 16) + 12));
2721
2722                                 up->tbase = dp_addr;
2723
2724                                 /* Set up the uart parameters in the
2725                                  * parameter ram.
2726                                  */
2727                                 up->rfcr = SMC_EB;
2728                                 up->tfcr = SMC_EB;
2729
2730                                 /* Set this to 1 for now, so we get single
2731                                  * character interrupts.  Using idle charater
2732                                  * time requires some additional tuning.
2733                                  */
2734                                 up->mrblr = 1;
2735                                 up->max_idl = 0;
2736                                 up->brkcr = 1;
2737
2738                                 /* Send the CPM an initialize command.
2739                                 */
2740                                 chan = smc_chan_map[idx];
2741
2742                                 cp->cp_cr = mk_cr_cmd(chan,
2743                                                                           CPM_CR_INIT_TRX) | CPM_CR_FLG;
2744 #ifdef CONFIG_SERIAL_CONSOLE
2745                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2746                                         printk("");
2747 #endif
2748                                 while (cp->cp_cr & CPM_CR_FLG);
2749
2750                                 /* Set UART mode, 8 bit, no parity, one stop.
2751                                  * Enable receive and transmit.
2752                                  */
2753                                 sp = &cp->smc_regs[idx];
2754                                 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2755
2756                                 /* Disable all interrupts and clear all pending
2757                                  * events.
2758                                  */
2759                                 sp->smc_smcm = 0;
2760                                 sp->smc_smce = 0xff;
2761
2762                                 /* If the port is the console, enable Rx and Tx.
2763                                 */
2764 #ifdef CONFIG_SERIAL_CONSOLE
2765                                 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2766                                         sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2767 #endif
2768                         }
2769
2770                         /* Install interrupt handler.
2771                         */
2772                         /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info);  */
2773                         /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2774                         request_irq(state->irq, rs_360_interrupt,
2775                                                 IRQ_FLG_LOCK, "ttyS", (void *)info);
2776
2777                         /* Set up the baud rate generator.
2778                         */
2779                         m360_cpm_setbrg(i, baud_table[baud_idx]);
2780
2781                 }
2782         }
2783
2784         return 0;
2785 }
2786 module_init(rs_360_init);
2787
2788 /* This must always be called before the rs_360_init() function, otherwise
2789  * it blows away the port control information.
2790  */
2791 //static int __init serial_console_setup( struct console *co, char *options)
2792 int serial_console_setup( struct console *co, char *options)
2793 {
2794         struct          serial_state    *ser;
2795         uint            mem_addr, dp_addr, bidx, idx, iobits;
2796         ushort          chan;
2797         QUICC_BD        *bdp;
2798         volatile        QUICC                   *cp;
2799         volatile        struct smc_regs *sp;
2800         volatile        struct scc_regs *scp;
2801         volatile        struct smc_uart_pram    *up;
2802         volatile        struct uart_pram                *sup;
2803
2804 /* mleslie TODO:
2805  * add something to the 68k bootloader to store a desired initial console baud rate */
2806
2807 /*      bd_t                                            *bd; */ /* a board info struct used by EPPC-bug */
2808 /*      bd = (bd_t *)__res; */
2809
2810         for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2811          /* if (bd->bi_baudrate == baud_table[bidx]) */
2812                 if (CONSOLE_BAUDRATE == baud_table[bidx])
2813                         break;
2814
2815         /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2816         baud_idx = bidx;
2817
2818         ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2819
2820         cp = pquicc;    /* Get pointer to Communication Processor */
2821
2822         idx = PORT_NUM(ser->smc_scc_num);
2823         if (ser->smc_scc_num & NUM_IS_SCC) {
2824
2825                 /* TODO: need to set up SCC pin assignment etc. here */
2826                 
2827         }
2828         else {
2829                 iobits = 0xc0 << (idx * 4);
2830                 cp->pip_pbpar |= iobits;
2831                 cp->pip_pbdir &= ~iobits;
2832                 cp->pip_pbodr &= ~iobits;
2833
2834                 /* Connect the baud rate generator to the
2835                  * SMC based upon index in rs_table.  Also
2836                  * make sure it is connected to NMSI.
2837                  */
2838                 cp->si_simode &= ~(0xffff << (idx * 16));
2839                 cp->si_simode |= (idx << ((idx * 16) + 12));
2840         }
2841
2842         /* When we get here, the CPM has been reset, so we need
2843          * to configure the port.
2844          * We need to allocate a transmit and receive buffer descriptor
2845          * from dual port ram, and a character buffer area from host mem.
2846          */
2847
2848         /* Allocate space for two buffer descriptors in the DP ram.
2849         */
2850         dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2851
2852         /* Allocate space for two 2 byte FIFOs in the host memory.
2853          */
2854         /* mem_addr = m360_cpm_hostalloc(8); */
2855         mem_addr = (uint)console_fifos;
2856
2857
2858         /* Set the physical address of the host memory buffers in
2859          * the buffer descriptors.
2860          */
2861         /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2862         bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2863         bdp->buf = (char *)mem_addr;
2864         (bdp+1)->buf = (char *)(mem_addr+4);
2865
2866         /* For the receive, set empty and wrap.
2867          * For transmit, set wrap.
2868          */
2869         bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2870         (bdp+1)->status = BD_SC_WRAP;
2871
2872         /* Set up the uart parameters in the parameter ram.
2873          */
2874         if (ser->smc_scc_num & NUM_IS_SCC) {
2875                 scp = &cp->scc_regs[idx];
2876                 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2877                 sup = &pquicc->pram[ser->port].scc.pscc.u;
2878
2879                 sup->rbase = dp_addr;
2880                 sup->tbase = dp_addr + sizeof(QUICC_BD);
2881
2882                 /* Set up the uart parameters in the
2883                  * parameter ram.
2884                  */
2885                 sup->rfcr = SMC_EB;
2886                 sup->tfcr = SMC_EB;
2887
2888                 /* Set this to 1 for now, so we get single
2889                  * character interrupts.  Using idle charater
2890                  * time requires some additional tuning.
2891                  */
2892                 sup->mrblr = 1;
2893                 sup->max_idl = 0;
2894                 sup->brkcr = 1;
2895                 sup->parec = 0;
2896                 sup->frmer = 0;
2897                 sup->nosec = 0;
2898                 sup->brkec = 0;
2899                 sup->uaddr1 = 0;
2900                 sup->uaddr2 = 0;
2901                 sup->toseq = 0;
2902                 {
2903                         int i;
2904                         for (i=0;i<8;i++)
2905                                 sup->cc[i] = 0x8000;
2906                 }
2907                 sup->rccm = 0xc0ff;
2908
2909                 /* Send the CPM an initialize command.
2910                 */
2911                 chan = scc_chan_map[idx];
2912
2913                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2914                 while (cp->cp_cr & CPM_CR_FLG);
2915
2916                 /* Set UART mode, 8 bit, no parity, one stop.
2917                  * Enable receive and transmit.
2918                  */
2919                 scp->scc_gsmr.w.high = 0;
2920                 scp->scc_gsmr.w.low = 
2921                         (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2922
2923                 /* Disable all interrupts and clear all pending
2924                  * events.
2925                  */
2926                 scp->scc_sccm = 0;
2927                 scp->scc_scce = 0xffff;
2928                 scp->scc_dsr = 0x7e7e;
2929                 scp->scc_psmr = 0x3000;
2930
2931                 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2932
2933         }
2934         else {
2935                 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
2936                 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2937
2938                 up->rbase = dp_addr;    /* Base of receive buffer desc. */
2939                 up->tbase = dp_addr+sizeof(QUICC_BD);   /* Base of xmt buffer desc. */
2940                 up->rfcr = SMC_EB;
2941                 up->tfcr = SMC_EB;
2942
2943                 /* Set this to 1 for now, so we get single character interrupts.
2944                 */
2945                 up->mrblr = 1;          /* receive buffer length */
2946                 up->max_idl = 0;                /* wait forever for next char */
2947
2948                 /* Send the CPM an initialize command.
2949                 */
2950                 chan = smc_chan_map[idx];
2951                 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2952                 while (cp->cp_cr & CPM_CR_FLG);
2953
2954                 /* Set UART mode, 8 bit, no parity, one stop.
2955                  * Enable receive and transmit.
2956                  */
2957                 sp = &cp->smc_regs[idx];
2958                 sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;
2959
2960                 /* And finally, enable Rx and Tx.
2961                 */
2962                 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2963         }
2964
2965         /* Set up the baud rate generator.
2966         */
2967         /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
2968         m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
2969
2970         return 0;
2971 }
2972
2973 /*
2974  * Local variables:
2975  *  c-indent-level: 4
2976  *  c-basic-offset: 4
2977  *  tab-width: 4
2978  * End:
2979  */