git.oblomov.eu Git - linux-2.6/blob - arch/x86/kernel/cpu/cpufreq/speedstep-ich.c

   1 /*
   2  * (C) 2001  Dave Jones, Arjan van de ven.
   3  * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
   4  *
   5  *  Licensed under the terms of the GNU GPL License version 2.
   6  *  Based upon reverse engineered information, and on Intel documentation
   7  *  for chipsets ICH2-M and ICH3-M.
   8  *
   9  *  Many thanks to Ducrot Bruno for finding and fixing the last
  10  *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11  *  for extensive testing.
  12  *
  13  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14  */
  15
  16
  17 /*********************************************************************
  18  *                        SPEEDSTEP - DEFINITIONS                    *
  19  *********************************************************************/
  20
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24 #include <linux/cpufreq.h>
  25 #include <linux/pci.h>
  26 #include <linux/slab.h>
  27 #include <linux/sched.h>
  28
  29 #include "speedstep-lib.h"
  30
  31
  32 /* speedstep_chipset:
  33  *   It is necessary to know which chipset is used. As accesses to
  34  * this device occur at various places in this module, we need a
  35  * static struct pci_dev * pointing to that device.
  36  */
  37 static struct pci_dev *speedstep_chipset_dev;
  38
  39
  40 /* speedstep_processor
  41  */
  42 static unsigned int speedstep_processor = 0;
  43
  44 static u32 pmbase;
  45
  46 /*
  47  *   There are only two frequency states for each processor. Values
  48  * are in kHz for the time being.
  49  */
  50 static struct cpufreq_frequency_table speedstep_freqs[] = {
  51         {SPEEDSTEP_HIGH,        0},
  52         {SPEEDSTEP_LOW,         0},
  53         {0,                     CPUFREQ_TABLE_END},
  54 };
  55
  56
  57 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg)
  58
  59
  60 /**
  61  * speedstep_find_register - read the PMBASE address
  62  *
  63  * Returns: -ENODEV if no register could be found
  64  */
  65 static int speedstep_find_register (void)
  66 {
  67         if (!speedstep_chipset_dev)
  68                 return -ENODEV;
  69
  70         /* get PMBASE */
  71         pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  72         if (!(pmbase & 0x01)) {
  73                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  74                 return -ENODEV;
  75         }
  76
  77         pmbase &= 0xFFFFFFFE;
  78         if (!pmbase) {
  79                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  80                 return -ENODEV;
  81         }
  82
  83         dprintk("pmbase is 0x%x\n", pmbase);
  84         return 0;
  85 }
  86
  87 /**
  88  * speedstep_set_state - set the SpeedStep state
  89  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  90  *
  91  *   Tries to change the SpeedStep state.
  92  */
  93 static void speedstep_set_state (unsigned int state)
  94 {
  95         u8 pm2_blk;
  96         u8 value;
  97         unsigned long flags;
  98
  99         if (state > 0x1)
 100                 return;
 101
 102         /* Disable IRQs */
 103         local_irq_save(flags);
 104
 105         /* read state */
 106         value = inb(pmbase + 0x50);
 107
 108         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 109
 110         /* write new state */
 111         value &= 0xFE;
 112         value |= state;
 113
 114         dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
 115
 116         /* Disable bus master arbitration */
 117         pm2_blk = inb(pmbase + 0x20);
 118         pm2_blk |= 0x01;
 119         outb(pm2_blk, (pmbase + 0x20));
 120
 121         /* Actual transition */
 122         outb(value, (pmbase + 0x50));
 123
 124         /* Restore bus master arbitration */
 125         pm2_blk &= 0xfe;
 126         outb(pm2_blk, (pmbase + 0x20));
 127
 128         /* check if transition was successful */
 129         value = inb(pmbase + 0x50);
 130
 131         /* Enable IRQs */
 132         local_irq_restore(flags);
 133
 134         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 135
 136         if (state == (value & 0x1)) {
 137                 dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
 138         } else {
 139                 printk (KERN_ERR "cpufreq: change failed - I/O error\n");
 140         }
 141
 142         return;
 143 }
 144
 145
 146 /**
 147  * speedstep_activate - activate SpeedStep control in the chipset
 148  *
 149  *   Tries to activate the SpeedStep status and control registers.
 150  * Returns -EINVAL on an unsupported chipset, and zero on success.
 151  */
 152 static int speedstep_activate (void)
 153 {
 154         u16 value = 0;
 155
 156         if (!speedstep_chipset_dev)
 157                 return -EINVAL;
 158
 159         pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
 160         if (!(value & 0x08)) {
 161                 value |= 0x08;
 162                 dprintk("activating SpeedStep (TM) registers\n");
 163                 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
 164         }
 165
 166         return 0;
 167 }
 168
 169
 170 /**
 171  * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 172  *
 173  *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 174  * the LPC bridge / PM module which contains all power-management
 175  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 176  * chipset, or zero on failure.
 177  */
 178 static unsigned int speedstep_detect_chipset (void)
 179 {
 180         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 181                               PCI_DEVICE_ID_INTEL_82801DB_12,
 182                               PCI_ANY_ID,
 183                               PCI_ANY_ID,
 184                               NULL);
 185         if (speedstep_chipset_dev)
 186                 return 4; /* 4-M */
 187
 188         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 189                               PCI_DEVICE_ID_INTEL_82801CA_12,
 190                               PCI_ANY_ID,
 191                               PCI_ANY_ID,
 192                               NULL);
 193         if (speedstep_chipset_dev)
 194                 return 3; /* 3-M */
 195
 196
 197         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 198                               PCI_DEVICE_ID_INTEL_82801BA_10,
 199                               PCI_ANY_ID,
 200                               PCI_ANY_ID,
 201                               NULL);
 202         if (speedstep_chipset_dev) {
 203                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
 204                  * 8100 which use a pretty old revision of the 82815
 205                  * host brige. Abort on these systems.
 206                  */
 207                 static struct pci_dev *hostbridge;
 208
 209                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 210                               PCI_DEVICE_ID_INTEL_82815_MC,
 211                               PCI_ANY_ID,
 212                               PCI_ANY_ID,
 213                               NULL);
 214
 215                 if (!hostbridge)
 216                         return 2; /* 2-M */
 217
 218                 if (hostbridge->revision < 5) {
 219                         dprintk("hostbridge does not support speedstep\n");
 220                         speedstep_chipset_dev = NULL;
 221                         pci_dev_put(hostbridge);
 222                         return 0;
 223                 }
 224
 225                 pci_dev_put(hostbridge);
 226                 return 2; /* 2-M */
 227         }
 228
 229         return 0;
 230 }
 231
 232 static unsigned int _speedstep_get(const cpumask_t *cpus)
 233 {
 234         unsigned int speed;
 235         cpumask_t cpus_allowed;
 236
 237         cpus_allowed = current->cpus_allowed;
 238         set_cpus_allowed_ptr(current, cpus);
 239         speed = speedstep_get_processor_frequency(speedstep_processor);
 240         set_cpus_allowed_ptr(current, &cpus_allowed);
 241         dprintk("detected %u kHz as current frequency\n", speed);
 242         return speed;
 243 }
 244
 245 static unsigned int speedstep_get(unsigned int cpu)
 246 {
 247         cpumask_of_cpu_ptr(newmask, cpu);
 248         return _speedstep_get(newmask);
 249 }
 250
 251 /**
 252  * speedstep_target - set a new CPUFreq policy
 253  * @policy: new policy
 254  * @target_freq: the target frequency
 255  * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 256  *
 257  * Sets a new CPUFreq policy.
 258  */
 259 static int speedstep_target (struct cpufreq_policy *policy,
 260                              unsigned int target_freq,
 261                              unsigned int relation)
 262 {
 263         unsigned int newstate = 0;
 264         struct cpufreq_freqs freqs;
 265         cpumask_t cpus_allowed;
 266         int i;
 267
 268         if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
 269                 return -EINVAL;
 270
 271         freqs.old = _speedstep_get(&policy->cpus);
 272         freqs.new = speedstep_freqs[newstate].frequency;
 273         freqs.cpu = policy->cpu;
 274
 275         dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
 276
 277         /* no transition necessary */
 278         if (freqs.old == freqs.new)
 279                 return 0;
 280
 281         cpus_allowed = current->cpus_allowed;
 282
 283         for_each_cpu_mask_nr(i, policy->cpus) {
 284                 freqs.cpu = i;
 285                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 286         }
 287
 288         /* switch to physical CPU where state is to be changed */
 289         set_cpus_allowed_ptr(current, &policy->cpus);
 290
 291         speedstep_set_state(newstate);
 292
 293         /* allow to be run on all CPUs */
 294         set_cpus_allowed_ptr(current, &cpus_allowed);
 295
 296         for_each_cpu_mask_nr(i, policy->cpus) {
 297                 freqs.cpu = i;
 298                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 299         }
 300
 301         return 0;
 302 }
 303
 304
 305 /**
 306  * speedstep_verify - verifies a new CPUFreq policy
 307  * @policy: new policy
 308  *
 309  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
 310  * at least one border included.
 311  */
 312 static int speedstep_verify (struct cpufreq_policy *policy)
 313 {
 314         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 315 }
 316
 317
 318 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 319 {
 320         int result = 0;
 321         unsigned int speed;
 322         cpumask_t cpus_allowed;
 323
 324         /* only run on CPU to be set, or on its sibling */
 325 #ifdef CONFIG_SMP
 326         policy->cpus = per_cpu(cpu_sibling_map, policy->cpu);
 327 #endif
 328
 329         cpus_allowed = current->cpus_allowed;
 330         set_cpus_allowed_ptr(current, &policy->cpus);
 331
 332         /* detect low and high frequency and transition latency */
 333         result = speedstep_get_freqs(speedstep_processor,
 334                                      &speedstep_freqs[SPEEDSTEP_LOW].frequency,
 335                                      &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
 336                                      &policy->cpuinfo.transition_latency,
 337                                      &speedstep_set_state);
 338         set_cpus_allowed_ptr(current, &cpus_allowed);
 339         if (result)
 340                 return result;
 341
 342         /* get current speed setting */
 343         speed = _speedstep_get(&policy->cpus);
 344         if (!speed)
 345                 return -EIO;
 346
 347         dprintk("currently at %s speed setting - %i MHz\n",
 348                 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
 349                 (speed / 1000));
 350
 351         /* cpuinfo and default policy values */
 352         policy->cur = speed;
 353
 354         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
 355         if (result)
 356                 return (result);
 357
 358         cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 359
 360         return 0;
 361 }
 362
 363
 364 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
 365 {
 366         cpufreq_frequency_table_put_attr(policy->cpu);
 367         return 0;
 368 }
 369
 370 static struct freq_attr* speedstep_attr[] = {
 371         &cpufreq_freq_attr_scaling_available_freqs,
 372         NULL,
 373 };
 374
 375
 376 static struct cpufreq_driver speedstep_driver = {
 377         .name   = "speedstep-ich",
 378         .verify = speedstep_verify,
 379         .target = speedstep_target,
 380         .init   = speedstep_cpu_init,
 381         .exit   = speedstep_cpu_exit,
 382         .get    = speedstep_get,
 383         .owner  = THIS_MODULE,
 384         .attr   = speedstep_attr,
 385 };
 386
 387
 388 /**
 389  * speedstep_init - initializes the SpeedStep CPUFreq driver
 390  *
 391  *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 392  * devices, -EINVAL on problems during initiatization, and zero on
 393  * success.
 394  */
 395 static int __init speedstep_init(void)
 396 {
 397         /* detect processor */
 398         speedstep_processor = speedstep_detect_processor();
 399         if (!speedstep_processor) {
 400                 dprintk("Intel(R) SpeedStep(TM) capable processor not found\n");
 401                 return -ENODEV;
 402         }
 403
 404         /* detect chipset */
 405         if (!speedstep_detect_chipset()) {
 406                 dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
 407                 return -ENODEV;
 408         }
 409
 410         /* activate speedstep support */
 411         if (speedstep_activate()) {
 412                 pci_dev_put(speedstep_chipset_dev);
 413                 return -EINVAL;
 414         }
 415
 416         if (speedstep_find_register())
 417                 return -ENODEV;
 418
 419         return cpufreq_register_driver(&speedstep_driver);
 420 }
 421
 422
 423 /**
 424  * speedstep_exit - unregisters SpeedStep support
 425  *
 426  *   Unregisters SpeedStep support.
 427  */
 428 static void __exit speedstep_exit(void)
 429 {
 430         pci_dev_put(speedstep_chipset_dev);
 431         cpufreq_unregister_driver(&speedstep_driver);
 432 }
 433
 434
 435 MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
 436 MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
 437 MODULE_LICENSE ("GPL");
 438
 439 module_init(speedstep_init);
 440 module_exit(speedstep_exit);