2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
10 * based on a lot of other RTC drivers.
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/i2c.h>
21 #include <linux/bcd.h>
22 #include <linux/rtc.h>
23 #include <linux/delay.h>
25 #define DRV_VERSION "1.0.8"
27 /* offsets into CCR area */
38 #define X1205_REG_SR 0x3F /* status register */
39 #define X1205_REG_Y2K 0x37
40 #define X1205_REG_DW 0x36
41 #define X1205_REG_YR 0x35
42 #define X1205_REG_MO 0x34
43 #define X1205_REG_DT 0x33
44 #define X1205_REG_HR 0x32
45 #define X1205_REG_MN 0x31
46 #define X1205_REG_SC 0x30
47 #define X1205_REG_DTR 0x13
48 #define X1205_REG_ATR 0x12
49 #define X1205_REG_INT 0x11
50 #define X1205_REG_0 0x10
51 #define X1205_REG_Y2K1 0x0F
52 #define X1205_REG_DWA1 0x0E
53 #define X1205_REG_YRA1 0x0D
54 #define X1205_REG_MOA1 0x0C
55 #define X1205_REG_DTA1 0x0B
56 #define X1205_REG_HRA1 0x0A
57 #define X1205_REG_MNA1 0x09
58 #define X1205_REG_SCA1 0x08
59 #define X1205_REG_Y2K0 0x07
60 #define X1205_REG_DWA0 0x06
61 #define X1205_REG_YRA0 0x05
62 #define X1205_REG_MOA0 0x04
63 #define X1205_REG_DTA0 0x03
64 #define X1205_REG_HRA0 0x02
65 #define X1205_REG_MNA0 0x01
66 #define X1205_REG_SCA0 0x00
68 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
69 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
71 #define X1205_SR_RTCF 0x01 /* Clock failure */
72 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
73 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
74 #define X1205_SR_AL0 0x20 /* Alarm 0 match */
76 #define X1205_DTR_DTR0 0x01
77 #define X1205_DTR_DTR1 0x02
78 #define X1205_DTR_DTR2 0x04
80 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
82 #define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
84 static struct i2c_driver x1205_driver;
87 * In the routines that deal directly with the x1205 hardware, we use
88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
89 * Epoch is initialized as 2000. Time is set to UTC.
91 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
92 unsigned char reg_base)
94 unsigned char dt_addr[2] = { 0, reg_base };
98 struct i2c_msg msgs[] = {
99 { client->addr, 0, 2, dt_addr }, /* setup read ptr */
100 { client->addr, I2C_M_RD, 8, buf }, /* read date */
103 /* read date registers */
104 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
105 dev_err(&client->dev, "%s: read error\n", __func__);
109 dev_dbg(&client->dev,
110 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
111 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
113 buf[0], buf[1], buf[2], buf[3],
114 buf[4], buf[5], buf[6], buf[7]);
116 /* Mask out the enable bits if these are alarm registers */
117 if (reg_base < X1205_CCR_BASE)
118 for (i = 0; i <= 4; i++)
121 tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
122 tm->tm_min = BCD2BIN(buf[CCR_MIN]);
123 tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
124 tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
125 tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
126 tm->tm_year = BCD2BIN(buf[CCR_YEAR])
127 + (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
128 tm->tm_wday = buf[CCR_WDAY];
130 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
131 "mday=%d, mon=%d, year=%d, wday=%d\n",
133 tm->tm_sec, tm->tm_min, tm->tm_hour,
134 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
139 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
141 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
143 struct i2c_msg msgs[] = {
144 { client->addr, 0, 2, sr_addr }, /* setup read ptr */
145 { client->addr, I2C_M_RD, 1, sr }, /* read status */
148 /* read status register */
149 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
150 dev_err(&client->dev, "%s: read error\n", __func__);
157 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
158 int datetoo, u8 reg_base, unsigned char alm_enable)
161 unsigned char buf[8];
162 unsigned char rdata[10] = { 0, reg_base };
164 static const unsigned char wel[3] = { 0, X1205_REG_SR,
167 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
168 X1205_SR_WEL | X1205_SR_RWEL };
170 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
172 dev_dbg(&client->dev,
173 "%s: secs=%d, mins=%d, hours=%d\n",
175 tm->tm_sec, tm->tm_min, tm->tm_hour);
177 buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
178 buf[CCR_MIN] = BIN2BCD(tm->tm_min);
180 /* set hour and 24hr bit */
181 buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;
183 /* should we also set the date? */
185 dev_dbg(&client->dev,
186 "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
188 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
190 buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
193 buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
195 /* year, since the rtc epoch*/
196 buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
197 buf[CCR_WDAY] = tm->tm_wday & 0x07;
198 buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
201 /* If writing alarm registers, set compare bits on registers 0-4 */
202 if (reg_base < X1205_CCR_BASE)
203 for (i = 0; i <= 4; i++)
206 /* this sequence is required to unlock the chip */
207 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
208 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
212 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
213 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
218 /* write register's data */
223 for (i = 0; i < nbytes; i++)
226 xfer = i2c_master_send(client, rdata, nbytes+2);
227 if (xfer != nbytes+2) {
228 dev_err(&client->dev,
229 "%s: result=%d addr=%02x, data=%02x\n",
231 xfer, rdata[1], rdata[2]);
235 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
236 if (reg_base < X1205_CCR_BASE) {
237 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
241 /* ...and set or clear the AL0E bit in the INT register */
243 /* Need to set RWEL again as the write has cleared it */
244 xfer = i2c_master_send(client, rwel, 3);
246 dev_err(&client->dev,
247 "%s: aloe rwel - %d\n",
254 al0e[2] = X1205_INT_AL0E;
256 xfer = i2c_master_send(client, al0e, 3);
258 dev_err(&client->dev,
265 /* and wait 10msec again for this write to complete */
269 /* disable further writes */
270 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
271 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
278 static int x1205_fix_osc(struct i2c_client *client)
283 tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
285 err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE, 0);
287 dev_err(&client->dev, "unable to restart the oscillator\n");
292 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
295 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
297 struct i2c_msg msgs[] = {
298 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
299 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
302 /* read dtr register */
303 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
304 dev_err(&client->dev, "%s: read error\n", __func__);
308 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
312 if (dtr & X1205_DTR_DTR0)
315 if (dtr & X1205_DTR_DTR1)
318 if (dtr & X1205_DTR_DTR2)
324 static int x1205_get_atrim(struct i2c_client *client, int *trim)
327 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
329 struct i2c_msg msgs[] = {
330 { client->addr, 0, 2, atr_addr }, /* setup read ptr */
331 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
334 /* read atr register */
335 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
336 dev_err(&client->dev, "%s: read error\n", __func__);
340 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
342 /* atr is a two's complement value on 6 bits,
343 * perform sign extension. The formula is
344 * Catr = (atr * 0.25pF) + 11.00pF.
349 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
351 *trim = (atr * 250) + 11000;
353 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
360 unsigned char reg, mask, min, max;
363 static int x1205_validate_client(struct i2c_client *client)
367 /* Probe array. We will read the register at the specified
368 * address and check if the given bits are zero.
370 static const unsigned char probe_zero_pattern[] = {
379 static const struct x1205_limit probe_limits_pattern[] = {
380 /* register, mask, min, max */
381 { X1205_REG_Y2K, 0xFF, 19, 20 },
382 { X1205_REG_DW, 0xFF, 0, 6 },
383 { X1205_REG_YR, 0xFF, 0, 99 },
384 { X1205_REG_MO, 0xFF, 0, 12 },
385 { X1205_REG_DT, 0xFF, 0, 31 },
386 { X1205_REG_HR, 0x7F, 0, 23 },
387 { X1205_REG_MN, 0xFF, 0, 59 },
388 { X1205_REG_SC, 0xFF, 0, 59 },
389 { X1205_REG_Y2K1, 0xFF, 19, 20 },
390 { X1205_REG_Y2K0, 0xFF, 19, 20 },
393 /* check that registers have bits a 0 where expected */
394 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
397 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
399 struct i2c_msg msgs[2] = {
400 { client->addr, 0, 2, addr },
401 { client->addr, I2C_M_RD, 1, &buf },
404 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
405 dev_err(&client->dev,
406 "%s: could not read register %x\n",
407 __func__, probe_zero_pattern[i]);
412 if ((buf & probe_zero_pattern[i+1]) != 0) {
413 dev_err(&client->dev,
414 "%s: register=%02x, zero pattern=%d, value=%x\n",
415 __func__, probe_zero_pattern[i], i, buf);
421 /* check limits (only registers with bcd values) */
422 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
423 unsigned char reg, value;
425 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
427 struct i2c_msg msgs[2] = {
428 { client->addr, 0, 2, addr },
429 { client->addr, I2C_M_RD, 1, ® },
432 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
433 dev_err(&client->dev,
434 "%s: could not read register %x\n",
435 __func__, probe_limits_pattern[i].reg);
440 value = BCD2BIN(reg & probe_limits_pattern[i].mask);
442 if (value > probe_limits_pattern[i].max ||
443 value < probe_limits_pattern[i].min) {
444 dev_dbg(&client->dev,
445 "%s: register=%x, lim pattern=%d, value=%d\n",
446 __func__, probe_limits_pattern[i].reg,
456 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
459 unsigned char intreg, status;
460 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
461 struct i2c_client *client = to_i2c_client(dev);
462 struct i2c_msg msgs[] = {
463 { client->addr, 0, 2, int_addr }, /* setup read ptr */
464 { client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */
467 /* read interrupt register and status register */
468 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
469 dev_err(&client->dev, "%s: read error\n", __func__);
472 err = x1205_get_status(client, &status);
474 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
475 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
476 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
481 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
483 return x1205_set_datetime(to_i2c_client(dev),
484 &alrm->time, 1, X1205_ALM0_BASE, alrm->enabled);
487 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
489 return x1205_get_datetime(to_i2c_client(dev),
493 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
495 return x1205_set_datetime(to_i2c_client(dev),
496 tm, 1, X1205_CCR_BASE, 0);
499 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
501 int err, dtrim, atrim;
503 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
504 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
506 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
507 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
508 atrim / 1000, atrim % 1000);
512 static const struct rtc_class_ops x1205_rtc_ops = {
513 .proc = x1205_rtc_proc,
514 .read_time = x1205_rtc_read_time,
515 .set_time = x1205_rtc_set_time,
516 .read_alarm = x1205_rtc_read_alarm,
517 .set_alarm = x1205_rtc_set_alarm,
520 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
521 struct device_attribute *attr, char *buf)
525 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
529 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
531 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
533 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
534 struct device_attribute *attr, char *buf)
538 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
542 return sprintf(buf, "%d ppm\n", dtrim);
544 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
546 static int x1205_sysfs_register(struct device *dev)
550 err = device_create_file(dev, &dev_attr_atrim);
554 err = device_create_file(dev, &dev_attr_dtrim);
556 device_remove_file(dev, &dev_attr_atrim);
561 static void x1205_sysfs_unregister(struct device *dev)
563 device_remove_file(dev, &dev_attr_atrim);
564 device_remove_file(dev, &dev_attr_dtrim);
568 static int x1205_probe(struct i2c_client *client,
569 const struct i2c_device_id *id)
573 struct rtc_device *rtc;
575 dev_dbg(&client->dev, "%s\n", __func__);
577 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
580 if (x1205_validate_client(client) < 0)
583 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
585 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
586 &x1205_rtc_ops, THIS_MODULE);
591 i2c_set_clientdata(client, rtc);
593 /* Check for power failures and eventualy enable the osc */
594 if ((err = x1205_get_status(client, &sr)) == 0) {
595 if (sr & X1205_SR_RTCF) {
596 dev_err(&client->dev,
597 "power failure detected, "
598 "please set the clock\n");
600 x1205_fix_osc(client);
604 dev_err(&client->dev, "couldn't read status\n");
606 err = x1205_sysfs_register(&client->dev);
613 rtc_device_unregister(rtc);
618 static int x1205_remove(struct i2c_client *client)
620 struct rtc_device *rtc = i2c_get_clientdata(client);
622 rtc_device_unregister(rtc);
623 x1205_sysfs_unregister(&client->dev);
627 static const struct i2c_device_id x1205_id[] = {
631 MODULE_DEVICE_TABLE(i2c, x1205_id);
633 static struct i2c_driver x1205_driver = {
637 .probe = x1205_probe,
638 .remove = x1205_remove,
639 .id_table = x1205_id,
642 static int __init x1205_init(void)
644 return i2c_add_driver(&x1205_driver);
647 static void __exit x1205_exit(void)
649 i2c_del_driver(&x1205_driver);
653 "Karen Spearel <kas111 at gmail dot com>, "
654 "Alessandro Zummo <a.zummo@towertech.it>");
655 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
656 MODULE_LICENSE("GPL");
657 MODULE_VERSION(DRV_VERSION);
659 module_init(x1205_init);
660 module_exit(x1205_exit);