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   1 /* $Id: irq.c,v 1.114 2002/01/11 08:45:38 davem Exp $
   2  * irq.c: UltraSparc IRQ handling/init/registry.
   3  *
   4  * Copyright (C) 1997  David S. Miller  (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   6  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   7  */
   8
   9 #include <linux/config.h>
  10 #include <linux/module.h>
  11 #include <linux/sched.h>
  12 #include <linux/ptrace.h>
  13 #include <linux/errno.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/signal.h>
  16 #include <linux/mm.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/slab.h>
  19 #include <linux/random.h>
  20 #include <linux/init.h>
  21 #include <linux/delay.h>
  22 #include <linux/proc_fs.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/bootmem.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/sbus.h>
  33 #include <asm/iommu.h>
  34 #include <asm/upa.h>
  35 #include <asm/oplib.h>
  36 #include <asm/timer.h>
  37 #include <asm/smp.h>
  38 #include <asm/starfire.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/cache.h>
  41 #include <asm/cpudata.h>
  42 #include <asm/auxio.h>
  43 #include <asm/head.h>
  44
  45 #ifdef CONFIG_SMP
  46 static void distribute_irqs(void);
  47 #endif
  48
  49 /* UPA nodes send interrupt packet to UltraSparc with first data reg
  50  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
  51  * delivered.  We must translate this into a non-vector IRQ so we can
  52  * set the softint on this cpu.
  53  *
  54  * To make processing these packets efficient and race free we use
  55  * an array of irq buckets below.  The interrupt vector handler in
  56  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
  57  * The IVEC handler does not need to act atomically, the PIL dispatch
  58  * code uses CAS to get an atomic snapshot of the list and clear it
  59  * at the same time.
  60  */
  61
  62 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
  63
  64 /* This has to be in the main kernel image, it cannot be
  65  * turned into per-cpu data.  The reason is that the main
  66  * kernel image is locked into the TLB and this structure
  67  * is accessed from the vectored interrupt trap handler.  If
  68  * access to this structure takes a TLB miss it could cause
  69  * the 5-level sparc v9 trap stack to overflow.
  70  */
  71 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
  72
  73 static struct irqaction *irq_action[NR_IRQS+1];
  74
  75 /* This only synchronizes entities which modify IRQ handler
  76  * state and some selected user-level spots that want to
  77  * read things in the table.  IRQ handler processing orders
  78  * its' accesses such that no locking is needed.
  79  */
  80 static DEFINE_SPINLOCK(irq_action_lock);
  81
  82 static void register_irq_proc (unsigned int irq);
  83
  84 /*
  85  * Upper 2b of irqaction->flags holds the ino.
  86  * irqaction->mask holds the smp affinity information.
  87  */
  88 #define put_ino_in_irqaction(action, irq) \
  89         action->flags &= 0xffffffffffffUL; \
  90         action->flags |= __irq_ino(irq) << 48;
  91
  92 #define get_ino_in_irqaction(action)    (action->flags >> 48)
  93
  94 #define put_smpaff_in_irqaction(action, smpaff) (action)->mask = (smpaff)
  95 #define get_smpaff_in_irqaction(action)         ((action)->mask)
  96
  97 int show_interrupts(struct seq_file *p, void *v)
  98 {
  99         unsigned long flags;
 100         int i = *(loff_t *) v;
 101         struct irqaction *action;
 102 #ifdef CONFIG_SMP
 103         int j;
 104 #endif
 105
 106         spin_lock_irqsave(&irq_action_lock, flags);
 107         if (i <= NR_IRQS) {
 108                 if (!(action = *(i + irq_action)))
 109                         goto out_unlock;
 110                 seq_printf(p, "%3d: ", i);
 111 #ifndef CONFIG_SMP
 112                 seq_printf(p, "%10u ", kstat_irqs(i));
 113 #else
 114                 for_each_online_cpu(j) {
 115                         seq_printf(p, "%10u ",
 116                                    kstat_cpu(j).irqs[i]);
 117                 }
 118 #endif
 119                 seq_printf(p, " %s:%lx", action->name,
 120                            get_ino_in_irqaction(action));
 121                 for (action = action->next; action; action = action->next) {
 122                         seq_printf(p, ", %s:%lx", action->name,
 123                                    get_ino_in_irqaction(action));
 124                 }
 125                 seq_putc(p, '\n');
 126         }
 127 out_unlock:
 128         spin_unlock_irqrestore(&irq_action_lock, flags);
 129
 130         return 0;
 131 }
 132
 133 extern unsigned long real_hard_smp_processor_id(void);
 134
 135 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 136 {
 137         unsigned int tid;
 138
 139         if (this_is_starfire) {
 140                 tid = starfire_translate(imap, cpuid);
 141                 tid <<= IMAP_TID_SHIFT;
 142                 tid &= IMAP_TID_UPA;
 143         } else {
 144                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 145                         unsigned long ver;
 146
 147                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 148                         if ((ver >> 32UL) == __JALAPENO_ID ||
 149                             (ver >> 32UL) == __SERRANO_ID) {
 150                                 tid = cpuid << IMAP_TID_SHIFT;
 151                                 tid &= IMAP_TID_JBUS;
 152                         } else {
 153                                 unsigned int a = cpuid & 0x1f;
 154                                 unsigned int n = (cpuid >> 5) & 0x1f;
 155
 156                                 tid = ((a << IMAP_AID_SHIFT) |
 157                                        (n << IMAP_NID_SHIFT));
 158                                 tid &= (IMAP_AID_SAFARI |
 159                                         IMAP_NID_SAFARI);;
 160                         }
 161                 } else {
 162                         tid = cpuid << IMAP_TID_SHIFT;
 163                         tid &= IMAP_TID_UPA;
 164                 }
 165         }
 166
 167         return tid;
 168 }
 169
 170 /* Now these are always passed a true fully specified sun4u INO. */
 171 void enable_irq(unsigned int irq)
 172 {
 173         struct ino_bucket *bucket = __bucket(irq);
 174         unsigned long imap, cpuid;
 175
 176         imap = bucket->imap;
 177         if (imap == 0UL)
 178                 return;
 179
 180         preempt_disable();
 181
 182         /* This gets the physical processor ID, even on uniprocessor,
 183          * so we can always program the interrupt target correctly.
 184          */
 185         cpuid = real_hard_smp_processor_id();
 186
 187         if (tlb_type == hypervisor) {
 188                 unsigned int ino = __irq_ino(irq);
 189                 int err;
 190
 191                 err = sun4v_intr_settarget(ino, cpuid);
 192                 if (err != HV_EOK)
 193                         printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
 194                                ino, cpuid, err);
 195                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 196                 if (err != HV_EOK)
 197                         printk("sun4v_intr_setenabled(%x): err(%d)\n",
 198                                ino, err);
 199         } else {
 200                 unsigned int tid = sun4u_compute_tid(imap, cpuid);
 201
 202                 /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product
 203                  * of this SYSIO's preconfigured IGN in the SYSIO Control
 204                  * Register, the hardware just mirrors that value here.
 205                  * However for Graphics and UPA Slave devices the full
 206                  * IMAP_INR field can be set by the programmer here.
 207                  *
 208                  * Things like FFB can now be handled via the new IRQ
 209                  * mechanism.
 210                  */
 211                 upa_writel(tid | IMAP_VALID, imap);
 212         }
 213
 214         preempt_enable();
 215 }
 216
 217 /* This now gets passed true ino's as well. */
 218 void disable_irq(unsigned int irq)
 219 {
 220         struct ino_bucket *bucket = __bucket(irq);
 221         unsigned long imap;
 222
 223         imap = bucket->imap;
 224         if (imap != 0UL) {
 225                 if (tlb_type == hypervisor) {
 226                         unsigned int ino = __irq_ino(irq);
 227                         int err;
 228
 229                         err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 230                         if (err != HV_EOK)
 231                                 printk("sun4v_intr_setenabled(%x): "
 232                                        "err(%d)\n", ino, err);
 233                 } else {
 234                         u32 tmp;
 235
 236                         /* NOTE: We do not want to futz with the IRQ clear registers
 237                          *       and move the state to IDLE, the SCSI code does call
 238                          *       disable_irq() to assure atomicity in the queue cmd
 239                          *       SCSI adapter driver code.  Thus we'd lose interrupts.
 240                          */
 241                         tmp = upa_readl(imap);
 242                         tmp &= ~IMAP_VALID;
 243                         upa_writel(tmp, imap);
 244                 }
 245         }
 246 }
 247
 248 static void build_irq_error(const char *msg, unsigned int ino, int pil, int inofixup,
 249                             unsigned long iclr, unsigned long imap,
 250                             struct ino_bucket *bucket)
 251 {
 252         prom_printf("IRQ: INO %04x (%d:%016lx:%016lx) --> "
 253                     "(%d:%d:%016lx:%016lx), halting...\n",
 254                     ino, bucket->pil, bucket->iclr, bucket->imap,
 255                     pil, inofixup, iclr, imap);
 256         prom_halt();
 257 }
 258
 259 unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap)
 260 {
 261         struct ino_bucket *bucket;
 262         int ino;
 263
 264         BUG_ON(pil == 0);
 265         BUG_ON(tlb_type == hypervisor);
 266
 267         /* RULE: Both must be specified in all other cases. */
 268         if (iclr == 0UL || imap == 0UL) {
 269                 prom_printf("Invalid build_irq %d %d %016lx %016lx\n",
 270                             pil, inofixup, iclr, imap);
 271                 prom_halt();
 272         }
 273
 274         ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 275         if (ino > NUM_IVECS) {
 276                 prom_printf("Invalid INO %04x (%d:%d:%016lx:%016lx)\n",
 277                             ino, pil, inofixup, iclr, imap);
 278                 prom_halt();
 279         }
 280
 281         bucket = &ivector_table[ino];
 282         if (bucket->flags & IBF_ACTIVE)
 283                 build_irq_error("IRQ: Trying to build active INO bucket.\n",
 284                                 ino, pil, inofixup, iclr, imap, bucket);
 285
 286         if (bucket->irq_info) {
 287                 if (bucket->imap != imap || bucket->iclr != iclr)
 288                         build_irq_error("IRQ: Trying to reinit INO bucket.\n",
 289                                         ino, pil, inofixup, iclr, imap, bucket);
 290
 291                 goto out;
 292         }
 293
 294         bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
 295         if (!bucket->irq_info) {
 296                 prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
 297                 prom_halt();
 298         }
 299
 300         /* Ok, looks good, set it up.  Don't touch the irq_chain or
 301          * the pending flag.
 302          */
 303         bucket->imap  = imap;
 304         bucket->iclr  = iclr;
 305         bucket->pil   = pil;
 306         bucket->flags = 0;
 307
 308 out:
 309         return __irq(bucket);
 310 }
 311
 312 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, int pil, unsigned char flags)
 313 {
 314         struct ino_bucket *bucket;
 315         unsigned long sysino;
 316
 317         sysino = sun4v_devino_to_sysino(devhandle, devino);
 318
 319         bucket = &ivector_table[sysino];
 320
 321         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 322          * is done by hypervisor calls on sun4v platforms, not by direct
 323          * register accesses.
 324          *
 325          * But we need to make them look unique for the disable_irq() logic
 326          * in free_irq().
 327          */
 328         bucket->imap = ~0UL - sysino;
 329         bucket->iclr = ~0UL - sysino;
 330
 331         bucket->pil = pil;
 332         bucket->flags = flags;
 333
 334         bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
 335         if (!bucket->irq_info) {
 336                 prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
 337                 prom_halt();
 338         }
 339
 340         return __irq(bucket);
 341 }
 342
 343 static void atomic_bucket_insert(struct ino_bucket *bucket)
 344 {
 345         unsigned long pstate;
 346         unsigned int *ent;
 347
 348         __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
 349         __asm__ __volatile__("wrpr %0, %1, %%pstate"
 350                              : : "r" (pstate), "i" (PSTATE_IE));
 351         ent = irq_work(smp_processor_id());
 352         bucket->irq_chain = *ent;
 353         *ent = __irq(bucket);
 354         __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
 355 }
 356
 357 static int check_irq_sharing(int pil, unsigned long irqflags)
 358 {
 359         struct irqaction *action, *tmp;
 360
 361         action = *(irq_action + pil);
 362         if (action) {
 363                 if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) {
 364                         for (tmp = action; tmp->next; tmp = tmp->next)
 365                                 ;
 366                 } else {
 367                         return -EBUSY;
 368                 }
 369         }
 370         return 0;
 371 }
 372
 373 static void append_irq_action(int pil, struct irqaction *action)
 374 {
 375         struct irqaction **pp = irq_action + pil;
 376
 377         while (*pp)
 378                 pp = &((*pp)->next);
 379         *pp = action;
 380 }
 381
 382 static struct irqaction *get_action_slot(struct ino_bucket *bucket)
 383 {
 384         struct irq_desc *desc = bucket->irq_info;
 385         int max_irq, i;
 386
 387         max_irq = 1;
 388         if (bucket->flags & IBF_PCI)
 389                 max_irq = MAX_IRQ_DESC_ACTION;
 390         for (i = 0; i < max_irq; i++) {
 391                 struct irqaction *p = &desc->action[i];
 392                 u32 mask = (1 << i);
 393
 394                 if (desc->action_active_mask & mask)
 395                         continue;
 396
 397                 desc->action_active_mask |= mask;
 398                 return p;
 399         }
 400         return NULL;
 401 }
 402
 403 int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *),
 404                 unsigned long irqflags, const char *name, void *dev_id)
 405 {
 406         struct irqaction *action;
 407         struct ino_bucket *bucket = __bucket(irq);
 408         unsigned long flags;
 409         int pending = 0;
 410
 411         if (unlikely(!handler))
 412                 return -EINVAL;
 413
 414         if (unlikely(!bucket->irq_info))
 415                 return -ENODEV;
 416
 417         if (irqflags & SA_SAMPLE_RANDOM) {
 418                 /*
 419                  * This function might sleep, we want to call it first,
 420                  * outside of the atomic block. In SA_STATIC_ALLOC case,
 421                  * random driver's kmalloc will fail, but it is safe.
 422                  * If already initialized, random driver will not reinit.
 423                  * Yes, this might clear the entropy pool if the wrong
 424                  * driver is attempted to be loaded, without actually
 425                  * installing a new handler, but is this really a problem,
 426                  * only the sysadmin is able to do this.
 427                  */
 428                 rand_initialize_irq(irq);
 429         }
 430
 431         spin_lock_irqsave(&irq_action_lock, flags);
 432
 433         if (check_irq_sharing(bucket->pil, irqflags)) {
 434                 spin_unlock_irqrestore(&irq_action_lock, flags);
 435                 return -EBUSY;
 436         }
 437
 438         action = get_action_slot(bucket);
 439         if (!action) {
 440                 spin_unlock_irqrestore(&irq_action_lock, flags);
 441                 return -ENOMEM;
 442         }
 443
 444         bucket->flags |= IBF_ACTIVE;
 445         pending = bucket->pending;
 446         if (pending)
 447                 bucket->pending = 0;
 448
 449         action->handler = handler;
 450         action->flags = irqflags;
 451         action->name = name;
 452         action->next = NULL;
 453         action->dev_id = dev_id;
 454         put_ino_in_irqaction(action, irq);
 455         put_smpaff_in_irqaction(action, CPU_MASK_NONE);
 456
 457         append_irq_action(bucket->pil, action);
 458
 459         enable_irq(irq);
 460
 461         /* We ate the IVEC already, this makes sure it does not get lost. */
 462         if (pending) {
 463                 atomic_bucket_insert(bucket);
 464                 set_softint(1 << PIL_DEVICE_IRQ);
 465         }
 466
 467         spin_unlock_irqrestore(&irq_action_lock, flags);
 468
 469         register_irq_proc(__irq_ino(irq));
 470
 471 #ifdef CONFIG_SMP
 472         distribute_irqs();
 473 #endif
 474         return 0;
 475 }
 476
 477 EXPORT_SYMBOL(request_irq);
 478
 479 static struct irqaction *unlink_irq_action(unsigned int irq, void *dev_id)
 480 {
 481         struct ino_bucket *bucket = __bucket(irq);
 482         struct irqaction *action, **pp;
 483
 484         pp = irq_action + bucket->pil;
 485         action = *pp;
 486         if (unlikely(!action))
 487                 return NULL;
 488
 489         if (unlikely(!action->handler)) {
 490                 printk("Freeing free IRQ %d\n", bucket->pil);
 491                 return NULL;
 492         }
 493
 494         while (action && action->dev_id != dev_id) {
 495                 pp = &action->next;
 496                 action = *pp;
 497         }
 498
 499         if (likely(action))
 500                 *pp = action->next;
 501
 502         return action;
 503 }
 504
 505 void free_irq(unsigned int irq, void *dev_id)
 506 {
 507         struct irqaction *action;
 508         struct ino_bucket *bucket;
 509         struct irq_desc *desc;
 510         unsigned long flags;
 511         int ent, i;
 512
 513         spin_lock_irqsave(&irq_action_lock, flags);
 514
 515         action = unlink_irq_action(irq, dev_id);
 516
 517         spin_unlock_irqrestore(&irq_action_lock, flags);
 518
 519         if (unlikely(!action))
 520                 return;
 521
 522         synchronize_irq(irq);
 523
 524         spin_lock_irqsave(&irq_action_lock, flags);
 525
 526         bucket = __bucket(irq);
 527         desc = bucket->irq_info;
 528
 529         for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
 530                 struct irqaction *p = &desc->action[i];
 531
 532                 if (p == action) {
 533                         desc->action_active_mask &= ~(1 << i);
 534                         break;
 535                 }
 536         }
 537
 538         if (!desc->action_active_mask) {
 539                 unsigned long imap = bucket->imap;
 540
 541                 /* This unique interrupt source is now inactive. */
 542                 bucket->flags &= ~IBF_ACTIVE;
 543
 544                 /* See if any other buckets share this bucket's IMAP
 545                  * and are still active.
 546                  */
 547                 for (ent = 0; ent < NUM_IVECS; ent++) {
 548                         struct ino_bucket *bp = &ivector_table[ent];
 549                         if (bp != bucket        &&
 550                             bp->imap == imap    &&
 551                             (bp->flags & IBF_ACTIVE) != 0)
 552                                 break;
 553                 }
 554
 555                 /* Only disable when no other sub-irq levels of
 556                  * the same IMAP are active.
 557                  */
 558                 if (ent == NUM_IVECS)
 559                         disable_irq(irq);
 560         }
 561
 562         spin_unlock_irqrestore(&irq_action_lock, flags);
 563 }
 564
 565 EXPORT_SYMBOL(free_irq);
 566
 567 #ifdef CONFIG_SMP
 568 void synchronize_irq(unsigned int irq)
 569 {
 570         struct ino_bucket *bucket = __bucket(irq);
 571
 572 #if 0
 573         /* The following is how I wish I could implement this.
 574          * Unfortunately the ICLR registers are read-only, you can
 575          * only write ICLR_foo values to them.  To get the current
 576          * IRQ status you would need to get at the IRQ diag registers
 577          * in the PCI/SBUS controller and the layout of those vary
 578          * from one controller to the next, sigh... -DaveM
 579          */
 580         unsigned long iclr = bucket->iclr;
 581
 582         while (1) {
 583                 u32 tmp = upa_readl(iclr);
 584
 585                 if (tmp == ICLR_TRANSMIT ||
 586                     tmp == ICLR_PENDING) {
 587                         cpu_relax();
 588                         continue;
 589                 }
 590                 break;
 591         }
 592 #else
 593         /* So we have to do this with a INPROGRESS bit just like x86.  */
 594         while (bucket->flags & IBF_INPROGRESS)
 595                 cpu_relax();
 596 #endif
 597 }
 598 #endif /* CONFIG_SMP */
 599
 600 static void process_bucket(struct ino_bucket *bp, struct pt_regs *regs)
 601 {
 602         struct irq_desc *desc = bp->irq_info;
 603         unsigned char flags = bp->flags;
 604         u32 action_mask, i;
 605         int random;
 606
 607         bp->flags |= IBF_INPROGRESS;
 608
 609         if (unlikely(!(flags & IBF_ACTIVE))) {
 610                 bp->pending = 1;
 611                 goto out;
 612         }
 613
 614         if (desc->pre_handler)
 615                 desc->pre_handler(bp,
 616                                   desc->pre_handler_arg1,
 617                                   desc->pre_handler_arg2);
 618
 619         action_mask = desc->action_active_mask;
 620         random = 0;
 621         for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
 622                 struct irqaction *p = &desc->action[i];
 623                 u32 mask = (1 << i);
 624
 625                 if (!(action_mask & mask))
 626                         continue;
 627
 628                 action_mask &= ~mask;
 629
 630                 if (p->handler(__irq(bp), p->dev_id, regs) == IRQ_HANDLED)
 631                         random |= p->flags;
 632
 633                 if (!action_mask)
 634                         break;
 635         }
 636
 637         if (tlb_type == hypervisor) {
 638                 unsigned int ino = __irq_ino(bp);
 639                 int err;
 640
 641                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 642                 if (err != HV_EOK)
 643                         printk("sun4v_intr_setstate(%x): "
 644                                "err(%d)\n", ino, err);
 645         } else {
 646                 upa_writel(ICLR_IDLE, bp->iclr);
 647         }
 648
 649         /* Test and add entropy */
 650         if (random & SA_SAMPLE_RANDOM)
 651                 add_interrupt_randomness(bp->pil);
 652 out:
 653         bp->flags &= ~IBF_INPROGRESS;
 654 }
 655
 656 #ifndef CONFIG_SMP
 657 extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
 658
 659 void timer_irq(int irq, struct pt_regs *regs)
 660 {
 661         unsigned long clr_mask = 1 << irq;
 662         unsigned long tick_mask = tick_ops->softint_mask;
 663
 664         if (get_softint() & tick_mask) {
 665                 irq = 0;
 666                 clr_mask = tick_mask;
 667         }
 668         clear_softint(clr_mask);
 669
 670         irq_enter();
 671         kstat_this_cpu.irqs[irq]++;
 672         timer_interrupt(irq, NULL, regs);
 673         irq_exit();
 674 }
 675 #endif
 676
 677 void handler_irq(int irq, struct pt_regs *regs)
 678 {
 679         struct ino_bucket *bp;
 680         int cpu = smp_processor_id();
 681
 682         /* XXX at this point we should be able to assert that
 683          * XXX irq is PIL_DEVICE_IRQ...
 684          */
 685         clear_softint(1 << irq);
 686
 687         irq_enter();
 688
 689         /* Sliiiick... */
 690         bp = __bucket(xchg32(irq_work(cpu), 0));
 691         while (bp) {
 692                 struct ino_bucket *nbp = __bucket(bp->irq_chain);
 693
 694                 kstat_this_cpu.irqs[bp->pil]++;
 695
 696                 bp->irq_chain = 0;
 697                 process_bucket(bp, regs);
 698                 bp = nbp;
 699         }
 700         irq_exit();
 701 }
 702
 703 #ifdef CONFIG_BLK_DEV_FD
 704 extern irqreturn_t floppy_interrupt(int, void *, struct pt_regs *);
 705
 706 /* XXX No easy way to include asm/floppy.h XXX */
 707 extern unsigned char *pdma_vaddr;
 708 extern unsigned long pdma_size;
 709 extern volatile int doing_pdma;
 710 extern unsigned long fdc_status;
 711
 712 irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
 713 {
 714         if (likely(doing_pdma)) {
 715                 void __iomem *stat = (void __iomem *) fdc_status;
 716                 unsigned char *vaddr = pdma_vaddr;
 717                 unsigned long size = pdma_size;
 718                 u8 val;
 719
 720                 while (size) {
 721                         val = readb(stat);
 722                         if (unlikely(!(val & 0x80))) {
 723                                 pdma_vaddr = vaddr;
 724                                 pdma_size = size;
 725                                 return IRQ_HANDLED;
 726                         }
 727                         if (unlikely(!(val & 0x20))) {
 728                                 pdma_vaddr = vaddr;
 729                                 pdma_size = size;
 730                                 doing_pdma = 0;
 731                                 goto main_interrupt;
 732                         }
 733                         if (val & 0x40) {
 734                                 /* read */
 735                                 *vaddr++ = readb(stat + 1);
 736                         } else {
 737                                 unsigned char data = *vaddr++;
 738
 739                                 /* write */
 740                                 writeb(data, stat + 1);
 741                         }
 742                         size--;
 743                 }
 744
 745                 pdma_vaddr = vaddr;
 746                 pdma_size = size;
 747
 748                 /* Send Terminal Count pulse to floppy controller. */
 749                 val = readb(auxio_register);
 750                 val |= AUXIO_AUX1_FTCNT;
 751                 writeb(val, auxio_register);
 752                 val &= ~AUXIO_AUX1_FTCNT;
 753                 writeb(val, auxio_register);
 754
 755                 doing_pdma = 0;
 756         }
 757
 758 main_interrupt:
 759         return floppy_interrupt(irq, dev_cookie, regs);
 760 }
 761 EXPORT_SYMBOL(sparc_floppy_irq);
 762 #endif
 763
 764 /* We really don't need these at all on the Sparc.  We only have
 765  * stubs here because they are exported to modules.
 766  */
 767 unsigned long probe_irq_on(void)
 768 {
 769         return 0;
 770 }
 771
 772 EXPORT_SYMBOL(probe_irq_on);
 773
 774 int probe_irq_off(unsigned long mask)
 775 {
 776         return 0;
 777 }
 778
 779 EXPORT_SYMBOL(probe_irq_off);
 780
 781 #ifdef CONFIG_SMP
 782 static int retarget_one_irq(struct irqaction *p, int goal_cpu)
 783 {
 784         struct ino_bucket *bucket = get_ino_in_irqaction(p) + ivector_table;
 785
 786         while (!cpu_online(goal_cpu)) {
 787                 if (++goal_cpu >= NR_CPUS)
 788                         goal_cpu = 0;
 789         }
 790
 791         if (tlb_type == hypervisor) {
 792                 unsigned int ino = __irq_ino(bucket);
 793
 794                 sun4v_intr_settarget(ino, goal_cpu);
 795                 sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 796         } else {
 797                 unsigned long imap = bucket->imap;
 798                 unsigned int tid = sun4u_compute_tid(imap, goal_cpu);
 799
 800                 upa_writel(tid | IMAP_VALID, imap);
 801         }
 802
 803         do {
 804                 if (++goal_cpu >= NR_CPUS)
 805                         goal_cpu = 0;
 806         } while (!cpu_online(goal_cpu));
 807
 808         return goal_cpu;
 809 }
 810
 811 /* Called from request_irq. */
 812 static void distribute_irqs(void)
 813 {
 814         unsigned long flags;
 815         int cpu, level;
 816
 817         spin_lock_irqsave(&irq_action_lock, flags);
 818         cpu = 0;
 819
 820         /*
 821          * Skip the timer at [0], and very rare error/power intrs at [15].
 822          * Also level [12], it causes problems on Ex000 systems.
 823          */
 824         for (level = 1; level < NR_IRQS; level++) {
 825                 struct irqaction *p = irq_action[level];
 826
 827                 if (level == 12)
 828                         continue;
 829
 830                 while(p) {
 831                         cpu = retarget_one_irq(p, cpu);
 832                         p = p->next;
 833                 }
 834         }
 835         spin_unlock_irqrestore(&irq_action_lock, flags);
 836 }
 837 #endif
 838
 839 struct sun5_timer {
 840         u64     count0;
 841         u64     limit0;
 842         u64     count1;
 843         u64     limit1;
 844 };
 845
 846 static struct sun5_timer *prom_timers;
 847 static u64 prom_limit0, prom_limit1;
 848
 849 static void map_prom_timers(void)
 850 {
 851         unsigned int addr[3];
 852         int tnode, err;
 853
 854         /* PROM timer node hangs out in the top level of device siblings... */
 855         tnode = prom_finddevice("/counter-timer");
 856
 857         /* Assume if node is not present, PROM uses different tick mechanism
 858          * which we should not care about.
 859          */
 860         if (tnode == 0 || tnode == -1) {
 861                 prom_timers = (struct sun5_timer *) 0;
 862                 return;
 863         }
 864
 865         /* If PROM is really using this, it must be mapped by him. */
 866         err = prom_getproperty(tnode, "address", (char *)addr, sizeof(addr));
 867         if (err == -1) {
 868                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 869                 prom_timers = (struct sun5_timer *) 0;
 870                 return;
 871         }
 872         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 873 }
 874
 875 static void kill_prom_timer(void)
 876 {
 877         if (!prom_timers)
 878                 return;
 879
 880         /* Save them away for later. */
 881         prom_limit0 = prom_timers->limit0;
 882         prom_limit1 = prom_timers->limit1;
 883
 884         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 885          * We turn both off here just to be paranoid.
 886          */
 887         prom_timers->limit0 = 0;
 888         prom_timers->limit1 = 0;
 889
 890         /* Wheee, eat the interrupt packet too... */
 891         __asm__ __volatile__(
 892 "       mov     0x40, %%g2\n"
 893 "       ldxa    [%%g0] %0, %%g1\n"
 894 "       ldxa    [%%g2] %1, %%g1\n"
 895 "       stxa    %%g0, [%%g0] %0\n"
 896 "       membar  #Sync\n"
 897         : /* no outputs */
 898         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 899         : "g1", "g2");
 900 }
 901
 902 void init_irqwork_curcpu(void)
 903 {
 904         int cpu = hard_smp_processor_id();
 905
 906         trap_block[cpu].irq_worklist = 0;
 907 }
 908
 909 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type)
 910 {
 911         unsigned long num_entries = 128;
 912         unsigned long status;
 913
 914         status = sun4v_cpu_qconf(type, paddr, num_entries);
 915         if (status != HV_EOK) {
 916                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 917                             "err %lu\n", type, paddr, num_entries, status);
 918                 prom_halt();
 919         }
 920 }
 921
 922 static void __cpuinit sun4v_register_mondo_queues(int this_cpu)
 923 {
 924         struct trap_per_cpu *tb = &trap_block[this_cpu];
 925
 926         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO);
 927         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO);
 928         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR);
 929         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR);
 930 }
 931
 932 static void __cpuinit alloc_one_mondo(unsigned long *pa_ptr, int use_bootmem)
 933 {
 934         void *page;
 935
 936         if (use_bootmem)
 937                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 938         else
 939                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 940
 941         if (!page) {
 942                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 943                 prom_halt();
 944         }
 945
 946         *pa_ptr = __pa(page);
 947 }
 948
 949 static void __cpuinit alloc_one_kbuf(unsigned long *pa_ptr, int use_bootmem)
 950 {
 951         void *page;
 952
 953         if (use_bootmem)
 954                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 955         else
 956                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 957
 958         if (!page) {
 959                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 960                 prom_halt();
 961         }
 962
 963         *pa_ptr = __pa(page);
 964 }
 965
 966 static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_bootmem)
 967 {
 968 #ifdef CONFIG_SMP
 969         void *page;
 970
 971         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 972
 973         if (use_bootmem)
 974                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 975         else
 976                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 977
 978         if (!page) {
 979                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 980                 prom_halt();
 981         }
 982
 983         tb->cpu_mondo_block_pa = __pa(page);
 984         tb->cpu_list_pa = __pa(page + 64);
 985 #endif
 986 }
 987
 988 /* Allocate and register the mondo and error queues for this cpu.  */
 989 void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
 990 {
 991         struct trap_per_cpu *tb = &trap_block[cpu];
 992
 993         if (alloc) {
 994                 alloc_one_mondo(&tb->cpu_mondo_pa, use_bootmem);
 995                 alloc_one_mondo(&tb->dev_mondo_pa, use_bootmem);
 996                 alloc_one_mondo(&tb->resum_mondo_pa, use_bootmem);
 997                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, use_bootmem);
 998                 alloc_one_mondo(&tb->nonresum_mondo_pa, use_bootmem);
 999                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, use_bootmem);
1000
1001                 init_cpu_send_mondo_info(tb, use_bootmem);
1002         }
1003
1004         if (load) {
1005                 if (cpu != hard_smp_processor_id()) {
1006                         prom_printf("SUN4V: init mondo on cpu %d not %d\n",
1007                                     cpu, hard_smp_processor_id());
1008                         prom_halt();
1009                 }
1010                 sun4v_register_mondo_queues(cpu);
1011         }
1012 }
1013
1014 /* Only invoked on boot processor. */
1015 void __init init_IRQ(void)
1016 {
1017         map_prom_timers();
1018         kill_prom_timer();
1019         memset(&ivector_table[0], 0, sizeof(ivector_table));
1020
1021         if (tlb_type == hypervisor)
1022                 sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
1023
1024         /* We need to clear any IRQ's pending in the soft interrupt
1025          * registers, a spurious one could be left around from the
1026          * PROM timer which we just disabled.
1027          */
1028         clear_softint(get_softint());
1029
1030         /* Now that ivector table is initialized, it is safe
1031          * to receive IRQ vector traps.  We will normally take
1032          * one or two right now, in case some device PROM used
1033          * to boot us wants to speak to us.  We just ignore them.
1034          */
1035         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1036                              "or        %%g1, %0, %%g1\n\t"
1037                              "wrpr      %%g1, 0x0, %%pstate"
1038                              : /* No outputs */
1039                              : "i" (PSTATE_IE)
1040                              : "g1");
1041 }
1042
1043 static struct proc_dir_entry * root_irq_dir;
1044 static struct proc_dir_entry * irq_dir [NUM_IVECS];
1045
1046 #ifdef CONFIG_SMP
1047
1048 static int irq_affinity_read_proc (char *page, char **start, off_t off,
1049                         int count, int *eof, void *data)
1050 {
1051         struct ino_bucket *bp = ivector_table + (long)data;
1052         struct irq_desc *desc = bp->irq_info;
1053         struct irqaction *ap = desc->action;
1054         cpumask_t mask;
1055         int len;
1056
1057         mask = get_smpaff_in_irqaction(ap);
1058         if (cpus_empty(mask))
1059                 mask = cpu_online_map;
1060
1061         len = cpumask_scnprintf(page, count, mask);
1062         if (count - len < 2)
1063                 return -EINVAL;
1064         len += sprintf(page + len, "\n");
1065         return len;
1066 }
1067
1068 static inline void set_intr_affinity(int irq, cpumask_t hw_aff)
1069 {
1070         struct ino_bucket *bp = ivector_table + irq;
1071         struct irq_desc *desc = bp->irq_info;
1072         struct irqaction *ap = desc->action;
1073
1074         /* Users specify affinity in terms of hw cpu ids.
1075          * As soon as we do this, handler_irq() might see and take action.
1076          */
1077         put_smpaff_in_irqaction(ap, hw_aff);
1078
1079         /* Migration is simply done by the next cpu to service this
1080          * interrupt.
1081          */
1082 }
1083
1084 static int irq_affinity_write_proc (struct file *file, const char __user *buffer,
1085                                         unsigned long count, void *data)
1086 {
1087         int irq = (long) data, full_count = count, err;
1088         cpumask_t new_value;
1089
1090         err = cpumask_parse(buffer, count, new_value);
1091
1092         /*
1093          * Do not allow disabling IRQs completely - it's a too easy
1094          * way to make the system unusable accidentally :-) At least
1095          * one online CPU still has to be targeted.
1096          */
1097         cpus_and(new_value, new_value, cpu_online_map);
1098         if (cpus_empty(new_value))
1099                 return -EINVAL;
1100
1101         set_intr_affinity(irq, new_value);
1102
1103         return full_count;
1104 }
1105
1106 #endif
1107
1108 #define MAX_NAMELEN 10
1109
1110 static void register_irq_proc (unsigned int irq)
1111 {
1112         char name [MAX_NAMELEN];
1113
1114         if (!root_irq_dir || irq_dir[irq])
1115                 return;
1116
1117         memset(name, 0, MAX_NAMELEN);
1118         sprintf(name, "%x", irq);
1119
1120         /* create /proc/irq/1234 */
1121         irq_dir[irq] = proc_mkdir(name, root_irq_dir);
1122
1123 #ifdef CONFIG_SMP
1124         /* XXX SMP affinity not supported on starfire yet. */
1125         if (this_is_starfire == 0) {
1126                 struct proc_dir_entry *entry;
1127
1128                 /* create /proc/irq/1234/smp_affinity */
1129                 entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]);
1130
1131                 if (entry) {
1132                         entry->nlink = 1;
1133                         entry->data = (void *)(long)irq;
1134                         entry->read_proc = irq_affinity_read_proc;
1135                         entry->write_proc = irq_affinity_write_proc;
1136                 }
1137         }
1138 #endif
1139 }
1140
1141 void init_irq_proc (void)
1142 {
1143         /* create /proc/irq */
1144         root_irq_dir = proc_mkdir("irq", NULL);
1145 }
1146