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   1 /*
   2  * linux/arch/arm/mach-pxa/cm-x2xx.c
   3  *
   4  * Copyright (C) 2008 CompuLab, Ltd.
   5  * Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/sysdev.h>
  14 #include <linux/irq.h>
  15 #include <linux/gpio.h>
  16
  17 #include <linux/dm9000.h>
  18 #include <linux/leds.h>
  19
  20 #include <asm/mach/arch.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/mach/map.h>
  23
  24 #include <mach/pxa2xx-regs.h>
  25 #include <mach/mfp-pxa27x.h>
  26 #include <mach/pxa-regs.h>
  27 #include <mach/audio.h>
  28 #include <mach/pxafb.h>
  29
  30 #include <asm/hardware/it8152.h>
  31
  32 #include "generic.h"
  33 #include "cm-x2xx-pci.h"
  34
  35 extern void cmx255_init(void);
  36 extern void cmx270_init(void);
  37
  38 /* virtual addresses for statically mapped regions */
  39 #define CMX2XX_VIRT_BASE        (0xe8000000)
  40 #define CMX2XX_IT8152_VIRT      (CMX2XX_VIRT_BASE)
  41
  42 /* physical address if local-bus attached devices */
  43 #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
  44 #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
  45
  46 /* leds */
  47 #define CMX255_GPIO_RED         (27)
  48 #define CMX255_GPIO_GREEN       (32)
  49 #define CMX270_GPIO_RED         (93)
  50 #define CMX270_GPIO_GREEN       (94)
  51
  52 /* GPIO IRQ usage */
  53 #define GPIO22_ETHIRQ           (22)
  54 #define GPIO10_ETHIRQ           (10)
  55 #define CMX255_GPIO_IT8152_IRQ  (0)
  56 #define CMX270_GPIO_IT8152_IRQ  (22)
  57
  58 #define CMX255_ETHIRQ           IRQ_GPIO(GPIO22_ETHIRQ)
  59 #define CMX270_ETHIRQ           IRQ_GPIO(GPIO10_ETHIRQ)
  60
  61 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  62 static struct resource cmx255_dm9000_resource[] = {
  63         [0] = {
  64                 .start = CMX255_DM9000_PHYS_BASE,
  65                 .end   = CMX255_DM9000_PHYS_BASE + 3,
  66                 .flags = IORESOURCE_MEM,
  67         },
  68         [1] = {
  69                 .start = CMX255_DM9000_PHYS_BASE + 4,
  70                 .end   = CMX255_DM9000_PHYS_BASE + 4 + 500,
  71                 .flags = IORESOURCE_MEM,
  72         },
  73         [2] = {
  74                 .start = CMX255_ETHIRQ,
  75                 .end   = CMX255_ETHIRQ,
  76                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  77         }
  78 };
  79
  80 static struct resource cmx270_dm9000_resource[] = {
  81         [0] = {
  82                 .start = CMX270_DM9000_PHYS_BASE,
  83                 .end   = CMX270_DM9000_PHYS_BASE + 3,
  84                 .flags = IORESOURCE_MEM,
  85         },
  86         [1] = {
  87                 .start = CMX270_DM9000_PHYS_BASE + 8,
  88                 .end   = CMX270_DM9000_PHYS_BASE + 8 + 500,
  89                 .flags = IORESOURCE_MEM,
  90         },
  91         [2] = {
  92                 .start = CMX270_ETHIRQ,
  93                 .end   = CMX270_ETHIRQ,
  94                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  95         }
  96 };
  97
  98 static struct dm9000_plat_data cmx270_dm9000_platdata = {
  99         .flags          = DM9000_PLATF_32BITONLY,
 100 };
 101
 102 static struct platform_device cmx2xx_dm9000_device = {
 103         .name           = "dm9000",
 104         .id             = 0,
 105         .num_resources  = ARRAY_SIZE(cmx270_dm9000_resource),
 106         .dev            = {
 107                 .platform_data = &cmx270_dm9000_platdata,
 108         }
 109 };
 110
 111 static void __init cmx2xx_init_dm9000(void)
 112 {
 113         if (cpu_is_pxa25x())
 114                 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
 115         else
 116                 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
 117         platform_device_register(&cmx2xx_dm9000_device);
 118 }
 119 #else
 120 static inline void cmx2xx_init_dm9000(void) {}
 121 #endif
 122
 123 /* UCB1400 touchscreen controller */
 124 #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
 125 static struct platform_device cmx2xx_ts_device = {
 126         .name           = "ucb1400_ts",
 127         .id             = -1,
 128 };
 129
 130 static void __init cmx2xx_init_touchscreen(void)
 131 {
 132         platform_device_register(&cmx2xx_ts_device);
 133 }
 134 #else
 135 static inline void cmx2xx_init_touchscreen(void) {}
 136 #endif
 137
 138 /* CM-X270 LEDs */
 139 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
 140 static struct gpio_led cmx2xx_leds[] = {
 141         [0] = {
 142                 .name = "cm-x2xx:red",
 143                 .default_trigger = "nand-disk",
 144                 .active_low = 1,
 145         },
 146         [1] = {
 147                 .name = "cm-x2xx:green",
 148                 .default_trigger = "heartbeat",
 149                 .active_low = 1,
 150         },
 151 };
 152
 153 static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
 154         .num_leds = ARRAY_SIZE(cmx2xx_leds),
 155         .leds = cmx2xx_leds,
 156 };
 157
 158 static struct platform_device cmx2xx_led_device = {
 159         .name           = "leds-gpio",
 160         .id             = -1,
 161         .dev            = {
 162                 .platform_data = &cmx2xx_gpio_led_pdata,
 163         },
 164 };
 165
 166 static void __init cmx2xx_init_leds(void)
 167 {
 168         if (cpu_is_pxa25x()) {
 169                 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
 170                 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
 171         } else {
 172                 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
 173                 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
 174         }
 175         platform_device_register(&cmx2xx_led_device);
 176 }
 177 #else
 178 static inline void cmx2xx_init_leds(void) {}
 179 #endif
 180
 181 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 182 /*
 183   Display definitions
 184   keep these for backwards compatibility, although symbolic names (as
 185   e.g. in lpd270.c) looks better
 186 */
 187 #define MTYPE_STN320x240        0
 188 #define MTYPE_TFT640x480        1
 189 #define MTYPE_CRT640x480        2
 190 #define MTYPE_CRT800x600        3
 191 #define MTYPE_TFT320x240        6
 192 #define MTYPE_STN640x480        7
 193
 194 static struct pxafb_mode_info generic_stn_320x240_mode = {
 195         .pixclock       = 76923,
 196         .bpp            = 8,
 197         .xres           = 320,
 198         .yres           = 240,
 199         .hsync_len      = 3,
 200         .vsync_len      = 2,
 201         .left_margin    = 3,
 202         .upper_margin   = 0,
 203         .right_margin   = 3,
 204         .lower_margin   = 0,
 205         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 206                            FB_SYNC_VERT_HIGH_ACT),
 207         .cmap_greyscale = 0,
 208 };
 209
 210 static struct pxafb_mach_info generic_stn_320x240 = {
 211         .modes          = &generic_stn_320x240_mode,
 212         .num_modes      = 1,
 213         .lccr0          = 0,
 214         .lccr3          = (LCCR3_PixClkDiv(0x03) |
 215                            LCCR3_Acb(0xff) |
 216                            LCCR3_PCP),
 217         .cmap_inverse   = 0,
 218         .cmap_static    = 0,
 219 };
 220
 221 static struct pxafb_mode_info generic_tft_640x480_mode = {
 222         .pixclock       = 38461,
 223         .bpp            = 8,
 224         .xres           = 640,
 225         .yres           = 480,
 226         .hsync_len      = 60,
 227         .vsync_len      = 2,
 228         .left_margin    = 70,
 229         .upper_margin   = 10,
 230         .right_margin   = 70,
 231         .lower_margin   = 5,
 232         .sync           = 0,
 233         .cmap_greyscale = 0,
 234 };
 235
 236 static struct pxafb_mach_info generic_tft_640x480 = {
 237         .modes          = &generic_tft_640x480_mode,
 238         .num_modes      = 1,
 239         .lccr0          = (LCCR0_PAS),
 240         .lccr3          = (LCCR3_PixClkDiv(0x01) |
 241                            LCCR3_Acb(0xff) |
 242                            LCCR3_PCP),
 243         .cmap_inverse   = 0,
 244         .cmap_static    = 0,
 245 };
 246
 247 static struct pxafb_mode_info generic_crt_640x480_mode = {
 248         .pixclock       = 38461,
 249         .bpp            = 8,
 250         .xres           = 640,
 251         .yres           = 480,
 252         .hsync_len      = 63,
 253         .vsync_len      = 2,
 254         .left_margin    = 81,
 255         .upper_margin   = 33,
 256         .right_margin   = 16,
 257         .lower_margin   = 10,
 258         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 259                            FB_SYNC_VERT_HIGH_ACT),
 260         .cmap_greyscale = 0,
 261 };
 262
 263 static struct pxafb_mach_info generic_crt_640x480 = {
 264         .modes          = &generic_crt_640x480_mode,
 265         .num_modes      = 1,
 266         .lccr0          = (LCCR0_PAS),
 267         .lccr3          = (LCCR3_PixClkDiv(0x01) |
 268                            LCCR3_Acb(0xff)),
 269         .cmap_inverse   = 0,
 270         .cmap_static    = 0,
 271 };
 272
 273 static struct pxafb_mode_info generic_crt_800x600_mode = {
 274         .pixclock       = 28846,
 275         .bpp            = 8,
 276         .xres           = 800,
 277         .yres           = 600,
 278         .hsync_len      = 63,
 279         .vsync_len      = 2,
 280         .left_margin    = 26,
 281         .upper_margin   = 21,
 282         .right_margin   = 26,
 283         .lower_margin   = 11,
 284         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 285                            FB_SYNC_VERT_HIGH_ACT),
 286         .cmap_greyscale = 0,
 287 };
 288
 289 static struct pxafb_mach_info generic_crt_800x600 = {
 290         .modes          = &generic_crt_800x600_mode,
 291         .num_modes      = 1,
 292         .lccr0          = (LCCR0_PAS),
 293         .lccr3          = (LCCR3_PixClkDiv(0x02) |
 294                            LCCR3_Acb(0xff)),
 295         .cmap_inverse   = 0,
 296         .cmap_static    = 0,
 297 };
 298
 299 static struct pxafb_mode_info generic_tft_320x240_mode = {
 300         .pixclock       = 134615,
 301         .bpp            = 16,
 302         .xres           = 320,
 303         .yres           = 240,
 304         .hsync_len      = 63,
 305         .vsync_len      = 7,
 306         .left_margin    = 75,
 307         .upper_margin   = 0,
 308         .right_margin   = 15,
 309         .lower_margin   = 15,
 310         .sync           = 0,
 311         .cmap_greyscale = 0,
 312 };
 313
 314 static struct pxafb_mach_info generic_tft_320x240 = {
 315         .modes          = &generic_tft_320x240_mode,
 316         .num_modes      = 1,
 317         .lccr0          = (LCCR0_PAS),
 318         .lccr3          = (LCCR3_PixClkDiv(0x06) |
 319                            LCCR3_Acb(0xff) |
 320                            LCCR3_PCP),
 321         .cmap_inverse   = 0,
 322         .cmap_static    = 0,
 323 };
 324
 325 static struct pxafb_mode_info generic_stn_640x480_mode = {
 326         .pixclock       = 57692,
 327         .bpp            = 8,
 328         .xres           = 640,
 329         .yres           = 480,
 330         .hsync_len      = 4,
 331         .vsync_len      = 2,
 332         .left_margin    = 10,
 333         .upper_margin   = 5,
 334         .right_margin   = 10,
 335         .lower_margin   = 5,
 336         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 337                            FB_SYNC_VERT_HIGH_ACT),
 338         .cmap_greyscale = 0,
 339 };
 340
 341 static struct pxafb_mach_info generic_stn_640x480 = {
 342         .modes          = &generic_stn_640x480_mode,
 343         .num_modes      = 1,
 344         .lccr0          = 0,
 345         .lccr3          = (LCCR3_PixClkDiv(0x02) |
 346                            LCCR3_Acb(0xff)),
 347         .cmap_inverse   = 0,
 348         .cmap_static    = 0,
 349 };
 350
 351 static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
 352
 353 static int __init cmx2xx_set_display(char *str)
 354 {
 355         int disp_type = simple_strtol(str, NULL, 0);
 356         switch (disp_type) {
 357         case MTYPE_STN320x240:
 358                 cmx2xx_display = &generic_stn_320x240;
 359                 break;
 360         case MTYPE_TFT640x480:
 361                 cmx2xx_display = &generic_tft_640x480;
 362                 break;
 363         case MTYPE_CRT640x480:
 364                 cmx2xx_display = &generic_crt_640x480;
 365                 break;
 366         case MTYPE_CRT800x600:
 367                 cmx2xx_display = &generic_crt_800x600;
 368                 break;
 369         case MTYPE_TFT320x240:
 370                 cmx2xx_display = &generic_tft_320x240;
 371                 break;
 372         case MTYPE_STN640x480:
 373                 cmx2xx_display = &generic_stn_640x480;
 374                 break;
 375         default: /* fallback to CRT 640x480 */
 376                 cmx2xx_display = &generic_crt_640x480;
 377                 break;
 378         }
 379         return 1;
 380 }
 381
 382 /*
 383    This should be done really early to get proper configuration for
 384    frame buffer.
 385    Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
 386    has limitied line length for kernel command line, and also it will
 387    break compatibitlty with proprietary releases already in field.
 388 */
 389 __setup("monitor=", cmx2xx_set_display);
 390
 391 static void __init cmx2xx_init_display(void)
 392 {
 393         set_pxa_fb_info(cmx2xx_display);
 394 }
 395 #else
 396 static inline void cmx2xx_init_display(void) {}
 397 #endif
 398
 399 #ifdef CONFIG_PM
 400 static unsigned long sleep_save_msc[10];
 401
 402 static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
 403 {
 404         cmx2xx_pci_suspend();
 405
 406         /* save MSC registers */
 407         sleep_save_msc[0] = MSC0;
 408         sleep_save_msc[1] = MSC1;
 409         sleep_save_msc[2] = MSC2;
 410
 411         /* setup power saving mode registers */
 412         PCFR = 0x0;
 413         PSLR = 0xff400000;
 414         PMCR  = 0x00000005;
 415         PWER  = 0x80000000;
 416         PFER  = 0x00000000;
 417         PRER  = 0x00000000;
 418         PGSR0 = 0xC0018800;
 419         PGSR1 = 0x004F0002;
 420         PGSR2 = 0x6021C000;
 421         PGSR3 = 0x00020000;
 422
 423         return 0;
 424 }
 425
 426 static int cmx2xx_resume(struct sys_device *dev)
 427 {
 428         cmx2xx_pci_resume();
 429
 430         /* restore MSC registers */
 431         MSC0 = sleep_save_msc[0];
 432         MSC1 = sleep_save_msc[1];
 433         MSC2 = sleep_save_msc[2];
 434
 435         return 0;
 436 }
 437
 438 static struct sysdev_class cmx2xx_pm_sysclass = {
 439         .name = "pm",
 440         .resume = cmx2xx_resume,
 441         .suspend = cmx2xx_suspend,
 442 };
 443
 444 static struct sys_device cmx2xx_pm_device = {
 445         .cls = &cmx2xx_pm_sysclass,
 446 };
 447
 448 static int __init cmx2xx_pm_init(void)
 449 {
 450         int error;
 451         error = sysdev_class_register(&cmx2xx_pm_sysclass);
 452         if (error == 0)
 453                 error = sysdev_register(&cmx2xx_pm_device);
 454         return error;
 455 }
 456 #else
 457 static int __init cmx2xx_pm_init(void) { return 0; }
 458 #endif
 459
 460 #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
 461 static void __init cmx2xx_init_ac97(void)
 462 {
 463         pxa_set_ac97_info(NULL);
 464 }
 465 #else
 466 static inline void cmx2xx_init_ac97(void) {}
 467 #endif
 468
 469 static void __init cmx2xx_init(void)
 470 {
 471         cmx2xx_pm_init();
 472
 473         if (cpu_is_pxa25x())
 474                 cmx255_init();
 475         else
 476                 cmx270_init();
 477
 478         cmx2xx_init_dm9000();
 479         cmx2xx_init_display();
 480         cmx2xx_init_ac97();
 481         cmx2xx_init_touchscreen();
 482         cmx2xx_init_leds();
 483 }
 484
 485 static void __init cmx2xx_init_irq(void)
 486 {
 487         pxa27x_init_irq();
 488
 489         if (cpu_is_pxa25x()) {
 490                 pxa25x_init_irq();
 491                 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
 492         } else {
 493                 pxa27x_init_irq();
 494                 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
 495         }
 496 }
 497
 498 #ifdef CONFIG_PCI
 499 /* Map PCI companion statically */
 500 static struct map_desc cmx2xx_io_desc[] __initdata = {
 501         [0] = { /* PCI bridge */
 502                 .virtual        = CMX2XX_IT8152_VIRT,
 503                 .pfn            = __phys_to_pfn(PXA_CS4_PHYS),
 504                 .length         = SZ_64M,
 505                 .type           = MT_DEVICE
 506         },
 507 };
 508
 509 static void __init cmx2xx_map_io(void)
 510 {
 511         pxa_map_io();
 512         iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
 513
 514         it8152_base_address = CMX2XX_IT8152_VIRT;
 515 }
 516 #else
 517 static void __init cmx2xx_map_io(void)
 518 {
 519         pxa_map_io();
 520 }
 521 #endif
 522
 523 MACHINE_START(ARMCORE, "Compulab CM-X2XX")
 524         .boot_params    = 0xa0000100,
 525         .phys_io        = 0x40000000,
 526         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 527         .map_io         = cmx2xx_map_io,
 528         .init_irq       = cmx2xx_init_irq,
 529         .timer          = &pxa_timer,
 530         .init_machine   = cmx2xx_init,
 531 MACHINE_END