2 * linux/arch/alpha/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
7 /* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
16 #include <linux/stddef.h>
17 #include <linux/unistd.h>
18 #include <linux/ptrace.h>
19 #include <linux/slab.h>
20 #include <linux/user.h>
21 #include <linux/a.out.h>
22 #include <linux/screen_info.h>
23 #include <linux/delay.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/console.h>
26 #include <linux/cpu.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/string.h>
30 #include <linux/ioport.h>
31 #include <linux/platform_device.h>
32 #include <linux/bootmem.h>
33 #include <linux/pci.h>
34 #include <linux/seq_file.h>
35 #include <linux/root_dev.h>
36 #include <linux/initrd.h>
37 #include <linux/eisa.h>
38 #include <linux/pfn.h>
39 #ifdef CONFIG_MAGIC_SYSRQ
40 #include <linux/sysrq.h>
41 #include <linux/reboot.h>
43 #include <linux/notifier.h>
44 #include <asm/setup.h>
47 extern struct atomic_notifier_head panic_notifier_list;
48 static int alpha_panic_event(struct notifier_block *, unsigned long, void *);
49 static struct notifier_block alpha_panic_block = {
52 INT_MAX /* try to do it first */
55 #include <asm/uaccess.h>
56 #include <asm/pgtable.h>
57 #include <asm/system.h>
58 #include <asm/hwrpb.h>
61 #include <asm/mmu_context.h>
62 #include <asm/console.h>
68 struct hwrpb_struct *hwrpb;
70 unsigned long srm_hae;
72 int alpha_l1i_cacheshape;
73 int alpha_l1d_cacheshape;
74 int alpha_l2_cacheshape;
75 int alpha_l3_cacheshape;
77 #ifdef CONFIG_VERBOSE_MCHECK
78 /* 0=minimum, 1=verbose, 2=all */
79 /* These can be overridden via the command line, ie "verbose_mcheck=2") */
80 unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
83 /* Which processor we booted from. */
87 * Using SRM callbacks for initial console output. This works from
88 * setup_arch() time through the end of time_init(), as those places
89 * are under our (Alpha) control.
91 * "srmcons" specified in the boot command arguments allows us to
92 * see kernel messages during the period of time before the true
93 * console device is "registered" during console_init().
94 * As of this version (2.5.59), console_init() will call
95 * disable_early_printk() as the last action before initializing
96 * the console drivers. That's the last possible time srmcons can be
97 * unregistered without interfering with console behavior.
99 * By default, OFF; set it with a bootcommand arg of "srmcons" or
100 * "console=srm". The meaning of these two args is:
101 * "srmcons" - early callback prints
102 * "console=srm" - full callback based console, including early prints
104 int srmcons_output = 0;
106 /* Enforce a memory size limit; useful for testing. By default, none. */
107 unsigned long mem_size_limit = 0;
109 /* Set AGP GART window size (0 means disabled). */
110 unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE;
112 #ifdef CONFIG_ALPHA_GENERIC
113 struct alpha_machine_vector alpha_mv;
115 EXPORT_SYMBOL(alpha_using_srm);
118 static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long,
120 static struct alpha_machine_vector *get_sysvec_byname(const char *);
121 static void get_sysnames(unsigned long, unsigned long, unsigned long,
123 static void determine_cpu_caches (unsigned int);
125 static char command_line[COMMAND_LINE_SIZE];
128 * The format of "screen_info" is strange, and due to early
129 * i386-setup code. This is just enough to make the console
130 * code think we're on a VGA color display.
133 struct screen_info screen_info = {
136 .orig_video_cols = 80,
137 .orig_video_lines = 25,
138 .orig_video_isVGA = 1,
139 .orig_video_points = 16
142 EXPORT_SYMBOL(screen_info);
145 * The direct map I/O window, if any. This should be the same
146 * for all busses, since it's used by virt_to_bus.
149 unsigned long __direct_map_base;
150 unsigned long __direct_map_size;
151 EXPORT_SYMBOL(__direct_map_base);
152 EXPORT_SYMBOL(__direct_map_size);
155 * Declare all of the machine vectors.
158 /* GCC 2.7.2 (on alpha at least) is lame. It does not support either
159 __attribute__((weak)) or #pragma weak. Bypass it and talk directly
163 extern struct alpha_machine_vector X; \
183 WEAK(mikasa_primo_mv);
188 WEAK(noritake_primo_mv);
196 WEAK(sable_gamma_mv);
209 * I/O resources inherited from PeeCees. Except for perhaps the
210 * turbochannel alphas, everyone has these on some sort of SuperIO chip.
212 * ??? If this becomes less standard, move the struct out into the
217 reserve_std_resources(void)
219 static struct resource standard_io_resources[] = {
220 { .name = "rtc", .start = -1, .end = -1 },
221 { .name = "dma1", .start = 0x00, .end = 0x1f },
222 { .name = "pic1", .start = 0x20, .end = 0x3f },
223 { .name = "timer", .start = 0x40, .end = 0x5f },
224 { .name = "keyboard", .start = 0x60, .end = 0x6f },
225 { .name = "dma page reg", .start = 0x80, .end = 0x8f },
226 { .name = "pic2", .start = 0xa0, .end = 0xbf },
227 { .name = "dma2", .start = 0xc0, .end = 0xdf },
230 struct resource *io = &ioport_resource;
234 struct pci_controller *hose;
235 for (hose = hose_head; hose; hose = hose->next)
236 if (hose->index == 0) {
242 /* Fix up for the Jensen's queer RTC placement. */
243 standard_io_resources[0].start = RTC_PORT(0);
244 standard_io_resources[0].end = RTC_PORT(0) + 0x10;
246 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i)
247 request_resource(io, standard_io_resources+i);
250 #define PFN_MAX PFN_DOWN(0x80000000)
251 #define for_each_mem_cluster(memdesc, cluster, i) \
252 for ((cluster) = (memdesc)->cluster, (i) = 0; \
253 (i) < (memdesc)->numclusters; (i)++, (cluster)++)
255 static unsigned long __init
256 get_mem_size_limit(char *s)
258 unsigned long end = 0;
261 end = simple_strtoul(from, &from, 0);
262 if ( *from == 'K' || *from == 'k' ) {
265 } else if ( *from == 'M' || *from == 'm' ) {
268 } else if ( *from == 'G' || *from == 'g' ) {
272 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */
275 #ifdef CONFIG_BLK_DEV_INITRD
277 move_initrd(unsigned long mem_limit)
282 size = initrd_end - initrd_start;
283 start = __alloc_bootmem(PAGE_ALIGN(size), PAGE_SIZE, 0);
284 if (!start || __pa(start) + size > mem_limit) {
285 initrd_start = initrd_end = 0;
288 memmove(start, (void *)initrd_start, size);
289 initrd_start = (unsigned long)start;
290 initrd_end = initrd_start + size;
291 printk("initrd moved to %p\n", start);
296 #ifndef CONFIG_DISCONTIGMEM
298 setup_memory(void *kernel_end)
300 struct memclust_struct * cluster;
301 struct memdesc_struct * memdesc;
302 unsigned long start_kernel_pfn, end_kernel_pfn;
303 unsigned long bootmap_size, bootmap_pages, bootmap_start;
304 unsigned long start, end;
307 /* Find free clusters, and init and free the bootmem accordingly. */
308 memdesc = (struct memdesc_struct *)
309 (hwrpb->mddt_offset + (unsigned long) hwrpb);
311 for_each_mem_cluster(memdesc, cluster, i) {
312 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n",
313 i, cluster->usage, cluster->start_pfn,
314 cluster->start_pfn + cluster->numpages);
316 /* Bit 0 is console/PALcode reserved. Bit 1 is
317 non-volatile memory -- we might want to mark
319 if (cluster->usage & 3)
322 end = cluster->start_pfn + cluster->numpages;
323 if (end > max_low_pfn)
328 * Except for the NUMA systems (wildfire, marvel) all of the
329 * Alpha systems we run on support 32GB of memory or less.
330 * Since the NUMA systems introduce large holes in memory addressing,
331 * we can get into a situation where there is not enough contiguous
332 * memory for the memory map.
334 * Limit memory to the first 32GB to limit the NUMA systems to
335 * memory on their first node (wildfire) or 2 (marvel) to avoid
336 * not being able to produce the memory map. In order to access
337 * all of the memory on the NUMA systems, build with discontiguous
340 * If the user specified a memory limit, let that memory limit stand.
343 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT;
345 if (mem_size_limit && max_low_pfn >= mem_size_limit)
347 printk("setup: forcing memory size to %ldK (from %ldK).\n",
348 mem_size_limit << (PAGE_SHIFT - 10),
349 max_low_pfn << (PAGE_SHIFT - 10));
350 max_low_pfn = mem_size_limit;
353 /* Find the bounds of kernel memory. */
354 start_kernel_pfn = PFN_DOWN(KERNEL_START_PHYS);
355 end_kernel_pfn = PFN_UP(virt_to_phys(kernel_end));
359 if (max_low_pfn <= end_kernel_pfn)
360 panic("not enough memory to boot");
362 /* We need to know how many physically contiguous pages
363 we'll need for the bootmap. */
364 bootmap_pages = bootmem_bootmap_pages(max_low_pfn);
366 /* Now find a good region where to allocate the bootmap. */
367 for_each_mem_cluster(memdesc, cluster, i) {
368 if (cluster->usage & 3)
371 start = cluster->start_pfn;
372 end = start + cluster->numpages;
373 if (start >= max_low_pfn)
375 if (end > max_low_pfn)
377 if (start < start_kernel_pfn) {
378 if (end > end_kernel_pfn
379 && end - end_kernel_pfn >= bootmap_pages) {
380 bootmap_start = end_kernel_pfn;
382 } else if (end > start_kernel_pfn)
383 end = start_kernel_pfn;
384 } else if (start < end_kernel_pfn)
385 start = end_kernel_pfn;
386 if (end - start >= bootmap_pages) {
387 bootmap_start = start;
392 if (bootmap_start == ~0UL) {
397 /* Allocate the bootmap and mark the whole MM as reserved. */
398 bootmap_size = init_bootmem(bootmap_start, max_low_pfn);
400 /* Mark the free regions. */
401 for_each_mem_cluster(memdesc, cluster, i) {
402 if (cluster->usage & 3)
405 start = cluster->start_pfn;
406 end = cluster->start_pfn + cluster->numpages;
407 if (start >= max_low_pfn)
409 if (end > max_low_pfn)
411 if (start < start_kernel_pfn) {
412 if (end > end_kernel_pfn) {
413 free_bootmem(PFN_PHYS(start),
414 (PFN_PHYS(start_kernel_pfn)
416 printk("freeing pages %ld:%ld\n",
417 start, start_kernel_pfn);
418 start = end_kernel_pfn;
419 } else if (end > start_kernel_pfn)
420 end = start_kernel_pfn;
421 } else if (start < end_kernel_pfn)
422 start = end_kernel_pfn;
426 free_bootmem(PFN_PHYS(start), PFN_PHYS(end) - PFN_PHYS(start));
427 printk("freeing pages %ld:%ld\n", start, end);
430 /* Reserve the bootmap memory. */
431 reserve_bootmem(PFN_PHYS(bootmap_start), bootmap_size);
432 printk("reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size));
434 #ifdef CONFIG_BLK_DEV_INITRD
435 initrd_start = INITRD_START;
437 initrd_end = initrd_start+INITRD_SIZE;
438 printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
439 (void *) initrd_start, INITRD_SIZE);
441 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) {
442 if (!move_initrd(PFN_PHYS(max_low_pfn)))
443 printk("initrd extends beyond end of memory "
444 "(0x%08lx > 0x%p)\ndisabling initrd\n",
446 phys_to_virt(PFN_PHYS(max_low_pfn)));
448 reserve_bootmem(virt_to_phys((void *)initrd_start),
452 #endif /* CONFIG_BLK_DEV_INITRD */
455 extern void setup_memory(void *);
456 #endif /* !CONFIG_DISCONTIGMEM */
459 page_is_ram(unsigned long pfn)
461 struct memclust_struct * cluster;
462 struct memdesc_struct * memdesc;
465 memdesc = (struct memdesc_struct *)
466 (hwrpb->mddt_offset + (unsigned long) hwrpb);
467 for_each_mem_cluster(memdesc, cluster, i)
469 if (pfn >= cluster->start_pfn &&
470 pfn < cluster->start_pfn + cluster->numpages) {
471 return (cluster->usage & 3) ? 0 : 1;
483 for_each_possible_cpu(i) {
484 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
492 arch_initcall(register_cpus);
495 setup_arch(char **cmdline_p)
499 struct alpha_machine_vector *vec = NULL;
500 struct percpu_struct *cpu;
501 char *type_name, *var_name, *p;
502 void *kernel_end = _end; /* end of kernel */
503 char *args = command_line;
505 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr);
506 boot_cpuid = hard_smp_processor_id();
509 * Pre-process the system type to make sure it will be valid.
511 * This may restore real CABRIO and EB66+ family names, ie
514 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series)
515 * and AS1200 (DIGITAL Server 5000 series) have the type as
516 * the negative of the real one.
518 if ((long)hwrpb->sys_type < 0) {
519 hwrpb->sys_type = -((long)hwrpb->sys_type);
520 hwrpb_update_checksum(hwrpb);
523 /* Register a call for panic conditions. */
524 atomic_notifier_chain_register(&panic_notifier_list,
527 #ifdef CONFIG_ALPHA_GENERIC
528 /* Assume that we've booted from SRM if we haven't booted from MILO.
529 Detect the later by looking for "MILO" in the system serial nr. */
530 alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0;
533 /* If we are using SRM, we want to allow callbacks
534 as early as possible, so do this NOW, and then
535 they should work immediately thereafter.
537 kernel_end = callback_init(kernel_end);
540 * Locate the command line.
542 /* Hack for Jensen... since we're restricted to 8 or 16 chars for
543 boot flags depending on the boot mode, we need some shorthand.
544 This should do for installation. */
545 if (strcmp(COMMAND_LINE, "INSTALL") == 0) {
546 strlcpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof command_line);
548 strlcpy(command_line, COMMAND_LINE, sizeof command_line);
550 strcpy(saved_command_line, command_line);
551 *cmdline_p = command_line;
554 * Process command-line arguments.
556 while ((p = strsep(&args, " \t")) != NULL) {
558 if (strncmp(p, "alpha_mv=", 9) == 0) {
559 vec = get_sysvec_byname(p+9);
562 if (strncmp(p, "cycle=", 6) == 0) {
563 est_cycle_freq = simple_strtol(p+6, NULL, 0);
566 if (strncmp(p, "mem=", 4) == 0) {
567 mem_size_limit = get_mem_size_limit(p+4);
570 if (strncmp(p, "srmcons", 7) == 0) {
574 if (strncmp(p, "console=srm", 11) == 0) {
578 if (strncmp(p, "gartsize=", 9) == 0) {
580 get_mem_size_limit(p+9) << PAGE_SHIFT;
583 #ifdef CONFIG_VERBOSE_MCHECK
584 if (strncmp(p, "verbose_mcheck=", 15) == 0) {
585 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0);
591 /* Replace the command line, now that we've killed it with strsep. */
592 strcpy(command_line, saved_command_line);
594 /* If we want SRM console printk echoing early, do it now. */
595 if (alpha_using_srm && srmcons_output) {
596 register_srm_console();
599 * If "console=srm" was specified, clear the srmcons_output
600 * flag now so that time.c won't unregister_srm_console
602 if (srmcons_output & 2)
606 #ifdef CONFIG_MAGIC_SYSRQ
607 /* If we're using SRM, make sysrq-b halt back to the prom,
609 if (alpha_using_srm) {
610 struct sysrq_key_op *op = __sysrq_get_key_op('b');
611 op->handler = (void *) machine_halt;
616 * Identify and reconfigure for the current system.
618 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset);
620 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
621 cpu->type, &type_name, &var_name);
622 if (*var_name == '0')
626 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation,
631 panic("Unsupported system type: %s%s%s (%ld %ld)\n",
632 type_name, (*var_name ? " variation " : ""), var_name,
633 hwrpb->sys_type, hwrpb->sys_variation);
635 if (vec != &alpha_mv) {
640 #ifdef CONFIG_ALPHA_GENERIC
643 "on %s%s%s using machine vector %s from %s\n",
644 type_name, (*var_name ? " variation " : ""),
645 var_name, alpha_mv.vector_name,
646 (alpha_using_srm ? "SRM" : "MILO"));
648 printk("Major Options: "
652 #ifdef CONFIG_ALPHA_EV56
655 #ifdef CONFIG_ALPHA_EV67
658 #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
661 #ifdef CONFIG_VERBOSE_MCHECK
665 #ifdef CONFIG_DISCONTIGMEM
672 #ifdef CONFIG_DEBUG_SPINLOCK
675 #ifdef CONFIG_MAGIC_SYSRQ
680 printk("Command line: %s\n", command_line);
684 * Save the SRM's current value for restoration.
686 srm_hae = *alpha_mv.hae_register;
687 __set_hae(alpha_mv.hae_cache);
689 /* Reset enable correctable error reports. */
692 /* Find our memory. */
693 setup_memory(kernel_end);
695 /* First guess at cpu cache sizes. Do this before init_arch. */
696 determine_cpu_caches(cpu->type);
698 /* Initialize the machine. Usually has to do with setting up
699 DMA windows and the like. */
700 if (alpha_mv.init_arch)
701 alpha_mv.init_arch();
703 /* Reserve standard resources. */
704 reserve_std_resources();
707 * Give us a default console. TGA users will see nothing until
708 * chr_dev_init is called, rather late in the boot sequence.
712 #if defined(CONFIG_VGA_CONSOLE)
713 conswitchp = &vga_con;
714 #elif defined(CONFIG_DUMMY_CONSOLE)
715 conswitchp = &dummy_con;
719 /* Default root filesystem to sda2. */
720 ROOT_DEV = Root_SDA2;
723 /* FIXME: only set this when we actually have EISA in this box? */
728 * Check ASN in HWRPB for validity, report if bad.
729 * FIXME: how was this failing? Should we trust it instead,
730 * and copy the value into alpha_mv.max_asn?
733 if (hwrpb->max_asn != MAX_ASN) {
734 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn);
738 * Identify the flock of penguins.
748 disable_early_printk(void)
750 if (alpha_using_srm && srmcons_output) {
751 unregister_srm_console();
756 static char sys_unknown[] = "Unknown";
757 static char systype_names[][16] = {
759 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen",
760 "Pelican", "Morgan", "Sable", "Medulla", "Noname",
761 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind",
762 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1",
763 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake",
764 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon",
765 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel"
768 static char unofficial_names[][8] = {"100", "Ruffian"};
770 static char api_names[][16] = {"200", "Nautilus"};
772 static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"};
773 static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4};
775 static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"};
776 static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2};
778 static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"};
779 static int eb64p_indices[] = {0,0,1,2};
781 static char eb66_names[][8] = {"EB66", "EB66+"};
782 static int eb66_indices[] = {0,0,1};
784 static char marvel_names[][16] = {
787 static int marvel_indices[] = { 0 };
789 static char rawhide_names[][16] = {
790 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci"
792 static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4};
794 static char titan_names[][16] = {
795 "DEFAULT", "Privateer", "Falcon", "Granite"
797 static int titan_indices[] = {0,1,2,2,3};
799 static char tsunami_names[][16] = {
800 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper",
801 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne",
802 "Flying Clipper", "Shark"
804 static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12};
806 static struct alpha_machine_vector * __init
807 get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
809 static struct alpha_machine_vector *systype_vecs[] __initdata =
816 NULL, /* Mannequin */
820 NULL, /* Sable -- see below. */
823 NULL, /* Turbolaser */
826 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */
827 NULL, /* Tradewind */
828 NULL, /* Mikasa -- see below. */
830 NULL, /* EB66 -- see variation. */
831 NULL, /* EB64+ -- see variation. */
837 NULL, /* EB164 -- see variation. */
838 NULL, /* Noritake -- see below. */
845 NULL, /* Tsunami -- see variation. */
846 &wildfire_mv, /* Wildfire */
848 &eiger_mv, /* Eiger */
853 static struct alpha_machine_vector *unofficial_vecs[] __initdata =
859 static struct alpha_machine_vector *api_vecs[] __initdata =
865 static struct alpha_machine_vector *alcor_vecs[] __initdata =
867 &alcor_mv, &xlt_mv, &xlt_mv
870 static struct alpha_machine_vector *eb164_vecs[] __initdata =
872 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv
875 static struct alpha_machine_vector *eb64p_vecs[] __initdata =
879 &cabriolet_mv /* AlphaPCI64 */
882 static struct alpha_machine_vector *eb66_vecs[] __initdata =
888 static struct alpha_machine_vector *marvel_vecs[] __initdata =
893 static struct alpha_machine_vector *titan_vecs[] __initdata =
895 &titan_mv, /* default */
896 &privateer_mv, /* privateer */
897 &titan_mv, /* falcon */
898 &privateer_mv, /* granite */
901 static struct alpha_machine_vector *tsunami_vecs[] __initdata =
904 &dp264_mv, /* dp264 */
905 &dp264_mv, /* warhol */
906 &dp264_mv, /* windjammer */
907 &monet_mv, /* monet */
908 &clipper_mv, /* clipper */
909 &dp264_mv, /* goldrush */
910 &webbrick_mv, /* webbrick */
911 &dp264_mv, /* catamaran */
912 NULL, /* brisbane? */
913 NULL, /* melbourne? */
914 NULL, /* flying clipper? */
915 &shark_mv, /* shark */
918 /* ??? Do we need to distinguish between Rawhides? */
920 struct alpha_machine_vector *vec;
922 /* Search the system tables first... */
924 if (type < ARRAY_SIZE(systype_vecs)) {
925 vec = systype_vecs[type];
926 } else if ((type > ST_API_BIAS) &&
927 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) {
928 vec = api_vecs[type - ST_API_BIAS];
929 } else if ((type > ST_UNOFFICIAL_BIAS) &&
930 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) {
931 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS];
934 /* If we've not found one, try for a variation. */
937 /* Member ID is a bit-field. */
938 unsigned long member = (variation >> 10) & 0x3f;
940 cpu &= 0xffffffff; /* make it usable */
944 if (member < ARRAY_SIZE(alcor_indices))
945 vec = alcor_vecs[alcor_indices[member]];
948 if (member < ARRAY_SIZE(eb164_indices))
949 vec = eb164_vecs[eb164_indices[member]];
950 /* PC164 may show as EB164 variation with EV56 CPU,
951 but, since no true EB164 had anything but EV5... */
952 if (vec == &eb164_mv && cpu == EV56_CPU)
956 if (member < ARRAY_SIZE(eb64p_indices))
957 vec = eb64p_vecs[eb64p_indices[member]];
960 if (member < ARRAY_SIZE(eb66_indices))
961 vec = eb66_vecs[eb66_indices[member]];
964 if (member < ARRAY_SIZE(marvel_indices))
965 vec = marvel_vecs[marvel_indices[member]];
968 vec = titan_vecs[0]; /* default */
969 if (member < ARRAY_SIZE(titan_indices))
970 vec = titan_vecs[titan_indices[member]];
973 if (member < ARRAY_SIZE(tsunami_indices))
974 vec = tsunami_vecs[tsunami_indices[member]];
977 if (cpu == EV5_CPU || cpu == EV56_CPU)
978 vec = &mikasa_primo_mv;
982 case ST_DEC_NORITAKE:
983 if (cpu == EV5_CPU || cpu == EV56_CPU)
984 vec = &noritake_primo_mv;
988 case ST_DEC_2100_A500:
989 if (cpu == EV5_CPU || cpu == EV56_CPU)
990 vec = &sable_gamma_mv;
999 static struct alpha_machine_vector * __init
1000 get_sysvec_byname(const char *name)
1002 static struct alpha_machine_vector *all_vecs[] __initdata =
1045 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) {
1046 struct alpha_machine_vector *mv = all_vecs[i];
1047 if (strcasecmp(mv->vector_name, name) == 0)
1054 get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,
1055 char **type_name, char **variation_name)
1057 unsigned long member;
1059 /* If not in the tables, make it UNKNOWN,
1060 else set type name to family */
1061 if (type < ARRAY_SIZE(systype_names)) {
1062 *type_name = systype_names[type];
1063 } else if ((type > ST_API_BIAS) &&
1064 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) {
1065 *type_name = api_names[type - ST_API_BIAS];
1066 } else if ((type > ST_UNOFFICIAL_BIAS) &&
1067 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) {
1068 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS];
1070 *type_name = sys_unknown;
1071 *variation_name = sys_unknown;
1075 /* Set variation to "0"; if variation is zero, done. */
1076 *variation_name = systype_names[0];
1077 if (variation == 0) {
1081 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */
1083 cpu &= 0xffffffff; /* make it usable */
1085 switch (type) { /* select by family */
1086 default: /* default to variation "0" for now */
1089 if (member < ARRAY_SIZE(eb164_indices))
1090 *variation_name = eb164_names[eb164_indices[member]];
1091 /* PC164 may show as EB164 variation, but with EV56 CPU,
1092 so, since no true EB164 had anything but EV5... */
1093 if (eb164_indices[member] == 0 && cpu == EV56_CPU)
1094 *variation_name = eb164_names[1]; /* make it PC164 */
1097 if (member < ARRAY_SIZE(alcor_indices))
1098 *variation_name = alcor_names[alcor_indices[member]];
1101 if (member < ARRAY_SIZE(eb64p_indices))
1102 *variation_name = eb64p_names[eb64p_indices[member]];
1105 if (member < ARRAY_SIZE(eb66_indices))
1106 *variation_name = eb66_names[eb66_indices[member]];
1109 if (member < ARRAY_SIZE(marvel_indices))
1110 *variation_name = marvel_names[marvel_indices[member]];
1112 case ST_DEC_RAWHIDE:
1113 if (member < ARRAY_SIZE(rawhide_indices))
1114 *variation_name = rawhide_names[rawhide_indices[member]];
1117 *variation_name = titan_names[0]; /* default */
1118 if (member < ARRAY_SIZE(titan_indices))
1119 *variation_name = titan_names[titan_indices[member]];
1121 case ST_DEC_TSUNAMI:
1122 if (member < ARRAY_SIZE(tsunami_indices))
1123 *variation_name = tsunami_names[tsunami_indices[member]];
1129 * A change was made to the HWRPB via an ECO and the following code
1130 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO
1131 * was not implemented in the console firmware. If it's revision 5 or
1132 * greater we can get the name of the platform as an ASCII string from
1133 * the HWRPB. That's what this function does. It checks the revision
1134 * level and if the string is in the HWRPB it returns the address of
1135 * the string--a pointer to the name of the platform.
1138 * - Pointer to a ASCII string if it's in the HWRPB
1139 * - Pointer to a blank string if the data is not in the HWRPB.
1143 platform_string(void)
1145 struct dsr_struct *dsr;
1146 static char unk_system_string[] = "N/A";
1148 /* Go to the console for the string pointer.
1149 * If the rpb_vers is not 5 or greater the rpb
1150 * is old and does not have this data in it.
1152 if (hwrpb->revision < 5)
1153 return (unk_system_string);
1155 /* The Dynamic System Recognition struct
1156 * has the system platform name starting
1157 * after the character count of the string.
1159 dsr = ((struct dsr_struct *)
1160 ((char *)hwrpb + hwrpb->dsr_offset));
1161 return ((char *)dsr + (dsr->sysname_off +
1167 get_nr_processors(struct percpu_struct *cpubase, unsigned long num)
1169 struct percpu_struct *cpu;
1173 for (i = 0; i < num; i++) {
1174 cpu = (struct percpu_struct *)
1175 ((char *)cpubase + i*hwrpb->processor_size);
1176 if ((cpu->flags & 0x1cc) == 0x1cc)
1183 show_cache_size (struct seq_file *f, const char *which, int shape)
1186 seq_printf (f, "%s\t\t: n/a\n", which);
1187 else if (shape == 0)
1188 seq_printf (f, "%s\t\t: unknown\n", which);
1190 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n",
1191 which, shape >> 10, shape & 15,
1192 1 << ((shape >> 4) & 15));
1196 show_cpuinfo(struct seq_file *f, void *slot)
1198 extern struct unaligned_stat {
1199 unsigned long count, va, pc;
1202 static char cpu_names[][8] = {
1203 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56",
1204 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL",
1205 "EV68CX", "EV7", "EV79", "EV69"
1208 struct percpu_struct *cpu = slot;
1209 unsigned int cpu_index;
1212 char *sysvariation_name;
1215 cpu_index = (unsigned) (cpu->type - 1);
1216 cpu_name = "Unknown";
1217 if (cpu_index < ARRAY_SIZE(cpu_names))
1218 cpu_name = cpu_names[cpu_index];
1220 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
1221 cpu->type, &systype_name, &sysvariation_name);
1223 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors);
1225 seq_printf(f, "cpu\t\t\t: Alpha\n"
1226 "cpu model\t\t: %s\n"
1227 "cpu variation\t\t: %ld\n"
1228 "cpu revision\t\t: %ld\n"
1229 "cpu serial number\t: %s\n"
1230 "system type\t\t: %s\n"
1231 "system variation\t: %s\n"
1232 "system revision\t\t: %ld\n"
1233 "system serial number\t: %s\n"
1234 "cycle frequency [Hz]\t: %lu %s\n"
1235 "timer frequency [Hz]\t: %lu.%02lu\n"
1236 "page size [bytes]\t: %ld\n"
1237 "phys. address bits\t: %ld\n"
1238 "max. addr. space #\t: %ld\n"
1239 "BogoMIPS\t\t: %lu.%02lu\n"
1240 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1241 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1242 "platform string\t\t: %s\n"
1243 "cpus detected\t\t: %d\n",
1244 cpu_name, cpu->variation, cpu->revision,
1245 (char*)cpu->serial_no,
1246 systype_name, sysvariation_name, hwrpb->sys_revision,
1248 est_cycle_freq ? : hwrpb->cycle_freq,
1249 est_cycle_freq ? "est." : "",
1250 hwrpb->intr_freq / 4096,
1251 (100 * hwrpb->intr_freq / 4096) % 100,
1255 loops_per_jiffy / (500000/HZ),
1256 (loops_per_jiffy / (5000/HZ)) % 100,
1257 unaligned[0].count, unaligned[0].pc, unaligned[0].va,
1258 unaligned[1].count, unaligned[1].pc, unaligned[1].va,
1259 platform_string(), nr_processors);
1262 seq_printf(f, "cpus active\t\t: %d\n"
1263 "cpu active mask\t\t: %016lx\n",
1264 num_online_cpus(), cpus_addr(cpu_possible_map)[0]);
1267 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape);
1268 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape);
1269 show_cache_size (f, "L2 cache", alpha_l2_cacheshape);
1270 show_cache_size (f, "L3 cache", alpha_l3_cacheshape);
1276 read_mem_block(int *addr, int stride, int size)
1278 long nloads = size / stride, cnt, tmp;
1280 __asm__ __volatile__(
1284 /* Next two XORs introduce an explicit data dependency between
1285 consecutive loads in the loop, which will give us true load
1293 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp)
1294 : "r" (stride), "1" (nloads), "2" (addr));
1296 return cnt / (size / stride);
1299 #define CSHAPE(totalsize, linesize, assoc) \
1300 ((totalsize & ~0xff) | (linesize << 4) | assoc)
1302 /* ??? EV5 supports up to 64M, but did the systems with more than
1303 16M of BCACHE ever exist? */
1304 #define MAX_BCACHE_SIZE 16*1024*1024
1306 /* Note that the offchip caches are direct mapped on all Alphas. */
1308 external_cache_probe(int minsize, int width)
1310 int cycles, prev_cycles = 1000000;
1311 int stride = 1 << width;
1312 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2;
1314 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT)
1315 maxsize = 1 << (floor_log2(max_low_pfn + 1) + PAGE_SHIFT);
1317 /* Get the first block cached. */
1318 read_mem_block(__va(0), stride, size);
1320 while (size < maxsize) {
1321 /* Get an average load latency in cycles. */
1322 cycles = read_mem_block(__va(0), stride, size);
1323 if (cycles > prev_cycles * 2) {
1324 /* Fine, we exceed the cache. */
1325 printk("%ldK Bcache detected; load hit latency %d "
1326 "cycles, load miss latency %d cycles\n",
1327 size >> 11, prev_cycles, cycles);
1328 return CSHAPE(size >> 1, width, 1);
1330 /* Try to get the next block cached. */
1331 read_mem_block(__va(size), stride, size);
1332 prev_cycles = cycles;
1335 return -1; /* No BCACHE found. */
1339 determine_cpu_caches (unsigned int cpu_type)
1341 int L1I, L1D, L2, L3;
1347 if (cpu_type == EV4_CPU)
1348 L1I = CSHAPE(8*1024, 5, 1);
1350 L1I = CSHAPE(16*1024, 5, 1);
1354 /* BIU_CTL is a write-only Abox register. PALcode has a
1355 shadow copy, and may be available from some versions
1356 of the CSERVE PALcall. If we can get it, then
1358 unsigned long biu_ctl, size;
1359 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7));
1360 L2 = CSHAPE (size, 5, 1);
1362 Unfortunately, we can't rely on that.
1364 L2 = external_cache_probe(128*1024, 5);
1370 unsigned long car, size;
1372 L1I = L1D = CSHAPE(8*1024, 5, 1);
1375 car = *(vuip) phys_to_virt (0x120000078UL);
1376 size = 64*1024 * (1 << ((car >> 5) & 7));
1377 /* No typo -- 8 byte cacheline size. Whodathunk. */
1378 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1);
1385 unsigned long sc_ctl, width;
1387 L1I = L1D = CSHAPE(8*1024, 5, 1);
1389 /* Check the line size of the Scache. */
1390 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1391 width = sc_ctl & 0x1000 ? 6 : 5;
1392 L2 = CSHAPE (96*1024, width, 3);
1394 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode
1395 has a shadow copy, and may be available from some versions
1396 of the CSERVE PALcall. If we can get it, then
1398 unsigned long bc_control, bc_config, size;
1399 size = 1024*1024 * (1 << ((bc_config & 7) - 1));
1400 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1);
1402 Unfortunately, we can't rely on that.
1404 L3 = external_cache_probe(1024*1024, width);
1411 unsigned long cbox_config, size;
1413 if (cpu_type == PCA56_CPU) {
1414 L1I = CSHAPE(16*1024, 6, 1);
1415 L1D = CSHAPE(8*1024, 5, 1);
1417 L1I = CSHAPE(32*1024, 6, 2);
1418 L1D = CSHAPE(16*1024, 5, 1);
1422 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
1423 size = 512*1024 * (1 << ((cbox_config >> 12) & 3));
1426 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1);
1428 L2 = external_cache_probe(512*1024, 6);
1439 L1I = L1D = CSHAPE(64*1024, 6, 2);
1440 L2 = external_cache_probe(1024*1024, 6);
1446 L1I = L1D = CSHAPE(64*1024, 6, 2);
1447 L2 = CSHAPE(7*1024*1024/4, 6, 7);
1452 /* Nothing known about this cpu type. */
1453 L1I = L1D = L2 = L3 = 0;
1457 alpha_l1i_cacheshape = L1I;
1458 alpha_l1d_cacheshape = L1D;
1459 alpha_l2_cacheshape = L2;
1460 alpha_l3_cacheshape = L3;
1464 * We show only CPU #0 info.
1467 c_start(struct seq_file *f, loff_t *pos)
1469 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset;
1473 c_next(struct seq_file *f, void *v, loff_t *pos)
1479 c_stop(struct seq_file *f, void *v)
1483 struct seq_operations cpuinfo_op = {
1487 .show = show_cpuinfo,
1492 alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1495 /* FIXME FIXME FIXME */
1496 /* If we are using SRM and serial console, just hard halt here. */
1497 if (alpha_using_srm && srmcons_output)
1503 static __init int add_pcspkr(void)
1505 struct platform_device *pd;
1508 pd = platform_device_alloc("pcspkr", -1);
1512 ret = platform_device_add(pd);
1514 platform_device_put(pd);
1518 device_initcall(add_pcspkr);