2 * linux/arch/alpha/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
7 /* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
16 #include <linux/stddef.h>
17 #include <linux/unistd.h>
18 #include <linux/ptrace.h>
19 #include <linux/slab.h>
20 #include <linux/user.h>
21 #include <linux/screen_info.h>
22 #include <linux/delay.h>
23 #include <linux/mc146818rtc.h>
24 #include <linux/console.h>
25 #include <linux/cpu.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/string.h>
29 #include <linux/ioport.h>
30 #include <linux/platform_device.h>
31 #include <linux/bootmem.h>
32 #include <linux/pci.h>
33 #include <linux/seq_file.h>
34 #include <linux/root_dev.h>
35 #include <linux/initrd.h>
36 #include <linux/eisa.h>
37 #include <linux/pfn.h>
38 #ifdef CONFIG_MAGIC_SYSRQ
39 #include <linux/sysrq.h>
40 #include <linux/reboot.h>
42 #include <linux/notifier.h>
43 #include <asm/setup.h>
45 #include <linux/log2.h>
47 extern struct atomic_notifier_head panic_notifier_list;
48 static int alpha_panic_event(struct notifier_block *, unsigned long, void *);
49 static struct notifier_block alpha_panic_block = {
52 INT_MAX /* try to do it first */
55 #include <asm/uaccess.h>
56 #include <asm/pgtable.h>
57 #include <asm/system.h>
58 #include <asm/hwrpb.h>
60 #include <asm/mmu_context.h>
61 #include <asm/console.h>
67 struct hwrpb_struct *hwrpb;
69 unsigned long srm_hae;
71 int alpha_l1i_cacheshape;
72 int alpha_l1d_cacheshape;
73 int alpha_l2_cacheshape;
74 int alpha_l3_cacheshape;
76 #ifdef CONFIG_VERBOSE_MCHECK
77 /* 0=minimum, 1=verbose, 2=all */
78 /* These can be overridden via the command line, ie "verbose_mcheck=2") */
79 unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
82 /* Which processor we booted from. */
86 * Using SRM callbacks for initial console output. This works from
87 * setup_arch() time through the end of time_init(), as those places
88 * are under our (Alpha) control.
90 * "srmcons" specified in the boot command arguments allows us to
91 * see kernel messages during the period of time before the true
92 * console device is "registered" during console_init().
93 * As of this version (2.5.59), console_init() will call
94 * disable_early_printk() as the last action before initializing
95 * the console drivers. That's the last possible time srmcons can be
96 * unregistered without interfering with console behavior.
98 * By default, OFF; set it with a bootcommand arg of "srmcons" or
99 * "console=srm". The meaning of these two args is:
100 * "srmcons" - early callback prints
101 * "console=srm" - full callback based console, including early prints
103 int srmcons_output = 0;
105 /* Enforce a memory size limit; useful for testing. By default, none. */
106 unsigned long mem_size_limit = 0;
108 /* Set AGP GART window size (0 means disabled). */
109 unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE;
111 #ifdef CONFIG_ALPHA_GENERIC
112 struct alpha_machine_vector alpha_mv;
114 EXPORT_SYMBOL(alpha_using_srm);
117 static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long,
119 static struct alpha_machine_vector *get_sysvec_byname(const char *);
120 static void get_sysnames(unsigned long, unsigned long, unsigned long,
122 static void determine_cpu_caches (unsigned int);
124 static char __initdata command_line[COMMAND_LINE_SIZE];
127 * The format of "screen_info" is strange, and due to early
128 * i386-setup code. This is just enough to make the console
129 * code think we're on a VGA color display.
132 struct screen_info screen_info = {
135 .orig_video_cols = 80,
136 .orig_video_lines = 25,
137 .orig_video_isVGA = 1,
138 .orig_video_points = 16
141 EXPORT_SYMBOL(screen_info);
144 * The direct map I/O window, if any. This should be the same
145 * for all busses, since it's used by virt_to_bus.
148 unsigned long __direct_map_base;
149 unsigned long __direct_map_size;
150 EXPORT_SYMBOL(__direct_map_base);
151 EXPORT_SYMBOL(__direct_map_size);
154 * Declare all of the machine vectors.
157 /* GCC 2.7.2 (on alpha at least) is lame. It does not support either
158 __attribute__((weak)) or #pragma weak. Bypass it and talk directly
162 extern struct alpha_machine_vector X; \
182 WEAK(mikasa_primo_mv);
187 WEAK(noritake_primo_mv);
195 WEAK(sable_gamma_mv);
208 * I/O resources inherited from PeeCees. Except for perhaps the
209 * turbochannel alphas, everyone has these on some sort of SuperIO chip.
211 * ??? If this becomes less standard, move the struct out into the
216 reserve_std_resources(void)
218 static struct resource standard_io_resources[] = {
219 { .name = "rtc", .start = -1, .end = -1 },
220 { .name = "dma1", .start = 0x00, .end = 0x1f },
221 { .name = "pic1", .start = 0x20, .end = 0x3f },
222 { .name = "timer", .start = 0x40, .end = 0x5f },
223 { .name = "keyboard", .start = 0x60, .end = 0x6f },
224 { .name = "dma page reg", .start = 0x80, .end = 0x8f },
225 { .name = "pic2", .start = 0xa0, .end = 0xbf },
226 { .name = "dma2", .start = 0xc0, .end = 0xdf },
229 struct resource *io = &ioport_resource;
233 struct pci_controller *hose;
234 for (hose = hose_head; hose; hose = hose->next)
235 if (hose->index == 0) {
241 /* Fix up for the Jensen's queer RTC placement. */
242 standard_io_resources[0].start = RTC_PORT(0);
243 standard_io_resources[0].end = RTC_PORT(0) + 0x10;
245 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i)
246 request_resource(io, standard_io_resources+i);
249 #define PFN_MAX PFN_DOWN(0x80000000)
250 #define for_each_mem_cluster(memdesc, cluster, i) \
251 for ((cluster) = (memdesc)->cluster, (i) = 0; \
252 (i) < (memdesc)->numclusters; (i)++, (cluster)++)
254 static unsigned long __init
255 get_mem_size_limit(char *s)
257 unsigned long end = 0;
260 end = simple_strtoul(from, &from, 0);
261 if ( *from == 'K' || *from == 'k' ) {
264 } else if ( *from == 'M' || *from == 'm' ) {
267 } else if ( *from == 'G' || *from == 'g' ) {
271 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */
274 #ifdef CONFIG_BLK_DEV_INITRD
276 move_initrd(unsigned long mem_limit)
281 size = initrd_end - initrd_start;
282 start = __alloc_bootmem(PAGE_ALIGN(size), PAGE_SIZE, 0);
283 if (!start || __pa(start) + size > mem_limit) {
284 initrd_start = initrd_end = 0;
287 memmove(start, (void *)initrd_start, size);
288 initrd_start = (unsigned long)start;
289 initrd_end = initrd_start + size;
290 printk("initrd moved to %p\n", start);
295 #ifndef CONFIG_DISCONTIGMEM
297 setup_memory(void *kernel_end)
299 struct memclust_struct * cluster;
300 struct memdesc_struct * memdesc;
301 unsigned long start_kernel_pfn, end_kernel_pfn;
302 unsigned long bootmap_size, bootmap_pages, bootmap_start;
303 unsigned long start, end;
306 /* Find free clusters, and init and free the bootmem accordingly. */
307 memdesc = (struct memdesc_struct *)
308 (hwrpb->mddt_offset + (unsigned long) hwrpb);
310 for_each_mem_cluster(memdesc, cluster, i) {
311 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n",
312 i, cluster->usage, cluster->start_pfn,
313 cluster->start_pfn + cluster->numpages);
315 /* Bit 0 is console/PALcode reserved. Bit 1 is
316 non-volatile memory -- we might want to mark
318 if (cluster->usage & 3)
321 end = cluster->start_pfn + cluster->numpages;
322 if (end > max_low_pfn)
327 * Except for the NUMA systems (wildfire, marvel) all of the
328 * Alpha systems we run on support 32GB of memory or less.
329 * Since the NUMA systems introduce large holes in memory addressing,
330 * we can get into a situation where there is not enough contiguous
331 * memory for the memory map.
333 * Limit memory to the first 32GB to limit the NUMA systems to
334 * memory on their first node (wildfire) or 2 (marvel) to avoid
335 * not being able to produce the memory map. In order to access
336 * all of the memory on the NUMA systems, build with discontiguous
339 * If the user specified a memory limit, let that memory limit stand.
342 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT;
344 if (mem_size_limit && max_low_pfn >= mem_size_limit)
346 printk("setup: forcing memory size to %ldK (from %ldK).\n",
347 mem_size_limit << (PAGE_SHIFT - 10),
348 max_low_pfn << (PAGE_SHIFT - 10));
349 max_low_pfn = mem_size_limit;
352 /* Find the bounds of kernel memory. */
353 start_kernel_pfn = PFN_DOWN(KERNEL_START_PHYS);
354 end_kernel_pfn = PFN_UP(virt_to_phys(kernel_end));
358 if (max_low_pfn <= end_kernel_pfn)
359 panic("not enough memory to boot");
361 /* We need to know how many physically contiguous pages
362 we'll need for the bootmap. */
363 bootmap_pages = bootmem_bootmap_pages(max_low_pfn);
365 /* Now find a good region where to allocate the bootmap. */
366 for_each_mem_cluster(memdesc, cluster, i) {
367 if (cluster->usage & 3)
370 start = cluster->start_pfn;
371 end = start + cluster->numpages;
372 if (start >= max_low_pfn)
374 if (end > max_low_pfn)
376 if (start < start_kernel_pfn) {
377 if (end > end_kernel_pfn
378 && end - end_kernel_pfn >= bootmap_pages) {
379 bootmap_start = end_kernel_pfn;
381 } else if (end > start_kernel_pfn)
382 end = start_kernel_pfn;
383 } else if (start < end_kernel_pfn)
384 start = end_kernel_pfn;
385 if (end - start >= bootmap_pages) {
386 bootmap_start = start;
391 if (bootmap_start == ~0UL) {
396 /* Allocate the bootmap and mark the whole MM as reserved. */
397 bootmap_size = init_bootmem(bootmap_start, max_low_pfn);
399 /* Mark the free regions. */
400 for_each_mem_cluster(memdesc, cluster, i) {
401 if (cluster->usage & 3)
404 start = cluster->start_pfn;
405 end = cluster->start_pfn + cluster->numpages;
406 if (start >= max_low_pfn)
408 if (end > max_low_pfn)
410 if (start < start_kernel_pfn) {
411 if (end > end_kernel_pfn) {
412 free_bootmem(PFN_PHYS(start),
413 (PFN_PHYS(start_kernel_pfn)
415 printk("freeing pages %ld:%ld\n",
416 start, start_kernel_pfn);
417 start = end_kernel_pfn;
418 } else if (end > start_kernel_pfn)
419 end = start_kernel_pfn;
420 } else if (start < end_kernel_pfn)
421 start = end_kernel_pfn;
425 free_bootmem(PFN_PHYS(start), PFN_PHYS(end) - PFN_PHYS(start));
426 printk("freeing pages %ld:%ld\n", start, end);
429 /* Reserve the bootmap memory. */
430 reserve_bootmem(PFN_PHYS(bootmap_start), bootmap_size,
432 printk("reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size));
434 #ifdef CONFIG_BLK_DEV_INITRD
435 initrd_start = INITRD_START;
437 initrd_end = initrd_start+INITRD_SIZE;
438 printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
439 (void *) initrd_start, INITRD_SIZE);
441 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) {
442 if (!move_initrd(PFN_PHYS(max_low_pfn)))
443 printk("initrd extends beyond end of memory "
444 "(0x%08lx > 0x%p)\ndisabling initrd\n",
446 phys_to_virt(PFN_PHYS(max_low_pfn)));
448 reserve_bootmem(virt_to_phys((void *)initrd_start),
449 INITRD_SIZE, BOOTMEM_DEFAULT);
452 #endif /* CONFIG_BLK_DEV_INITRD */
455 extern void setup_memory(void *);
456 #endif /* !CONFIG_DISCONTIGMEM */
459 page_is_ram(unsigned long pfn)
461 struct memclust_struct * cluster;
462 struct memdesc_struct * memdesc;
465 memdesc = (struct memdesc_struct *)
466 (hwrpb->mddt_offset + (unsigned long) hwrpb);
467 for_each_mem_cluster(memdesc, cluster, i)
469 if (pfn >= cluster->start_pfn &&
470 pfn < cluster->start_pfn + cluster->numpages) {
471 return (cluster->usage & 3) ? 0 : 1;
483 for_each_possible_cpu(i) {
484 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
492 arch_initcall(register_cpus);
495 setup_arch(char **cmdline_p)
499 struct alpha_machine_vector *vec = NULL;
500 struct percpu_struct *cpu;
501 char *type_name, *var_name, *p;
502 void *kernel_end = _end; /* end of kernel */
503 char *args = command_line;
505 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr);
506 boot_cpuid = hard_smp_processor_id();
509 * Pre-process the system type to make sure it will be valid.
511 * This may restore real CABRIO and EB66+ family names, ie
514 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series)
515 * and AS1200 (DIGITAL Server 5000 series) have the type as
516 * the negative of the real one.
518 if ((long)hwrpb->sys_type < 0) {
519 hwrpb->sys_type = -((long)hwrpb->sys_type);
520 hwrpb_update_checksum(hwrpb);
523 /* Register a call for panic conditions. */
524 atomic_notifier_chain_register(&panic_notifier_list,
527 #ifdef CONFIG_ALPHA_GENERIC
528 /* Assume that we've booted from SRM if we haven't booted from MILO.
529 Detect the later by looking for "MILO" in the system serial nr. */
530 alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0;
533 /* If we are using SRM, we want to allow callbacks
534 as early as possible, so do this NOW, and then
535 they should work immediately thereafter.
537 kernel_end = callback_init(kernel_end);
540 * Locate the command line.
542 /* Hack for Jensen... since we're restricted to 8 or 16 chars for
543 boot flags depending on the boot mode, we need some shorthand.
544 This should do for installation. */
545 if (strcmp(COMMAND_LINE, "INSTALL") == 0) {
546 strlcpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof command_line);
548 strlcpy(command_line, COMMAND_LINE, sizeof command_line);
550 strcpy(boot_command_line, command_line);
551 *cmdline_p = command_line;
554 * Process command-line arguments.
556 while ((p = strsep(&args, " \t")) != NULL) {
558 if (strncmp(p, "alpha_mv=", 9) == 0) {
559 vec = get_sysvec_byname(p+9);
562 if (strncmp(p, "cycle=", 6) == 0) {
563 est_cycle_freq = simple_strtol(p+6, NULL, 0);
566 if (strncmp(p, "mem=", 4) == 0) {
567 mem_size_limit = get_mem_size_limit(p+4);
570 if (strncmp(p, "srmcons", 7) == 0) {
574 if (strncmp(p, "console=srm", 11) == 0) {
578 if (strncmp(p, "gartsize=", 9) == 0) {
580 get_mem_size_limit(p+9) << PAGE_SHIFT;
583 #ifdef CONFIG_VERBOSE_MCHECK
584 if (strncmp(p, "verbose_mcheck=", 15) == 0) {
585 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0);
591 /* Replace the command line, now that we've killed it with strsep. */
592 strcpy(command_line, boot_command_line);
594 /* If we want SRM console printk echoing early, do it now. */
595 if (alpha_using_srm && srmcons_output) {
596 register_srm_console();
599 * If "console=srm" was specified, clear the srmcons_output
600 * flag now so that time.c won't unregister_srm_console
602 if (srmcons_output & 2)
606 #ifdef CONFIG_MAGIC_SYSRQ
607 /* If we're using SRM, make sysrq-b halt back to the prom,
609 if (alpha_using_srm) {
610 struct sysrq_key_op *op = __sysrq_get_key_op('b');
611 op->handler = (void *) machine_halt;
616 * Identify and reconfigure for the current system.
618 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset);
620 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
621 cpu->type, &type_name, &var_name);
622 if (*var_name == '0')
626 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation,
631 panic("Unsupported system type: %s%s%s (%ld %ld)\n",
632 type_name, (*var_name ? " variation " : ""), var_name,
633 hwrpb->sys_type, hwrpb->sys_variation);
635 if (vec != &alpha_mv) {
640 #ifdef CONFIG_ALPHA_GENERIC
643 "on %s%s%s using machine vector %s from %s\n",
644 type_name, (*var_name ? " variation " : ""),
645 var_name, alpha_mv.vector_name,
646 (alpha_using_srm ? "SRM" : "MILO"));
648 printk("Major Options: "
652 #ifdef CONFIG_ALPHA_EV56
655 #ifdef CONFIG_ALPHA_EV67
658 #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
661 #ifdef CONFIG_VERBOSE_MCHECK
665 #ifdef CONFIG_DISCONTIGMEM
672 #ifdef CONFIG_DEBUG_SPINLOCK
675 #ifdef CONFIG_MAGIC_SYSRQ
680 printk("Command line: %s\n", command_line);
684 * Save the SRM's current value for restoration.
686 srm_hae = *alpha_mv.hae_register;
687 __set_hae(alpha_mv.hae_cache);
689 /* Reset enable correctable error reports. */
692 /* Find our memory. */
693 setup_memory(kernel_end);
695 /* First guess at cpu cache sizes. Do this before init_arch. */
696 determine_cpu_caches(cpu->type);
698 /* Initialize the machine. Usually has to do with setting up
699 DMA windows and the like. */
700 if (alpha_mv.init_arch)
701 alpha_mv.init_arch();
703 /* Reserve standard resources. */
704 reserve_std_resources();
707 * Give us a default console. TGA users will see nothing until
708 * chr_dev_init is called, rather late in the boot sequence.
712 #if defined(CONFIG_VGA_CONSOLE)
713 conswitchp = &vga_con;
714 #elif defined(CONFIG_DUMMY_CONSOLE)
715 conswitchp = &dummy_con;
719 /* Default root filesystem to sda2. */
720 ROOT_DEV = Root_SDA2;
723 /* FIXME: only set this when we actually have EISA in this box? */
728 * Check ASN in HWRPB for validity, report if bad.
729 * FIXME: how was this failing? Should we trust it instead,
730 * and copy the value into alpha_mv.max_asn?
733 if (hwrpb->max_asn != MAX_ASN) {
734 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn);
738 * Identify the flock of penguins.
747 static char sys_unknown[] = "Unknown";
748 static char systype_names[][16] = {
750 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen",
751 "Pelican", "Morgan", "Sable", "Medulla", "Noname",
752 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind",
753 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1",
754 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake",
755 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon",
756 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel"
759 static char unofficial_names[][8] = {"100", "Ruffian"};
761 static char api_names[][16] = {"200", "Nautilus"};
763 static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"};
764 static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4};
766 static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"};
767 static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2};
769 static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"};
770 static int eb64p_indices[] = {0,0,1,2};
772 static char eb66_names[][8] = {"EB66", "EB66+"};
773 static int eb66_indices[] = {0,0,1};
775 static char marvel_names[][16] = {
778 static int marvel_indices[] = { 0 };
780 static char rawhide_names[][16] = {
781 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci"
783 static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4};
785 static char titan_names[][16] = {
786 "DEFAULT", "Privateer", "Falcon", "Granite"
788 static int titan_indices[] = {0,1,2,2,3};
790 static char tsunami_names[][16] = {
791 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper",
792 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne",
793 "Flying Clipper", "Shark"
795 static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12};
797 static struct alpha_machine_vector * __init
798 get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
800 static struct alpha_machine_vector *systype_vecs[] __initdata =
807 NULL, /* Mannequin */
811 NULL, /* Sable -- see below. */
814 NULL, /* Turbolaser */
817 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */
818 NULL, /* Tradewind */
819 NULL, /* Mikasa -- see below. */
821 NULL, /* EB66 -- see variation. */
822 NULL, /* EB64+ -- see variation. */
828 NULL, /* EB164 -- see variation. */
829 NULL, /* Noritake -- see below. */
836 NULL, /* Tsunami -- see variation. */
837 &wildfire_mv, /* Wildfire */
839 &eiger_mv, /* Eiger */
844 static struct alpha_machine_vector *unofficial_vecs[] __initdata =
850 static struct alpha_machine_vector *api_vecs[] __initdata =
856 static struct alpha_machine_vector *alcor_vecs[] __initdata =
858 &alcor_mv, &xlt_mv, &xlt_mv
861 static struct alpha_machine_vector *eb164_vecs[] __initdata =
863 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv
866 static struct alpha_machine_vector *eb64p_vecs[] __initdata =
870 &cabriolet_mv /* AlphaPCI64 */
873 static struct alpha_machine_vector *eb66_vecs[] __initdata =
879 static struct alpha_machine_vector *marvel_vecs[] __initdata =
884 static struct alpha_machine_vector *titan_vecs[] __initdata =
886 &titan_mv, /* default */
887 &privateer_mv, /* privateer */
888 &titan_mv, /* falcon */
889 &privateer_mv, /* granite */
892 static struct alpha_machine_vector *tsunami_vecs[] __initdata =
895 &dp264_mv, /* dp264 */
896 &dp264_mv, /* warhol */
897 &dp264_mv, /* windjammer */
898 &monet_mv, /* monet */
899 &clipper_mv, /* clipper */
900 &dp264_mv, /* goldrush */
901 &webbrick_mv, /* webbrick */
902 &dp264_mv, /* catamaran */
903 NULL, /* brisbane? */
904 NULL, /* melbourne? */
905 NULL, /* flying clipper? */
906 &shark_mv, /* shark */
909 /* ??? Do we need to distinguish between Rawhides? */
911 struct alpha_machine_vector *vec;
913 /* Search the system tables first... */
915 if (type < ARRAY_SIZE(systype_vecs)) {
916 vec = systype_vecs[type];
917 } else if ((type > ST_API_BIAS) &&
918 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) {
919 vec = api_vecs[type - ST_API_BIAS];
920 } else if ((type > ST_UNOFFICIAL_BIAS) &&
921 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) {
922 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS];
925 /* If we've not found one, try for a variation. */
928 /* Member ID is a bit-field. */
929 unsigned long member = (variation >> 10) & 0x3f;
931 cpu &= 0xffffffff; /* make it usable */
935 if (member < ARRAY_SIZE(alcor_indices))
936 vec = alcor_vecs[alcor_indices[member]];
939 if (member < ARRAY_SIZE(eb164_indices))
940 vec = eb164_vecs[eb164_indices[member]];
941 /* PC164 may show as EB164 variation with EV56 CPU,
942 but, since no true EB164 had anything but EV5... */
943 if (vec == &eb164_mv && cpu == EV56_CPU)
947 if (member < ARRAY_SIZE(eb64p_indices))
948 vec = eb64p_vecs[eb64p_indices[member]];
951 if (member < ARRAY_SIZE(eb66_indices))
952 vec = eb66_vecs[eb66_indices[member]];
955 if (member < ARRAY_SIZE(marvel_indices))
956 vec = marvel_vecs[marvel_indices[member]];
959 vec = titan_vecs[0]; /* default */
960 if (member < ARRAY_SIZE(titan_indices))
961 vec = titan_vecs[titan_indices[member]];
964 if (member < ARRAY_SIZE(tsunami_indices))
965 vec = tsunami_vecs[tsunami_indices[member]];
968 if (cpu == EV5_CPU || cpu == EV56_CPU)
969 vec = &mikasa_primo_mv;
973 case ST_DEC_NORITAKE:
974 if (cpu == EV5_CPU || cpu == EV56_CPU)
975 vec = &noritake_primo_mv;
979 case ST_DEC_2100_A500:
980 if (cpu == EV5_CPU || cpu == EV56_CPU)
981 vec = &sable_gamma_mv;
990 static struct alpha_machine_vector * __init
991 get_sysvec_byname(const char *name)
993 static struct alpha_machine_vector *all_vecs[] __initdata =
1036 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) {
1037 struct alpha_machine_vector *mv = all_vecs[i];
1038 if (strcasecmp(mv->vector_name, name) == 0)
1045 get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,
1046 char **type_name, char **variation_name)
1048 unsigned long member;
1050 /* If not in the tables, make it UNKNOWN,
1051 else set type name to family */
1052 if (type < ARRAY_SIZE(systype_names)) {
1053 *type_name = systype_names[type];
1054 } else if ((type > ST_API_BIAS) &&
1055 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) {
1056 *type_name = api_names[type - ST_API_BIAS];
1057 } else if ((type > ST_UNOFFICIAL_BIAS) &&
1058 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) {
1059 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS];
1061 *type_name = sys_unknown;
1062 *variation_name = sys_unknown;
1066 /* Set variation to "0"; if variation is zero, done. */
1067 *variation_name = systype_names[0];
1068 if (variation == 0) {
1072 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */
1074 cpu &= 0xffffffff; /* make it usable */
1076 switch (type) { /* select by family */
1077 default: /* default to variation "0" for now */
1080 if (member < ARRAY_SIZE(eb164_indices))
1081 *variation_name = eb164_names[eb164_indices[member]];
1082 /* PC164 may show as EB164 variation, but with EV56 CPU,
1083 so, since no true EB164 had anything but EV5... */
1084 if (eb164_indices[member] == 0 && cpu == EV56_CPU)
1085 *variation_name = eb164_names[1]; /* make it PC164 */
1088 if (member < ARRAY_SIZE(alcor_indices))
1089 *variation_name = alcor_names[alcor_indices[member]];
1092 if (member < ARRAY_SIZE(eb64p_indices))
1093 *variation_name = eb64p_names[eb64p_indices[member]];
1096 if (member < ARRAY_SIZE(eb66_indices))
1097 *variation_name = eb66_names[eb66_indices[member]];
1100 if (member < ARRAY_SIZE(marvel_indices))
1101 *variation_name = marvel_names[marvel_indices[member]];
1103 case ST_DEC_RAWHIDE:
1104 if (member < ARRAY_SIZE(rawhide_indices))
1105 *variation_name = rawhide_names[rawhide_indices[member]];
1108 *variation_name = titan_names[0]; /* default */
1109 if (member < ARRAY_SIZE(titan_indices))
1110 *variation_name = titan_names[titan_indices[member]];
1112 case ST_DEC_TSUNAMI:
1113 if (member < ARRAY_SIZE(tsunami_indices))
1114 *variation_name = tsunami_names[tsunami_indices[member]];
1120 * A change was made to the HWRPB via an ECO and the following code
1121 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO
1122 * was not implemented in the console firmware. If it's revision 5 or
1123 * greater we can get the name of the platform as an ASCII string from
1124 * the HWRPB. That's what this function does. It checks the revision
1125 * level and if the string is in the HWRPB it returns the address of
1126 * the string--a pointer to the name of the platform.
1129 * - Pointer to a ASCII string if it's in the HWRPB
1130 * - Pointer to a blank string if the data is not in the HWRPB.
1134 platform_string(void)
1136 struct dsr_struct *dsr;
1137 static char unk_system_string[] = "N/A";
1139 /* Go to the console for the string pointer.
1140 * If the rpb_vers is not 5 or greater the rpb
1141 * is old and does not have this data in it.
1143 if (hwrpb->revision < 5)
1144 return (unk_system_string);
1146 /* The Dynamic System Recognition struct
1147 * has the system platform name starting
1148 * after the character count of the string.
1150 dsr = ((struct dsr_struct *)
1151 ((char *)hwrpb + hwrpb->dsr_offset));
1152 return ((char *)dsr + (dsr->sysname_off +
1158 get_nr_processors(struct percpu_struct *cpubase, unsigned long num)
1160 struct percpu_struct *cpu;
1164 for (i = 0; i < num; i++) {
1165 cpu = (struct percpu_struct *)
1166 ((char *)cpubase + i*hwrpb->processor_size);
1167 if ((cpu->flags & 0x1cc) == 0x1cc)
1174 show_cache_size (struct seq_file *f, const char *which, int shape)
1177 seq_printf (f, "%s\t\t: n/a\n", which);
1178 else if (shape == 0)
1179 seq_printf (f, "%s\t\t: unknown\n", which);
1181 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n",
1182 which, shape >> 10, shape & 15,
1183 1 << ((shape >> 4) & 15));
1187 show_cpuinfo(struct seq_file *f, void *slot)
1189 extern struct unaligned_stat {
1190 unsigned long count, va, pc;
1193 static char cpu_names[][8] = {
1194 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56",
1195 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL",
1196 "EV68CX", "EV7", "EV79", "EV69"
1199 struct percpu_struct *cpu = slot;
1200 unsigned int cpu_index;
1203 char *sysvariation_name;
1206 cpu_index = (unsigned) (cpu->type - 1);
1207 cpu_name = "Unknown";
1208 if (cpu_index < ARRAY_SIZE(cpu_names))
1209 cpu_name = cpu_names[cpu_index];
1211 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
1212 cpu->type, &systype_name, &sysvariation_name);
1214 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors);
1216 seq_printf(f, "cpu\t\t\t: Alpha\n"
1217 "cpu model\t\t: %s\n"
1218 "cpu variation\t\t: %ld\n"
1219 "cpu revision\t\t: %ld\n"
1220 "cpu serial number\t: %s\n"
1221 "system type\t\t: %s\n"
1222 "system variation\t: %s\n"
1223 "system revision\t\t: %ld\n"
1224 "system serial number\t: %s\n"
1225 "cycle frequency [Hz]\t: %lu %s\n"
1226 "timer frequency [Hz]\t: %lu.%02lu\n"
1227 "page size [bytes]\t: %ld\n"
1228 "phys. address bits\t: %ld\n"
1229 "max. addr. space #\t: %ld\n"
1230 "BogoMIPS\t\t: %lu.%02lu\n"
1231 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1232 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1233 "platform string\t\t: %s\n"
1234 "cpus detected\t\t: %d\n",
1235 cpu_name, cpu->variation, cpu->revision,
1236 (char*)cpu->serial_no,
1237 systype_name, sysvariation_name, hwrpb->sys_revision,
1239 est_cycle_freq ? : hwrpb->cycle_freq,
1240 est_cycle_freq ? "est." : "",
1241 hwrpb->intr_freq / 4096,
1242 (100 * hwrpb->intr_freq / 4096) % 100,
1246 loops_per_jiffy / (500000/HZ),
1247 (loops_per_jiffy / (5000/HZ)) % 100,
1248 unaligned[0].count, unaligned[0].pc, unaligned[0].va,
1249 unaligned[1].count, unaligned[1].pc, unaligned[1].va,
1250 platform_string(), nr_processors);
1253 seq_printf(f, "cpus active\t\t: %d\n"
1254 "cpu active mask\t\t: %016lx\n",
1255 num_online_cpus(), cpus_addr(cpu_possible_map)[0]);
1258 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape);
1259 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape);
1260 show_cache_size (f, "L2 cache", alpha_l2_cacheshape);
1261 show_cache_size (f, "L3 cache", alpha_l3_cacheshape);
1267 read_mem_block(int *addr, int stride, int size)
1269 long nloads = size / stride, cnt, tmp;
1271 __asm__ __volatile__(
1275 /* Next two XORs introduce an explicit data dependency between
1276 consecutive loads in the loop, which will give us true load
1284 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp)
1285 : "r" (stride), "1" (nloads), "2" (addr));
1287 return cnt / (size / stride);
1290 #define CSHAPE(totalsize, linesize, assoc) \
1291 ((totalsize & ~0xff) | (linesize << 4) | assoc)
1293 /* ??? EV5 supports up to 64M, but did the systems with more than
1294 16M of BCACHE ever exist? */
1295 #define MAX_BCACHE_SIZE 16*1024*1024
1297 /* Note that the offchip caches are direct mapped on all Alphas. */
1299 external_cache_probe(int minsize, int width)
1301 int cycles, prev_cycles = 1000000;
1302 int stride = 1 << width;
1303 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2;
1305 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT)
1306 maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT);
1308 /* Get the first block cached. */
1309 read_mem_block(__va(0), stride, size);
1311 while (size < maxsize) {
1312 /* Get an average load latency in cycles. */
1313 cycles = read_mem_block(__va(0), stride, size);
1314 if (cycles > prev_cycles * 2) {
1315 /* Fine, we exceed the cache. */
1316 printk("%ldK Bcache detected; load hit latency %d "
1317 "cycles, load miss latency %d cycles\n",
1318 size >> 11, prev_cycles, cycles);
1319 return CSHAPE(size >> 1, width, 1);
1321 /* Try to get the next block cached. */
1322 read_mem_block(__va(size), stride, size);
1323 prev_cycles = cycles;
1326 return -1; /* No BCACHE found. */
1330 determine_cpu_caches (unsigned int cpu_type)
1332 int L1I, L1D, L2, L3;
1338 if (cpu_type == EV4_CPU)
1339 L1I = CSHAPE(8*1024, 5, 1);
1341 L1I = CSHAPE(16*1024, 5, 1);
1345 /* BIU_CTL is a write-only Abox register. PALcode has a
1346 shadow copy, and may be available from some versions
1347 of the CSERVE PALcall. If we can get it, then
1349 unsigned long biu_ctl, size;
1350 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7));
1351 L2 = CSHAPE (size, 5, 1);
1353 Unfortunately, we can't rely on that.
1355 L2 = external_cache_probe(128*1024, 5);
1361 unsigned long car, size;
1363 L1I = L1D = CSHAPE(8*1024, 5, 1);
1366 car = *(vuip) phys_to_virt (0x120000078UL);
1367 size = 64*1024 * (1 << ((car >> 5) & 7));
1368 /* No typo -- 8 byte cacheline size. Whodathunk. */
1369 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1);
1376 unsigned long sc_ctl, width;
1378 L1I = L1D = CSHAPE(8*1024, 5, 1);
1380 /* Check the line size of the Scache. */
1381 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1382 width = sc_ctl & 0x1000 ? 6 : 5;
1383 L2 = CSHAPE (96*1024, width, 3);
1385 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode
1386 has a shadow copy, and may be available from some versions
1387 of the CSERVE PALcall. If we can get it, then
1389 unsigned long bc_control, bc_config, size;
1390 size = 1024*1024 * (1 << ((bc_config & 7) - 1));
1391 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1);
1393 Unfortunately, we can't rely on that.
1395 L3 = external_cache_probe(1024*1024, width);
1402 unsigned long cbox_config, size;
1404 if (cpu_type == PCA56_CPU) {
1405 L1I = CSHAPE(16*1024, 6, 1);
1406 L1D = CSHAPE(8*1024, 5, 1);
1408 L1I = CSHAPE(32*1024, 6, 2);
1409 L1D = CSHAPE(16*1024, 5, 1);
1413 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
1414 size = 512*1024 * (1 << ((cbox_config >> 12) & 3));
1417 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1);
1419 L2 = external_cache_probe(512*1024, 6);
1430 L1I = L1D = CSHAPE(64*1024, 6, 2);
1431 L2 = external_cache_probe(1024*1024, 6);
1437 L1I = L1D = CSHAPE(64*1024, 6, 2);
1438 L2 = CSHAPE(7*1024*1024/4, 6, 7);
1443 /* Nothing known about this cpu type. */
1444 L1I = L1D = L2 = L3 = 0;
1448 alpha_l1i_cacheshape = L1I;
1449 alpha_l1d_cacheshape = L1D;
1450 alpha_l2_cacheshape = L2;
1451 alpha_l3_cacheshape = L3;
1455 * We show only CPU #0 info.
1458 c_start(struct seq_file *f, loff_t *pos)
1460 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset;
1464 c_next(struct seq_file *f, void *v, loff_t *pos)
1470 c_stop(struct seq_file *f, void *v)
1474 const struct seq_operations cpuinfo_op = {
1478 .show = show_cpuinfo,
1483 alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1486 /* FIXME FIXME FIXME */
1487 /* If we are using SRM and serial console, just hard halt here. */
1488 if (alpha_using_srm && srmcons_output)
1494 static __init int add_pcspkr(void)
1496 struct platform_device *pd;
1499 pd = platform_device_alloc("pcspkr", -1);
1503 ret = platform_device_add(pd);
1505 platform_device_put(pd);
1509 device_initcall(add_pcspkr);