2 * P5 specific Machine Check Exception Reporting
3 * (C) Copyright 2002 Alan Cox <alan@redhat.com>
6 #include <linux/init.h>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/interrupt.h>
11 #include <linux/smp.h>
13 #include <asm/processor.h>
14 #include <asm/system.h>
19 /* Machine check handler for Pentium class Intel */
20 static fastcall void pentium_machine_check(struct pt_regs * regs, long error_code)
22 u32 loaddr, hi, lotype;
23 rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi);
24 rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi);
25 printk(KERN_EMERG "CPU#%d: Machine Check Exception: 0x%8X (type 0x%8X).\n", smp_processor_id(), loaddr, lotype);
27 printk(KERN_EMERG "CPU#%d: Possible thermal failure (CPU on fire ?).\n", smp_processor_id());
28 add_taint(TAINT_MACHINE_CHECK);
31 /* Set up machine check reporting for processors with Intel style MCE */
32 void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c)
36 /*Check for MCE support */
37 if( !cpu_has(c, X86_FEATURE_MCE) )
40 /* Default P5 to off as its often misconnected */
41 if(mce_disabled != -1)
43 machine_check_vector = pentium_machine_check;
46 /* Read registers before enabling */
47 rdmsr(MSR_IA32_P5_MC_ADDR, l, h);
48 rdmsr(MSR_IA32_P5_MC_TYPE, l, h);
49 printk(KERN_INFO "Intel old style machine check architecture supported.\n");
52 set_in_cr4(X86_CR4_MCE);
53 printk(KERN_INFO "Intel old style machine check reporting enabled on CPU#%d.\n", smp_processor_id());