2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
42 #include <asm/param.h> /* for timeouts in units of HZ */
45 #include "sym_nvram.h"
48 #define SYM_DEBUG_GENERIC_SUPPORT
52 * Needed function prototypes.
54 static void sym_int_ma (struct sym_hcb *np);
55 static void sym_int_sir(struct sym_hcb *);
56 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
57 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
58 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
59 static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
60 static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
61 static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
64 * Print a buffer in hexadecimal format with a ".\n" at end.
66 static void sym_printl_hex(u_char *p, int n)
73 static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
76 sym_print_addr(cp->cmd, "%s: ", label);
78 sym_print_addr(cp->cmd, "");
84 static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
86 struct sym_tcb *tp = &np->target[target];
87 dev_info(&tp->starget->dev, "%s: ", label);
94 * Print something that tells about extended errors.
96 void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
98 if (x_status & XE_PARITY_ERR) {
99 sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
101 if (x_status & XE_EXTRA_DATA) {
102 sym_print_addr(cmd, "extraneous data discarded.\n");
104 if (x_status & XE_BAD_PHASE) {
105 sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
107 if (x_status & XE_SODL_UNRUN) {
108 sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
110 if (x_status & XE_SWIDE_OVRUN) {
111 sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
116 * Return a string for SCSI BUS mode.
118 static char *sym_scsi_bus_mode(int mode)
121 case SMODE_HVD: return "HVD";
122 case SMODE_SE: return "SE";
123 case SMODE_LVD: return "LVD";
129 * Soft reset the chip.
131 * Raising SRST when the chip is running may cause
132 * problems on dual function chips (see below).
133 * On the other hand, LVD devices need some delay
134 * to settle and report actual BUS mode in STEST4.
136 static void sym_chip_reset (struct sym_hcb *np)
138 OUTB(np, nc_istat, SRST);
141 OUTB(np, nc_istat, 0);
143 udelay(2000); /* For BUS MODE to settle */
147 * Really soft reset the chip.:)
149 * Some 896 and 876 chip revisions may hang-up if we set
150 * the SRST (soft reset) bit at the wrong time when SCRIPTS
152 * So, we need to abort the current operation prior to
153 * soft resetting the chip.
155 static void sym_soft_reset (struct sym_hcb *np)
160 if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
163 OUTB(np, nc_istat, CABRT);
164 for (i = 100000 ; i ; --i) {
165 istat = INB(np, nc_istat);
169 else if (istat & DIP) {
170 if (INB(np, nc_dstat) & ABRT)
175 OUTB(np, nc_istat, 0);
177 printf("%s: unable to abort current chip operation, "
178 "ISTAT=0x%02x.\n", sym_name(np), istat);
184 * Start reset process.
186 * The interrupt handler will reinitialize the chip.
188 static void sym_start_reset(struct sym_hcb *np)
190 sym_reset_scsi_bus(np, 1);
193 int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
198 sym_soft_reset(np); /* Soft reset the chip */
200 OUTW(np, nc_sien, RST);
202 * Enable Tolerant, reset IRQD if present and
203 * properly set IRQ mode, prior to resetting the bus.
205 OUTB(np, nc_stest3, TE);
206 OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
207 OUTB(np, nc_scntl1, CRST);
211 if (!SYM_SETUP_SCSI_BUS_CHECK)
214 * Check for no terminators or SCSI bus shorts to ground.
215 * Read SCSI data bus, data parity bits and control signals.
216 * We are expecting RESET to be TRUE and other signals to be
219 term = INB(np, nc_sstat0);
220 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
221 term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
222 ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
223 ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
224 INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
229 if (term != (2<<7)) {
230 printf("%s: suspicious SCSI data while resetting the BUS.\n",
232 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
233 "0x%lx, expecting 0x%lx\n",
235 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
236 (u_long)term, (u_long)(2<<7));
237 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
241 OUTB(np, nc_scntl1, 0);
246 * Select SCSI clock frequency
248 static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
251 * If multiplier not present or not selected, leave here.
253 if (np->multiplier <= 1) {
254 OUTB(np, nc_scntl3, scntl3);
258 if (sym_verbose >= 2)
259 printf ("%s: enabling clock multiplier\n", sym_name(np));
261 OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
263 * Wait for the LCKFRQ bit to be set if supported by the chip.
264 * Otherwise wait 50 micro-seconds (at least).
266 if (np->features & FE_LCKFRQ) {
268 while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
271 printf("%s: the chip cannot lock the frequency\n",
277 OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
278 OUTB(np, nc_scntl3, scntl3);
279 OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
280 OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
285 * Determine the chip's clock frequency.
287 * This is essential for the negotiation of the synchronous
290 * Note: we have to return the correct value.
291 * THERE IS NO SAFE DEFAULT VALUE.
293 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
294 * 53C860 and 53C875 rev. 1 support fast20 transfers but
295 * do not have a clock doubler and so are provided with a
296 * 80 MHz clock. All other fast20 boards incorporate a doubler
297 * and so should be delivered with a 40 MHz clock.
298 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
299 * clock and provide a clock quadrupler (160 Mhz).
303 * calculate SCSI clock frequency (in KHz)
305 static unsigned getfreq (struct sym_hcb *np, int gen)
311 * Measure GEN timer delay in order
312 * to calculate SCSI clock frequency
314 * This code will never execute too
315 * many loop iterations (if DELAY is
316 * reasonably correct). It could get
317 * too low a delay (too high a freq.)
318 * if the CPU is slow executing the
319 * loop for some reason (an NMI, for
320 * example). For this reason we will
321 * if multiple measurements are to be
322 * performed trust the higher delay
323 * (lower frequency returned).
325 OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
326 INW(np, nc_sist); /* clear pending scsi interrupt */
327 OUTB(np, nc_dien, 0); /* mask all dma interrupts */
328 INW(np, nc_sist); /* another one, just to be sure :) */
330 * The C1010-33 core does not report GEN in SIST,
331 * if this interrupt is masked in SIEN.
332 * I don't know yet if the C1010-66 behaves the same way.
334 if (np->features & FE_C10) {
335 OUTW(np, nc_sien, GEN);
336 OUTB(np, nc_istat1, SIRQD);
338 OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
339 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
340 OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
341 while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
342 udelay(1000/4); /* count in 1/4 of ms */
343 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
345 * Undo C1010-33 specific settings.
347 if (np->features & FE_C10) {
348 OUTW(np, nc_sien, 0);
349 OUTB(np, nc_istat1, 0);
352 * set prescaler to divide by whatever 0 means
353 * 0 ought to choose divide by 2, but appears
354 * to set divide by 3.5 mode in my 53c810 ...
356 OUTB(np, nc_scntl3, 0);
359 * adjust for prescaler, and convert into KHz
361 f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
364 * The C1010-33 result is biased by a factor
365 * of 2/3 compared to earlier chips.
367 if (np->features & FE_C10)
370 if (sym_verbose >= 2)
371 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
372 sym_name(np), gen, ms/4, f);
377 static unsigned sym_getfreq (struct sym_hcb *np)
382 getfreq (np, gen); /* throw away first result */
383 f1 = getfreq (np, gen);
384 f2 = getfreq (np, gen);
385 if (f1 > f2) f1 = f2; /* trust lower result */
390 * Get/probe chip SCSI clock frequency
392 static void sym_getclock (struct sym_hcb *np, int mult)
394 unsigned char scntl3 = np->sv_scntl3;
395 unsigned char stest1 = np->sv_stest1;
401 * True with 875/895/896/895A with clock multiplier selected
403 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
404 if (sym_verbose >= 2)
405 printf ("%s: clock multiplier found\n", sym_name(np));
406 np->multiplier = mult;
410 * If multiplier not found or scntl3 not 7,5,3,
411 * reset chip and get frequency from general purpose timer.
412 * Otherwise trust scntl3 BIOS setting.
414 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
415 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
416 f1 = sym_getfreq (np);
419 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
421 if (f1 < 45000) f1 = 40000;
422 else if (f1 < 55000) f1 = 50000;
425 if (f1 < 80000 && mult > 1) {
426 if (sym_verbose >= 2)
427 printf ("%s: clock multiplier assumed\n",
429 np->multiplier = mult;
432 if ((scntl3 & 7) == 3) f1 = 40000;
433 else if ((scntl3 & 7) == 5) f1 = 80000;
436 f1 /= np->multiplier;
440 * Compute controller synchronous parameters.
442 f1 *= np->multiplier;
447 * Get/probe PCI clock frequency
449 static int sym_getpciclock (struct sym_hcb *np)
454 * For now, we only need to know about the actual
455 * PCI BUS clock frequency for C1010-66 chips.
458 if (np->features & FE_66MHZ) {
462 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
464 OUTB(np, nc_stest1, 0);
472 * SYMBIOS chip clock divisor table.
474 * Divisors are multiplied by 10,000,000 in order to make
475 * calculations more simple.
478 static const u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
481 * Get clock factor and sync divisor for a given
482 * synchronous factor period.
485 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
487 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
488 int div = np->clock_divn; /* Number of divisors supported */
489 u32 fak; /* Sync factor in sxfer */
490 u32 per; /* Period in tenths of ns */
491 u32 kpc; /* (per * clk) */
495 * Compute the synchronous period in tenths of nano-seconds
497 if (dt && sfac <= 9) per = 125;
498 else if (sfac <= 10) per = 250;
499 else if (sfac == 11) per = 303;
500 else if (sfac == 12) per = 500;
501 else per = 40 * sfac;
509 * For earliest C10 revision 0, we cannot use extra
510 * clocks for the setting of the SCSI clocking.
511 * Note that this limits the lowest sync data transfer
512 * to 5 Mega-transfers per second and may result in
513 * using higher clock divisors.
516 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
518 * Look for the lowest clock divisor that allows an
519 * output speed not faster than the period.
523 if (kpc > (div_10M[div] << 2)) {
528 fak = 0; /* No extra clocks */
529 if (div == np->clock_divn) { /* Are we too fast ? */
539 * Look for the greatest clock divisor that allows an
540 * input speed faster than the period.
543 if (kpc >= (div_10M[div] << 2)) break;
546 * Calculate the lowest clock factor that allows an output
547 * speed not faster than the period, and the max output speed.
548 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
549 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
552 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
553 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
555 fak = (kpc - 1) / div_10M[div] + 1 - 4;
556 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
560 * Check against our hardware limits, or bugs :).
568 * Compute and return sync parameters.
577 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
578 * 128 transfers. All chips support at least 16 transfers
579 * bursts. The 825A, 875 and 895 chips support bursts of up
580 * to 128 transfers and the 895A and 896 support bursts of up
581 * to 64 transfers. All other chips support up to 16
584 * For PCI 32 bit data transfers each transfer is a DWORD.
585 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
587 * We use log base 2 (burst length) as internal code, with
588 * value 0 meaning "burst disabled".
592 * Burst length from burst code.
594 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
597 * Burst code from io register bits.
599 #define burst_code(dmode, ctest4, ctest5) \
600 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
603 * Set initial io register bits from burst code.
605 static inline void sym_init_burst(struct sym_hcb *np, u_char bc)
607 np->rv_ctest4 &= ~0x80;
608 np->rv_dmode &= ~(0x3 << 6);
609 np->rv_ctest5 &= ~0x4;
612 np->rv_ctest4 |= 0x80;
616 np->rv_dmode |= ((bc & 0x3) << 6);
617 np->rv_ctest5 |= (bc & 0x4);
622 * Save initial settings of some IO registers.
623 * Assumed to have been set by BIOS.
624 * We cannot reset the chip prior to reading the
625 * IO registers, since informations will be lost.
626 * Since the SCRIPTS processor may be running, this
627 * is not safe on paper, but it seems to work quite
630 static void sym_save_initial_setting (struct sym_hcb *np)
632 np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
633 np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
634 np->sv_dmode = INB(np, nc_dmode) & 0xce;
635 np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
636 np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
637 np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
638 np->sv_gpcntl = INB(np, nc_gpcntl);
639 np->sv_stest1 = INB(np, nc_stest1);
640 np->sv_stest2 = INB(np, nc_stest2) & 0x20;
641 np->sv_stest4 = INB(np, nc_stest4);
642 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
643 np->sv_scntl4 = INB(np, nc_scntl4);
644 np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
647 np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
652 * - LVD capable chips (895/895A/896/1010) report the current BUS mode
653 * through the STEST4 IO register.
654 * - For previous generation chips (825/825A/875), the user has to tell us
655 * how to check against HVD, since a 100% safe algorithm is not possible.
657 static void sym_set_bus_mode(struct sym_hcb *np, struct sym_nvram *nvram)
662 np->scsi_mode = SMODE_SE;
663 if (np->features & (FE_ULTRA2|FE_ULTRA3))
664 np->scsi_mode = (np->sv_stest4 & SMODE);
665 else if (np->features & FE_DIFF) {
666 if (SYM_SETUP_SCSI_DIFF == 1) {
668 if (np->sv_stest2 & 0x20)
669 np->scsi_mode = SMODE_HVD;
670 } else if (nvram->type == SYM_SYMBIOS_NVRAM) {
671 if (!(INB(np, nc_gpreg) & 0x08))
672 np->scsi_mode = SMODE_HVD;
674 } else if (SYM_SETUP_SCSI_DIFF == 2)
675 np->scsi_mode = SMODE_HVD;
677 if (np->scsi_mode == SMODE_HVD)
678 np->rv_stest2 |= 0x20;
682 * Prepare io register values used by sym_start_up()
683 * according to selected and supported features.
685 static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
687 struct sym_data *sym_data = shost_priv(shost);
688 struct pci_dev *pdev = sym_data->pdev;
693 np->maxwide = (np->features & FE_WIDE) ? 1 : 0;
696 * Guess the frequency of the chip's clock.
698 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
699 np->clock_khz = 160000;
700 else if (np->features & FE_ULTRA)
701 np->clock_khz = 80000;
703 np->clock_khz = 40000;
706 * Get the clock multiplier factor.
708 if (np->features & FE_QUAD)
710 else if (np->features & FE_DBLR)
716 * Measure SCSI clock frequency for chips
717 * it may vary from assumed one.
719 if (np->features & FE_VARCLK)
720 sym_getclock(np, np->multiplier);
723 * Divisor to be used for async (timer pre-scaler).
725 i = np->clock_divn - 1;
727 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
735 * The C1010 uses hardwired divisors for async.
736 * So, we just throw away, the async. divisor.:-)
738 if (np->features & FE_C10)
742 * Minimum synchronous period factor supported by the chip.
743 * Btw, 'period' is in tenths of nanoseconds.
745 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
747 if (period <= 250) np->minsync = 10;
748 else if (period <= 303) np->minsync = 11;
749 else if (period <= 500) np->minsync = 12;
750 else np->minsync = (period + 40 - 1) / 40;
753 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
755 if (np->minsync < 25 &&
756 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
758 else if (np->minsync < 12 &&
759 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
763 * Maximum synchronous period factor supported by the chip.
765 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
766 np->maxsync = period > 2540 ? 254 : period / 10;
769 * If chip is a C1010, guess the sync limits in DT mode.
771 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
772 if (np->clock_khz == 160000) {
775 np->maxoffs_dt = nvram->type ? 62 : 31;
780 * 64 bit addressing (895A/896/1010) ?
782 if (np->features & FE_DAC) {
784 np->rv_ccntl1 |= (DDAC);
785 else if (SYM_CONF_DMA_ADDRESSING_MODE == 1)
786 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
787 else if (SYM_CONF_DMA_ADDRESSING_MODE == 2)
788 np->rv_ccntl1 |= (0 | EXTIBMV);
792 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
794 if (np->features & FE_NOPM)
795 np->rv_ccntl0 |= (ENPMJ);
798 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
799 * In dual channel mode, contention occurs if internal cycles
800 * are used. Disable internal cycles.
802 if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 &&
803 pdev->revision < 0x1)
804 np->rv_ccntl0 |= DILS;
807 * Select burst length (dwords)
809 burst_max = SYM_SETUP_BURST_ORDER;
810 if (burst_max == 255)
811 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
815 if (burst_max > np->maxburst)
816 burst_max = np->maxburst;
819 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
820 * This chip and the 860 Rev 1 may wrongly use PCI cache line
821 * based transactions on LOAD/STORE instructions. So we have
822 * to prevent these chips from using such PCI transactions in
823 * this driver. The generic ncr driver that does not use
824 * LOAD/STORE instructions does not need this work-around.
826 if ((pdev->device == PCI_DEVICE_ID_NCR_53C810 &&
827 pdev->revision >= 0x10 && pdev->revision <= 0x11) ||
828 (pdev->device == PCI_DEVICE_ID_NCR_53C860 &&
829 pdev->revision <= 0x1))
830 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
833 * Select all supported special features.
834 * If we are using on-board RAM for scripts, prefetch (PFEN)
835 * does not help, but burst op fetch (BOF) does.
836 * Disabling PFEN makes sure BOF will be used.
838 if (np->features & FE_ERL)
839 np->rv_dmode |= ERL; /* Enable Read Line */
840 if (np->features & FE_BOF)
841 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
842 if (np->features & FE_ERMP)
843 np->rv_dmode |= ERMP; /* Enable Read Multiple */
845 if ((np->features & FE_PFEN) && !np->ram_ba)
847 if (np->features & FE_PFEN)
849 np->rv_dcntl |= PFEN; /* Prefetch Enable */
850 if (np->features & FE_CLSE)
851 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
852 if (np->features & FE_WRIE)
853 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
854 if (np->features & FE_DFS)
855 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
860 np->rv_ctest4 |= MPEE; /* Master parity checking */
861 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
864 * Get parity checking, host ID and verbose mode from NVRAM
868 sym_nvram_setup_host(shost, np, nvram);
871 * Get SCSI addr of host adapter (set by bios?).
873 if (np->myaddr == 255) {
874 np->myaddr = INB(np, nc_scid) & 0x07;
876 np->myaddr = SYM_SETUP_HOST_ID;
880 * Prepare initial io register bits for burst length
882 sym_init_burst(np, burst_max);
884 sym_set_bus_mode(np, nvram);
887 * Set LED support from SCRIPTS.
888 * Ignore this feature for boards known to use a
889 * specific GPIO wiring and for the 895A, 896
890 * and 1010 that drive the LED directly.
892 if ((SYM_SETUP_SCSI_LED ||
893 (nvram->type == SYM_SYMBIOS_NVRAM ||
894 (nvram->type == SYM_TEKRAM_NVRAM &&
895 pdev->device == PCI_DEVICE_ID_NCR_53C895))) &&
896 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
897 np->features |= FE_LED0;
902 switch(SYM_SETUP_IRQ_MODE & 3) {
904 np->rv_dcntl |= IRQM;
907 np->rv_dcntl |= (np->sv_dcntl & IRQM);
914 * Configure targets according to driver setup.
915 * If NVRAM present get targets setup from NVRAM.
917 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
918 struct sym_tcb *tp = &np->target[i];
920 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
921 tp->usrtags = SYM_SETUP_MAX_TAG;
922 tp->usr_width = np->maxwide;
925 sym_nvram_setup_target(tp, i, nvram);
928 tp->usrflags &= ~SYM_TAGS_ENABLED;
932 * Let user know about the settings.
934 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
935 sym_nvram_type(nvram), np->myaddr,
936 (np->features & FE_ULTRA3) ? 80 :
937 (np->features & FE_ULTRA2) ? 40 :
938 (np->features & FE_ULTRA) ? 20 : 10,
939 sym_scsi_bus_mode(np->scsi_mode),
940 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
942 * Tell him more on demand.
945 printf("%s: %s IRQ line driver%s\n",
947 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
948 np->ram_ba ? ", using on-chip SRAM" : "");
949 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
950 if (np->features & FE_NOPM)
951 printf("%s: handling phase mismatch from SCRIPTS.\n",
957 if (sym_verbose >= 2) {
958 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
959 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
960 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
961 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
963 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
964 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
965 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
966 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
973 * Test the pci bus snoop logic :-(
975 * Has to be called with interrupts disabled.
977 #ifdef CONFIG_SCSI_SYM53C8XX_MMIO
978 static int sym_regtest(struct sym_hcb *np)
980 register volatile u32 data;
982 * chip registers may NOT be cached.
983 * write 0xffffffff to a read only register area,
984 * and try to read it back.
987 OUTL(np, nc_dstat, data);
988 data = INL(np, nc_dstat);
990 if (data == 0xffffffff) {
992 if ((data & 0xe2f0fffd) != 0x02000080) {
994 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1001 static inline int sym_regtest(struct sym_hcb *np)
1007 static int sym_snooptest(struct sym_hcb *np)
1009 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
1012 err = sym_regtest(np);
1017 * Enable Master Parity Checking as we intend
1018 * to enable it for normal operations.
1020 OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1024 pc = SCRIPTZ_BA(np, snooptest);
1028 * Set memory and register.
1030 np->scratch = cpu_to_scr(host_wr);
1031 OUTL(np, nc_temp, sym_wr);
1033 * Start script (exchange values)
1035 OUTL(np, nc_dsa, np->hcb_ba);
1038 * Wait 'til done (with timeout)
1040 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
1041 if (INB(np, nc_istat) & (INTF|SIP|DIP))
1043 if (i>=SYM_SNOOP_TIMEOUT) {
1044 printf ("CACHE TEST FAILED: timeout.\n");
1048 * Check for fatal DMA errors.
1050 dstat = INB(np, nc_dstat);
1051 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1052 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
1053 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1054 "DISABLING MASTER DATA PARITY CHECKING.\n",
1056 np->rv_ctest4 &= ~MPEE;
1060 if (dstat & (MDPE|BF|IID)) {
1061 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
1065 * Save termination position.
1067 pc = INL(np, nc_dsp);
1069 * Read memory and register.
1071 host_rd = scr_to_cpu(np->scratch);
1072 sym_rd = INL(np, nc_scratcha);
1073 sym_bk = INL(np, nc_temp);
1075 * Check termination position.
1077 if (pc != SCRIPTZ_BA(np, snoopend)+8) {
1078 printf ("CACHE TEST FAILED: script execution failed.\n");
1079 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1080 (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
1081 (u_long) SCRIPTZ_BA(np, snoopend) +8);
1087 if (host_wr != sym_rd) {
1088 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1089 (int) host_wr, (int) sym_rd);
1092 if (host_rd != sym_wr) {
1093 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1094 (int) sym_wr, (int) host_rd);
1097 if (sym_bk != sym_wr) {
1098 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1099 (int) sym_wr, (int) sym_bk);
1107 * log message for real hard errors
1109 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1110 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1112 * exception register:
1117 * so: control lines as driven by chip.
1118 * si: control lines as seen by chip.
1119 * sd: scsi data lines as seen by chip.
1122 * sx: sxfer (see the manual)
1123 * s3: scntl3 (see the manual)
1124 * s4: scntl4 (see the manual)
1126 * current script command:
1127 * dsp: script address (relative to start of script).
1128 * dbc: first word of script command.
1130 * First 24 register of the chip:
1133 static void sym_log_hard_error(struct Scsi_Host *shost, u_short sist, u_char dstat)
1135 struct sym_hcb *np = sym_get_hcb(shost);
1140 u_char *script_base;
1143 dsp = INL(np, nc_dsp);
1145 if (dsp > np->scripta_ba &&
1146 dsp <= np->scripta_ba + np->scripta_sz) {
1147 script_ofs = dsp - np->scripta_ba;
1148 script_size = np->scripta_sz;
1149 script_base = (u_char *) np->scripta0;
1150 script_name = "scripta";
1152 else if (np->scriptb_ba < dsp &&
1153 dsp <= np->scriptb_ba + np->scriptb_sz) {
1154 script_ofs = dsp - np->scriptb_ba;
1155 script_size = np->scriptb_sz;
1156 script_base = (u_char *) np->scriptb0;
1157 script_name = "scriptb";
1162 script_name = "mem";
1165 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1166 sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
1167 (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
1168 (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
1169 (unsigned)INB(np, nc_scntl3),
1170 (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
1171 script_name, script_ofs, (unsigned)INL(np, nc_dbc));
1173 if (((script_ofs & 3) == 0) &&
1174 (unsigned)script_ofs < script_size) {
1175 printf ("%s: script cmd = %08x\n", sym_name(np),
1176 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
1179 printf("%s: regdump:", sym_name(np));
1180 for (i = 0; i < 24; i++)
1181 printf(" %02x", (unsigned)INB_OFF(np, i));
1187 if (dstat & (MDPE|BF))
1188 sym_log_bus_error(shost);
1191 void sym_dump_registers(struct Scsi_Host *shost)
1193 struct sym_hcb *np = sym_get_hcb(shost);
1197 sist = INW(np, nc_sist);
1198 dstat = INB(np, nc_dstat);
1199 sym_log_hard_error(shost, sist, dstat);
1202 static struct sym_chip sym_dev_table[] = {
1203 {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
1206 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1207 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1211 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1212 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
1215 {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
1218 {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
1219 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
1221 {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
1222 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
1224 {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
1225 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
1227 {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
1228 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1229 FE_RAM|FE_DIFF|FE_VARCLK}
1231 {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
1232 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1233 FE_RAM|FE_DIFF|FE_VARCLK}
1235 {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
1236 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1237 FE_RAM|FE_DIFF|FE_VARCLK}
1239 {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
1240 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1241 FE_RAM|FE_DIFF|FE_VARCLK}
1243 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1244 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
1249 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1250 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1254 {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
1255 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1256 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1258 {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
1259 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1260 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1262 {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
1263 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1264 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1266 {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
1267 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1268 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1271 {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
1272 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1273 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1276 {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
1277 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1278 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
1281 {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
1282 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1283 FE_RAM|FE_IO256|FE_LEDC}
1286 #define sym_num_devs (ARRAY_SIZE(sym_dev_table))
1289 * Look up the chip table.
1291 * Return a pointer to the chip entry if found,
1295 sym_lookup_chip_table (u_short device_id, u_char revision)
1297 struct sym_chip *chip;
1300 for (i = 0; i < sym_num_devs; i++) {
1301 chip = &sym_dev_table[i];
1302 if (device_id != chip->device_id)
1304 if (revision > chip->revision_id)
1312 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1314 * Lookup the 64 bit DMA segments map.
1315 * This is only used if the direct mapping
1316 * has been unsuccessful.
1318 int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
1325 /* Look up existing mappings */
1326 for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
1327 if (h == np->dmap_bah[i])
1330 /* If direct mapping is free, get it */
1331 if (!np->dmap_bah[s])
1333 /* Collision -> lookup free mappings */
1334 for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
1335 if (!np->dmap_bah[s])
1339 panic("sym: ran out of 64 bit DMA segment registers");
1342 np->dmap_bah[s] = h;
1348 * Update IO registers scratch C..R so they will be
1349 * in sync. with queued CCB expectations.
1351 static void sym_update_dmap_regs(struct sym_hcb *np)
1355 if (!np->dmap_dirty)
1357 o = offsetof(struct sym_reg, nc_scrx[0]);
1358 for (i = 0; i < SYM_DMAP_SIZE; i++) {
1359 OUTL_OFF(np, o, np->dmap_bah[i]);
1366 /* Enforce all the fiddly SPI rules and the chip limitations */
1367 static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
1368 struct sym_trans *goal)
1370 if (!spi_support_wide(starget))
1373 if (!spi_support_sync(starget)) {
1381 if (spi_support_dt(starget)) {
1382 if (spi_support_dt_only(starget))
1385 if (goal->offset == 0)
1391 /* Some targets fail to properly negotiate DT in SE mode */
1392 if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
1396 /* all DT transfers must be wide */
1398 if (goal->offset > np->maxoffs_dt)
1399 goal->offset = np->maxoffs_dt;
1400 if (goal->period < np->minsync_dt)
1401 goal->period = np->minsync_dt;
1402 if (goal->period > np->maxsync_dt)
1403 goal->period = np->maxsync_dt;
1405 goal->iu = goal->qas = 0;
1406 if (goal->offset > np->maxoffs)
1407 goal->offset = np->maxoffs;
1408 if (goal->period < np->minsync)
1409 goal->period = np->minsync;
1410 if (goal->period > np->maxsync)
1411 goal->period = np->maxsync;
1416 * Prepare the next negotiation message if needed.
1418 * Fill in the part of message buffer that contains the
1419 * negotiation and the nego_status field of the CCB.
1420 * Returns the size of the message in bytes.
1422 static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
1424 struct sym_tcb *tp = &np->target[cp->target];
1425 struct scsi_target *starget = tp->starget;
1426 struct sym_trans *goal = &tp->tgoal;
1430 sym_check_goals(np, starget, goal);
1433 * Many devices implement PPR in a buggy way, so only use it if we
1436 if (goal->renego == NS_PPR || (goal->offset &&
1437 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)))) {
1439 } else if (goal->renego == NS_WIDE || goal->width) {
1441 } else if (goal->renego == NS_SYNC || goal->offset) {
1444 goal->check_nego = 0;
1450 msglen += spi_populate_sync_msg(msgptr + msglen, goal->period,
1454 msglen += spi_populate_width_msg(msgptr + msglen, goal->width);
1457 msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period,
1458 goal->offset, goal->width,
1459 (goal->iu ? PPR_OPT_IU : 0) |
1460 (goal->dt ? PPR_OPT_DT : 0) |
1461 (goal->qas ? PPR_OPT_QAS : 0));
1465 cp->nego_status = nego;
1468 tp->nego_cp = cp; /* Keep track a nego will be performed */
1469 if (DEBUG_FLAGS & DEBUG_NEGO) {
1470 sym_print_nego_msg(np, cp->target,
1471 nego == NS_SYNC ? "sync msgout" :
1472 nego == NS_WIDE ? "wide msgout" :
1473 "ppr msgout", msgptr);
1481 * Insert a job into the start queue.
1483 void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
1487 #ifdef SYM_CONF_IARB_SUPPORT
1489 * If the previously queued CCB is not yet done,
1490 * set the IARB hint. The SCRIPTS will go with IARB
1491 * for this job when starting the previous one.
1492 * We leave devices a chance to win arbitration by
1493 * not using more than 'iarb_max' consecutive
1494 * immediate arbitrations.
1496 if (np->last_cp && np->iarb_count < np->iarb_max) {
1497 np->last_cp->host_flags |= HF_HINT_IARB;
1505 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1507 * Make SCRIPTS aware of the 64 bit DMA
1508 * segment registers not being up-to-date.
1511 cp->host_xflags |= HX_DMAP_DIRTY;
1515 * Insert first the idle task and then our job.
1516 * The MBs should ensure proper ordering.
1518 qidx = np->squeueput + 2;
1519 if (qidx >= MAX_QUEUE*2) qidx = 0;
1521 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
1522 MEMORY_WRITE_BARRIER();
1523 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
1525 np->squeueput = qidx;
1527 if (DEBUG_FLAGS & DEBUG_QUEUE)
1528 scmd_printk(KERN_DEBUG, cp->cmd, "queuepos=%d\n",
1532 * Script processor may be waiting for reselect.
1535 MEMORY_WRITE_BARRIER();
1536 OUTB(np, nc_istat, SIGP|np->istat_sem);
1539 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1541 * Start next ready-to-start CCBs.
1543 void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
1549 * Paranoia, as usual. :-)
1551 assert(!lp->started_tags || !lp->started_no_tag);
1554 * Try to start as many commands as asked by caller.
1555 * Prevent from having both tagged and untagged
1556 * commands queued to the device at the same time.
1559 qp = sym_remque_head(&lp->waiting_ccbq);
1562 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
1563 if (cp->tag != NO_TAG) {
1564 if (lp->started_no_tag ||
1565 lp->started_tags >= lp->started_max) {
1566 sym_insque_head(qp, &lp->waiting_ccbq);
1569 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
1571 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
1574 if (lp->started_no_tag || lp->started_tags) {
1575 sym_insque_head(qp, &lp->waiting_ccbq);
1578 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
1580 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
1581 ++lp->started_no_tag;
1584 sym_insque_tail(qp, &lp->started_ccbq);
1585 sym_put_start_queue(np, cp);
1588 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1591 * The chip may have completed jobs. Look at the DONE QUEUE.
1593 * On paper, memory read barriers may be needed here to
1594 * prevent out of order LOADs by the CPU from having
1595 * prefetched stale data prior to DMA having occurred.
1597 static int sym_wakeup_done (struct sym_hcb *np)
1606 /* MEMORY_READ_BARRIER(); */
1608 dsa = scr_to_cpu(np->dqueue[i]);
1612 if ((i = i+2) >= MAX_QUEUE*2)
1615 cp = sym_ccb_from_dsa(np, dsa);
1617 MEMORY_READ_BARRIER();
1618 sym_complete_ok (np, cp);
1622 printf ("%s: bad DSA (%x) in done queue.\n",
1623 sym_name(np), (u_int) dsa);
1631 * Complete all CCBs queued to the COMP queue.
1633 * These CCBs are assumed:
1634 * - Not to be referenced either by devices or
1635 * SCRIPTS-related queues and datas.
1636 * - To have to be completed with an error condition
1639 * The device queue freeze count is incremented
1640 * for each CCB that does not prevent this.
1641 * This function is called when all CCBs involved
1642 * in error handling/recovery have been reaped.
1644 static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
1649 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
1650 struct scsi_cmnd *cmd;
1651 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
1652 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
1653 /* Leave quiet CCBs waiting for resources */
1654 if (cp->host_status == HS_WAIT)
1658 sym_set_cam_status(cmd, cam_status);
1659 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1660 if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
1661 struct sym_tcb *tp = &np->target[cp->target];
1662 struct sym_lcb *lp = sym_lp(tp, cp->lun);
1664 sym_remque(&cp->link2_ccbq);
1665 sym_insque_tail(&cp->link2_ccbq,
1668 if (cp->tag != NO_TAG)
1671 --lp->started_no_tag;
1678 sym_free_ccb(np, cp);
1679 sym_xpt_done(np, cmd);
1684 * Complete all active CCBs with error.
1685 * Used on CHIP/SCSI RESET.
1687 static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
1690 * Move all active CCBs to the COMP queue
1691 * and flush this queue.
1693 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
1694 sym_que_init(&np->busy_ccbq);
1695 sym_flush_comp_queue(np, cam_status);
1702 * 0: initialisation.
1703 * 1: SCSI BUS RESET delivered or received.
1704 * 2: SCSI BUS MODE changed.
1706 void sym_start_up(struct Scsi_Host *shost, int reason)
1708 struct sym_data *sym_data = shost_priv(shost);
1709 struct pci_dev *pdev = sym_data->pdev;
1710 struct sym_hcb *np = sym_data->ncb;
1715 * Reset chip if asked, otherwise just clear fifos.
1720 OUTB(np, nc_stest3, TE|CSF);
1721 OUTONB(np, nc_ctest3, CLF);
1727 phys = np->squeue_ba;
1728 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1729 np->squeue[i] = cpu_to_scr(np->idletask_ba);
1730 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
1732 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1735 * Start at first entry.
1742 phys = np->dqueue_ba;
1743 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1745 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
1747 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1750 * Start at first entry.
1755 * Install patches in scripts.
1756 * This also let point to first position the start
1757 * and done queue pointers used from SCRIPTS.
1759 np->fw_patch(shost);
1762 * Wakeup all pending jobs.
1764 sym_flush_busy_queue(np, DID_RESET);
1769 OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
1771 udelay(2000); /* The 895 needs time for the bus mode to settle */
1773 OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1774 /* full arb., ena parity, par->ATN */
1775 OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
1777 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
1779 OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
1780 OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
1781 OUTB(np, nc_istat , SIGP ); /* Signal Process */
1782 OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
1783 OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
1785 OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
1786 OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
1787 OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
1789 /* Extended Sreq/Sack filtering not supported on the C10 */
1790 if (np->features & FE_C10)
1791 OUTB(np, nc_stest2, np->rv_stest2);
1793 OUTB(np, nc_stest2, EXT|np->rv_stest2);
1795 OUTB(np, nc_stest3, TE); /* TolerANT enable */
1796 OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
1799 * For now, disable AIP generation on C1010-66.
1801 if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_66)
1802 OUTB(np, nc_aipcntl1, DISAIP);
1805 * C10101 rev. 0 errata.
1806 * Errant SGE's when in narrow. Write bits 4 & 5 of
1807 * STEST1 register to disable SGE. We probably should do
1808 * that from SCRIPTS for each selection/reselection, but
1809 * I just don't want. :)
1811 if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 &&
1813 OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1816 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1817 * Disable overlapped arbitration for some dual function devices,
1818 * regardless revision id (kind of post-chip-design feature. ;-))
1820 if (pdev->device == PCI_DEVICE_ID_NCR_53C875)
1821 OUTB(np, nc_ctest0, (1<<5));
1822 else if (pdev->device == PCI_DEVICE_ID_NCR_53C896)
1823 np->rv_ccntl0 |= DPR;
1826 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1827 * and/or hardware phase mismatch, since only such chips
1828 * seem to support those IO registers.
1830 if (np->features & (FE_DAC|FE_NOPM)) {
1831 OUTB(np, nc_ccntl0, np->rv_ccntl0);
1832 OUTB(np, nc_ccntl1, np->rv_ccntl1);
1835 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1837 * Set up scratch C and DRS IO registers to map the 32 bit
1838 * DMA address range our data structures are located in.
1841 np->dmap_bah[0] = 0; /* ??? */
1842 OUTL(np, nc_scrx[0], np->dmap_bah[0]);
1843 OUTL(np, nc_drs, np->dmap_bah[0]);
1848 * If phase mismatch handled by scripts (895A/896/1010),
1849 * set PM jump addresses.
1851 if (np->features & FE_NOPM) {
1852 OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
1853 OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
1857 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1858 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1860 if (np->features & FE_LED0)
1861 OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1862 else if (np->features & FE_LEDC)
1863 OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1868 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
1869 OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
1872 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1873 * Try to eat the spurious SBMC interrupt that may occur when
1874 * we reset the chip but not the SCSI BUS (at initialization).
1876 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
1877 OUTONW(np, nc_sien, SBMC);
1883 np->scsi_mode = INB(np, nc_stest4) & SMODE;
1887 * Fill in target structure.
1888 * Reinitialize usrsync.
1889 * Reinitialize usrwide.
1890 * Prepare sync negotiation according to actual SCSI bus mode.
1892 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
1893 struct sym_tcb *tp = &np->target[i];
1897 tp->head.wval = np->rv_scntl3;
1900 tp->lun0p->to_clear = 0;
1904 for (ln = 1; ln < SYM_CONF_MAX_LUN; ln++)
1906 tp->lunmp[ln]->to_clear = 0;
1911 * Download SCSI SCRIPTS to on-chip RAM if present,
1912 * and start script processor.
1913 * We do the download preferently from the CPU.
1914 * For platforms that may not support PCI memory mapping,
1915 * we use simple SCRIPTS that performs MEMORY MOVEs.
1917 phys = SCRIPTA_BA(np, init);
1919 if (sym_verbose >= 2)
1920 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
1921 memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
1922 if (np->features & FE_RAM8K) {
1923 memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
1924 phys = scr_to_cpu(np->scr_ram_seg);
1925 OUTL(np, nc_mmws, phys);
1926 OUTL(np, nc_mmrs, phys);
1927 OUTL(np, nc_sfs, phys);
1928 phys = SCRIPTB_BA(np, start64);
1934 OUTL(np, nc_dsa, np->hcb_ba);
1938 * Notify the XPT about the RESET condition.
1941 sym_xpt_async_bus_reset(np);
1945 * Switch trans mode for current job and its target.
1947 static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
1948 u_char per, u_char wide, u_char div, u_char fak)
1951 u_char sval, wval, uval;
1952 struct sym_tcb *tp = &np->target[target];
1954 assert(target == (INB(np, nc_sdid) & 0x0f));
1956 sval = tp->head.sval;
1957 wval = tp->head.wval;
1958 uval = tp->head.uval;
1961 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1962 sval, wval, uval, np->rv_scntl3);
1967 if (!(np->features & FE_C10))
1968 sval = (sval & ~0x1f) | ofs;
1970 sval = (sval & ~0x3f) | ofs;
1973 * Set the sync divisor and extra clock factor.
1976 wval = (wval & ~0x70) | ((div+1) << 4);
1977 if (!(np->features & FE_C10))
1978 sval = (sval & ~0xe0) | (fak << 5);
1980 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
1981 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
1982 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
1987 * Set the bus width.
1994 * Set misc. ultra enable bits.
1996 if (np->features & FE_C10) {
1997 uval = uval & ~(U3EN|AIPCKEN);
1999 assert(np->features & FE_U3EN);
2003 wval = wval & ~ULTRA;
2004 if (per <= 12) wval |= ULTRA;
2008 * Stop there if sync parameters are unchanged.
2010 if (tp->head.sval == sval &&
2011 tp->head.wval == wval &&
2012 tp->head.uval == uval)
2014 tp->head.sval = sval;
2015 tp->head.wval = wval;
2016 tp->head.uval = uval;
2019 * Disable extended Sreq/Sack filtering if per < 50.
2020 * Not supported on the C1010.
2022 if (per < 50 && !(np->features & FE_C10))
2023 OUTOFFB(np, nc_stest2, EXT);
2026 * set actual value and sync_status
2028 OUTB(np, nc_sxfer, tp->head.sval);
2029 OUTB(np, nc_scntl3, tp->head.wval);
2031 if (np->features & FE_C10) {
2032 OUTB(np, nc_scntl4, tp->head.uval);
2036 * patch ALL busy ccbs of this target.
2038 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
2040 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
2041 if (cp->target != target)
2043 cp->phys.select.sel_scntl3 = tp->head.wval;
2044 cp->phys.select.sel_sxfer = tp->head.sval;
2045 if (np->features & FE_C10) {
2046 cp->phys.select.sel_scntl4 = tp->head.uval;
2051 static void sym_announce_transfer_rate(struct sym_tcb *tp)
2053 struct scsi_target *starget = tp->starget;
2055 if (tp->tprint.period != spi_period(starget) ||
2056 tp->tprint.offset != spi_offset(starget) ||
2057 tp->tprint.width != spi_width(starget) ||
2058 tp->tprint.iu != spi_iu(starget) ||
2059 tp->tprint.dt != spi_dt(starget) ||
2060 tp->tprint.qas != spi_qas(starget) ||
2061 !tp->tprint.check_nego) {
2062 tp->tprint.period = spi_period(starget);
2063 tp->tprint.offset = spi_offset(starget);
2064 tp->tprint.width = spi_width(starget);
2065 tp->tprint.iu = spi_iu(starget);
2066 tp->tprint.dt = spi_dt(starget);
2067 tp->tprint.qas = spi_qas(starget);
2068 tp->tprint.check_nego = 1;
2070 spi_display_xfer_agreement(starget);
2075 * We received a WDTR.
2076 * Let everything be aware of the changes.
2078 static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2080 struct sym_tcb *tp = &np->target[target];
2081 struct scsi_target *starget = tp->starget;
2083 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2086 tp->tgoal.renego = NS_WIDE;
2088 tp->tgoal.renego = 0;
2089 tp->tgoal.check_nego = 0;
2090 tp->tgoal.width = wide;
2091 spi_offset(starget) = 0;
2092 spi_period(starget) = 0;
2093 spi_width(starget) = wide;
2094 spi_iu(starget) = 0;
2095 spi_dt(starget) = 0;
2096 spi_qas(starget) = 0;
2098 if (sym_verbose >= 3)
2099 sym_announce_transfer_rate(tp);
2103 * We received a SDTR.
2104 * Let everything be aware of the changes.
2107 sym_setsync(struct sym_hcb *np, int target,
2108 u_char ofs, u_char per, u_char div, u_char fak)
2110 struct sym_tcb *tp = &np->target[target];
2111 struct scsi_target *starget = tp->starget;
2112 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
2114 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2117 tp->tgoal.renego = NS_WIDE;
2119 tp->tgoal.renego = NS_SYNC;
2121 tp->tgoal.renego = 0;
2122 spi_period(starget) = per;
2123 spi_offset(starget) = ofs;
2124 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
2126 if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
2127 tp->tgoal.period = per;
2128 tp->tgoal.offset = ofs;
2129 tp->tgoal.check_nego = 0;
2132 sym_announce_transfer_rate(tp);
2136 * We received a PPR.
2137 * Let everything be aware of the changes.
2140 sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2141 u_char per, u_char wide, u_char div, u_char fak)
2143 struct sym_tcb *tp = &np->target[target];
2144 struct scsi_target *starget = tp->starget;
2146 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2149 tp->tgoal.renego = NS_PPR;
2151 tp->tgoal.renego = 0;
2152 spi_width(starget) = tp->tgoal.width = wide;
2153 spi_period(starget) = tp->tgoal.period = per;
2154 spi_offset(starget) = tp->tgoal.offset = ofs;
2155 spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
2156 spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
2157 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
2158 tp->tgoal.check_nego = 0;
2160 sym_announce_transfer_rate(tp);
2164 * generic recovery from scsi interrupt
2166 * The doc says that when the chip gets an SCSI interrupt,
2167 * it tries to stop in an orderly fashion, by completing
2168 * an instruction fetch that had started or by flushing
2169 * the DMA fifo for a write to memory that was executing.
2170 * Such a fashion is not enough to know if the instruction
2171 * that was just before the current DSP value has been
2174 * There are some small SCRIPTS sections that deal with
2175 * the start queue and the done queue that may break any
2176 * assomption from the C code if we are interrupted
2177 * inside, so we reset if this happens. Btw, since these
2178 * SCRIPTS sections are executed while the SCRIPTS hasn't
2179 * started SCSI operations, it is very unlikely to happen.
2181 * All the driver data structures are supposed to be
2182 * allocated from the same 4 GB memory window, so there
2183 * is a 1 to 1 relationship between DSA and driver data
2184 * structures. Since we are careful :) to invalidate the
2185 * DSA when we complete a command or when the SCRIPTS
2186 * pushes a DSA into a queue, we can trust it when it
2189 static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
2191 u32 dsp = INL(np, nc_dsp);
2192 u32 dsa = INL(np, nc_dsa);
2193 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2196 * If we haven't been interrupted inside the SCRIPTS
2197 * critical pathes, we can safely restart the SCRIPTS
2198 * and trust the DSA value if it matches a CCB.
2200 if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
2201 dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
2202 (!(dsp > SCRIPTA_BA(np, ungetjob) &&
2203 dsp < SCRIPTA_BA(np, reselect) + 1)) &&
2204 (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
2205 dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
2206 (!(dsp > SCRIPTA_BA(np, done) &&
2207 dsp < SCRIPTA_BA(np, done_end) + 1))) {
2208 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2209 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2211 * If we have a CCB, let the SCRIPTS call us back for
2212 * the handling of the error with SCRATCHA filled with
2213 * STARTPOS. This way, we will be able to freeze the
2214 * device queue and requeue awaiting IOs.
2217 cp->host_status = hsts;
2218 OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
2221 * Otherwise just restart the SCRIPTS.
2224 OUTL(np, nc_dsa, 0xffffff);
2225 OUTL_DSP(np, SCRIPTA_BA(np, start));
2234 sym_start_reset(np);
2238 * chip exception handler for selection timeout
2240 static void sym_int_sto (struct sym_hcb *np)
2242 u32 dsp = INL(np, nc_dsp);
2244 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
2246 if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
2247 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
2249 sym_start_reset(np);
2253 * chip exception handler for unexpected disconnect
2255 static void sym_int_udc (struct sym_hcb *np)
2257 printf ("%s: unexpected disconnect\n", sym_name(np));
2258 sym_recover_scsi_int(np, HS_UNEXPECTED);
2262 * chip exception handler for SCSI bus mode change
2264 * spi2-r12 11.2.3 says a transceiver mode change must
2265 * generate a reset event and a device that detects a reset
2266 * event shall initiate a hard reset. It says also that a
2267 * device that detects a mode change shall set data transfer
2268 * mode to eight bit asynchronous, etc...
2269 * So, just reinitializing all except chip should be enough.
2271 static void sym_int_sbmc(struct Scsi_Host *shost)
2273 struct sym_hcb *np = sym_get_hcb(shost);
2274 u_char scsi_mode = INB(np, nc_stest4) & SMODE;
2279 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
2280 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
2283 * Should suspend command processing for a few seconds and
2284 * reinitialize all except the chip.
2286 sym_start_up(shost, 2);
2290 * chip exception handler for SCSI parity error.
2292 * When the chip detects a SCSI parity error and is
2293 * currently executing a (CH)MOV instruction, it does
2294 * not interrupt immediately, but tries to finish the
2295 * transfer of the current scatter entry before
2296 * interrupting. The following situations may occur:
2298 * - The complete scatter entry has been transferred
2299 * without the device having changed phase.
2300 * The chip will then interrupt with the DSP pointing
2301 * to the instruction that follows the MOV.
2303 * - A phase mismatch occurs before the MOV finished
2304 * and phase errors are to be handled by the C code.
2305 * The chip will then interrupt with both PAR and MA
2308 * - A phase mismatch occurs before the MOV finished and
2309 * phase errors are to be handled by SCRIPTS.
2310 * The chip will load the DSP with the phase mismatch
2311 * JUMP address and interrupt the host processor.
2313 static void sym_int_par (struct sym_hcb *np, u_short sist)
2315 u_char hsts = INB(np, HS_PRT);
2316 u32 dsp = INL(np, nc_dsp);
2317 u32 dbc = INL(np, nc_dbc);
2318 u32 dsa = INL(np, nc_dsa);
2319 u_char sbcl = INB(np, nc_sbcl);
2320 u_char cmd = dbc >> 24;
2321 int phase = cmd & 7;
2322 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2324 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2325 sym_name(np), hsts, dbc, sbcl);
2328 * Check that the chip is connected to the SCSI BUS.
2330 if (!(INB(np, nc_scntl1) & ISCON)) {
2331 sym_recover_scsi_int(np, HS_UNEXPECTED);
2336 * If the nexus is not clearly identified, reset the bus.
2337 * We will try to do better later.
2343 * Check instruction was a MOV, direction was INPUT and
2346 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
2350 * Keep track of the parity error.
2352 OUTONB(np, HF_PRT, HF_EXT_ERR);
2353 cp->xerr_status |= XE_PARITY_ERR;
2356 * Prepare the message to send to the device.
2358 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
2361 * If the old phase was DATA IN phase, we have to deal with
2362 * the 3 situations described above.
2363 * For other input phases (MSG IN and STATUS), the device
2364 * must resend the whole thing that failed parity checking
2365 * or signal error. So, jumping to dispatcher should be OK.
2367 if (phase == 1 || phase == 5) {
2368 /* Phase mismatch handled by SCRIPTS */
2369 if (dsp == SCRIPTB_BA(np, pm_handle))
2371 /* Phase mismatch handled by the C code */
2374 /* No phase mismatch occurred */
2376 sym_set_script_dp (np, cp, dsp);
2377 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2380 else if (phase == 7) /* We definitely cannot handle parity errors */
2381 #if 1 /* in message-in phase due to the relection */
2382 goto reset_all; /* path and various message anticipations. */
2384 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
2387 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2391 sym_start_reset(np);
2396 * chip exception handler for phase errors.
2398 * We have to construct a new transfer descriptor,
2399 * to transfer the rest of the current block.
2401 static void sym_int_ma (struct sym_hcb *np)
2414 u_char hflags, hflags0;
2418 dsp = INL(np, nc_dsp);
2419 dbc = INL(np, nc_dbc);
2420 dsa = INL(np, nc_dsa);
2423 rest = dbc & 0xffffff;
2427 * locate matching cp if any.
2429 cp = sym_ccb_from_dsa(np, dsa);
2432 * Donnot take into account dma fifo and various buffers in
2433 * INPUT phase since the chip flushes everything before
2434 * raising the MA interrupt for interrupted INPUT phases.
2435 * For DATA IN phase, we will check for the SWIDE later.
2437 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
2440 if (np->features & FE_DFBC)
2441 delta = INW(np, nc_dfbc);
2446 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2448 dfifo = INL(np, nc_dfifo);
2451 * Calculate remaining bytes in DMA fifo.
2452 * (CTEST5 = dfifo >> 16)
2454 if (dfifo & (DFS << 16))
2455 delta = ((((dfifo >> 8) & 0x300) |
2456 (dfifo & 0xff)) - rest) & 0x3ff;
2458 delta = ((dfifo & 0xff) - rest) & 0x7f;
2462 * The data in the dma fifo has not been transfered to
2463 * the target -> add the amount to the rest
2464 * and clear the data.
2465 * Check the sstat2 register in case of wide transfer.
2468 ss0 = INB(np, nc_sstat0);
2469 if (ss0 & OLF) rest++;
2470 if (!(np->features & FE_C10))
2471 if (ss0 & ORF) rest++;
2472 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
2473 ss2 = INB(np, nc_sstat2);
2474 if (ss2 & OLF1) rest++;
2475 if (!(np->features & FE_C10))
2476 if (ss2 & ORF1) rest++;
2482 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
2483 OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
2487 * log the information
2489 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
2490 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
2491 (unsigned) rest, (unsigned) delta);
2494 * try to find the interrupted script command,
2495 * and the address at which to continue.
2499 if (dsp > np->scripta_ba &&
2500 dsp <= np->scripta_ba + np->scripta_sz) {
2501 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
2504 else if (dsp > np->scriptb_ba &&
2505 dsp <= np->scriptb_ba + np->scriptb_sz) {
2506 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
2511 * log the information
2513 if (DEBUG_FLAGS & DEBUG_PHASE) {
2514 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2515 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
2519 printf ("%s: interrupted SCRIPT address not found.\n",
2525 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2531 * get old startaddress and old length.
2533 oadr = scr_to_cpu(vdsp[1]);
2535 if (cmd & 0x10) { /* Table indirect */
2536 tblp = (u32 *) ((char*) &cp->phys + oadr);
2537 olen = scr_to_cpu(tblp[0]);
2538 oadr = scr_to_cpu(tblp[1]);
2541 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
2544 if (DEBUG_FLAGS & DEBUG_PHASE) {
2545 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2546 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
2553 * check cmd against assumed interrupted script command.
2554 * If dt data phase, the MOVE instruction hasn't bit 4 of
2557 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
2558 sym_print_addr(cp->cmd,
2559 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2560 cmd, scr_to_cpu(vdsp[0]) >> 24);
2566 * if old phase not dataphase, leave here.
2569 sym_print_addr(cp->cmd,
2570 "phase change %x-%x %d@%08x resid=%d.\n",
2571 cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
2572 (unsigned)oadr, (unsigned)rest);
2573 goto unexpected_phase;
2577 * Choose the correct PM save area.
2579 * Look at the PM_SAVE SCRIPT if you want to understand
2580 * this stuff. The equivalent code is implemented in
2581 * SCRIPTS for the 895A, 896 and 1010 that are able to
2582 * handle PM from the SCRIPTS processor.
2584 hflags0 = INB(np, HF_PRT);
2587 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
2588 if (hflags & HF_IN_PM0)
2589 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
2590 else if (hflags & HF_IN_PM1)
2591 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
2593 if (hflags & HF_DP_SAVED)
2594 hflags ^= HF_ACT_PM;
2597 if (!(hflags & HF_ACT_PM)) {
2599 newcmd = SCRIPTA_BA(np, pm0_data);
2603 newcmd = SCRIPTA_BA(np, pm1_data);
2606 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
2607 if (hflags != hflags0)
2608 OUTB(np, HF_PRT, hflags);
2611 * fillin the phase mismatch context
2613 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
2614 pm->sg.size = cpu_to_scr(rest);
2615 pm->ret = cpu_to_scr(nxtdsp);
2618 * If we have a SWIDE,
2619 * - prepare the address to write the SWIDE from SCRIPTS,
2620 * - compute the SCRIPTS address to restart from,
2621 * - move current data pointer context by one byte.
2623 nxtdsp = SCRIPTA_BA(np, dispatch);
2624 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
2625 (INB(np, nc_scntl2) & WSR)) {
2629 * Set up the table indirect for the MOVE
2630 * of the residual byte and adjust the data
2633 tmp = scr_to_cpu(pm->sg.addr);
2634 cp->phys.wresid.addr = cpu_to_scr(tmp);
2635 pm->sg.addr = cpu_to_scr(tmp + 1);
2636 tmp = scr_to_cpu(pm->sg.size);
2637 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
2638 pm->sg.size = cpu_to_scr(tmp - 1);
2641 * If only the residual byte is to be moved,
2642 * no PM context is needed.
2644 if ((tmp&0xffffff) == 1)
2648 * Prepare the address of SCRIPTS that will
2649 * move the residual byte to memory.
2651 nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
2654 if (DEBUG_FLAGS & DEBUG_PHASE) {
2655 sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
2656 hflags0, hflags, newcmd,
2657 (unsigned)scr_to_cpu(pm->sg.addr),
2658 (unsigned)scr_to_cpu(pm->sg.size),
2659 (unsigned)scr_to_cpu(pm->ret));
2663 * Restart the SCRIPTS processor.
2665 sym_set_script_dp (np, cp, newcmd);
2666 OUTL_DSP(np, nxtdsp);
2670 * Unexpected phase changes that occurs when the current phase
2671 * is not a DATA IN or DATA OUT phase are due to error conditions.
2672 * Such event may only happen when the SCRIPTS is using a
2673 * multibyte SCSI MOVE.
2675 * Phase change Some possible cause
2677 * COMMAND --> MSG IN SCSI parity error detected by target.
2678 * COMMAND --> STATUS Bad command or refused by target.
2679 * MSG OUT --> MSG IN Message rejected by target.
2680 * MSG OUT --> COMMAND Bogus target that discards extended
2681 * negotiation messages.
2683 * The code below does not care of the new phase and so
2684 * trusts the target. Why to annoy it ?
2685 * If the interrupted phase is COMMAND phase, we restart at
2687 * If a target does not get all the messages after selection,
2688 * the code assumes blindly that the target discards extended
2689 * messages and clears the negotiation status.
2690 * If the target does not want all our response to negotiation,
2691 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2692 * bloat for such a should_not_happen situation).
2693 * In all other situation, we reset the BUS.
2694 * Are these assumptions reasonnable ? (Wait and see ...)
2701 case 2: /* COMMAND phase */
2702 nxtdsp = SCRIPTA_BA(np, dispatch);
2705 case 3: /* STATUS phase */
2706 nxtdsp = SCRIPTA_BA(np, dispatch);
2709 case 6: /* MSG OUT phase */
2711 * If the device may want to use untagged when we want
2712 * tagged, we prepare an IDENTIFY without disc. granted,
2713 * since we will not be able to handle reselect.
2714 * Otherwise, we just don't care.
2716 if (dsp == SCRIPTA_BA(np, send_ident)) {
2717 if (cp->tag != NO_TAG && olen - rest <= 3) {
2718 cp->host_status = HS_BUSY;
2719 np->msgout[0] = IDENTIFY(0, cp->lun);
2720 nxtdsp = SCRIPTB_BA(np, ident_break_atn);
2723 nxtdsp = SCRIPTB_BA(np, ident_break);
2725 else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
2726 dsp == SCRIPTB_BA(np, send_sdtr) ||
2727 dsp == SCRIPTB_BA(np, send_ppr)) {
2728 nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
2729 if (dsp == SCRIPTB_BA(np, send_ppr)) {
2730 struct scsi_device *dev = cp->cmd->device;
2736 case 7: /* MSG IN phase */
2737 nxtdsp = SCRIPTA_BA(np, clrack);
2743 OUTL_DSP(np, nxtdsp);
2748 sym_start_reset(np);
2752 * chip interrupt handler
2754 * In normal situations, interrupt conditions occur one at
2755 * a time. But when something bad happens on the SCSI BUS,
2756 * the chip may raise several interrupt flags before
2757 * stopping and interrupting the CPU. The additionnal
2758 * interrupt flags are stacked in some extra registers
2759 * after the SIP and/or DIP flag has been raised in the
2760 * ISTAT. After the CPU has read the interrupt condition
2761 * flag from SIST or DSTAT, the chip unstacks the other
2762 * interrupt flags and sets the corresponding bits in
2763 * SIST or DSTAT. Since the chip starts stacking once the
2764 * SIP or DIP flag is set, there is a small window of time
2765 * where the stacking does not occur.
2767 * Typically, multiple interrupt conditions may happen in
2768 * the following situations:
2770 * - SCSI parity error + Phase mismatch (PAR|MA)
2771 * When an parity error is detected in input phase
2772 * and the device switches to msg-in phase inside a
2774 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2775 * When a stupid device does not want to handle the
2776 * recovery of an SCSI parity error.
2777 * - Some combinations of STO, PAR, UDC, ...
2778 * When using non compliant SCSI stuff, when user is
2779 * doing non compliant hot tampering on the BUS, when
2780 * something really bad happens to a device, etc ...
2782 * The heuristic suggested by SYMBIOS to handle
2783 * multiple interrupts is to try unstacking all
2784 * interrupts conditions and to handle them on some
2785 * priority based on error severity.
2786 * This will work when the unstacking has been
2787 * successful, but we cannot be 100 % sure of that,
2788 * since the CPU may have been faster to unstack than
2789 * the chip is able to stack. Hmmm ... But it seems that
2790 * such a situation is very unlikely to happen.
2792 * If this happen, for example STO caught by the CPU
2793 * then UDC happenning before the CPU have restarted
2794 * the SCRIPTS, the driver may wrongly complete the
2795 * same command on UDC, since the SCRIPTS didn't restart
2796 * and the DSA still points to the same command.
2797 * We avoid this situation by setting the DSA to an
2798 * invalid value when the CCB is completed and before
2799 * restarting the SCRIPTS.
2801 * Another issue is that we need some section of our
2802 * recovery procedures to be somehow uninterruptible but
2803 * the SCRIPTS processor does not provides such a
2804 * feature. For this reason, we handle recovery preferently
2805 * from the C code and check against some SCRIPTS critical
2806 * sections from the C code.
2808 * Hopefully, the interrupt handling of the driver is now
2809 * able to resist to weird BUS error conditions, but donnot
2810 * ask me for any guarantee that it will never fail. :-)
2811 * Use at your own decision and risk.
2814 irqreturn_t sym_interrupt(struct Scsi_Host *shost)
2816 struct sym_data *sym_data = shost_priv(shost);
2817 struct sym_hcb *np = sym_data->ncb;
2818 struct pci_dev *pdev = sym_data->pdev;
2819 u_char istat, istatc;
2824 * interrupt on the fly ?
2825 * (SCRIPTS may still be running)
2827 * A `dummy read' is needed to ensure that the
2828 * clear of the INTF flag reaches the device
2829 * and that posted writes are flushed to memory
2830 * before the scanning of the DONE queue.
2831 * Note that SCRIPTS also (dummy) read to memory
2832 * prior to deliver the INTF interrupt condition.
2834 istat = INB(np, nc_istat);
2836 OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2837 istat |= INB(np, nc_istat); /* DUMMY READ */
2838 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
2839 sym_wakeup_done(np);
2842 if (!(istat & (SIP|DIP)))
2843 return (istat & INTF) ? IRQ_HANDLED : IRQ_NONE;
2845 #if 0 /* We should never get this one */
2847 OUTB(np, nc_istat, CABRT);
2851 * PAR and MA interrupts may occur at the same time,
2852 * and we need to know of both in order to handle
2853 * this situation properly. We try to unstack SCSI
2854 * interrupts for that reason. BTW, I dislike a LOT
2855 * such a loop inside the interrupt routine.
2856 * Even if DMA interrupt stacking is very unlikely to
2857 * happen, we also try unstacking these ones, since
2858 * this has no performance impact.
2865 sist |= INW(np, nc_sist);
2867 dstat |= INB(np, nc_dstat);
2868 istatc = INB(np, nc_istat);
2871 /* Prevent deadlock waiting on a condition that may
2873 if (unlikely(sist == 0xffff && dstat == 0xff)) {
2874 if (pci_channel_offline(pdev))
2877 } while (istatc & (SIP|DIP));
2879 if (DEBUG_FLAGS & DEBUG_TINY)
2880 printf ("<%d|%x:%x|%x:%x>",
2881 (int)INB(np, nc_scr0),
2883 (unsigned)INL(np, nc_dsp),
2884 (unsigned)INL(np, nc_dbc));
2886 * On paper, a memory read barrier may be needed here to
2887 * prevent out of order LOADs by the CPU from having
2888 * prefetched stale data prior to DMA having occurred.
2889 * And since we are paranoid ... :)
2891 MEMORY_READ_BARRIER();
2894 * First, interrupts we want to service cleanly.
2896 * Phase mismatch (MA) is the most frequent interrupt
2897 * for chip earlier than the 896 and so we have to service
2898 * it as quickly as possible.
2899 * A SCSI parity error (PAR) may be combined with a phase
2900 * mismatch condition (MA).
2901 * Programmed interrupts (SIR) are used to call the C code
2903 * The single step interrupt (SSI) is not used in this
2906 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
2907 !(dstat & (MDPE|BF|ABRT|IID))) {
2908 if (sist & PAR) sym_int_par (np, sist);
2909 else if (sist & MA) sym_int_ma (np);
2910 else if (dstat & SIR) sym_int_sir(np);
2911 else if (dstat & SSI) OUTONB_STD();
2912 else goto unknown_int;
2917 * Now, interrupts that donnot happen in normal
2918 * situations and that we may need to recover from.
2920 * On SCSI RESET (RST), we reset everything.
2921 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2922 * active CCBs with RESET status, prepare all devices
2923 * for negotiating again and restart the SCRIPTS.
2924 * On STO and UDC, we complete the CCB with the corres-
2925 * ponding status and restart the SCRIPTS.
2928 printf("%s: SCSI BUS reset detected.\n", sym_name(np));
2929 sym_start_up(shost, 1);
2933 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2934 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2936 if (!(sist & (GEN|HTH|SGE)) &&
2937 !(dstat & (MDPE|BF|ABRT|IID))) {
2938 if (sist & SBMC) sym_int_sbmc(shost);
2939 else if (sist & STO) sym_int_sto (np);
2940 else if (sist & UDC) sym_int_udc (np);
2941 else goto unknown_int;
2946 * Now, interrupts we are not able to recover cleanly.
2948 * Log message for hard errors.
2952 sym_log_hard_error(shost, sist, dstat);
2954 if ((sist & (GEN|HTH|SGE)) ||
2955 (dstat & (MDPE|BF|ABRT|IID))) {
2956 sym_start_reset(np);
2962 * We just miss the cause of the interrupt. :(
2963 * Print a message. The timeout will do the real work.
2965 printf( "%s: unknown interrupt(s) ignored, "
2966 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2967 sym_name(np), istat, dstat, sist);
2972 * Dequeue from the START queue all CCBs that match
2973 * a given target/lun/task condition (-1 means all),
2974 * and move them from the BUSY queue to the COMP queue
2975 * with DID_SOFT_ERROR status condition.
2976 * This function is used during error handling/recovery.
2977 * It is called with SCRIPTS not running.
2980 sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
2986 * Make sure the starting index is within range.
2988 assert((i >= 0) && (i < 2*MAX_QUEUE));
2991 * Walk until end of START queue and dequeue every job
2992 * that matches the target/lun/task condition.
2995 while (i != np->squeueput) {
2996 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
2998 #ifdef SYM_CONF_IARB_SUPPORT
2999 /* Forget hints for IARB, they may be no longer relevant */
3000 cp->host_flags &= ~HF_HINT_IARB;
3002 if ((target == -1 || cp->target == target) &&
3003 (lun == -1 || cp->lun == lun) &&
3004 (task == -1 || cp->tag == task)) {
3005 sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
3006 sym_remque(&cp->link_ccbq);
3007 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3011 np->squeue[j] = np->squeue[i];
3012 if ((j += 2) >= MAX_QUEUE*2) j = 0;
3014 if ((i += 2) >= MAX_QUEUE*2) i = 0;
3016 if (i != j) /* Copy back the idle task if needed */
3017 np->squeue[j] = np->squeue[i];
3018 np->squeueput = j; /* Update our current start queue pointer */
3024 * chip handler for bad SCSI status condition
3026 * In case of bad SCSI status, we unqueue all the tasks
3027 * currently queued to the controller but not yet started
3028 * and then restart the SCRIPTS processor immediately.
3030 * QUEUE FULL and BUSY conditions are handled the same way.
3031 * Basically all the not yet started tasks are requeued in
3032 * device queue and the queue is frozen until a completion.
3034 * For CHECK CONDITION and COMMAND TERMINATED status, we use
3035 * the CCB of the failed command to prepare a REQUEST SENSE
3036 * SCSI command and queue it to the controller queue.
3038 * SCRATCHA is assumed to have been loaded with STARTPOS
3039 * before the SCRIPTS called the C code.
3041 static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
3044 u_char s_status = cp->ssss_status;
3045 u_char h_flags = cp->host_flags;
3050 * Compute the index of the next job to start from SCRIPTS.
3052 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3055 * The last CCB queued used for IARB hint may be
3056 * no longer relevant. Forget it.
3058 #ifdef SYM_CONF_IARB_SUPPORT
3064 * Now deal with the SCSI status.
3069 if (sym_verbose >= 2) {
3070 sym_print_addr(cp->cmd, "%s\n",
3071 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
3073 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
3074 sym_complete_error (np, cp);
3079 * If we get an SCSI error when requesting sense, give up.
3081 if (h_flags & HF_SENSE) {
3082 sym_complete_error (np, cp);
3087 * Dequeue all queued CCBs for that device not yet started,
3088 * and restart the SCRIPTS processor immediately.
3090 sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3091 OUTL_DSP(np, SCRIPTA_BA(np, start));
3094 * Save some info of the actual IO.
3095 * Compute the data residual.
3097 cp->sv_scsi_status = cp->ssss_status;
3098 cp->sv_xerr_status = cp->xerr_status;
3099 cp->sv_resid = sym_compute_residual(np, cp);
3102 * Prepare all needed data structures for
3103 * requesting sense data.
3106 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
3110 * If we are currently using anything different from
3111 * async. 8 bit data transfers with that target,
3112 * start a negotiation, since the device may want
3113 * to report us a UNIT ATTENTION condition due to
3114 * a cause we currently ignore, and we donnot want
3115 * to be stuck with WIDE and/or SYNC data transfer.
3117 * cp->nego_status is filled by sym_prepare_nego().
3119 cp->nego_status = 0;
3120 msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
3122 * Message table indirect structure.
3124 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
3125 cp->phys.smsg.size = cpu_to_scr(msglen);
3130 cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
3131 cp->phys.cmd.size = cpu_to_scr(6);
3134 * patch requested size into sense command
3136 cp->sensecmd[0] = REQUEST_SENSE;
3137 cp->sensecmd[1] = 0;
3138 if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
3139 cp->sensecmd[1] = cp->lun << 5;
3140 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
3141 cp->data_len = SYM_SNS_BBUF_LEN;
3146 memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
3147 cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
3148 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
3151 * requeue the command.
3153 startp = SCRIPTB_BA(np, sdata_in);
3155 cp->phys.head.savep = cpu_to_scr(startp);
3156 cp->phys.head.lastp = cpu_to_scr(startp);
3157 cp->startp = cpu_to_scr(startp);
3158 cp->goalp = cpu_to_scr(startp + 16);
3160 cp->host_xflags = 0;
3161 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3162 cp->ssss_status = S_ILLEGAL;
3163 cp->host_flags = (HF_SENSE|HF_DATA_IN);
3164 cp->xerr_status = 0;
3165 cp->extra_bytes = 0;
3167 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
3170 * Requeue the command.
3172 sym_put_start_queue(np, cp);
3175 * Give back to upper layer everything we have dequeued.
3177 sym_flush_comp_queue(np, 0);
3183 * After a device has accepted some management message
3184 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3185 * a device signals a UNIT ATTENTION condition, some
3186 * tasks are thrown away by the device. We are required
3187 * to reflect that on our tasks list since the device
3188 * will never complete these tasks.
3190 * This function move from the BUSY queue to the COMP
3191 * queue all disconnected CCBs for a given target that
3192 * match the following criteria:
3193 * - lun=-1 means any logical UNIT otherwise a given one.
3194 * - task=-1 means any task, otherwise a given one.
3196 int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
3198 SYM_QUEHEAD qtmp, *qp;
3203 * Move the entire BUSY queue to our temporary queue.
3205 sym_que_init(&qtmp);
3206 sym_que_splice(&np->busy_ccbq, &qtmp);
3207 sym_que_init(&np->busy_ccbq);
3210 * Put all CCBs that matches our criteria into
3211 * the COMP queue and put back other ones into
3214 while ((qp = sym_remque_head(&qtmp)) != NULL) {
3215 struct scsi_cmnd *cmd;
3216 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3218 if (cp->host_status != HS_DISCONNECT ||
3219 cp->target != target ||
3220 (lun != -1 && cp->lun != lun) ||
3222 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
3223 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3226 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3228 /* Preserve the software timeout condition */
3229 if (sym_get_cam_status(cmd) != DID_TIME_OUT)
3230 sym_set_cam_status(cmd, cam_status);
3233 printf("XXXX TASK @%p CLEARED\n", cp);
3240 * chip handler for TASKS recovery
3242 * We cannot safely abort a command, while the SCRIPTS
3243 * processor is running, since we just would be in race
3246 * As long as we have tasks to abort, we keep the SEM
3247 * bit set in the ISTAT. When this bit is set, the
3248 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3249 * each time it enters the scheduler.
3251 * If we have to reset a target, clear tasks of a unit,
3252 * or to perform the abort of a disconnected job, we
3253 * restart the SCRIPTS for selecting the target. Once
3254 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3255 * If it loses arbitration, the SCRIPTS will interrupt again
3256 * the next time it will enter its scheduler, and so on ...
3258 * On SIR_TARGET_SELECTED, we scan for the more
3259 * appropriate thing to do:
3261 * - If nothing, we just sent a M_ABORT message to the
3262 * target to get rid of the useless SCSI bus ownership.
3263 * According to the specs, no tasks shall be affected.
3264 * - If the target is to be reset, we send it a M_RESET
3266 * - If a logical UNIT is to be cleared , we send the
3267 * IDENTIFY(lun) + M_ABORT.
3268 * - If an untagged task is to be aborted, we send the
3269 * IDENTIFY(lun) + M_ABORT.
3270 * - If a tagged task is to be aborted, we send the
3271 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3273 * Once our 'kiss of death' :) message has been accepted
3274 * by the target, the SCRIPTS interrupts again
3275 * (SIR_ABORT_SENT). On this interrupt, we complete
3276 * all the CCBs that should have been aborted by the
3277 * target according to our message.
3279 static void sym_sir_task_recovery(struct sym_hcb *np, int num)
3283 struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
3284 struct scsi_target *starget;
3285 int target=-1, lun=-1, task;
3290 * The SCRIPTS processor stopped before starting
3291 * the next command in order to allow us to perform
3292 * some task recovery.
3294 case SIR_SCRIPT_STOPPED:
3296 * Do we have any target to reset or unit to clear ?
3298 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
3299 tp = &np->target[i];
3301 (tp->lun0p && tp->lun0p->to_clear)) {
3307 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3308 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3318 * If not, walk the busy queue for any
3319 * disconnected CCB to be aborted.
3322 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3323 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
3324 if (cp->host_status != HS_DISCONNECT)
3327 target = cp->target;
3334 * If some target is to be selected,
3335 * prepare and start the selection.
3338 tp = &np->target[target];
3339 np->abrt_sel.sel_id = target;
3340 np->abrt_sel.sel_scntl3 = tp->head.wval;
3341 np->abrt_sel.sel_sxfer = tp->head.sval;
3342 OUTL(np, nc_dsa, np->hcb_ba);
3343 OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
3348 * Now look for a CCB to abort that haven't started yet.
3349 * Btw, the SCRIPTS processor is still stopped, so
3350 * we are not in race.
3354 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3355 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3356 if (cp->host_status != HS_BUSY &&
3357 cp->host_status != HS_NEGOTIATE)
3361 #ifdef SYM_CONF_IARB_SUPPORT
3363 * If we are using IMMEDIATE ARBITRATION, we donnot
3364 * want to cancel the last queued CCB, since the
3365 * SCRIPTS may have anticipated the selection.
3367 if (cp == np->last_cp) {
3372 i = 1; /* Means we have found some */
3377 * We are done, so we donnot need
3378 * to synchronize with the SCRIPTS anylonger.
3379 * Remove the SEM flag from the ISTAT.
3382 OUTB(np, nc_istat, SIGP);
3386 * Compute index of next position in the start
3387 * queue the SCRIPTS intends to start and dequeue
3388 * all CCBs for that device that haven't been started.
3390 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3391 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3394 * Make sure at least our IO to abort has been dequeued.
3396 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3397 assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
3399 sym_remque(&cp->link_ccbq);
3400 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3403 * Keep track in cam status of the reason of the abort.
3405 if (cp->to_abort == 2)
3406 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3408 sym_set_cam_status(cp->cmd, DID_ABORT);
3411 * Complete with error everything that we have dequeued.
3413 sym_flush_comp_queue(np, 0);
3416 * The SCRIPTS processor has selected a target
3417 * we may have some manual recovery to perform for.
3419 case SIR_TARGET_SELECTED:
3420 target = INB(np, nc_sdid) & 0xf;
3421 tp = &np->target[target];
3423 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
3426 * If the target is to be reset, prepare a
3427 * M_RESET message and clear the to_reset flag
3428 * since we donnot expect this operation to fail.
3431 np->abrt_msg[0] = M_RESET;
3432 np->abrt_tbl.size = 1;
3438 * Otherwise, look for some logical unit to be cleared.
3440 if (tp->lun0p && tp->lun0p->to_clear)
3442 else if (tp->lunmp) {
3443 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3444 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3452 * If a logical unit is to be cleared, prepare
3453 * an IDENTIFY(lun) + ABORT MESSAGE.
3456 struct sym_lcb *lp = sym_lp(tp, lun);
3457 lp->to_clear = 0; /* We don't expect to fail here */
3458 np->abrt_msg[0] = IDENTIFY(0, lun);
3459 np->abrt_msg[1] = M_ABORT;
3460 np->abrt_tbl.size = 2;
3465 * Otherwise, look for some disconnected job to
3466 * abort for this target.
3470 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3471 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3472 if (cp->host_status != HS_DISCONNECT)
3474 if (cp->target != target)
3478 i = 1; /* Means we have some */
3483 * If we have none, probably since the device has
3484 * completed the command before we won abitration,
3485 * send a M_ABORT message without IDENTIFY.
3486 * According to the specs, the device must just
3487 * disconnect the BUS and not abort any task.
3490 np->abrt_msg[0] = M_ABORT;
3491 np->abrt_tbl.size = 1;
3496 * We have some task to abort.
3497 * Set the IDENTIFY(lun)
3499 np->abrt_msg[0] = IDENTIFY(0, cp->lun);
3502 * If we want to abort an untagged command, we
3503 * will send a IDENTIFY + M_ABORT.
3504 * Otherwise (tagged command), we will send
3505 * a IDENTITFY + task attributes + ABORT TAG.
3507 if (cp->tag == NO_TAG) {
3508 np->abrt_msg[1] = M_ABORT;
3509 np->abrt_tbl.size = 2;
3511 np->abrt_msg[1] = cp->scsi_smsg[1];
3512 np->abrt_msg[2] = cp->scsi_smsg[2];
3513 np->abrt_msg[3] = M_ABORT_TAG;
3514 np->abrt_tbl.size = 4;
3517 * Keep track of software timeout condition, since the
3518 * peripheral driver may not count retries on abort
3519 * conditions not due to timeout.
3521 if (cp->to_abort == 2)
3522 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3523 cp->to_abort = 0; /* We donnot expect to fail here */
3527 * The target has accepted our message and switched
3528 * to BUS FREE phase as we expected.
3530 case SIR_ABORT_SENT:
3531 target = INB(np, nc_sdid) & 0xf;
3532 tp = &np->target[target];
3533 starget = tp->starget;
3536 ** If we didn't abort anything, leave here.
3538 if (np->abrt_msg[0] == M_ABORT)
3542 * If we sent a M_RESET, then a hardware reset has
3543 * been performed by the target.
3544 * - Reset everything to async 8 bit
3545 * - Tell ourself to negotiate next time :-)
3546 * - Prepare to clear all disconnected CCBs for
3547 * this target from our task list (lun=task=-1)
3551 if (np->abrt_msg[0] == M_RESET) {
3553 tp->head.wval = np->rv_scntl3;
3555 spi_period(starget) = 0;
3556 spi_offset(starget) = 0;
3557 spi_width(starget) = 0;
3558 spi_iu(starget) = 0;
3559 spi_dt(starget) = 0;
3560 spi_qas(starget) = 0;
3561 tp->tgoal.check_nego = 1;
3562 tp->tgoal.renego = 0;
3566 * Otherwise, check for the LUN and TASK(s)
3567 * concerned by the cancelation.
3568 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3569 * or an ABORT message :-)
3572 lun = np->abrt_msg[0] & 0x3f;
3573 if (np->abrt_msg[1] == M_ABORT_TAG)
3574 task = np->abrt_msg[2];
3578 * Complete all the CCBs the device should have
3579 * aborted due to our 'kiss of death' message.
3581 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3582 sym_dequeue_from_squeue(np, i, target, lun, -1);
3583 sym_clear_tasks(np, DID_ABORT, target, lun, task);
3584 sym_flush_comp_queue(np, 0);
3587 * If we sent a BDR, make upper layer aware of that.
3589 if (np->abrt_msg[0] == M_RESET)
3590 starget_printk(KERN_NOTICE, starget,
3591 "has been reset\n");
3596 * Print to the log the message we intend to send.
3598 if (num == SIR_TARGET_SELECTED) {
3599 dev_info(&tp->starget->dev, "control msgout:");
3600 sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
3601 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
3605 * Let the SCRIPTS processor continue.
3611 * Gerard's alchemy:) that deals with with the data
3612 * pointer for both MDP and the residual calculation.
3614 * I didn't want to bloat the code by more than 200
3615 * lines for the handling of both MDP and the residual.
3616 * This has been achieved by using a data pointer
3617 * representation consisting in an index in the data
3618 * array (dp_sg) and a negative offset (dp_ofs) that
3619 * have the following meaning:
3621 * - dp_sg = SYM_CONF_MAX_SG
3622 * we are at the end of the data script.
3623 * - dp_sg < SYM_CONF_MAX_SG
3624 * dp_sg points to the next entry of the scatter array
3625 * we want to transfer.
3627 * dp_ofs represents the residual of bytes of the
3628 * previous entry scatter entry we will send first.
3630 * no residual to send first.
3632 * The function sym_evaluate_dp() accepts an arbitray
3633 * offset (basically from the MDP message) and returns
3634 * the corresponding values of dp_sg and dp_ofs.
3637 static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
3640 int dp_ofs, dp_sg, dp_sgmin;
3645 * Compute the resulted data pointer in term of a script
3646 * address within some DATA script and a signed byte offset.
3650 if (dp_scr == SCRIPTA_BA(np, pm0_data))
3652 else if (dp_scr == SCRIPTA_BA(np, pm1_data))
3658 dp_scr = scr_to_cpu(pm->ret);
3659 dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff;
3663 * If we are auto-sensing, then we are done.
3665 if (cp->host_flags & HF_SENSE) {
3671 * Deduce the index of the sg entry.
3672 * Keep track of the index of the first valid entry.
3673 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3676 tmp = scr_to_cpu(cp->goalp);
3677 dp_sg = SYM_CONF_MAX_SG;
3679 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
3680 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3683 * Move to the sg entry the data pointer belongs to.
3685 * If we are inside the data area, we expect result to be:
3688 * dp_ofs = 0 and dp_sg is the index of the sg entry
3689 * the data pointer belongs to (or the end of the data)
3691 * dp_ofs < 0 and dp_sg is the index of the sg entry
3692 * the data pointer belongs to + 1.
3696 while (dp_sg > dp_sgmin) {
3698 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3699 n = dp_ofs + (tmp & 0xffffff);
3707 else if (dp_ofs > 0) {
3708 while (dp_sg < SYM_CONF_MAX_SG) {
3709 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3710 dp_ofs -= (tmp & 0xffffff);
3718 * Make sure the data pointer is inside the data area.
3719 * If not, return some error.
3721 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
3723 else if (dp_sg > SYM_CONF_MAX_SG ||
3724 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
3728 * Save the extreme pointer if needed.
3730 if (dp_sg > cp->ext_sg ||
3731 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
3733 cp->ext_ofs = dp_ofs;
3747 * chip handler for MODIFY DATA POINTER MESSAGE
3749 * We also call this function on IGNORE WIDE RESIDUE
3750 * messages that do not match a SWIDE full condition.
3751 * Btw, we assume in that situation that such a message
3752 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3755 static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
3758 u32 dp_scr = sym_get_script_dp (np, cp);
3766 * Not supported for auto-sense.
3768 if (cp->host_flags & HF_SENSE)
3772 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3773 * to the resulted data pointer.
3775 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
3780 * And our alchemy:) allows to easily calculate the data
3781 * script address we want to return for the next data phase.
3783 dp_ret = cpu_to_scr(cp->goalp);
3784 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
3787 * If offset / scatter entry is zero we donnot need
3788 * a context for the new current data pointer.
3796 * Get a context for the new current data pointer.
3798 hflags = INB(np, HF_PRT);
3800 if (hflags & HF_DP_SAVED)
3801 hflags ^= HF_ACT_PM;
3803 if (!(hflags & HF_ACT_PM)) {
3805 dp_scr = SCRIPTA_BA(np, pm0_data);
3809 dp_scr = SCRIPTA_BA(np, pm1_data);
3812 hflags &= ~(HF_DP_SAVED);
3814 OUTB(np, HF_PRT, hflags);
3817 * Set up the new current data pointer.
3818 * ofs < 0 there, and for the next data phase, we
3819 * want to transfer part of the data of the sg entry
3820 * corresponding to index dp_sg-1 prior to returning
3821 * to the main data script.
3823 pm->ret = cpu_to_scr(dp_ret);
3824 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
3825 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
3826 pm->sg.addr = cpu_to_scr(tmp);
3827 pm->sg.size = cpu_to_scr(-dp_ofs);
3830 sym_set_script_dp (np, cp, dp_scr);
3831 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3835 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3840 * chip calculation of the data residual.
3842 * As I used to say, the requirement of data residual
3843 * in SCSI is broken, useless and cannot be achieved
3844 * without huge complexity.
3845 * But most OSes and even the official CAM require it.
3846 * When stupidity happens to be so widely spread inside
3847 * a community, it gets hard to convince.
3849 * Anyway, I don't care, since I am not going to use
3850 * any software that considers this data residual as
3851 * a relevant information. :)
3854 int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
3856 int dp_sg, dp_sgmin, resid = 0;
3860 * Check for some data lost or just thrown away.
3861 * We are not required to be quite accurate in this
3862 * situation. Btw, if we are odd for output and the
3863 * device claims some more data, it may well happen
3864 * than our residual be zero. :-)
3866 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
3867 if (cp->xerr_status & XE_EXTRA_DATA)
3868 resid -= cp->extra_bytes;
3869 if (cp->xerr_status & XE_SODL_UNRUN)
3871 if (cp->xerr_status & XE_SWIDE_OVRUN)
3876 * If all data has been transferred,
3877 * there is no residual.
3879 if (cp->phys.head.lastp == cp->goalp)
3883 * If no data transfer occurs, or if the data
3884 * pointer is weird, return full residual.
3886 if (cp->startp == cp->phys.head.lastp ||
3887 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
3889 return cp->data_len - cp->odd_byte_adjustment;
3893 * If we were auto-sensing, then we are done.
3895 if (cp->host_flags & HF_SENSE) {
3900 * We are now full comfortable in the computation
3901 * of the data residual (2's complement).
3903 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3904 resid = -cp->ext_ofs;
3905 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
3906 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3907 resid += (tmp & 0xffffff);
3910 resid -= cp->odd_byte_adjustment;
3913 * Hopefully, the result is not too wrong.
3919 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3921 * When we try to negotiate, we append the negotiation message
3922 * to the identify and (maybe) simple tag message.
3923 * The host status field is set to HS_NEGOTIATE to mark this
3926 * If the target doesn't answer this message immediately
3927 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3928 * will be raised eventually.
3929 * The handler removes the HS_NEGOTIATE status, and sets the
3930 * negotiated value to the default (async / nowide).
3932 * If we receive a matching answer immediately, we check it
3933 * for validity, and set the values.
3935 * If we receive a Reject message immediately, we assume the
3936 * negotiation has failed, and fall back to standard values.
3938 * If we receive a negotiation message while not in HS_NEGOTIATE
3939 * state, it's a target initiated negotiation. We prepare a
3940 * (hopefully) valid answer, set our parameters, and send back
3941 * this answer to the target.
3943 * If the target doesn't fetch the answer (no message out phase),
3944 * we assume the negotiation has failed, and fall back to default
3945 * settings (SIR_NEGO_PROTO interrupt).
3947 * When we set the values, we adjust them in all ccbs belonging
3948 * to this target, in the controller's register, and in the "phys"
3949 * field of the controller's struct sym_hcb.
3953 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3956 sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
3958 int target = cp->target;
3959 u_char chg, ofs, per, fak, div;
3961 if (DEBUG_FLAGS & DEBUG_NEGO) {
3962 sym_print_nego_msg(np, target, "sync msgin", np->msgin);
3966 * Get requested values.
3973 * Check values against our limits.
3976 if (ofs > np->maxoffs)
3977 {chg = 1; ofs = np->maxoffs;}
3981 if (per < np->minsync)
3982 {chg = 1; per = np->minsync;}
3986 * Get new chip synchronous parameters value.
3989 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
3992 if (DEBUG_FLAGS & DEBUG_NEGO) {
3993 sym_print_addr(cp->cmd,
3994 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3995 ofs, per, div, fak, chg);
3999 * If it was an answer we want to change,
4000 * then it isn't acceptable. Reject it.
4008 sym_setsync (np, target, ofs, per, div, fak);
4011 * It was an answer. We are done.
4017 * It was a request. Prepare an answer message.
4019 spi_populate_sync_msg(np->msgout, per, ofs);
4021 if (DEBUG_FLAGS & DEBUG_NEGO) {
4022 sym_print_nego_msg(np, target, "sync msgout", np->msgout);
4025 np->msgin [0] = M_NOOP;
4030 sym_setsync (np, target, 0, 0, 0, 0);
4034 static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4040 * Request or answer ?
4042 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4043 OUTB(np, HS_PRT, HS_BUSY);
4044 if (cp->nego_status && cp->nego_status != NS_SYNC)
4050 * Check and apply new values.
4052 result = sym_sync_nego_check(np, req, cp);
4053 if (result) /* Not acceptable, reject it */
4055 if (req) { /* Was a request, send response. */
4056 cp->nego_status = NS_SYNC;
4057 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4059 else /* Was a response, we are done. */
4060 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4064 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4068 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
4071 sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
4073 struct sym_tcb *tp = &np->target[target];
4074 unsigned char fak, div;
4077 unsigned char per = np->msgin[3];
4078 unsigned char ofs = np->msgin[5];
4079 unsigned char wide = np->msgin[6];
4080 unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
4082 if (DEBUG_FLAGS & DEBUG_NEGO) {
4083 sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
4087 * Check values against our limits.
4089 if (wide > np->maxwide) {
4093 if (!wide || !(np->features & FE_U3EN))
4096 if (opts != (np->msgin[7] & PPR_OPT_MASK))
4099 dt = opts & PPR_OPT_DT;
4102 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
4103 if (ofs > maxoffs) {
4110 unsigned char minsync = dt ? np->minsync_dt : np->minsync;
4111 if (per < minsync) {
4118 * Get new chip synchronous parameters value.
4121 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
4125 * If it was an answer we want to change,
4126 * then it isn't acceptable. Reject it.
4134 sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
4137 * It was an answer. We are done.
4143 * It was a request. Prepare an answer message.
4145 spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts);
4147 if (DEBUG_FLAGS & DEBUG_NEGO) {
4148 sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
4151 np->msgin [0] = M_NOOP;
4156 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
4158 * If it is a device response that should result in
4159 * ST, we may want to try a legacy negotiation later.
4161 if (!req && !opts) {
4162 tp->tgoal.period = per;
4163 tp->tgoal.offset = ofs;
4164 tp->tgoal.width = wide;
4165 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4166 tp->tgoal.check_nego = 1;
4171 static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4177 * Request or answer ?
4179 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4180 OUTB(np, HS_PRT, HS_BUSY);
4181 if (cp->nego_status && cp->nego_status != NS_PPR)
4187 * Check and apply new values.
4189 result = sym_ppr_nego_check(np, req, cp->target);
4190 if (result) /* Not acceptable, reject it */
4192 if (req) { /* Was a request, send response. */
4193 cp->nego_status = NS_PPR;
4194 OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
4196 else /* Was a response, we are done. */
4197 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4201 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4205 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4208 sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
4210 int target = cp->target;
4213 if (DEBUG_FLAGS & DEBUG_NEGO) {
4214 sym_print_nego_msg(np, target, "wide msgin", np->msgin);
4218 * Get requested values.
4221 wide = np->msgin[3];
4224 * Check values against our limits.
4226 if (wide > np->maxwide) {
4231 if (DEBUG_FLAGS & DEBUG_NEGO) {
4232 sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
4237 * If it was an answer we want to change,
4238 * then it isn't acceptable. Reject it.
4246 sym_setwide (np, target, wide);
4249 * It was an answer. We are done.
4255 * It was a request. Prepare an answer message.
4257 spi_populate_width_msg(np->msgout, wide);
4259 np->msgin [0] = M_NOOP;
4261 if (DEBUG_FLAGS & DEBUG_NEGO) {
4262 sym_print_nego_msg(np, target, "wide msgout", np->msgout);
4271 static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4277 * Request or answer ?
4279 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4280 OUTB(np, HS_PRT, HS_BUSY);
4281 if (cp->nego_status && cp->nego_status != NS_WIDE)
4287 * Check and apply new values.
4289 result = sym_wide_nego_check(np, req, cp);
4290 if (result) /* Not acceptable, reject it */
4292 if (req) { /* Was a request, send response. */
4293 cp->nego_status = NS_WIDE;
4294 OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
4295 } else { /* Was a response. */
4297 * Negotiate for SYNC immediately after WIDE response.
4298 * This allows to negotiate for both WIDE and SYNC on
4299 * a single SCSI command (Suggested by Justin Gibbs).
4301 if (tp->tgoal.offset) {
4302 spi_populate_sync_msg(np->msgout, tp->tgoal.period,
4305 if (DEBUG_FLAGS & DEBUG_NEGO) {
4306 sym_print_nego_msg(np, cp->target,
4307 "sync msgout", np->msgout);
4310 cp->nego_status = NS_SYNC;
4311 OUTB(np, HS_PRT, HS_NEGOTIATE);
4312 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4315 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4321 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4325 * Reset DT, SYNC or WIDE to default settings.
4327 * Called when a negotiation does not succeed either
4328 * on rejection or on protocol error.
4330 * A target that understands a PPR message should never
4331 * reject it, and messing with it is very unlikely.
4332 * So, if a PPR makes problems, we may just want to
4333 * try a legacy negotiation later.
4335 static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4337 switch (cp->nego_status) {
4340 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
4342 if (tp->tgoal.period < np->minsync)
4343 tp->tgoal.period = np->minsync;
4344 if (tp->tgoal.offset > np->maxoffs)
4345 tp->tgoal.offset = np->maxoffs;
4346 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4347 tp->tgoal.check_nego = 1;
4351 sym_setsync (np, cp->target, 0, 0, 0, 0);
4354 sym_setwide (np, cp->target, 0);
4357 np->msgin [0] = M_NOOP;
4358 np->msgout[0] = M_NOOP;
4359 cp->nego_status = 0;
4363 * chip handler for MESSAGE REJECT received in response to
4364 * PPR, WIDE or SYNCHRONOUS negotiation.
4366 static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4368 sym_nego_default(np, tp, cp);
4369 OUTB(np, HS_PRT, HS_BUSY);
4373 * chip exception handler for programmed interrupts.
4375 static void sym_int_sir(struct sym_hcb *np)
4377 u_char num = INB(np, nc_dsps);
4378 u32 dsa = INL(np, nc_dsa);
4379 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
4380 u_char target = INB(np, nc_sdid) & 0x0f;
4381 struct sym_tcb *tp = &np->target[target];
4384 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
4387 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4389 * SCRIPTS tell us that we may have to update
4390 * 64 bit DMA segment registers.
4392 case SIR_DMAP_DIRTY:
4393 sym_update_dmap_regs(np);
4397 * Command has been completed with error condition
4398 * or has been auto-sensed.
4400 case SIR_COMPLETE_ERROR:
4401 sym_complete_error(np, cp);
4404 * The C code is currently trying to recover from something.
4405 * Typically, user want to abort some command.
4407 case SIR_SCRIPT_STOPPED:
4408 case SIR_TARGET_SELECTED:
4409 case SIR_ABORT_SENT:
4410 sym_sir_task_recovery(np, num);
4413 * The device didn't go to MSG OUT phase after having
4414 * been selected with ATN. We do not want to handle that.
4416 case SIR_SEL_ATN_NO_MSG_OUT:
4417 scmd_printk(KERN_WARNING, cp->cmd,
4418 "No MSG OUT phase after selection with ATN\n");
4421 * The device didn't switch to MSG IN phase after
4422 * having reselected the initiator.
4424 case SIR_RESEL_NO_MSG_IN:
4425 scmd_printk(KERN_WARNING, cp->cmd,
4426 "No MSG IN phase after reselection\n");
4429 * After reselection, the device sent a message that wasn't
4432 case SIR_RESEL_NO_IDENTIFY:
4433 scmd_printk(KERN_WARNING, cp->cmd,
4434 "No IDENTIFY after reselection\n");
4437 * The device reselected a LUN we do not know about.
4439 case SIR_RESEL_BAD_LUN:
4440 np->msgout[0] = M_RESET;
4443 * The device reselected for an untagged nexus and we
4446 case SIR_RESEL_BAD_I_T_L:
4447 np->msgout[0] = M_ABORT;
4450 * The device reselected for a tagged nexus that we do not have.
4452 case SIR_RESEL_BAD_I_T_L_Q:
4453 np->msgout[0] = M_ABORT_TAG;
4456 * The SCRIPTS let us know that the device has grabbed
4457 * our message and will abort the job.
4459 case SIR_RESEL_ABORTED:
4460 np->lastmsg = np->msgout[0];
4461 np->msgout[0] = M_NOOP;
4462 scmd_printk(KERN_WARNING, cp->cmd,
4463 "message %x sent on bad reselection\n", np->lastmsg);
4466 * The SCRIPTS let us know that a message has been
4467 * successfully sent to the device.
4469 case SIR_MSG_OUT_DONE:
4470 np->lastmsg = np->msgout[0];
4471 np->msgout[0] = M_NOOP;
4472 /* Should we really care of that */
4473 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
4475 cp->xerr_status &= ~XE_PARITY_ERR;
4476 if (!cp->xerr_status)
4477 OUTOFFB(np, HF_PRT, HF_EXT_ERR);
4482 * The device didn't send a GOOD SCSI status.
4483 * We may have some work to do prior to allow
4484 * the SCRIPTS processor to continue.
4486 case SIR_BAD_SCSI_STATUS:
4489 sym_sir_bad_scsi_status(np, num, cp);
4492 * We are asked by the SCRIPTS to prepare a
4495 case SIR_REJECT_TO_SEND:
4496 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
4497 np->msgout[0] = M_REJECT;
4500 * We have been ODD at the end of a DATA IN
4501 * transfer and the device didn't send a
4502 * IGNORE WIDE RESIDUE message.
4503 * It is a data overrun condition.
4505 case SIR_SWIDE_OVERRUN:
4507 OUTONB(np, HF_PRT, HF_EXT_ERR);
4508 cp->xerr_status |= XE_SWIDE_OVRUN;
4512 * We have been ODD at the end of a DATA OUT
4514 * It is a data underrun condition.
4516 case SIR_SODL_UNDERRUN:
4518 OUTONB(np, HF_PRT, HF_EXT_ERR);
4519 cp->xerr_status |= XE_SODL_UNRUN;
4523 * The device wants us to tranfer more data than
4524 * expected or in the wrong direction.
4525 * The number of extra bytes is in scratcha.
4526 * It is a data overrun condition.
4528 case SIR_DATA_OVERRUN:
4530 OUTONB(np, HF_PRT, HF_EXT_ERR);
4531 cp->xerr_status |= XE_EXTRA_DATA;
4532 cp->extra_bytes += INL(np, nc_scratcha);
4536 * The device switched to an illegal phase (4/5).
4540 OUTONB(np, HF_PRT, HF_EXT_ERR);
4541 cp->xerr_status |= XE_BAD_PHASE;
4545 * We received a message.
4547 case SIR_MSG_RECEIVED:
4550 switch (np->msgin [0]) {
4552 * We received an extended message.
4553 * We handle MODIFY DATA POINTER, SDTR, WDTR
4554 * and reject all other extended messages.
4557 switch (np->msgin [2]) {
4559 if (DEBUG_FLAGS & DEBUG_POINTER)
4560 sym_print_msg(cp, NULL, np->msgin);
4561 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
4562 (np->msgin[5]<<8) + (np->msgin[6]);
4563 sym_modify_dp(np, tp, cp, tmp);
4566 sym_sync_nego(np, tp, cp);
4569 sym_ppr_nego(np, tp, cp);
4572 sym_wide_nego(np, tp, cp);
4579 * We received a 1/2 byte message not handled from SCRIPTS.
4580 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4581 * RESIDUE messages that haven't been anticipated by
4582 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4583 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4586 if (DEBUG_FLAGS & DEBUG_POINTER)
4587 sym_print_msg(cp, NULL, np->msgin);
4588 if (cp->host_flags & HF_SENSE)
4589 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4591 sym_modify_dp(np, tp, cp, -1);
4594 if (INB(np, HS_PRT) == HS_NEGOTIATE)
4595 sym_nego_rejected(np, tp, cp);
4597 sym_print_addr(cp->cmd,
4598 "M_REJECT received (%x:%x).\n",
4599 scr_to_cpu(np->lastmsg), np->msgout[0]);
4608 * We received an unknown message.
4609 * Ignore all MSG IN phases and reject it.
4612 sym_print_msg(cp, "WEIRD message received", np->msgin);
4613 OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
4616 * Negotiation failed.
4617 * Target does not send us the reply.
4618 * Remove the HS_NEGOTIATE status.
4620 case SIR_NEGO_FAILED:
4621 OUTB(np, HS_PRT, HS_BUSY);
4623 * Negotiation failed.
4624 * Target does not want answer message.
4626 case SIR_NEGO_PROTO:
4627 sym_nego_default(np, tp, cp);
4635 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4638 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4645 * Acquire a control block
4647 struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
4649 u_char tn = cmd->device->id;
4650 u_char ln = cmd->device->lun;
4651 struct sym_tcb *tp = &np->target[tn];
4652 struct sym_lcb *lp = sym_lp(tp, ln);
4653 u_short tag = NO_TAG;
4655 struct sym_ccb *cp = NULL;
4658 * Look for a free CCB
4660 if (sym_que_empty(&np->free_ccbq))
4662 qp = sym_remque_head(&np->free_ccbq);
4665 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4669 * If we have been asked for a tagged command.
4673 * Debugging purpose.
4675 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4676 if (lp->busy_itl != 0)
4680 * Allocate resources for tags if not yet.
4683 sym_alloc_lcb_tags(np, tn, ln);
4688 * Get a tag for this SCSI IO and set up
4689 * the CCB bus address for reselection,
4690 * and count it for this LUN.
4691 * Toggle reselect path to tagged.
4693 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
4694 tag = lp->cb_tags[lp->ia_tag];
4695 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
4698 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4699 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
4701 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
4703 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4704 cp->tags_si = lp->tags_si;
4705 ++lp->tags_sum[cp->tags_si];
4713 * This command will not be tagged.
4714 * If we already have either a tagged or untagged
4715 * one, refuse to overlap this untagged one.
4719 * Debugging purpose.
4721 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4722 if (lp->busy_itl != 0 || lp->busy_itlq != 0)
4726 * Count this nexus for this LUN.
4727 * Set up the CCB bus address for reselection.
4728 * Toggle reselect path to untagged.
4731 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4732 if (lp->busy_itl == 1) {
4733 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
4735 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
4743 * Put the CCB into the busy queue.
4745 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4746 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4748 sym_remque(&cp->link2_ccbq);
4749 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
4754 cp->odd_byte_adjustment = 0;
4756 cp->order = tag_order;
4760 if (DEBUG_FLAGS & DEBUG_TAGS) {
4761 sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
4767 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4772 * Release one control block
4774 void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
4776 struct sym_tcb *tp = &np->target[cp->target];
4777 struct sym_lcb *lp = sym_lp(tp, cp->lun);
4779 if (DEBUG_FLAGS & DEBUG_TAGS) {
4780 sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
4789 * If tagged, release the tag, set the relect path
4791 if (cp->tag != NO_TAG) {
4792 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4793 --lp->tags_sum[cp->tags_si];
4796 * Free the tag value.
4798 lp->cb_tags[lp->if_tag] = cp->tag;
4799 if (++lp->if_tag == SYM_CONF_MAX_TASK)
4802 * Make the reselect path invalid,
4803 * and uncount this CCB.
4805 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
4807 } else { /* Untagged */
4809 * Make the reselect path invalid,
4810 * and uncount this CCB.
4812 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4816 * If no JOB active, make the LUN reselect path invalid.
4818 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
4820 cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4824 * We donnot queue more than 1 ccb per target
4825 * with negotiation at any time. If this ccb was
4826 * used for negotiation, clear this info in the tcb.
4828 if (cp == tp->nego_cp)
4831 #ifdef SYM_CONF_IARB_SUPPORT
4833 * If we just complete the last queued CCB,
4834 * clear this info that is no longer relevant.
4836 if (cp == np->last_cp)
4841 * Make this CCB available.
4844 cp->host_status = HS_IDLE;
4845 sym_remque(&cp->link_ccbq);
4846 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4848 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4850 sym_remque(&cp->link2_ccbq);
4851 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
4853 if (cp->tag != NO_TAG)
4856 --lp->started_no_tag;
4864 * Allocate a CCB from memory and initialize its fixed part.
4866 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
4868 struct sym_ccb *cp = NULL;
4872 * Prevent from allocating more CCBs than we can
4873 * queue to the controller.
4875 if (np->actccbs >= SYM_CONF_MAX_START)
4879 * Allocate memory for this CCB.
4881 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
4891 * Compute the bus address of this ccb.
4893 cp->ccb_ba = vtobus(cp);
4896 * Insert this ccb into the hashed list.
4898 hcode = CCB_HASH_CODE(cp->ccb_ba);
4899 cp->link_ccbh = np->ccbh[hcode];
4900 np->ccbh[hcode] = cp;
4903 * Initialyze the start and restart actions.
4905 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
4906 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
4909 * Initilialyze some other fields.
4911 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
4914 * Chain into free ccb queue.
4916 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4919 * Chain into optionnal lists.
4921 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4922 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
4927 sym_mfree_dma(cp, sizeof(*cp), "CCB");
4932 * Look up a CCB from a DSA value.
4934 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
4939 hcode = CCB_HASH_CODE(dsa);
4940 cp = np->ccbh[hcode];
4942 if (cp->ccb_ba == dsa)
4951 * Target control block initialisation.
4952 * Nothing important to do at the moment.
4954 static void sym_init_tcb (struct sym_hcb *np, u_char tn)
4956 #if 0 /* Hmmm... this checking looks paranoid. */
4958 * Check some alignments required by the chip.
4960 assert (((offsetof(struct sym_reg, nc_sxfer) ^
4961 offsetof(struct sym_tcb, head.sval)) &3) == 0);
4962 assert (((offsetof(struct sym_reg, nc_scntl3) ^
4963 offsetof(struct sym_tcb, head.wval)) &3) == 0);
4968 * Lun control block allocation and initialization.
4970 struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
4972 struct sym_tcb *tp = &np->target[tn];
4973 struct sym_lcb *lp = NULL;
4976 * Initialize the target control block if not yet.
4978 sym_init_tcb (np, tn);
4981 * Allocate the LCB bus address array.
4982 * Compute the bus address of this table.
4984 if (ln && !tp->luntbl) {
4987 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
4990 for (i = 0 ; i < 64 ; i++)
4991 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
4992 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
4996 * Allocate the table of pointers for LUN(s) > 0, if needed.
4998 if (ln && !tp->lunmp) {
4999 tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
5007 * Make it available to the chip.
5009 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
5014 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
5018 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
5023 * Let the itl task point to error handling.
5025 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
5028 * Set the reselect pattern to our default. :)
5030 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5033 * Set user capabilities.
5035 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
5037 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5039 * Initialize device queueing.
5041 sym_que_init(&lp->waiting_ccbq);
5042 sym_que_init(&lp->started_ccbq);
5043 lp->started_max = SYM_CONF_MAX_TASK;
5044 lp->started_limit = SYM_CONF_MAX_TASK;
5052 * Allocate LCB resources for tagged command queuing.
5054 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
5056 struct sym_tcb *tp = &np->target[tn];
5057 struct sym_lcb *lp = sym_lp(tp, ln);
5061 * Allocate the task table and and the tag allocation
5062 * circular buffer. We want both or none.
5064 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5067 lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
5069 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5070 lp->itlq_tbl = NULL;
5075 * Initialize the task table with invalid entries.
5077 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5078 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
5081 * Fill up the tag buffer with tag numbers.
5083 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5087 * Make the task table available to SCRIPTS,
5088 * And accept tagged commands now.
5090 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
5098 * Lun control block deallocation. Returns the number of valid remaing LCBs
5101 int sym_free_lcb(struct sym_hcb *np, u_char tn, u_char ln)
5103 struct sym_tcb *tp = &np->target[tn];
5104 struct sym_lcb *lp = sym_lp(tp, ln);
5111 sym_mfree_dma(tp->luntbl, 256, "LUNTBL");
5114 tp->head.luntbl_sa = cpu_to_scr(vtobus(np->badluntbl));
5116 tp->luntbl[ln] = cpu_to_scr(vtobus(&np->badlun_sa));
5117 tp->lunmp[ln] = NULL;
5121 tp->head.lun0_sa = cpu_to_scr(vtobus(&np->badlun_sa));
5125 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5129 sym_mfree_dma(lp, sizeof(*lp), "LCB");
5135 * Queue a SCSI IO to the controller.
5137 int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
5139 struct scsi_device *sdev = cmd->device;
5147 * Keep track of the IO in our CCB.
5152 * Retrieve the target descriptor.
5154 tp = &np->target[cp->target];
5157 * Retrieve the lun descriptor.
5159 lp = sym_lp(tp, sdev->lun);
5161 can_disconnect = (cp->tag != NO_TAG) ||
5162 (lp && (lp->curr_flags & SYM_DISC_ENABLED));
5164 msgptr = cp->scsi_smsg;
5166 msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
5169 * Build the tag message if present.
5171 if (cp->tag != NO_TAG) {
5172 u_char order = cp->order;
5180 order = M_SIMPLE_TAG;
5182 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5184 * Avoid too much reordering of SCSI commands.
5185 * The algorithm tries to prevent completion of any
5186 * tagged command from being delayed against more
5187 * than 3 times the max number of queued commands.
5189 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
5190 lp->tags_si = !(lp->tags_si);
5191 if (lp->tags_sum[lp->tags_si]) {
5192 order = M_ORDERED_TAG;
5193 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
5195 "ordered tag forced.\n");
5201 msgptr[msglen++] = order;
5204 * For less than 128 tags, actual tags are numbered
5205 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5206 * with devices that have problems with #TAG 0 or too
5207 * great #TAG numbers. For more tags (up to 256),
5208 * we use directly our tag number.
5210 #if SYM_CONF_MAX_TASK > (512/4)
5211 msgptr[msglen++] = cp->tag;
5213 msgptr[msglen++] = (cp->tag << 1) + 1;
5218 * Build a negotiation message if needed.
5219 * (nego_status is filled by sym_prepare_nego())
5221 * Always negotiate on INQUIRY and REQUEST SENSE.
5224 cp->nego_status = 0;
5225 if ((tp->tgoal.check_nego ||
5226 cmd->cmnd[0] == INQUIRY || cmd->cmnd[0] == REQUEST_SENSE) &&
5227 !tp->nego_cp && lp) {
5228 msglen += sym_prepare_nego(np, cp, msgptr + msglen);
5234 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
5235 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
5240 cp->phys.select.sel_id = cp->target;
5241 cp->phys.select.sel_scntl3 = tp->head.wval;
5242 cp->phys.select.sel_sxfer = tp->head.sval;
5243 cp->phys.select.sel_scntl4 = tp->head.uval;
5248 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
5249 cp->phys.smsg.size = cpu_to_scr(msglen);
5254 cp->host_xflags = 0;
5255 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5256 cp->ssss_status = S_ILLEGAL;
5257 cp->xerr_status = 0;
5259 cp->extra_bytes = 0;
5262 * extreme data pointer.
5263 * shall be positive, so -1 is lower than lowest.:)
5269 * Build the CDB and DATA descriptor block
5272 return sym_setup_data_and_start(np, cmd, cp);
5276 * Reset a SCSI target (all LUNs of this target).
5278 int sym_reset_scsi_target(struct sym_hcb *np, int target)
5282 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
5285 tp = &np->target[target];
5288 np->istat_sem = SEM;
5289 OUTB(np, nc_istat, SIGP|SEM);
5297 static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
5300 * Check that the IO is active.
5302 if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
5306 * If a previous abort didn't succeed in time,
5307 * perform a BUS reset.
5310 sym_reset_scsi_bus(np, 1);
5315 * Mark the CCB for abort and allow time for.
5317 cp->to_abort = timed_out ? 2 : 1;
5320 * Tell the SCRIPTS processor to stop and synchronize with us.
5322 np->istat_sem = SEM;
5323 OUTB(np, nc_istat, SIGP|SEM);
5327 int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
5333 * Look up our CCB control block.
5336 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5337 struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5338 if (cp2->cmd == cmd) {
5344 return sym_abort_ccb(np, cp, timed_out);
5348 * Complete execution of a SCSI command with extended
5349 * error, SCSI status error, or having been auto-sensed.
5351 * The SCRIPTS processor is not running there, so we
5352 * can safely access IO registers and remove JOBs from
5354 * SCRATCHA is assumed to have been loaded with STARTPOS
5355 * before the SCRIPTS called the C code.
5357 void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
5359 struct scsi_device *sdev;
5360 struct scsi_cmnd *cmd;
5367 * Paranoid check. :)
5369 if (!cp || !cp->cmd)
5374 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
5375 dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
5376 cp->host_status, cp->ssss_status, cp->host_flags);
5380 * Get target and lun pointers.
5382 tp = &np->target[cp->target];
5383 lp = sym_lp(tp, sdev->lun);
5386 * Check for extended errors.
5388 if (cp->xerr_status) {
5390 sym_print_xerr(cmd, cp->xerr_status);
5391 if (cp->host_status == HS_COMPLETE)
5392 cp->host_status = HS_COMP_ERR;
5396 * Calculate the residual.
5398 resid = sym_compute_residual(np, cp);
5400 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
5401 resid = 0; /* throw them away. :) */
5406 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5410 * Dequeue all queued CCBs for that device
5411 * not yet started by SCRIPTS.
5413 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
5414 i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
5417 * Restart the SCRIPTS processor.
5419 OUTL_DSP(np, SCRIPTA_BA(np, start));
5421 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5422 if (cp->host_status == HS_COMPLETE &&
5423 cp->ssss_status == S_QUEUE_FULL) {
5424 if (!lp || lp->started_tags - i < 2)
5427 * Decrease queue depth as needed.
5429 lp->started_max = lp->started_tags - i - 1;
5432 if (sym_verbose >= 2) {
5433 sym_print_addr(cmd, " queue depth is now %d\n",
5440 cp->host_status = HS_BUSY;
5441 cp->ssss_status = S_ILLEGAL;
5444 * Let's requeue it to device.
5446 sym_set_cam_status(cmd, DID_SOFT_ERROR);
5452 * Build result in CAM ccb.
5454 sym_set_cam_result_error(np, cp, resid);
5456 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5460 * Add this one to the COMP queue.
5462 sym_remque(&cp->link_ccbq);
5463 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
5466 * Complete all those commands with either error
5467 * or requeue condition.
5469 sym_flush_comp_queue(np, 0);
5471 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5473 * Donnot start more than 1 command after an error.
5475 sym_start_next_ccbs(np, lp, 1);
5480 * Complete execution of a successful SCSI command.
5482 * Only successful commands go to the DONE queue,
5483 * since we need to have the SCRIPTS processor
5484 * stopped on any error condition.
5485 * The SCRIPTS processor is running while we are
5486 * completing successful commands.
5488 void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
5492 struct scsi_cmnd *cmd;
5496 * Paranoid check. :)
5498 if (!cp || !cp->cmd)
5500 assert (cp->host_status == HS_COMPLETE);
5508 * Get target and lun pointers.
5510 tp = &np->target[cp->target];
5511 lp = sym_lp(tp, cp->lun);
5514 * If all data have been transferred, given than no
5515 * extended error did occur, there is no residual.
5518 if (cp->phys.head.lastp != cp->goalp)
5519 resid = sym_compute_residual(np, cp);
5522 * Wrong transfer residuals may be worse than just always
5523 * returning zero. User can disable this feature in
5524 * sym53c8xx.h. Residual support is enabled by default.
5526 if (!SYM_SETUP_RESIDUAL_SUPPORT)
5530 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5534 * Build result in CAM ccb.
5536 sym_set_cam_result_ok(cp, cmd, resid);
5538 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5540 * If max number of started ccbs had been reduced,
5541 * increase it if 200 good status received.
5543 if (lp && lp->started_max < lp->started_limit) {
5545 if (lp->num_sgood >= 200) {
5548 if (sym_verbose >= 2) {
5549 sym_print_addr(cmd, " queue depth is now %d\n",
5559 sym_free_ccb (np, cp);
5561 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5563 * Requeue a couple of awaiting scsi commands.
5565 if (!sym_que_empty(&lp->waiting_ccbq))
5566 sym_start_next_ccbs(np, lp, 2);
5569 * Complete the command.
5571 sym_xpt_done(np, cmd);
5575 * Soft-attach the controller.
5577 int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
5579 struct sym_hcb *np = sym_get_hcb(shost);
5583 * Get some info about the firmware.
5585 np->scripta_sz = fw->a_size;
5586 np->scriptb_sz = fw->b_size;
5587 np->scriptz_sz = fw->z_size;
5588 np->fw_setup = fw->setup;
5589 np->fw_patch = fw->patch;
5590 np->fw_name = fw->name;
5593 * Save setting of some IO registers, so we will
5594 * be able to probe specific implementations.
5596 sym_save_initial_setting (np);
5599 * Reset the chip now, since it has been reported
5600 * that SCSI clock calibration may not work properly
5601 * if the chip is currently active.
5606 * Prepare controller and devices settings, according
5607 * to chip features, user set-up and driver set-up.
5609 sym_prepare_setting(shost, np, nvram);
5612 * Check the PCI clock frequency.
5613 * Must be performed after prepare_setting since it destroys
5614 * STEST1 that is used to probe for the clock doubler.
5616 i = sym_getpciclock(np);
5617 if (i > 37000 && !(np->features & FE_66MHZ))
5618 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5622 * Allocate the start queue.
5624 np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
5627 np->squeue_ba = vtobus(np->squeue);
5630 * Allocate the done queue.
5632 np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
5635 np->dqueue_ba = vtobus(np->dqueue);
5638 * Allocate the target bus address array.
5640 np->targtbl = sym_calloc_dma(256, "TARGTBL");
5643 np->targtbl_ba = vtobus(np->targtbl);
5646 * Allocate SCRIPTS areas.
5648 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
5649 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
5650 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
5651 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
5655 * Allocate the array of lists of CCBs hashed by DSA.
5657 np->ccbh = kcalloc(CCB_HASH_SIZE, sizeof(struct sym_ccb **), GFP_KERNEL);
5662 * Initialyze the CCB free and busy queues.
5664 sym_que_init(&np->free_ccbq);
5665 sym_que_init(&np->busy_ccbq);
5666 sym_que_init(&np->comp_ccbq);
5669 * Initialization for optional handling
5670 * of device queueing.
5672 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5673 sym_que_init(&np->dummy_ccbq);
5676 * Allocate some CCB. We need at least ONE.
5678 if (!sym_alloc_ccb(np))
5682 * Calculate BUS addresses where we are going
5683 * to load the SCRIPTS.
5685 np->scripta_ba = vtobus(np->scripta0);
5686 np->scriptb_ba = vtobus(np->scriptb0);
5687 np->scriptz_ba = vtobus(np->scriptz0);
5690 np->scripta_ba = np->ram_ba;
5691 if (np->features & FE_RAM8K) {
5692 np->scriptb_ba = np->scripta_ba + 4096;
5693 #if 0 /* May get useful for 64 BIT PCI addressing */
5694 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
5700 * Copy scripts to controller instance.
5702 memcpy(np->scripta0, fw->a_base, np->scripta_sz);
5703 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
5704 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
5707 * Setup variable parts in scripts and compute
5708 * scripts bus addresses used from the C code.
5710 np->fw_setup(np, fw);
5713 * Bind SCRIPTS with physical addresses usable by the
5714 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5716 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
5717 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
5718 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
5720 #ifdef SYM_CONF_IARB_SUPPORT
5722 * If user wants IARB to be set when we win arbitration
5723 * and have other jobs, compute the max number of consecutive
5724 * settings of IARB hints before we leave devices a chance to
5725 * arbitrate for reselection.
5727 #ifdef SYM_SETUP_IARB_MAX
5728 np->iarb_max = SYM_SETUP_IARB_MAX;
5735 * Prepare the idle and invalid task actions.
5737 np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5738 np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5739 np->idletask_ba = vtobus(&np->idletask);
5741 np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5742 np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5743 np->notask_ba = vtobus(&np->notask);
5745 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5746 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5747 np->bad_itl_ba = vtobus(&np->bad_itl);
5749 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5750 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
5751 np->bad_itlq_ba = vtobus(&np->bad_itlq);
5754 * Allocate and prepare the lun JUMP table that is used
5755 * for a target prior the probing of devices (bad lun table).
5756 * A private table will be allocated for the target on the
5757 * first INQUIRY response received.
5759 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
5763 np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5764 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
5765 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5768 * Prepare the bus address array that contains the bus
5769 * address of each target control block.
5770 * For now, assume all logical units are wrong. :)
5772 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5773 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
5774 np->target[i].head.luntbl_sa =
5775 cpu_to_scr(vtobus(np->badluntbl));
5776 np->target[i].head.lun0_sa =
5777 cpu_to_scr(vtobus(&np->badlun_sa));
5781 * Now check the cache handling of the pci chipset.
5783 if (sym_snooptest (np)) {
5784 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
5789 * Sigh! we are done.
5798 * Free everything that has been allocated for this device.
5800 void sym_hcb_free(struct sym_hcb *np)
5808 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
5810 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
5812 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
5814 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
5816 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
5819 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
5820 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5821 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5827 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
5829 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
5830 tp = &np->target[target];
5832 sym_mfree_dma(tp->luntbl, 256, "LUNTBL");
5833 #if SYM_CONF_MAX_LUN > 1
5838 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
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