Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq
[linux-2.6] / arch / powerpc / boot / dts / mpc8379_rdb.dts
1 /*
2  * MPC8379E RDB Device Tree Source
3  *
4  * Copyright 2007, 2008 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         compatible = "fsl,mpc8379rdb";
16         #address-cells = <1>;
17         #size-cells = <1>;
18
19         aliases {
20                 ethernet0 = &enet0;
21                 ethernet1 = &enet1;
22                 serial0 = &serial0;
23                 serial1 = &serial1;
24                 pci0 = &pci0;
25         };
26
27         cpus {
28                 #address-cells = <1>;
29                 #size-cells = <0>;
30
31                 PowerPC,8379@0 {
32                         device_type = "cpu";
33                         reg = <0x0>;
34                         d-cache-line-size = <32>;
35                         i-cache-line-size = <32>;
36                         d-cache-size = <32768>;
37                         i-cache-size = <32768>;
38                         timebase-frequency = <0>;
39                         bus-frequency = <0>;
40                         clock-frequency = <0>;
41                 };
42         };
43
44         memory {
45                 device_type = "memory";
46                 reg = <0x00000000 0x10000000>;  // 256MB at 0
47         };
48
49         localbus@e0005000 {
50                 #address-cells = <2>;
51                 #size-cells = <1>;
52                 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
53                 reg = <0xe0005000 0x1000>;
54                 interrupts = <77 0x8>;
55                 interrupt-parent = <&ipic>;
56
57                 // CS0 and CS1 are swapped when
58                 // booting from nand, but the
59                 // addresses are the same.
60                 ranges = <0x0 0x0 0xfe000000 0x00800000
61                           0x1 0x0 0xe0600000 0x00008000
62                           0x2 0x0 0xf0000000 0x00020000
63                           0x3 0x0 0xfa000000 0x00008000>;
64
65                 flash@0,0 {
66                         #address-cells = <1>;
67                         #size-cells = <1>;
68                         compatible = "cfi-flash";
69                         reg = <0x0 0x0 0x800000>;
70                         bank-width = <2>;
71                         device-width = <1>;
72                 };
73
74                 nand@1,0 {
75                         #address-cells = <1>;
76                         #size-cells = <1>;
77                         compatible = "fsl,mpc8379-fcm-nand",
78                                      "fsl,elbc-fcm-nand";
79                         reg = <0x1 0x0 0x8000>;
80
81                         u-boot@0 {
82                                 reg = <0x0 0x100000>;
83                                 read-only;
84                         };
85
86                         kernel@100000 {
87                                 reg = <0x100000 0x300000>;
88                         };
89                         fs@400000 {
90                                 reg = <0x400000 0x1c00000>;
91                         };
92                 };
93         };
94
95         immr@e0000000 {
96                 #address-cells = <1>;
97                 #size-cells = <1>;
98                 device_type = "soc";
99                 compatible = "simple-bus";
100                 ranges = <0x0 0xe0000000 0x00100000>;
101                 reg = <0xe0000000 0x00000200>;
102                 bus-frequency = <0>;
103
104                 wdt@200 {
105                         device_type = "watchdog";
106                         compatible = "mpc83xx_wdt";
107                         reg = <0x200 0x100>;
108                 };
109
110                 i2c@3000 {
111                         #address-cells = <1>;
112                         #size-cells = <0>;
113                         cell-index = <0>;
114                         compatible = "fsl-i2c";
115                         reg = <0x3000 0x100>;
116                         interrupts = <14 0x8>;
117                         interrupt-parent = <&ipic>;
118                         dfsrr;
119                         rtc@68 {
120                                 device_type = "rtc";
121                                 compatible = "dallas,ds1339";
122                                 reg = <0x68>;
123                         };
124                 };
125
126                 i2c@3100 {
127                         #address-cells = <1>;
128                         #size-cells = <0>;
129                         cell-index = <1>;
130                         compatible = "fsl-i2c";
131                         reg = <0x3100 0x100>;
132                         interrupts = <15 0x8>;
133                         interrupt-parent = <&ipic>;
134                         dfsrr;
135                 };
136
137                 spi@7000 {
138                         cell-index = <0>;
139                         compatible = "fsl,spi";
140                         reg = <0x7000 0x1000>;
141                         interrupts = <16 0x8>;
142                         interrupt-parent = <&ipic>;
143                         mode = "cpu";
144                 };
145
146                 dma@82a8 {
147                         #address-cells = <1>;
148                         #size-cells = <1>;
149                         compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
150                         reg = <0x82a8 4>;
151                         ranges = <0 0x8100 0x1a8>;
152                         interrupt-parent = <&ipic>;
153                         interrupts = <71 8>;
154                         cell-index = <0>;
155                         dma-channel@0 {
156                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
157                                 reg = <0 0x80>;
158                                 interrupt-parent = <&ipic>;
159                                 interrupts = <71 8>;
160                         };
161                         dma-channel@80 {
162                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
163                                 reg = <0x80 0x80>;
164                                 interrupt-parent = <&ipic>;
165                                 interrupts = <71 8>;
166                         };
167                         dma-channel@100 {
168                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
169                                 reg = <0x100 0x80>;
170                                 interrupt-parent = <&ipic>;
171                                 interrupts = <71 8>;
172                         };
173                         dma-channel@180 {
174                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
175                                 reg = <0x180 0x28>;
176                                 interrupt-parent = <&ipic>;
177                                 interrupts = <71 8>;
178                         };
179                 };
180
181                 usb@23000 {
182                         compatible = "fsl-usb2-dr";
183                         reg = <0x23000 0x1000>;
184                         #address-cells = <1>;
185                         #size-cells = <0>;
186                         interrupt-parent = <&ipic>;
187                         interrupts = <38 0x8>;
188                         phy_type = "ulpi";
189                 };
190
191                 mdio@24520 {
192                         #address-cells = <1>;
193                         #size-cells = <0>;
194                         compatible = "fsl,gianfar-mdio";
195                         reg = <0x24520 0x20>;
196                         phy2: ethernet-phy@2 {
197                                 interrupt-parent = <&ipic>;
198                                 interrupts = <17 0x8>;
199                                 reg = <0x2>;
200                                 device_type = "ethernet-phy";
201                         };
202                 };
203
204                 enet0: ethernet@24000 {
205                         cell-index = <0>;
206                         device_type = "network";
207                         model = "eTSEC";
208                         compatible = "gianfar";
209                         reg = <0x24000 0x1000>;
210                         local-mac-address = [ 00 00 00 00 00 00 ];
211                         interrupts = <32 0x8 33 0x8 34 0x8>;
212                         phy-connection-type = "mii";
213                         interrupt-parent = <&ipic>;
214                         phy-handle = <&phy2>;
215                 };
216
217                 enet1: ethernet@25000 {
218                         cell-index = <1>;
219                         device_type = "network";
220                         model = "eTSEC";
221                         compatible = "gianfar";
222                         reg = <0x25000 0x1000>;
223                         local-mac-address = [ 00 00 00 00 00 00 ];
224                         interrupts = <35 0x8 36 0x8 37 0x8>;
225                         phy-connection-type = "mii";
226                         interrupt-parent = <&ipic>;
227                         fixed-link = <1 1 1000 0 0>;
228                 };
229
230                 serial0: serial@4500 {
231                         cell-index = <0>;
232                         device_type = "serial";
233                         compatible = "ns16550";
234                         reg = <0x4500 0x100>;
235                         clock-frequency = <0>;
236                         interrupts = <9 0x8>;
237                         interrupt-parent = <&ipic>;
238                 };
239
240                 serial1: serial@4600 {
241                         cell-index = <1>;
242                         device_type = "serial";
243                         compatible = "ns16550";
244                         reg = <0x4600 0x100>;
245                         clock-frequency = <0>;
246                         interrupts = <10 0x8>;
247                         interrupt-parent = <&ipic>;
248                 };
249
250                 crypto@30000 {
251                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
252                                      "fsl,sec2.1", "fsl,sec2.0";
253                         reg = <0x30000 0x10000>;
254                         interrupts = <11 0x8>;
255                         interrupt-parent = <&ipic>;
256                         fsl,num-channels = <4>;
257                         fsl,channel-fifo-len = <24>;
258                         fsl,exec-units-mask = <0x9fe>;
259                         fsl,descriptor-types-mask = <0x3ab0ebf>;
260                 };
261
262                 sata@18000 {
263                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
264                         reg = <0x18000 0x1000>;
265                         interrupts = <44 0x8>;
266                         interrupt-parent = <&ipic>;
267                 };
268
269                 sata@19000 {
270                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
271                         reg = <0x19000 0x1000>;
272                         interrupts = <45 0x8>;
273                         interrupt-parent = <&ipic>;
274                 };
275
276                 sata@1a000 {
277                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
278                         reg = <0x1a000 0x1000>;
279                         interrupts = <46 0x8>;
280                         interrupt-parent = <&ipic>;
281                 };
282
283                 sata@1b000 {
284                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
285                         reg = <0x1b000 0x1000>;
286                         interrupts = <47 0x8>;
287                         interrupt-parent = <&ipic>;
288                 };
289
290                 /* IPIC
291                  * interrupts cell = <intr #, sense>
292                  * sense values match linux IORESOURCE_IRQ_* defines:
293                  * sense == 8: Level, low assertion
294                  * sense == 2: Edge, high-to-low change
295                  */
296                 ipic: interrupt-controller@700 {
297                         compatible = "fsl,ipic";
298                         interrupt-controller;
299                         #address-cells = <0>;
300                         #interrupt-cells = <2>;
301                         reg = <0x700 0x100>;
302                 };
303         };
304
305         pci0: pci@e0008500 {
306                 interrupt-map-mask = <0xf800 0 0 7>;
307                 interrupt-map = <
308                                 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
309
310                                 /* IDSEL AD14 IRQ6 inta */
311                                  0x7000 0x0 0x0 0x1 &ipic 22 0x8
312
313                                 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
314                                  0x7800 0x0 0x0 0x1 &ipic 21 0x8
315                                  0x7800 0x0 0x0 0x2 &ipic 22 0x8
316                                  0x7800 0x0 0x0 0x4 &ipic 23 0x8
317
318                                 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
319                                  0xE000 0x0 0x0 0x1 &ipic 23 0x8
320                                  0xE000 0x0 0x0 0x2 &ipic 21 0x8
321                                  0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
322                 interrupt-parent = <&ipic>;
323                 interrupts = <66 0x8>;
324                 bus-range = <0x0 0x0>;
325                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
326                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
327                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
328                 clock-frequency = <66666666>;
329                 #interrupt-cells = <1>;
330                 #size-cells = <2>;
331                 #address-cells = <3>;
332                 reg = <0xe0008500 0x100>;
333                 compatible = "fsl,mpc8349-pci";
334                 device_type = "pci";
335         };
336 };