Merge branch 'upstream'
[linux-2.6] / drivers / ide / ide-iops.c
1 /*
2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
3  *
4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
6  *
7  */
8
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/string.h>
13 #include <linux/kernel.h>
14 #include <linux/timer.h>
15 #include <linux/mm.h>
16 #include <linux/interrupt.h>
17 #include <linux/major.h>
18 #include <linux/errno.h>
19 #include <linux/genhd.h>
20 #include <linux/blkpg.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/delay.h>
24 #include <linux/hdreg.h>
25 #include <linux/ide.h>
26 #include <linux/bitops.h>
27
28 #include <asm/byteorder.h>
29 #include <asm/irq.h>
30 #include <asm/uaccess.h>
31 #include <asm/io.h>
32
33 /*
34  *      Conventional PIO operations for ATA devices
35  */
36
37 static u8 ide_inb (unsigned long port)
38 {
39         return (u8) inb(port);
40 }
41
42 static u16 ide_inw (unsigned long port)
43 {
44         return (u16) inw(port);
45 }
46
47 static void ide_insw (unsigned long port, void *addr, u32 count)
48 {
49         insw(port, addr, count);
50 }
51
52 static u32 ide_inl (unsigned long port)
53 {
54         return (u32) inl(port);
55 }
56
57 static void ide_insl (unsigned long port, void *addr, u32 count)
58 {
59         insl(port, addr, count);
60 }
61
62 static void ide_outb (u8 val, unsigned long port)
63 {
64         outb(val, port);
65 }
66
67 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
68 {
69         outb(addr, port);
70 }
71
72 static void ide_outw (u16 val, unsigned long port)
73 {
74         outw(val, port);
75 }
76
77 static void ide_outsw (unsigned long port, void *addr, u32 count)
78 {
79         outsw(port, addr, count);
80 }
81
82 static void ide_outl (u32 val, unsigned long port)
83 {
84         outl(val, port);
85 }
86
87 static void ide_outsl (unsigned long port, void *addr, u32 count)
88 {
89         outsl(port, addr, count);
90 }
91
92 void default_hwif_iops (ide_hwif_t *hwif)
93 {
94         hwif->OUTB      = ide_outb;
95         hwif->OUTBSYNC  = ide_outbsync;
96         hwif->OUTW      = ide_outw;
97         hwif->OUTL      = ide_outl;
98         hwif->OUTSW     = ide_outsw;
99         hwif->OUTSL     = ide_outsl;
100         hwif->INB       = ide_inb;
101         hwif->INW       = ide_inw;
102         hwif->INL       = ide_inl;
103         hwif->INSW      = ide_insw;
104         hwif->INSL      = ide_insl;
105 }
106
107 /*
108  *      MMIO operations, typically used for SATA controllers
109  */
110
111 static u8 ide_mm_inb (unsigned long port)
112 {
113         return (u8) readb((void __iomem *) port);
114 }
115
116 static u16 ide_mm_inw (unsigned long port)
117 {
118         return (u16) readw((void __iomem *) port);
119 }
120
121 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
122 {
123         __ide_mm_insw((void __iomem *) port, addr, count);
124 }
125
126 static u32 ide_mm_inl (unsigned long port)
127 {
128         return (u32) readl((void __iomem *) port);
129 }
130
131 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
132 {
133         __ide_mm_insl((void __iomem *) port, addr, count);
134 }
135
136 static void ide_mm_outb (u8 value, unsigned long port)
137 {
138         writeb(value, (void __iomem *) port);
139 }
140
141 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
142 {
143         writeb(value, (void __iomem *) port);
144 }
145
146 static void ide_mm_outw (u16 value, unsigned long port)
147 {
148         writew(value, (void __iomem *) port);
149 }
150
151 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
152 {
153         __ide_mm_outsw((void __iomem *) port, addr, count);
154 }
155
156 static void ide_mm_outl (u32 value, unsigned long port)
157 {
158         writel(value, (void __iomem *) port);
159 }
160
161 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
162 {
163         __ide_mm_outsl((void __iomem *) port, addr, count);
164 }
165
166 void default_hwif_mmiops (ide_hwif_t *hwif)
167 {
168         hwif->OUTB      = ide_mm_outb;
169         /* Most systems will need to override OUTBSYNC, alas however
170            this one is controller specific! */
171         hwif->OUTBSYNC  = ide_mm_outbsync;
172         hwif->OUTW      = ide_mm_outw;
173         hwif->OUTL      = ide_mm_outl;
174         hwif->OUTSW     = ide_mm_outsw;
175         hwif->OUTSL     = ide_mm_outsl;
176         hwif->INB       = ide_mm_inb;
177         hwif->INW       = ide_mm_inw;
178         hwif->INL       = ide_mm_inl;
179         hwif->INSW      = ide_mm_insw;
180         hwif->INSL      = ide_mm_insl;
181 }
182
183 EXPORT_SYMBOL(default_hwif_mmiops);
184
185 u32 ide_read_24 (ide_drive_t *drive)
186 {
187         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
188         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
189         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
190         return (hcyl<<16)|(lcyl<<8)|sect;
191 }
192
193 void SELECT_DRIVE (ide_drive_t *drive)
194 {
195         if (HWIF(drive)->selectproc)
196                 HWIF(drive)->selectproc(drive);
197         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
198 }
199
200 EXPORT_SYMBOL(SELECT_DRIVE);
201
202 void SELECT_INTERRUPT (ide_drive_t *drive)
203 {
204         if (HWIF(drive)->intrproc)
205                 HWIF(drive)->intrproc(drive);
206         else
207                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
208 }
209
210 void SELECT_MASK (ide_drive_t *drive, int mask)
211 {
212         if (HWIF(drive)->maskproc)
213                 HWIF(drive)->maskproc(drive, mask);
214 }
215
216 void QUIRK_LIST (ide_drive_t *drive)
217 {
218         if (HWIF(drive)->quirkproc)
219                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
220 }
221
222 /*
223  * Some localbus EIDE interfaces require a special access sequence
224  * when using 32-bit I/O instructions to transfer data.  We call this
225  * the "vlb_sync" sequence, which consists of three successive reads
226  * of the sector count register location, with interrupts disabled
227  * to ensure that the reads all happen together.
228  */
229 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
230 {
231         (void) HWIF(drive)->INB(port);
232         (void) HWIF(drive)->INB(port);
233         (void) HWIF(drive)->INB(port);
234 }
235
236 /*
237  * This is used for most PIO data transfers *from* the IDE interface
238  */
239 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
240 {
241         ide_hwif_t *hwif        = HWIF(drive);
242         u8 io_32bit             = drive->io_32bit;
243
244         if (io_32bit) {
245                 if (io_32bit & 2) {
246                         unsigned long flags;
247                         local_irq_save(flags);
248                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
249                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
250                         local_irq_restore(flags);
251                 } else
252                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
253         } else {
254                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
255         }
256 }
257
258 /*
259  * This is used for most PIO data transfers *to* the IDE interface
260  */
261 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
262 {
263         ide_hwif_t *hwif        = HWIF(drive);
264         u8 io_32bit             = drive->io_32bit;
265
266         if (io_32bit) {
267                 if (io_32bit & 2) {
268                         unsigned long flags;
269                         local_irq_save(flags);
270                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
271                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
272                         local_irq_restore(flags);
273                 } else
274                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
275         } else {
276                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
277         }
278 }
279
280 /*
281  * The following routines are mainly used by the ATAPI drivers.
282  *
283  * These routines will round up any request for an odd number of bytes,
284  * so if an odd bytecount is specified, be sure that there's at least one
285  * extra byte allocated for the buffer.
286  */
287
288 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
289 {
290         ide_hwif_t *hwif = HWIF(drive);
291
292         ++bytecount;
293 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
294         if (MACH_IS_ATARI || MACH_IS_Q40) {
295                 /* Atari has a byte-swapped IDE interface */
296                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
297                 return;
298         }
299 #endif /* CONFIG_ATARI || CONFIG_Q40 */
300         hwif->ata_input_data(drive, buffer, bytecount / 4);
301         if ((bytecount & 0x03) >= 2)
302                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
303 }
304
305 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
306 {
307         ide_hwif_t *hwif = HWIF(drive);
308
309         ++bytecount;
310 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
311         if (MACH_IS_ATARI || MACH_IS_Q40) {
312                 /* Atari has a byte-swapped IDE interface */
313                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
314                 return;
315         }
316 #endif /* CONFIG_ATARI || CONFIG_Q40 */
317         hwif->ata_output_data(drive, buffer, bytecount / 4);
318         if ((bytecount & 0x03) >= 2)
319                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
320 }
321
322 void default_hwif_transport(ide_hwif_t *hwif)
323 {
324         hwif->ata_input_data            = ata_input_data;
325         hwif->ata_output_data           = ata_output_data;
326         hwif->atapi_input_bytes         = atapi_input_bytes;
327         hwif->atapi_output_bytes        = atapi_output_bytes;
328 }
329
330 /*
331  * Beginning of Taskfile OPCODE Library and feature sets.
332  */
333 void ide_fix_driveid (struct hd_driveid *id)
334 {
335 #ifndef __LITTLE_ENDIAN
336 # ifdef __BIG_ENDIAN
337         int i;
338         u16 *stringcast;
339
340         id->config         = __le16_to_cpu(id->config);
341         id->cyls           = __le16_to_cpu(id->cyls);
342         id->reserved2      = __le16_to_cpu(id->reserved2);
343         id->heads          = __le16_to_cpu(id->heads);
344         id->track_bytes    = __le16_to_cpu(id->track_bytes);
345         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
346         id->sectors        = __le16_to_cpu(id->sectors);
347         id->vendor0        = __le16_to_cpu(id->vendor0);
348         id->vendor1        = __le16_to_cpu(id->vendor1);
349         id->vendor2        = __le16_to_cpu(id->vendor2);
350         stringcast = (u16 *)&id->serial_no[0];
351         for (i = 0; i < (20/2); i++)
352                 stringcast[i] = __le16_to_cpu(stringcast[i]);
353         id->buf_type       = __le16_to_cpu(id->buf_type);
354         id->buf_size       = __le16_to_cpu(id->buf_size);
355         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
356         stringcast = (u16 *)&id->fw_rev[0];
357         for (i = 0; i < (8/2); i++)
358                 stringcast[i] = __le16_to_cpu(stringcast[i]);
359         stringcast = (u16 *)&id->model[0];
360         for (i = 0; i < (40/2); i++)
361                 stringcast[i] = __le16_to_cpu(stringcast[i]);
362         id->dword_io       = __le16_to_cpu(id->dword_io);
363         id->reserved50     = __le16_to_cpu(id->reserved50);
364         id->field_valid    = __le16_to_cpu(id->field_valid);
365         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
366         id->cur_heads      = __le16_to_cpu(id->cur_heads);
367         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
368         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
369         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
370         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
371         id->dma_1word      = __le16_to_cpu(id->dma_1word);
372         id->dma_mword      = __le16_to_cpu(id->dma_mword);
373         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
374         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
375         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
376         id->eide_pio       = __le16_to_cpu(id->eide_pio);
377         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
378         for (i = 0; i < 2; ++i)
379                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
380         for (i = 0; i < 4; ++i)
381                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
382         id->queue_depth    = __le16_to_cpu(id->queue_depth);
383         for (i = 0; i < 4; ++i)
384                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
385         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
386         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
387         id->command_set_1  = __le16_to_cpu(id->command_set_1);
388         id->command_set_2  = __le16_to_cpu(id->command_set_2);
389         id->cfsse          = __le16_to_cpu(id->cfsse);
390         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
391         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
392         id->csf_default    = __le16_to_cpu(id->csf_default);
393         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
394         id->trseuc         = __le16_to_cpu(id->trseuc);
395         id->trsEuc         = __le16_to_cpu(id->trsEuc);
396         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
397         id->mprc           = __le16_to_cpu(id->mprc);
398         id->hw_config      = __le16_to_cpu(id->hw_config);
399         id->acoustic       = __le16_to_cpu(id->acoustic);
400         id->msrqs          = __le16_to_cpu(id->msrqs);
401         id->sxfert         = __le16_to_cpu(id->sxfert);
402         id->sal            = __le16_to_cpu(id->sal);
403         id->spg            = __le32_to_cpu(id->spg);
404         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
405         for (i = 0; i < 22; i++)
406                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
407         id->last_lun       = __le16_to_cpu(id->last_lun);
408         id->word127        = __le16_to_cpu(id->word127);
409         id->dlf            = __le16_to_cpu(id->dlf);
410         id->csfo           = __le16_to_cpu(id->csfo);
411         for (i = 0; i < 26; i++)
412                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
413         id->word156        = __le16_to_cpu(id->word156);
414         for (i = 0; i < 3; i++)
415                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
416         id->cfa_power      = __le16_to_cpu(id->cfa_power);
417         for (i = 0; i < 14; i++)
418                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
419         for (i = 0; i < 31; i++)
420                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
421         for (i = 0; i < 48; i++)
422                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
423         id->integrity_word  = __le16_to_cpu(id->integrity_word);
424 # else
425 #  error "Please fix <asm/byteorder.h>"
426 # endif
427 #endif
428 }
429
430 /* FIXME: exported for use by the USB storage (isd200.c) code only */
431 EXPORT_SYMBOL(ide_fix_driveid);
432
433 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
434 {
435         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
436
437         if (byteswap) {
438                 /* convert from big-endian to host byte order */
439                 for (p = end ; p != s;) {
440                         unsigned short *pp = (unsigned short *) (p -= 2);
441                         *pp = ntohs(*pp);
442                 }
443         }
444         /* strip leading blanks */
445         while (s != end && *s == ' ')
446                 ++s;
447         /* compress internal blanks and strip trailing blanks */
448         while (s != end && *s) {
449                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
450                         *p++ = *(s-1);
451         }
452         /* wipe out trailing garbage */
453         while (p != end)
454                 *p++ = '\0';
455 }
456
457 EXPORT_SYMBOL(ide_fixstring);
458
459 /*
460  * Needed for PCI irq sharing
461  */
462 int drive_is_ready (ide_drive_t *drive)
463 {
464         ide_hwif_t *hwif        = HWIF(drive);
465         u8 stat                 = 0;
466
467         if (drive->waiting_for_dma)
468                 return hwif->ide_dma_test_irq(drive);
469
470 #if 0
471         /* need to guarantee 400ns since last command was issued */
472         udelay(1);
473 #endif
474
475 #ifdef CONFIG_IDEPCI_SHARE_IRQ
476         /*
477          * We do a passive status test under shared PCI interrupts on
478          * cards that truly share the ATA side interrupt, but may also share
479          * an interrupt with another pci card/device.  We make no assumptions
480          * about possible isa-pnp and pci-pnp issues yet.
481          */
482         if (IDE_CONTROL_REG)
483                 stat = hwif->INB(IDE_ALTSTATUS_REG);
484         else
485 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
486                 /* Note: this may clear a pending IRQ!! */
487                 stat = hwif->INB(IDE_STATUS_REG);
488
489         if (stat & BUSY_STAT)
490                 /* drive busy:  definitely not interrupting */
491                 return 0;
492
493         /* drive ready: *might* be interrupting */
494         return 1;
495 }
496
497 EXPORT_SYMBOL(drive_is_ready);
498
499 /*
500  * Global for All, and taken from ide-pmac.c. Can be called
501  * with spinlock held & IRQs disabled, so don't schedule !
502  */
503 int wait_for_ready (ide_drive_t *drive, int timeout)
504 {
505         ide_hwif_t *hwif        = HWIF(drive);
506         u8 stat                 = 0;
507
508         while(--timeout) {
509                 stat = hwif->INB(IDE_STATUS_REG);
510                 if (!(stat & BUSY_STAT)) {
511                         if (drive->ready_stat == 0)
512                                 break;
513                         else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
514                                 break;
515                 }
516                 mdelay(1);
517         }
518         if ((stat & ERR_STAT) || timeout <= 0) {
519                 if (stat & ERR_STAT) {
520                         printk(KERN_ERR "%s: wait_for_ready, "
521                                 "error status: %x\n", drive->name, stat);
522                 }
523                 return 1;
524         }
525         return 0;
526 }
527
528 /*
529  * This routine busy-waits for the drive status to be not "busy".
530  * It then checks the status for all of the "good" bits and none
531  * of the "bad" bits, and if all is okay it returns 0.  All other
532  * cases return 1 after invoking ide_error() -- caller should just return.
533  *
534  * This routine should get fixed to not hog the cpu during extra long waits..
535  * That could be done by busy-waiting for the first jiffy or two, and then
536  * setting a timer to wake up at half second intervals thereafter,
537  * until timeout is achieved, before timing out.
538  */
539 int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
540 {
541         ide_hwif_t *hwif = HWIF(drive);
542         u8 stat;
543         int i;
544         unsigned long flags;
545  
546         /* bail early if we've exceeded max_failures */
547         if (drive->max_failures && (drive->failures > drive->max_failures)) {
548                 *startstop = ide_stopped;
549                 return 1;
550         }
551
552         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
553         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
554                 local_irq_set(flags);
555                 timeout += jiffies;
556                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
557                         if (time_after(jiffies, timeout)) {
558                                 /*
559                                  * One last read after the timeout in case
560                                  * heavy interrupt load made us not make any
561                                  * progress during the timeout..
562                                  */
563                                 stat = hwif->INB(IDE_STATUS_REG);
564                                 if (!(stat & BUSY_STAT))
565                                         break;
566
567                                 local_irq_restore(flags);
568                                 *startstop = ide_error(drive, "status timeout", stat);
569                                 return 1;
570                         }
571                 }
572                 local_irq_restore(flags);
573         }
574         /*
575          * Allow status to settle, then read it again.
576          * A few rare drives vastly violate the 400ns spec here,
577          * so we'll wait up to 10usec for a "good" status
578          * rather than expensively fail things immediately.
579          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
580          */
581         for (i = 0; i < 10; i++) {
582                 udelay(1);
583                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
584                         return 0;
585         }
586         *startstop = ide_error(drive, "status error", stat);
587         return 1;
588 }
589
590 EXPORT_SYMBOL(ide_wait_stat);
591
592 /*
593  *  All hosts that use the 80c ribbon must use!
594  *  The name is derived from upper byte of word 93 and the 80c ribbon.
595  */
596 u8 eighty_ninty_three (ide_drive_t *drive)
597 {
598         if(HWIF(drive)->udma_four == 0)
599                 return 0;
600         if (!(drive->id->hw_config & 0x6000))
601                 return 0;
602 #ifndef CONFIG_IDEDMA_IVB
603         if(!(drive->id->hw_config & 0x4000))
604                 return 0;
605 #endif /* CONFIG_IDEDMA_IVB */
606         return 1;
607 }
608
609 EXPORT_SYMBOL(eighty_ninty_three);
610
611 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
612 {
613         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
614             (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
615             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
616 #ifndef CONFIG_IDEDMA_IVB
617                 if ((drive->id->hw_config & 0x6000) == 0) {
618 #else /* !CONFIG_IDEDMA_IVB */
619                 if (((drive->id->hw_config & 0x2000) == 0) ||
620                     ((drive->id->hw_config & 0x4000) == 0)) {
621 #endif /* CONFIG_IDEDMA_IVB */
622                         printk("%s: Speed warnings UDMA 3/4/5 is not "
623                                 "functional.\n", drive->name);
624                         return 1;
625                 }
626                 if (!HWIF(drive)->udma_four) {
627                         printk("%s: Speed warnings UDMA 3/4/5 is not "
628                                 "functional.\n",
629                                 HWIF(drive)->name);
630                         return 1;
631                 }
632         }
633         return 0;
634 }
635
636 /*
637  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
638  * 1 : Safe to update drive->id DMA registers.
639  * 0 : OOPs not allowed.
640  */
641 int set_transfer (ide_drive_t *drive, ide_task_t *args)
642 {
643         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
644             (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
645             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
646             (drive->id->dma_ultra ||
647              drive->id->dma_mword ||
648              drive->id->dma_1word))
649                 return 1;
650
651         return 0;
652 }
653
654 #ifdef CONFIG_BLK_DEV_IDEDMA
655 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
656 {
657         if (!drive->crc_count)
658                 return drive->current_speed;
659         drive->crc_count = 0;
660
661         switch(drive->current_speed) {
662                 case XFER_UDMA_7:       return XFER_UDMA_6;
663                 case XFER_UDMA_6:       return XFER_UDMA_5;
664                 case XFER_UDMA_5:       return XFER_UDMA_4;
665                 case XFER_UDMA_4:       return XFER_UDMA_3;
666                 case XFER_UDMA_3:       return XFER_UDMA_2;
667                 case XFER_UDMA_2:       return XFER_UDMA_1;
668                 case XFER_UDMA_1:       return XFER_UDMA_0;
669                         /*
670                          * OOPS we do not goto non Ultra DMA modes
671                          * without iCRC's available we force
672                          * the system to PIO and make the user
673                          * invoke the ATA-1 ATA-2 DMA modes.
674                          */
675                 case XFER_UDMA_0:
676                 default:                return XFER_PIO_4;
677         }
678 }
679 #endif /* CONFIG_BLK_DEV_IDEDMA */
680
681 /*
682  * Update the 
683  */
684 int ide_driveid_update (ide_drive_t *drive)
685 {
686         ide_hwif_t *hwif        = HWIF(drive);
687         struct hd_driveid *id;
688 #if 0
689         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
690         if (!id)
691                 return 0;
692
693         taskfile_lib_get_identify(drive, (char *)&id);
694
695         ide_fix_driveid(id);
696         if (id) {
697                 drive->id->dma_ultra = id->dma_ultra;
698                 drive->id->dma_mword = id->dma_mword;
699                 drive->id->dma_1word = id->dma_1word;
700                 /* anything more ? */
701                 kfree(id);
702         }
703         return 1;
704 #else
705         /*
706          * Re-read drive->id for possible DMA mode
707          * change (copied from ide-probe.c)
708          */
709         unsigned long timeout, flags;
710
711         SELECT_MASK(drive, 1);
712         if (IDE_CONTROL_REG)
713                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
714         msleep(50);
715         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
716         timeout = jiffies + WAIT_WORSTCASE;
717         do {
718                 if (time_after(jiffies, timeout)) {
719                         SELECT_MASK(drive, 0);
720                         return 0;       /* drive timed-out */
721                 }
722                 msleep(50);     /* give drive a breather */
723         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
724         msleep(50);     /* wait for IRQ and DRQ_STAT */
725         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
726                 SELECT_MASK(drive, 0);
727                 printk("%s: CHECK for good STATUS\n", drive->name);
728                 return 0;
729         }
730         local_irq_save(flags);
731         SELECT_MASK(drive, 0);
732         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
733         if (!id) {
734                 local_irq_restore(flags);
735                 return 0;
736         }
737         ata_input_data(drive, id, SECTOR_WORDS);
738         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
739         local_irq_enable();
740         local_irq_restore(flags);
741         ide_fix_driveid(id);
742         if (id) {
743                 drive->id->dma_ultra = id->dma_ultra;
744                 drive->id->dma_mword = id->dma_mword;
745                 drive->id->dma_1word = id->dma_1word;
746                 /* anything more ? */
747                 kfree(id);
748         }
749
750         return 1;
751 #endif
752 }
753
754 /*
755  * Similar to ide_wait_stat(), except it never calls ide_error internally.
756  * This is a kludge to handle the new ide_config_drive_speed() function,
757  * and should not otherwise be used anywhere.  Eventually, the tuneproc's
758  * should be updated to return ide_startstop_t, in which case we can get
759  * rid of this abomination again.  :)   -ml
760  *
761  * It is gone..........
762  *
763  * const char *msg == consider adding for verbose errors.
764  */
765 int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
766 {
767         ide_hwif_t *hwif        = HWIF(drive);
768         int     i, error        = 1;
769         u8 stat;
770
771 //      while (HWGROUP(drive)->busy)
772 //              msleep(50);
773
774 #ifdef CONFIG_BLK_DEV_IDEDMA
775         if (hwif->ide_dma_check)         /* check if host supports DMA */
776                 hwif->ide_dma_host_off(drive);
777 #endif
778
779         /*
780          * Don't use ide_wait_cmd here - it will
781          * attempt to set_geometry and recalibrate,
782          * but for some reason these don't work at
783          * this point (lost interrupt).
784          */
785         /*
786          * Select the drive, and issue the SETFEATURES command
787          */
788         disable_irq_nosync(hwif->irq);
789         
790         /*
791          *      FIXME: we race against the running IRQ here if
792          *      this is called from non IRQ context. If we use
793          *      disable_irq() we hang on the error path. Work
794          *      is needed.
795          */
796          
797         udelay(1);
798         SELECT_DRIVE(drive);
799         SELECT_MASK(drive, 0);
800         udelay(1);
801         if (IDE_CONTROL_REG)
802                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
803         hwif->OUTB(speed, IDE_NSECTOR_REG);
804         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
805         hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
806         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
807                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
808         udelay(1);
809         /*
810          * Wait for drive to become non-BUSY
811          */
812         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
813                 unsigned long flags, timeout;
814                 local_irq_set(flags);
815                 timeout = jiffies + WAIT_CMD;
816                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
817                         if (time_after(jiffies, timeout))
818                                 break;
819                 }
820                 local_irq_restore(flags);
821         }
822
823         /*
824          * Allow status to settle, then read it again.
825          * A few rare drives vastly violate the 400ns spec here,
826          * so we'll wait up to 10usec for a "good" status
827          * rather than expensively fail things immediately.
828          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
829          */
830         for (i = 0; i < 10; i++) {
831                 udelay(1);
832                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
833                         error = 0;
834                         break;
835                 }
836         }
837
838         SELECT_MASK(drive, 0);
839
840         enable_irq(hwif->irq);
841
842         if (error) {
843                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
844                 return error;
845         }
846
847         drive->id->dma_ultra &= ~0xFF00;
848         drive->id->dma_mword &= ~0x0F00;
849         drive->id->dma_1word &= ~0x0F00;
850
851 #ifdef CONFIG_BLK_DEV_IDEDMA
852         if (speed >= XFER_SW_DMA_0)
853                 hwif->ide_dma_host_on(drive);
854         else if (hwif->ide_dma_check)   /* check if host supports DMA */
855                 hwif->ide_dma_off_quietly(drive);
856 #endif
857
858         switch(speed) {
859                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
860                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
861                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
862                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
863                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
864                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
865                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
866                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
867                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
868                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
869                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
870                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
871                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
872                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
873                 default: break;
874         }
875         if (!drive->init_speed)
876                 drive->init_speed = speed;
877         drive->current_speed = speed;
878         return error;
879 }
880
881 EXPORT_SYMBOL(ide_config_drive_speed);
882
883
884 /*
885  * This should get invoked any time we exit the driver to
886  * wait for an interrupt response from a drive.  handler() points
887  * at the appropriate code to handle the next interrupt, and a
888  * timer is started to prevent us from waiting forever in case
889  * something goes wrong (see the ide_timer_expiry() handler later on).
890  *
891  * See also ide_execute_command
892  */
893 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
894                       unsigned int timeout, ide_expiry_t *expiry)
895 {
896         ide_hwgroup_t *hwgroup = HWGROUP(drive);
897
898         if (hwgroup->handler != NULL) {
899                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
900                         "old=%p, new=%p\n",
901                         drive->name, hwgroup->handler, handler);
902         }
903         hwgroup->handler        = handler;
904         hwgroup->expiry         = expiry;
905         hwgroup->timer.expires  = jiffies + timeout;
906         add_timer(&hwgroup->timer);
907 }
908
909 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
910                       unsigned int timeout, ide_expiry_t *expiry)
911 {
912         unsigned long flags;
913         spin_lock_irqsave(&ide_lock, flags);
914         __ide_set_handler(drive, handler, timeout, expiry);
915         spin_unlock_irqrestore(&ide_lock, flags);
916 }
917
918 EXPORT_SYMBOL(ide_set_handler);
919  
920 /**
921  *      ide_execute_command     -       execute an IDE command
922  *      @drive: IDE drive to issue the command against
923  *      @command: command byte to write
924  *      @handler: handler for next phase
925  *      @timeout: timeout for command
926  *      @expiry:  handler to run on timeout
927  *
928  *      Helper function to issue an IDE command. This handles the
929  *      atomicity requirements, command timing and ensures that the 
930  *      handler and IRQ setup do not race. All IDE command kick off
931  *      should go via this function or do equivalent locking.
932  */
933  
934 void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
935 {
936         unsigned long flags;
937         ide_hwgroup_t *hwgroup = HWGROUP(drive);
938         ide_hwif_t *hwif = HWIF(drive);
939         
940         spin_lock_irqsave(&ide_lock, flags);
941         
942         if(hwgroup->handler)
943                 BUG();
944         hwgroup->handler        = handler;
945         hwgroup->expiry         = expiry;
946         hwgroup->timer.expires  = jiffies + timeout;
947         add_timer(&hwgroup->timer);
948         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
949         /* Drive takes 400nS to respond, we must avoid the IRQ being
950            serviced before that. 
951            
952            FIXME: we could skip this delay with care on non shared
953            devices 
954         */
955         ndelay(400);
956         spin_unlock_irqrestore(&ide_lock, flags);
957 }
958
959 EXPORT_SYMBOL(ide_execute_command);
960
961
962 /* needed below */
963 static ide_startstop_t do_reset1 (ide_drive_t *, int);
964
965 /*
966  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
967  * during an atapi drive reset operation. If the drive has not yet responded,
968  * and we have not yet hit our maximum waiting time, then the timer is restarted
969  * for another 50ms.
970  */
971 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
972 {
973         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
974         ide_hwif_t *hwif        = HWIF(drive);
975         u8 stat;
976
977         SELECT_DRIVE(drive);
978         udelay (10);
979
980         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
981                 printk("%s: ATAPI reset complete\n", drive->name);
982         } else {
983                 if (time_before(jiffies, hwgroup->poll_timeout)) {
984                         if (HWGROUP(drive)->handler != NULL)
985                                 BUG();
986                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
987                         /* continue polling */
988                         return ide_started;
989                 }
990                 /* end of polling */
991                 hwgroup->polling = 0;
992                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
993                                 drive->name, stat);
994                 /* do it the old fashioned way */
995                 return do_reset1(drive, 1);
996         }
997         /* done polling */
998         hwgroup->polling = 0;
999         return ide_stopped;
1000 }
1001
1002 /*
1003  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1004  * during an ide reset operation. If the drives have not yet responded,
1005  * and we have not yet hit our maximum waiting time, then the timer is restarted
1006  * for another 50ms.
1007  */
1008 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1009 {
1010         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1011         ide_hwif_t *hwif        = HWIF(drive);
1012         u8 tmp;
1013
1014         if (hwif->reset_poll != NULL) {
1015                 if (hwif->reset_poll(drive)) {
1016                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1017                                 hwif->name, drive->name);
1018                         return ide_stopped;
1019                 }
1020         }
1021
1022         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1023                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1024                         if (HWGROUP(drive)->handler != NULL)
1025                                 BUG();
1026                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1027                         /* continue polling */
1028                         return ide_started;
1029                 }
1030                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1031                 drive->failures++;
1032         } else  {
1033                 printk("%s: reset: ", hwif->name);
1034                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1035                         printk("success\n");
1036                         drive->failures = 0;
1037                 } else {
1038                         drive->failures++;
1039                         printk("master: ");
1040                         switch (tmp & 0x7f) {
1041                                 case 1: printk("passed");
1042                                         break;
1043                                 case 2: printk("formatter device error");
1044                                         break;
1045                                 case 3: printk("sector buffer error");
1046                                         break;
1047                                 case 4: printk("ECC circuitry error");
1048                                         break;
1049                                 case 5: printk("controlling MPU error");
1050                                         break;
1051                                 default:printk("error (0x%02x?)", tmp);
1052                         }
1053                         if (tmp & 0x80)
1054                                 printk("; slave: failed");
1055                         printk("\n");
1056                 }
1057         }
1058         hwgroup->polling = 0;   /* done polling */
1059         return ide_stopped;
1060 }
1061
1062 static void check_dma_crc(ide_drive_t *drive)
1063 {
1064 #ifdef CONFIG_BLK_DEV_IDEDMA
1065         if (drive->crc_count) {
1066                 (void) HWIF(drive)->ide_dma_off_quietly(drive);
1067                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1068                 if (drive->current_speed >= XFER_SW_DMA_0)
1069                         (void) HWIF(drive)->ide_dma_on(drive);
1070         } else
1071                 (void)__ide_dma_off(drive);
1072 #endif
1073 }
1074
1075 static void ide_disk_pre_reset(ide_drive_t *drive)
1076 {
1077         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1078
1079         drive->special.all = 0;
1080         drive->special.b.set_geometry = legacy;
1081         drive->special.b.recalibrate  = legacy;
1082         if (OK_TO_RESET_CONTROLLER)
1083                 drive->mult_count = 0;
1084         if (!drive->keep_settings && !drive->using_dma)
1085                 drive->mult_req = 0;
1086         if (drive->mult_req != drive->mult_count)
1087                 drive->special.b.set_multmode = 1;
1088 }
1089
1090 static void pre_reset(ide_drive_t *drive)
1091 {
1092         if (drive->media == ide_disk)
1093                 ide_disk_pre_reset(drive);
1094         else
1095                 drive->post_reset = 1;
1096
1097         if (!drive->keep_settings) {
1098                 if (drive->using_dma) {
1099                         check_dma_crc(drive);
1100                 } else {
1101                         drive->unmask = 0;
1102                         drive->io_32bit = 0;
1103                 }
1104                 return;
1105         }
1106         if (drive->using_dma)
1107                 check_dma_crc(drive);
1108
1109         if (HWIF(drive)->pre_reset != NULL)
1110                 HWIF(drive)->pre_reset(drive);
1111
1112 }
1113
1114 /*
1115  * do_reset1() attempts to recover a confused drive by resetting it.
1116  * Unfortunately, resetting a disk drive actually resets all devices on
1117  * the same interface, so it can really be thought of as resetting the
1118  * interface rather than resetting the drive.
1119  *
1120  * ATAPI devices have their own reset mechanism which allows them to be
1121  * individually reset without clobbering other devices on the same interface.
1122  *
1123  * Unfortunately, the IDE interface does not generate an interrupt to let
1124  * us know when the reset operation has finished, so we must poll for this.
1125  * Equally poor, though, is the fact that this may a very long time to complete,
1126  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1127  * we set a timer to poll at 50ms intervals.
1128  */
1129 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1130 {
1131         unsigned int unit;
1132         unsigned long flags;
1133         ide_hwif_t *hwif;
1134         ide_hwgroup_t *hwgroup;
1135         
1136         spin_lock_irqsave(&ide_lock, flags);
1137         hwif = HWIF(drive);
1138         hwgroup = HWGROUP(drive);
1139
1140         /* We must not reset with running handlers */
1141         if(hwgroup->handler != NULL)
1142                 BUG();
1143
1144         /* For an ATAPI device, first try an ATAPI SRST. */
1145         if (drive->media != ide_disk && !do_not_try_atapi) {
1146                 pre_reset(drive);
1147                 SELECT_DRIVE(drive);
1148                 udelay (20);
1149                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1150                 ndelay(400);
1151                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1152                 hwgroup->polling = 1;
1153                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1154                 spin_unlock_irqrestore(&ide_lock, flags);
1155                 return ide_started;
1156         }
1157
1158         /*
1159          * First, reset any device state data we were maintaining
1160          * for any of the drives on this interface.
1161          */
1162         for (unit = 0; unit < MAX_DRIVES; ++unit)
1163                 pre_reset(&hwif->drives[unit]);
1164
1165 #if OK_TO_RESET_CONTROLLER
1166         if (!IDE_CONTROL_REG) {
1167                 spin_unlock_irqrestore(&ide_lock, flags);
1168                 return ide_stopped;
1169         }
1170
1171         /*
1172          * Note that we also set nIEN while resetting the device,
1173          * to mask unwanted interrupts from the interface during the reset.
1174          * However, due to the design of PC hardware, this will cause an
1175          * immediate interrupt due to the edge transition it produces.
1176          * This single interrupt gives us a "fast poll" for drives that
1177          * recover from reset very quickly, saving us the first 50ms wait time.
1178          */
1179         /* set SRST and nIEN */
1180         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1181         /* more than enough time */
1182         udelay(10);
1183         if (drive->quirk_list == 2) {
1184                 /* clear SRST and nIEN */
1185                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1186         } else {
1187                 /* clear SRST, leave nIEN */
1188                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1189         }
1190         /* more than enough time */
1191         udelay(10);
1192         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1193         hwgroup->polling = 1;
1194         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1195
1196         /*
1197          * Some weird controller like resetting themselves to a strange
1198          * state when the disks are reset this way. At least, the Winbond
1199          * 553 documentation says that
1200          */
1201         if (hwif->resetproc != NULL) {
1202                 hwif->resetproc(drive);
1203         }
1204         
1205 #endif  /* OK_TO_RESET_CONTROLLER */
1206
1207         spin_unlock_irqrestore(&ide_lock, flags);
1208         return ide_started;
1209 }
1210
1211 /*
1212  * ide_do_reset() is the entry point to the drive/interface reset code.
1213  */
1214
1215 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1216 {
1217         return do_reset1(drive, 0);
1218 }
1219
1220 EXPORT_SYMBOL(ide_do_reset);
1221
1222 /*
1223  * ide_wait_not_busy() waits for the currently selected device on the hwif
1224  * to report a non-busy status, see comments in probe_hwif().
1225  */
1226 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1227 {
1228         u8 stat = 0;
1229
1230         while(timeout--) {
1231                 /*
1232                  * Turn this into a schedule() sleep once I'm sure
1233                  * about locking issues (2.5 work ?).
1234                  */
1235                 mdelay(1);
1236                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1237                 if ((stat & BUSY_STAT) == 0)
1238                         return 0;
1239                 /*
1240                  * Assume a value of 0xff means nothing is connected to
1241                  * the interface and it doesn't implement the pull-down
1242                  * resistor on D7.
1243                  */
1244                 if (stat == 0xff)
1245                         return -ENODEV;
1246                 touch_softlockup_watchdog();
1247         }
1248         return -EBUSY;
1249 }
1250
1251 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1252