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   1 /*
   2  * orion_spi.c -- Marvell Orion SPI controller driver
   3  *
   4  * Author: Shadi Ammouri <shadi@marvell.com>
   5  * Copyright (C) 2007-2008 Marvell Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/delay.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/spi/spi.h>
  19 #include <linux/spi/orion_spi.h>
  20 #include <asm/unaligned.h>
  21
  22 #define DRIVER_NAME                     "orion_spi"
  23
  24 #define ORION_NUM_CHIPSELECTS           1 /* only one slave is supported*/
  25 #define ORION_SPI_WAIT_RDY_MAX_LOOP     2000 /* in usec */
  26
  27 #define ORION_SPI_IF_CTRL_REG           0x00
  28 #define ORION_SPI_IF_CONFIG_REG         0x04
  29 #define ORION_SPI_DATA_OUT_REG          0x08
  30 #define ORION_SPI_DATA_IN_REG           0x0c
  31 #define ORION_SPI_INT_CAUSE_REG         0x10
  32
  33 #define ORION_SPI_IF_8_16_BIT_MODE      (1 << 5)
  34 #define ORION_SPI_CLK_PRESCALE_MASK     0x1F
  35
  36 struct orion_spi {
  37         struct work_struct      work;
  38
  39         /* Lock access to transfer list.        */
  40         spinlock_t              lock;
  41
  42         struct list_head        msg_queue;
  43         struct spi_master       *master;
  44         void __iomem            *base;
  45         unsigned int            max_speed;
  46         unsigned int            min_speed;
  47         struct orion_spi_info   *spi_info;
  48 };
  49
  50 static struct workqueue_struct *orion_spi_wq;
  51
  52 static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg)
  53 {
  54         return orion_spi->base + reg;
  55 }
  56
  57 static inline void
  58 orion_spi_setbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
  59 {
  60         void __iomem *reg_addr = spi_reg(orion_spi, reg);
  61         u32 val;
  62
  63         val = readl(reg_addr);
  64         val |= mask;
  65         writel(val, reg_addr);
  66 }
  67
  68 static inline void
  69 orion_spi_clrbits(struct orion_spi *orion_spi, u32 reg, u32 mask)
  70 {
  71         void __iomem *reg_addr = spi_reg(orion_spi, reg);
  72         u32 val;
  73
  74         val = readl(reg_addr);
  75         val &= ~mask;
  76         writel(val, reg_addr);
  77 }
  78
  79 static int orion_spi_set_transfer_size(struct orion_spi *orion_spi, int size)
  80 {
  81         if (size == 16) {
  82                 orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
  83                                   ORION_SPI_IF_8_16_BIT_MODE);
  84         } else if (size == 8) {
  85                 orion_spi_clrbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
  86                                   ORION_SPI_IF_8_16_BIT_MODE);
  87         } else {
  88                 pr_debug("Bad bits per word value %d (only 8 or 16 are "
  89                          "allowed).\n", size);
  90                 return -EINVAL;
  91         }
  92
  93         return 0;
  94 }
  95
  96 static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
  97 {
  98         u32 tclk_hz;
  99         u32 rate;
 100         u32 prescale;
 101         u32 reg;
 102         struct orion_spi *orion_spi;
 103
 104         orion_spi = spi_master_get_devdata(spi->master);
 105
 106         tclk_hz = orion_spi->spi_info->tclk;
 107
 108         /*
 109          * the supported rates are: 4,6,8...30
 110          * round up as we look for equal or less speed
 111          */
 112         rate = DIV_ROUND_UP(tclk_hz, speed);
 113         rate = roundup(rate, 2);
 114
 115         /* check if requested speed is too small */
 116         if (rate > 30)
 117                 return -EINVAL;
 118
 119         if (rate < 4)
 120                 rate = 4;
 121
 122         /* Convert the rate to SPI clock divisor value. */
 123         prescale = 0x10 + rate/2;
 124
 125         reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
 126         reg = ((reg & ~ORION_SPI_CLK_PRESCALE_MASK) | prescale);
 127         writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
 128
 129         return 0;
 130 }
 131
 132 /*
 133  * called only when no transfer is active on the bus
 134  */
 135 static int
 136 orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 137 {
 138         struct orion_spi *orion_spi;
 139         unsigned int speed = spi->max_speed_hz;
 140         unsigned int bits_per_word = spi->bits_per_word;
 141         int     rc;
 142
 143         orion_spi = spi_master_get_devdata(spi->master);
 144
 145         if ((t != NULL) && t->speed_hz)
 146                 speed = t->speed_hz;
 147
 148         if ((t != NULL) && t->bits_per_word)
 149                 bits_per_word = t->bits_per_word;
 150
 151         rc = orion_spi_baudrate_set(spi, speed);
 152         if (rc)
 153                 return rc;
 154
 155         return orion_spi_set_transfer_size(orion_spi, bits_per_word);
 156 }
 157
 158 static void orion_spi_set_cs(struct orion_spi *orion_spi, int enable)
 159 {
 160         if (enable)
 161                 orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
 162         else
 163                 orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
 164 }
 165
 166 static inline int orion_spi_wait_till_ready(struct orion_spi *orion_spi)
 167 {
 168         int i;
 169
 170         for (i = 0; i < ORION_SPI_WAIT_RDY_MAX_LOOP; i++) {
 171                 if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
 172                         return 1;
 173                 else
 174                         udelay(1);
 175         }
 176
 177         return -1;
 178 }
 179
 180 static inline int
 181 orion_spi_write_read_8bit(struct spi_device *spi,
 182                           const u8 **tx_buf, u8 **rx_buf)
 183 {
 184         void __iomem *tx_reg, *rx_reg, *int_reg;
 185         struct orion_spi *orion_spi;
 186
 187         orion_spi = spi_master_get_devdata(spi->master);
 188         tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
 189         rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
 190         int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
 191
 192         /* clear the interrupt cause register */
 193         writel(0x0, int_reg);
 194
 195         if (tx_buf && *tx_buf)
 196                 writel(*(*tx_buf)++, tx_reg);
 197         else
 198                 writel(0, tx_reg);
 199
 200         if (orion_spi_wait_till_ready(orion_spi) < 0) {
 201                 dev_err(&spi->dev, "TXS timed out\n");
 202                 return -1;
 203         }
 204
 205         if (rx_buf && *rx_buf)
 206                 *(*rx_buf)++ = readl(rx_reg);
 207
 208         return 1;
 209 }
 210
 211 static inline int
 212 orion_spi_write_read_16bit(struct spi_device *spi,
 213                            const u16 **tx_buf, u16 **rx_buf)
 214 {
 215         void __iomem *tx_reg, *rx_reg, *int_reg;
 216         struct orion_spi *orion_spi;
 217
 218         orion_spi = spi_master_get_devdata(spi->master);
 219         tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG);
 220         rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
 221         int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
 222
 223         /* clear the interrupt cause register */
 224         writel(0x0, int_reg);
 225
 226         if (tx_buf && *tx_buf)
 227                 writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
 228         else
 229                 writel(0, tx_reg);
 230
 231         if (orion_spi_wait_till_ready(orion_spi) < 0) {
 232                 dev_err(&spi->dev, "TXS timed out\n");
 233                 return -1;
 234         }
 235
 236         if (rx_buf && *rx_buf)
 237                 put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
 238
 239         return 1;
 240 }
 241
 242 static unsigned int
 243 orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
 244 {
 245         struct orion_spi *orion_spi;
 246         unsigned int count;
 247         int word_len;
 248
 249         orion_spi = spi_master_get_devdata(spi->master);
 250         word_len = spi->bits_per_word;
 251         count = xfer->len;
 252
 253         if (word_len == 8) {
 254                 const u8 *tx = xfer->tx_buf;
 255                 u8 *rx = xfer->rx_buf;
 256
 257                 do {
 258                         if (orion_spi_write_read_8bit(spi, &tx, &rx) < 0)
 259                                 goto out;
 260                         count--;
 261                 } while (count);
 262         } else if (word_len == 16) {
 263                 const u16 *tx = xfer->tx_buf;
 264                 u16 *rx = xfer->rx_buf;
 265
 266                 do {
 267                         if (orion_spi_write_read_16bit(spi, &tx, &rx) < 0)
 268                                 goto out;
 269                         count -= 2;
 270                 } while (count);
 271         }
 272
 273 out:
 274         return xfer->len - count;
 275 }
 276
 277
 278 static void orion_spi_work(struct work_struct *work)
 279 {
 280         struct orion_spi *orion_spi =
 281                 container_of(work, struct orion_spi, work);
 282
 283         spin_lock_irq(&orion_spi->lock);
 284         while (!list_empty(&orion_spi->msg_queue)) {
 285                 struct spi_message *m;
 286                 struct spi_device *spi;
 287                 struct spi_transfer *t = NULL;
 288                 int par_override = 0;
 289                 int status = 0;
 290                 int cs_active = 0;
 291
 292                 m = container_of(orion_spi->msg_queue.next, struct spi_message,
 293                                  queue);
 294
 295                 list_del_init(&m->queue);
 296                 spin_unlock_irq(&orion_spi->lock);
 297
 298                 spi = m->spi;
 299
 300                 /* Load defaults */
 301                 status = orion_spi_setup_transfer(spi, NULL);
 302
 303                 if (status < 0)
 304                         goto msg_done;
 305
 306                 list_for_each_entry(t, &m->transfers, transfer_list) {
 307                         if (par_override || t->speed_hz || t->bits_per_word) {
 308                                 par_override = 1;
 309                                 status = orion_spi_setup_transfer(spi, t);
 310                                 if (status < 0)
 311                                         break;
 312                                 if (!t->speed_hz && !t->bits_per_word)
 313                                         par_override = 0;
 314                         }
 315
 316                         if (!cs_active) {
 317                                 orion_spi_set_cs(orion_spi, 1);
 318                                 cs_active = 1;
 319                         }
 320
 321                         if (t->len)
 322                                 m->actual_length +=
 323                                         orion_spi_write_read(spi, t);
 324
 325                         if (t->delay_usecs)
 326                                 udelay(t->delay_usecs);
 327
 328                         if (t->cs_change) {
 329                                 orion_spi_set_cs(orion_spi, 0);
 330                                 cs_active = 0;
 331                         }
 332                 }
 333
 334 msg_done:
 335                 if (cs_active)
 336                         orion_spi_set_cs(orion_spi, 0);
 337
 338                 m->status = status;
 339                 m->complete(m->context);
 340
 341                 spin_lock_irq(&orion_spi->lock);
 342         }
 343
 344         spin_unlock_irq(&orion_spi->lock);
 345 }
 346
 347 static int __init orion_spi_reset(struct orion_spi *orion_spi)
 348 {
 349         /* Verify that the CS is deasserted */
 350         orion_spi_set_cs(orion_spi, 0);
 351
 352         return 0;
 353 }
 354
 355 static int orion_spi_setup(struct spi_device *spi)
 356 {
 357         struct orion_spi *orion_spi;
 358
 359         orion_spi = spi_master_get_devdata(spi->master);
 360
 361         if (spi->mode) {
 362                 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
 363                         spi->mode);
 364                 return -EINVAL;
 365         }
 366
 367         /* Fix ac timing if required.   */
 368         if (orion_spi->spi_info->enable_clock_fix)
 369                 orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
 370                                   (1 << 14));
 371
 372         if (spi->bits_per_word == 0)
 373                 spi->bits_per_word = 8;
 374
 375         if ((spi->max_speed_hz == 0)
 376                         || (spi->max_speed_hz > orion_spi->max_speed))
 377                 spi->max_speed_hz = orion_spi->max_speed;
 378
 379         if (spi->max_speed_hz < orion_spi->min_speed) {
 380                 dev_err(&spi->dev, "setup: requested speed too low %d Hz\n",
 381                         spi->max_speed_hz);
 382                 return -EINVAL;
 383         }
 384
 385         /*
 386          * baudrate & width will be set orion_spi_setup_transfer
 387          */
 388         return 0;
 389 }
 390
 391 static int orion_spi_transfer(struct spi_device *spi, struct spi_message *m)
 392 {
 393         struct orion_spi *orion_spi;
 394         struct spi_transfer *t = NULL;
 395         unsigned long flags;
 396
 397         m->actual_length = 0;
 398         m->status = 0;
 399
 400         /* reject invalid messages and transfers */
 401         if (list_empty(&m->transfers) || !m->complete)
 402                 return -EINVAL;
 403
 404         orion_spi = spi_master_get_devdata(spi->master);
 405
 406         list_for_each_entry(t, &m->transfers, transfer_list) {
 407                 unsigned int bits_per_word = spi->bits_per_word;
 408
 409                 if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
 410                         dev_err(&spi->dev,
 411                                 "message rejected : "
 412                                 "invalid transfer data buffers\n");
 413                         goto msg_rejected;
 414                 }
 415
 416                 if ((t != NULL) && t->bits_per_word)
 417                         bits_per_word = t->bits_per_word;
 418
 419                 if ((bits_per_word != 8) && (bits_per_word != 16)) {
 420                         dev_err(&spi->dev,
 421                                 "message rejected : "
 422                                 "invalid transfer bits_per_word (%d bits)\n",
 423                                 bits_per_word);
 424                         goto msg_rejected;
 425                 }
 426                 /*make sure buffer length is even when working in 16 bit mode*/
 427                 if ((t != NULL) && (t->bits_per_word == 16) && (t->len & 1)) {
 428                         dev_err(&spi->dev,
 429                                 "message rejected : "
 430                                 "odd data length (%d) while in 16 bit mode\n",
 431                                 t->len);
 432                         goto msg_rejected;
 433                 }
 434
 435                 if (t->speed_hz && t->speed_hz < orion_spi->min_speed) {
 436                         dev_err(&spi->dev,
 437                                 "message rejected : "
 438                                 "device min speed (%d Hz) exceeds "
 439                                 "required transfer speed (%d Hz)\n",
 440                                 orion_spi->min_speed, t->speed_hz);
 441                         goto msg_rejected;
 442                 }
 443         }
 444
 445
 446         spin_lock_irqsave(&orion_spi->lock, flags);
 447         list_add_tail(&m->queue, &orion_spi->msg_queue);
 448         queue_work(orion_spi_wq, &orion_spi->work);
 449         spin_unlock_irqrestore(&orion_spi->lock, flags);
 450
 451         return 0;
 452 msg_rejected:
 453         /* Message rejected and not queued */
 454         m->status = -EINVAL;
 455         if (m->complete)
 456                 m->complete(m->context);
 457         return -EINVAL;
 458 }
 459
 460 static int __init orion_spi_probe(struct platform_device *pdev)
 461 {
 462         struct spi_master *master;
 463         struct orion_spi *spi;
 464         struct resource *r;
 465         struct orion_spi_info *spi_info;
 466         int status = 0;
 467
 468         spi_info = pdev->dev.platform_data;
 469
 470         master = spi_alloc_master(&pdev->dev, sizeof *spi);
 471         if (master == NULL) {
 472                 dev_dbg(&pdev->dev, "master allocation failed\n");
 473                 return -ENOMEM;
 474         }
 475
 476         if (pdev->id != -1)
 477                 master->bus_num = pdev->id;
 478
 479         master->setup = orion_spi_setup;
 480         master->transfer = orion_spi_transfer;
 481         master->num_chipselect = ORION_NUM_CHIPSELECTS;
 482
 483         dev_set_drvdata(&pdev->dev, master);
 484
 485         spi = spi_master_get_devdata(master);
 486         spi->master = master;
 487         spi->spi_info = spi_info;
 488
 489         spi->max_speed = DIV_ROUND_UP(spi_info->tclk, 4);
 490         spi->min_speed = DIV_ROUND_UP(spi_info->tclk, 30);
 491
 492         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 493         if (r == NULL) {
 494                 status = -ENODEV;
 495                 goto out;
 496         }
 497
 498         if (!request_mem_region(r->start, (r->end - r->start) + 1,
 499                                 dev_name(&pdev->dev))) {
 500                 status = -EBUSY;
 501                 goto out;
 502         }
 503         spi->base = ioremap(r->start, SZ_1K);
 504
 505         INIT_WORK(&spi->work, orion_spi_work);
 506
 507         spin_lock_init(&spi->lock);
 508         INIT_LIST_HEAD(&spi->msg_queue);
 509
 510         if (orion_spi_reset(spi) < 0)
 511                 goto out_rel_mem;
 512
 513         status = spi_register_master(master);
 514         if (status < 0)
 515                 goto out_rel_mem;
 516
 517         return status;
 518
 519 out_rel_mem:
 520         release_mem_region(r->start, (r->end - r->start) + 1);
 521
 522 out:
 523         spi_master_put(master);
 524         return status;
 525 }
 526
 527
 528 static int __exit orion_spi_remove(struct platform_device *pdev)
 529 {
 530         struct spi_master *master;
 531         struct orion_spi *spi;
 532         struct resource *r;
 533
 534         master = dev_get_drvdata(&pdev->dev);
 535         spi = spi_master_get_devdata(master);
 536
 537         cancel_work_sync(&spi->work);
 538
 539         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 540         release_mem_region(r->start, (r->end - r->start) + 1);
 541
 542         spi_unregister_master(master);
 543
 544         return 0;
 545 }
 546
 547 MODULE_ALIAS("platform:" DRIVER_NAME);
 548
 549 static struct platform_driver orion_spi_driver = {
 550         .driver = {
 551                 .name   = DRIVER_NAME,
 552                 .owner  = THIS_MODULE,
 553         },
 554         .remove         = __exit_p(orion_spi_remove),
 555 };
 556
 557 static int __init orion_spi_init(void)
 558 {
 559         orion_spi_wq = create_singlethread_workqueue(
 560                                 orion_spi_driver.driver.name);
 561         if (orion_spi_wq == NULL)
 562                 return -ENOMEM;
 563
 564         return platform_driver_probe(&orion_spi_driver, orion_spi_probe);
 565 }
 566 module_init(orion_spi_init);
 567
 568 static void __exit orion_spi_exit(void)
 569 {
 570         flush_workqueue(orion_spi_wq);
 571         platform_driver_unregister(&orion_spi_driver);
 572
 573         destroy_workqueue(orion_spi_wq);
 574 }
 575 module_exit(orion_spi_exit);
 576
 577 MODULE_DESCRIPTION("Orion SPI driver");
 578 MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
 579 MODULE_LICENSE("GPL");