2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 * Routines for generic manipulation of the interrupts found on the
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
25 #include <asm/bootinfo.h>
26 #include <asm/irq_cpu.h>
27 #include <asm/lasat/lasatint.h>
31 static volatile int *lasat_int_status;
32 static volatile int *lasat_int_mask;
33 static volatile int lasat_int_mask_shift;
35 void disable_lasat_irq(unsigned int irq_nr)
37 *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
40 void enable_lasat_irq(unsigned int irq_nr)
42 *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
45 static struct irq_chip lasat_irq_type = {
47 .ack = disable_lasat_irq,
48 .mask = disable_lasat_irq,
49 .mask_ack = disable_lasat_irq,
50 .unmask = enable_lasat_irq,
53 static inline int ls1bit32(unsigned int x)
57 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
58 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
59 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
60 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
61 s = 1; if (x << 1 == 0) s = 0; b -= s;
66 static unsigned long (*get_int_status)(void);
68 static unsigned long get_int_status_100(void)
70 return *lasat_int_status & *lasat_int_mask;
73 static unsigned long get_int_status_200(void)
75 unsigned long int_status;
77 int_status = *lasat_int_status;
78 int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff;
82 asmlinkage void plat_irq_dispatch(void)
84 unsigned long int_status;
85 unsigned int cause = read_c0_cause();
88 if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */
93 int_status = get_int_status();
95 /* if int_status == 0, then the interrupt has already been cleared */
97 irq = LASAT_IRQ_BASE + ls1bit32(int_status);
103 static struct irqaction cascade = {
104 .handler = no_action,
105 .mask = CPU_MASK_NONE,
109 void __init arch_init_irq(void)
113 switch (mips_machtype) {
115 lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
116 lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
117 lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
118 get_int_status = get_int_status_100;
122 lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
123 lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
124 lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
125 get_int_status = get_int_status_200;
126 *lasat_int_mask &= 0xffff;
129 panic("arch_init_irq: mips_machtype incorrect");
134 for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++)
135 set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
137 setup_irq(LASAT_CASCADE_IRQ, &cascade);