1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
30 #include <net/ip6_checksum.h>
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
37 #define DRIVERNAPI "-NAPI"
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
43 /* e1000_pci_tbl - PCI Device ID Table
45 * Last entry must be all 0s
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1075),
77 INTEL_E1000_ETHERNET_DEVICE(0x1076),
78 INTEL_E1000_ETHERNET_DEVICE(0x1077),
79 INTEL_E1000_ETHERNET_DEVICE(0x1078),
80 INTEL_E1000_ETHERNET_DEVICE(0x1079),
81 INTEL_E1000_ETHERNET_DEVICE(0x107A),
82 INTEL_E1000_ETHERNET_DEVICE(0x107B),
83 INTEL_E1000_ETHERNET_DEVICE(0x107C),
84 INTEL_E1000_ETHERNET_DEVICE(0x108A),
85 INTEL_E1000_ETHERNET_DEVICE(0x1099),
86 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
87 /* required last entry */
91 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
93 int e1000_up(struct e1000_adapter *adapter);
94 void e1000_down(struct e1000_adapter *adapter);
95 void e1000_reinit_locked(struct e1000_adapter *adapter);
96 void e1000_reset(struct e1000_adapter *adapter);
97 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
98 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
99 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
100 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
101 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
102 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
103 struct e1000_tx_ring *txdr);
104 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
105 struct e1000_rx_ring *rxdr);
106 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
107 struct e1000_tx_ring *tx_ring);
108 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
109 struct e1000_rx_ring *rx_ring);
110 void e1000_update_stats(struct e1000_adapter *adapter);
112 static int e1000_init_module(void);
113 static void e1000_exit_module(void);
114 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
115 static void __devexit e1000_remove(struct pci_dev *pdev);
116 static int e1000_alloc_queues(struct e1000_adapter *adapter);
117 static int e1000_sw_init(struct e1000_adapter *adapter);
118 static int e1000_open(struct net_device *netdev);
119 static int e1000_close(struct net_device *netdev);
120 static void e1000_configure_tx(struct e1000_adapter *adapter);
121 static void e1000_configure_rx(struct e1000_adapter *adapter);
122 static void e1000_setup_rctl(struct e1000_adapter *adapter);
123 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
124 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
125 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *tx_ring);
127 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring);
129 static void e1000_set_rx_mode(struct net_device *netdev);
130 static void e1000_update_phy_info(unsigned long data);
131 static void e1000_watchdog(unsigned long data);
132 static void e1000_82547_tx_fifo_stall(unsigned long data);
133 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
134 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136 static int e1000_set_mac(struct net_device *netdev, void *p);
137 static irqreturn_t e1000_intr(int irq, void *data);
138 static irqreturn_t e1000_intr_msi(int irq, void *data);
139 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
140 struct e1000_tx_ring *tx_ring);
141 #ifdef CONFIG_E1000_NAPI
142 static int e1000_clean(struct napi_struct *napi, int budget);
143 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
144 struct e1000_rx_ring *rx_ring,
145 int *work_done, int work_to_do);
146 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int *work_done, int work_to_do);
150 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
153 struct e1000_rx_ring *rx_ring);
155 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring,
158 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
159 struct e1000_rx_ring *rx_ring,
161 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
162 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
164 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
165 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
166 static void e1000_tx_timeout(struct net_device *dev);
167 static void e1000_reset_task(struct work_struct *work);
168 static void e1000_smartspeed(struct e1000_adapter *adapter);
169 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
170 struct sk_buff *skb);
172 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
173 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
174 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
175 static void e1000_restore_vlan(struct e1000_adapter *adapter);
177 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
179 static int e1000_resume(struct pci_dev *pdev);
181 static void e1000_shutdown(struct pci_dev *pdev);
183 #ifdef CONFIG_NET_POLL_CONTROLLER
184 /* for netdump / net console */
185 static void e1000_netpoll (struct net_device *netdev);
188 #define COPYBREAK_DEFAULT 256
189 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
190 module_param(copybreak, uint, 0644);
191 MODULE_PARM_DESC(copybreak,
192 "Maximum size of packet that is copied to a new buffer on receive");
194 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
195 pci_channel_state_t state);
196 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
197 static void e1000_io_resume(struct pci_dev *pdev);
199 static struct pci_error_handlers e1000_err_handler = {
200 .error_detected = e1000_io_error_detected,
201 .slot_reset = e1000_io_slot_reset,
202 .resume = e1000_io_resume,
205 static struct pci_driver e1000_driver = {
206 .name = e1000_driver_name,
207 .id_table = e1000_pci_tbl,
208 .probe = e1000_probe,
209 .remove = __devexit_p(e1000_remove),
211 /* Power Managment Hooks */
212 .suspend = e1000_suspend,
213 .resume = e1000_resume,
215 .shutdown = e1000_shutdown,
216 .err_handler = &e1000_err_handler
219 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
220 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
221 MODULE_LICENSE("GPL");
222 MODULE_VERSION(DRV_VERSION);
224 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
225 module_param(debug, int, 0);
226 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
229 * e1000_init_module - Driver Registration Routine
231 * e1000_init_module is the first routine called when the driver is
232 * loaded. All it does is register with the PCI subsystem.
236 e1000_init_module(void)
239 printk(KERN_INFO "%s - version %s\n",
240 e1000_driver_string, e1000_driver_version);
242 printk(KERN_INFO "%s\n", e1000_copyright);
244 ret = pci_register_driver(&e1000_driver);
245 if (copybreak != COPYBREAK_DEFAULT) {
247 printk(KERN_INFO "e1000: copybreak disabled\n");
249 printk(KERN_INFO "e1000: copybreak enabled for "
250 "packets <= %u bytes\n", copybreak);
255 module_init(e1000_init_module);
258 * e1000_exit_module - Driver Exit Cleanup Routine
260 * e1000_exit_module is called just before the driver is removed
265 e1000_exit_module(void)
267 pci_unregister_driver(&e1000_driver);
270 module_exit(e1000_exit_module);
272 static int e1000_request_irq(struct e1000_adapter *adapter)
274 struct net_device *netdev = adapter->netdev;
275 irq_handler_t handler = e1000_intr;
276 int irq_flags = IRQF_SHARED;
279 if (adapter->hw.mac_type >= e1000_82571) {
280 adapter->have_msi = !pci_enable_msi(adapter->pdev);
281 if (adapter->have_msi) {
282 handler = e1000_intr_msi;
287 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
290 if (adapter->have_msi)
291 pci_disable_msi(adapter->pdev);
293 "Unable to allocate interrupt Error: %d\n", err);
299 static void e1000_free_irq(struct e1000_adapter *adapter)
301 struct net_device *netdev = adapter->netdev;
303 free_irq(adapter->pdev->irq, netdev);
305 if (adapter->have_msi)
306 pci_disable_msi(adapter->pdev);
310 * e1000_irq_disable - Mask off interrupt generation on the NIC
311 * @adapter: board private structure
315 e1000_irq_disable(struct e1000_adapter *adapter)
317 atomic_inc(&adapter->irq_sem);
318 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
319 E1000_WRITE_FLUSH(&adapter->hw);
320 synchronize_irq(adapter->pdev->irq);
324 * e1000_irq_enable - Enable default interrupt generation settings
325 * @adapter: board private structure
329 e1000_irq_enable(struct e1000_adapter *adapter)
331 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
332 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
333 E1000_WRITE_FLUSH(&adapter->hw);
338 e1000_update_mng_vlan(struct e1000_adapter *adapter)
340 struct net_device *netdev = adapter->netdev;
341 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
342 uint16_t old_vid = adapter->mng_vlan_id;
343 if (adapter->vlgrp) {
344 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
345 if (adapter->hw.mng_cookie.status &
346 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
347 e1000_vlan_rx_add_vid(netdev, vid);
348 adapter->mng_vlan_id = vid;
350 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
352 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
354 !vlan_group_get_device(adapter->vlgrp, old_vid))
355 e1000_vlan_rx_kill_vid(netdev, old_vid);
357 adapter->mng_vlan_id = vid;
362 * e1000_release_hw_control - release control of the h/w to f/w
363 * @adapter: address of board private structure
365 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
366 * For ASF and Pass Through versions of f/w this means that the
367 * driver is no longer loaded. For AMT version (only with 82573) i
368 * of the f/w this means that the network i/f is closed.
373 e1000_release_hw_control(struct e1000_adapter *adapter)
378 /* Let firmware taken over control of h/w */
379 switch (adapter->hw.mac_type) {
381 swsm = E1000_READ_REG(&adapter->hw, SWSM);
382 E1000_WRITE_REG(&adapter->hw, SWSM,
383 swsm & ~E1000_SWSM_DRV_LOAD);
387 case e1000_80003es2lan:
389 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
390 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
391 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
399 * e1000_get_hw_control - get control of the h/w from f/w
400 * @adapter: address of board private structure
402 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
403 * For ASF and Pass Through versions of f/w this means that
404 * the driver is loaded. For AMT version (only with 82573)
405 * of the f/w this means that the network i/f is open.
410 e1000_get_hw_control(struct e1000_adapter *adapter)
415 /* Let firmware know the driver has taken over */
416 switch (adapter->hw.mac_type) {
418 swsm = E1000_READ_REG(&adapter->hw, SWSM);
419 E1000_WRITE_REG(&adapter->hw, SWSM,
420 swsm | E1000_SWSM_DRV_LOAD);
424 case e1000_80003es2lan:
426 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
427 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
428 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
436 e1000_init_manageability(struct e1000_adapter *adapter)
438 if (adapter->en_mng_pt) {
439 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
441 /* disable hardware interception of ARP */
442 manc &= ~(E1000_MANC_ARP_EN);
444 /* enable receiving management packets to the host */
445 /* this will probably generate destination unreachable messages
446 * from the host OS, but the packets will be handled on SMBUS */
447 if (adapter->hw.has_manc2h) {
448 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
450 manc |= E1000_MANC_EN_MNG2HOST;
451 #define E1000_MNG2HOST_PORT_623 (1 << 5)
452 #define E1000_MNG2HOST_PORT_664 (1 << 6)
453 manc2h |= E1000_MNG2HOST_PORT_623;
454 manc2h |= E1000_MNG2HOST_PORT_664;
455 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
458 E1000_WRITE_REG(&adapter->hw, MANC, manc);
463 e1000_release_manageability(struct e1000_adapter *adapter)
465 if (adapter->en_mng_pt) {
466 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
468 /* re-enable hardware interception of ARP */
469 manc |= E1000_MANC_ARP_EN;
471 if (adapter->hw.has_manc2h)
472 manc &= ~E1000_MANC_EN_MNG2HOST;
474 /* don't explicitly have to mess with MANC2H since
475 * MANC has an enable disable that gates MANC2H */
477 E1000_WRITE_REG(&adapter->hw, MANC, manc);
482 * e1000_configure - configure the hardware for RX and TX
483 * @adapter = private board structure
485 static void e1000_configure(struct e1000_adapter *adapter)
487 struct net_device *netdev = adapter->netdev;
490 e1000_set_rx_mode(netdev);
492 e1000_restore_vlan(adapter);
493 e1000_init_manageability(adapter);
495 e1000_configure_tx(adapter);
496 e1000_setup_rctl(adapter);
497 e1000_configure_rx(adapter);
498 /* call E1000_DESC_UNUSED which always leaves
499 * at least 1 descriptor unused to make sure
500 * next_to_use != next_to_clean */
501 for (i = 0; i < adapter->num_rx_queues; i++) {
502 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
503 adapter->alloc_rx_buf(adapter, ring,
504 E1000_DESC_UNUSED(ring));
507 adapter->tx_queue_len = netdev->tx_queue_len;
510 int e1000_up(struct e1000_adapter *adapter)
512 /* hardware has been reset, we need to reload some things */
513 e1000_configure(adapter);
515 clear_bit(__E1000_DOWN, &adapter->flags);
517 #ifdef CONFIG_E1000_NAPI
518 napi_enable(&adapter->napi);
520 e1000_irq_enable(adapter);
522 /* fire a link change interrupt to start the watchdog */
523 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
528 * e1000_power_up_phy - restore link in case the phy was powered down
529 * @adapter: address of board private structure
531 * The phy may be powered down to save power and turn off link when the
532 * driver is unloaded and wake on lan is not enabled (among others)
533 * *** this routine MUST be followed by a call to e1000_reset ***
537 void e1000_power_up_phy(struct e1000_adapter *adapter)
539 uint16_t mii_reg = 0;
541 /* Just clear the power down bit to wake the phy back up */
542 if (adapter->hw.media_type == e1000_media_type_copper) {
543 /* according to the manual, the phy will retain its
544 * settings across a power-down/up cycle */
545 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
546 mii_reg &= ~MII_CR_POWER_DOWN;
547 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
551 static void e1000_power_down_phy(struct e1000_adapter *adapter)
553 /* Power down the PHY so no link is implied when interface is down *
554 * The PHY cannot be powered down if any of the following is TRUE *
557 * (c) SoL/IDER session is active */
558 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
559 adapter->hw.media_type == e1000_media_type_copper) {
560 uint16_t mii_reg = 0;
562 switch (adapter->hw.mac_type) {
565 case e1000_82545_rev_3:
567 case e1000_82546_rev_3:
569 case e1000_82541_rev_2:
571 case e1000_82547_rev_2:
572 if (E1000_READ_REG(&adapter->hw, MANC) &
579 case e1000_80003es2lan:
581 if (e1000_check_mng_mode(&adapter->hw) ||
582 e1000_check_phy_reset_block(&adapter->hw))
588 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
589 mii_reg |= MII_CR_POWER_DOWN;
590 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
598 e1000_down(struct e1000_adapter *adapter)
600 struct net_device *netdev = adapter->netdev;
602 /* signal that we're down so the interrupt handler does not
603 * reschedule our watchdog timer */
604 set_bit(__E1000_DOWN, &adapter->flags);
606 #ifdef CONFIG_E1000_NAPI
607 napi_disable(&adapter->napi);
608 atomic_set(&adapter->irq_sem, 0);
610 e1000_irq_disable(adapter);
612 del_timer_sync(&adapter->tx_fifo_stall_timer);
613 del_timer_sync(&adapter->watchdog_timer);
614 del_timer_sync(&adapter->phy_info_timer);
616 netdev->tx_queue_len = adapter->tx_queue_len;
617 adapter->link_speed = 0;
618 adapter->link_duplex = 0;
619 netif_carrier_off(netdev);
620 netif_stop_queue(netdev);
622 e1000_reset(adapter);
623 e1000_clean_all_tx_rings(adapter);
624 e1000_clean_all_rx_rings(adapter);
628 e1000_reinit_locked(struct e1000_adapter *adapter)
630 WARN_ON(in_interrupt());
631 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
635 clear_bit(__E1000_RESETTING, &adapter->flags);
639 e1000_reset(struct e1000_adapter *adapter)
641 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
642 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
643 boolean_t legacy_pba_adjust = FALSE;
645 /* Repartition Pba for greater than 9k mtu
646 * To take effect CTRL.RST is required.
649 switch (adapter->hw.mac_type) {
650 case e1000_82542_rev2_0:
651 case e1000_82542_rev2_1:
656 case e1000_82541_rev_2:
657 legacy_pba_adjust = TRUE;
661 case e1000_82545_rev_3:
663 case e1000_82546_rev_3:
667 case e1000_82547_rev_2:
668 legacy_pba_adjust = TRUE;
673 case e1000_80003es2lan:
681 case e1000_undefined:
686 if (legacy_pba_adjust == TRUE) {
687 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
688 pba -= 8; /* allocate more FIFO for Tx */
690 if (adapter->hw.mac_type == e1000_82547) {
691 adapter->tx_fifo_head = 0;
692 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
693 adapter->tx_fifo_size =
694 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
695 atomic_set(&adapter->tx_fifo_stall, 0);
697 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
698 /* adjust PBA for jumbo frames */
699 E1000_WRITE_REG(&adapter->hw, PBA, pba);
701 /* To maintain wire speed transmits, the Tx FIFO should be
702 * large enough to accomodate two full transmit packets,
703 * rounded up to the next 1KB and expressed in KB. Likewise,
704 * the Rx FIFO should be large enough to accomodate at least
705 * one full receive packet and is similarly rounded up and
706 * expressed in KB. */
707 pba = E1000_READ_REG(&adapter->hw, PBA);
708 /* upper 16 bits has Tx packet buffer allocation size in KB */
709 tx_space = pba >> 16;
710 /* lower 16 bits has Rx packet buffer allocation size in KB */
712 /* don't include ethernet FCS because hardware appends/strips */
713 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
715 min_tx_space = min_rx_space;
717 min_tx_space = ALIGN(min_tx_space, 1024);
719 min_rx_space = ALIGN(min_rx_space, 1024);
722 /* If current Tx allocation is less than the min Tx FIFO size,
723 * and the min Tx FIFO size is less than the current Rx FIFO
724 * allocation, take space away from current Rx allocation */
725 if (tx_space < min_tx_space &&
726 ((min_tx_space - tx_space) < pba)) {
727 pba = pba - (min_tx_space - tx_space);
729 /* PCI/PCIx hardware has PBA alignment constraints */
730 switch (adapter->hw.mac_type) {
731 case e1000_82545 ... e1000_82546_rev_3:
732 pba &= ~(E1000_PBA_8K - 1);
738 /* if short on rx space, rx wins and must trump tx
739 * adjustment or use Early Receive if available */
740 if (pba < min_rx_space) {
741 switch (adapter->hw.mac_type) {
743 /* ERT enabled in e1000_configure_rx */
753 E1000_WRITE_REG(&adapter->hw, PBA, pba);
755 /* flow control settings */
756 /* Set the FC high water mark to 90% of the FIFO size.
757 * Required to clear last 3 LSB */
758 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
759 /* We can't use 90% on small FIFOs because the remainder
760 * would be less than 1 full frame. In this case, we size
761 * it to allow at least a full frame above the high water
763 if (pba < E1000_PBA_16K)
764 fc_high_water_mark = (pba * 1024) - 1600;
766 adapter->hw.fc_high_water = fc_high_water_mark;
767 adapter->hw.fc_low_water = fc_high_water_mark - 8;
768 if (adapter->hw.mac_type == e1000_80003es2lan)
769 adapter->hw.fc_pause_time = 0xFFFF;
771 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
772 adapter->hw.fc_send_xon = 1;
773 adapter->hw.fc = adapter->hw.original_fc;
775 /* Allow time for pending master requests to run */
776 e1000_reset_hw(&adapter->hw);
777 if (adapter->hw.mac_type >= e1000_82544)
778 E1000_WRITE_REG(&adapter->hw, WUC, 0);
780 if (e1000_init_hw(&adapter->hw))
781 DPRINTK(PROBE, ERR, "Hardware Error\n");
782 e1000_update_mng_vlan(adapter);
784 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
785 if (adapter->hw.mac_type >= e1000_82544 &&
786 adapter->hw.mac_type <= e1000_82547_rev_2 &&
787 adapter->hw.autoneg == 1 &&
788 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
789 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
790 /* clear phy power management bit if we are in gig only mode,
791 * which if enabled will attempt negotiation to 100Mb, which
792 * can cause a loss of link at power off or driver unload */
793 ctrl &= ~E1000_CTRL_SWDPIN3;
794 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
797 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
798 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
800 e1000_reset_adaptive(&adapter->hw);
801 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
803 if (!adapter->smart_power_down &&
804 (adapter->hw.mac_type == e1000_82571 ||
805 adapter->hw.mac_type == e1000_82572)) {
806 uint16_t phy_data = 0;
807 /* speed up time to link by disabling smart power down, ignore
808 * the return value of this function because there is nothing
809 * different we would do if it failed */
810 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
812 phy_data &= ~IGP02E1000_PM_SPD;
813 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
817 e1000_release_manageability(adapter);
821 * Dump the eeprom for users having checksum issues
823 void e1000_dump_eeprom(struct e1000_adapter *adapter)
825 struct net_device *netdev = adapter->netdev;
826 struct ethtool_eeprom eeprom;
827 const struct ethtool_ops *ops = netdev->ethtool_ops;
830 u16 csum_old, csum_new = 0;
832 eeprom.len = ops->get_eeprom_len(netdev);
835 data = kmalloc(eeprom.len, GFP_KERNEL);
837 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
842 ops->get_eeprom(netdev, &eeprom, data);
844 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
845 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
846 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
847 csum_new += data[i] + (data[i + 1] << 8);
848 csum_new = EEPROM_SUM - csum_new;
850 printk(KERN_ERR "/*********************/\n");
851 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
852 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
854 printk(KERN_ERR "Offset Values\n");
855 printk(KERN_ERR "======== ======\n");
856 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
858 printk(KERN_ERR "Include this output when contacting your support "
860 printk(KERN_ERR "This is not a software error! Something bad "
861 "happened to your hardware or\n");
862 printk(KERN_ERR "EEPROM image. Ignoring this "
863 "problem could result in further problems,\n");
864 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
865 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
866 "which is invalid\n");
867 printk(KERN_ERR "and requires you to set the proper MAC "
868 "address manually before continuing\n");
869 printk(KERN_ERR "to enable this network device.\n");
870 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
871 "to your hardware vendor\n");
872 printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n");
873 printk(KERN_ERR "/*********************/\n");
879 * e1000_probe - Device Initialization Routine
880 * @pdev: PCI device information struct
881 * @ent: entry in e1000_pci_tbl
883 * Returns 0 on success, negative on failure
885 * e1000_probe initializes an adapter identified by a pci_dev structure.
886 * The OS initialization, configuring of the adapter private structure,
887 * and a hardware reset occur.
891 e1000_probe(struct pci_dev *pdev,
892 const struct pci_device_id *ent)
894 struct net_device *netdev;
895 struct e1000_adapter *adapter;
896 unsigned long mmio_start, mmio_len;
897 unsigned long flash_start, flash_len;
899 static int cards_found = 0;
900 static int global_quad_port_a = 0; /* global ksp3 port a indication */
901 int i, err, pci_using_dac;
902 uint16_t eeprom_data = 0;
903 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
904 DECLARE_MAC_BUF(mac);
906 if ((err = pci_enable_device(pdev)))
909 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
910 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
913 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
914 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
915 E1000_ERR("No usable DMA configuration, aborting\n");
921 if ((err = pci_request_regions(pdev, e1000_driver_name)))
924 pci_set_master(pdev);
927 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
929 goto err_alloc_etherdev;
931 SET_NETDEV_DEV(netdev, &pdev->dev);
933 pci_set_drvdata(pdev, netdev);
934 adapter = netdev_priv(netdev);
935 adapter->netdev = netdev;
936 adapter->pdev = pdev;
937 adapter->hw.back = adapter;
938 adapter->msg_enable = (1 << debug) - 1;
940 mmio_start = pci_resource_start(pdev, BAR_0);
941 mmio_len = pci_resource_len(pdev, BAR_0);
944 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
945 if (!adapter->hw.hw_addr)
948 for (i = BAR_1; i <= BAR_5; i++) {
949 if (pci_resource_len(pdev, i) == 0)
951 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
952 adapter->hw.io_base = pci_resource_start(pdev, i);
957 netdev->open = &e1000_open;
958 netdev->stop = &e1000_close;
959 netdev->hard_start_xmit = &e1000_xmit_frame;
960 netdev->get_stats = &e1000_get_stats;
961 netdev->set_rx_mode = &e1000_set_rx_mode;
962 netdev->set_mac_address = &e1000_set_mac;
963 netdev->change_mtu = &e1000_change_mtu;
964 netdev->do_ioctl = &e1000_ioctl;
965 e1000_set_ethtool_ops(netdev);
966 netdev->tx_timeout = &e1000_tx_timeout;
967 netdev->watchdog_timeo = 5 * HZ;
968 #ifdef CONFIG_E1000_NAPI
969 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
971 netdev->vlan_rx_register = e1000_vlan_rx_register;
972 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
973 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
974 #ifdef CONFIG_NET_POLL_CONTROLLER
975 netdev->poll_controller = e1000_netpoll;
977 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
979 netdev->mem_start = mmio_start;
980 netdev->mem_end = mmio_start + mmio_len;
981 netdev->base_addr = adapter->hw.io_base;
983 adapter->bd_number = cards_found;
985 /* setup the private structure */
987 if ((err = e1000_sw_init(adapter)))
991 /* Flash BAR mapping must happen after e1000_sw_init
992 * because it depends on mac_type */
993 if ((adapter->hw.mac_type == e1000_ich8lan) &&
994 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
995 flash_start = pci_resource_start(pdev, 1);
996 flash_len = pci_resource_len(pdev, 1);
997 adapter->hw.flash_address = ioremap(flash_start, flash_len);
998 if (!adapter->hw.flash_address)
1002 if (e1000_check_phy_reset_block(&adapter->hw))
1003 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1005 if (adapter->hw.mac_type >= e1000_82543) {
1006 netdev->features = NETIF_F_SG |
1008 NETIF_F_HW_VLAN_TX |
1009 NETIF_F_HW_VLAN_RX |
1010 NETIF_F_HW_VLAN_FILTER;
1011 if (adapter->hw.mac_type == e1000_ich8lan)
1012 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1015 if ((adapter->hw.mac_type >= e1000_82544) &&
1016 (adapter->hw.mac_type != e1000_82547))
1017 netdev->features |= NETIF_F_TSO;
1019 if (adapter->hw.mac_type > e1000_82547_rev_2)
1020 netdev->features |= NETIF_F_TSO6;
1022 netdev->features |= NETIF_F_HIGHDMA;
1024 netdev->features |= NETIF_F_LLTX;
1026 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1028 /* initialize eeprom parameters */
1029 if (e1000_init_eeprom_params(&adapter->hw)) {
1030 E1000_ERR("EEPROM initialization failed\n");
1034 /* before reading the EEPROM, reset the controller to
1035 * put the device in a known good starting state */
1037 e1000_reset_hw(&adapter->hw);
1039 /* make sure the EEPROM is good */
1040 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1041 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1042 e1000_dump_eeprom(adapter);
1044 * set MAC address to all zeroes to invalidate and temporary
1045 * disable this device for the user. This blocks regular
1046 * traffic while still permitting ethtool ioctls from reaching
1047 * the hardware as well as allowing the user to run the
1048 * interface after manually setting a hw addr using
1051 memset(adapter->hw.mac_addr, 0, netdev->addr_len);
1053 /* copy the MAC address out of the EEPROM */
1054 if (e1000_read_mac_addr(&adapter->hw))
1055 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1057 /* don't block initalization here due to bad MAC address */
1058 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1059 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1061 if (!is_valid_ether_addr(netdev->perm_addr))
1062 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1064 e1000_get_bus_info(&adapter->hw);
1066 init_timer(&adapter->tx_fifo_stall_timer);
1067 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1068 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1070 init_timer(&adapter->watchdog_timer);
1071 adapter->watchdog_timer.function = &e1000_watchdog;
1072 adapter->watchdog_timer.data = (unsigned long) adapter;
1074 init_timer(&adapter->phy_info_timer);
1075 adapter->phy_info_timer.function = &e1000_update_phy_info;
1076 adapter->phy_info_timer.data = (unsigned long) adapter;
1078 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1080 e1000_check_options(adapter);
1082 /* Initial Wake on LAN setting
1083 * If APM wake is enabled in the EEPROM,
1084 * enable the ACPI Magic Packet filter
1087 switch (adapter->hw.mac_type) {
1088 case e1000_82542_rev2_0:
1089 case e1000_82542_rev2_1:
1093 e1000_read_eeprom(&adapter->hw,
1094 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1095 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1098 e1000_read_eeprom(&adapter->hw,
1099 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1100 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1103 case e1000_82546_rev_3:
1105 case e1000_80003es2lan:
1106 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1107 e1000_read_eeprom(&adapter->hw,
1108 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1113 e1000_read_eeprom(&adapter->hw,
1114 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1117 if (eeprom_data & eeprom_apme_mask)
1118 adapter->eeprom_wol |= E1000_WUFC_MAG;
1120 /* now that we have the eeprom settings, apply the special cases
1121 * where the eeprom may be wrong or the board simply won't support
1122 * wake on lan on a particular port */
1123 switch (pdev->device) {
1124 case E1000_DEV_ID_82546GB_PCIE:
1125 adapter->eeprom_wol = 0;
1127 case E1000_DEV_ID_82546EB_FIBER:
1128 case E1000_DEV_ID_82546GB_FIBER:
1129 case E1000_DEV_ID_82571EB_FIBER:
1130 /* Wake events only supported on port A for dual fiber
1131 * regardless of eeprom setting */
1132 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1133 adapter->eeprom_wol = 0;
1135 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1136 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1137 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1138 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1139 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1140 /* if quad port adapter, disable WoL on all but port A */
1141 if (global_quad_port_a != 0)
1142 adapter->eeprom_wol = 0;
1144 adapter->quad_port_a = 1;
1145 /* Reset for multiple quad port adapters */
1146 if (++global_quad_port_a == 4)
1147 global_quad_port_a = 0;
1151 /* initialize the wol settings based on the eeprom settings */
1152 adapter->wol = adapter->eeprom_wol;
1154 /* print bus type/speed/width info */
1156 struct e1000_hw *hw = &adapter->hw;
1157 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1158 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1159 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1160 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1161 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1162 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1163 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1164 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1165 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1166 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1167 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1171 printk("%s\n", print_mac(mac, netdev->dev_addr));
1173 /* reset the hardware with the new settings */
1174 e1000_reset(adapter);
1176 /* If the controller is 82573 and f/w is AMT, do not set
1177 * DRV_LOAD until the interface is up. For all other cases,
1178 * let the f/w know that the h/w is now under the control
1180 if (adapter->hw.mac_type != e1000_82573 ||
1181 !e1000_check_mng_mode(&adapter->hw))
1182 e1000_get_hw_control(adapter);
1184 /* tell the stack to leave us alone until e1000_open() is called */
1185 netif_carrier_off(netdev);
1186 netif_stop_queue(netdev);
1188 strcpy(netdev->name, "eth%d");
1189 if ((err = register_netdev(netdev)))
1192 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1198 e1000_release_hw_control(adapter);
1200 if (!e1000_check_phy_reset_block(&adapter->hw))
1201 e1000_phy_hw_reset(&adapter->hw);
1203 if (adapter->hw.flash_address)
1204 iounmap(adapter->hw.flash_address);
1206 #ifdef CONFIG_E1000_NAPI
1207 for (i = 0; i < adapter->num_rx_queues; i++)
1208 dev_put(&adapter->polling_netdev[i]);
1211 kfree(adapter->tx_ring);
1212 kfree(adapter->rx_ring);
1213 #ifdef CONFIG_E1000_NAPI
1214 kfree(adapter->polling_netdev);
1217 iounmap(adapter->hw.hw_addr);
1219 free_netdev(netdev);
1221 pci_release_regions(pdev);
1224 pci_disable_device(pdev);
1229 * e1000_remove - Device Removal Routine
1230 * @pdev: PCI device information struct
1232 * e1000_remove is called by the PCI subsystem to alert the driver
1233 * that it should release a PCI device. The could be caused by a
1234 * Hot-Plug event, or because the driver is going to be removed from
1238 static void __devexit
1239 e1000_remove(struct pci_dev *pdev)
1241 struct net_device *netdev = pci_get_drvdata(pdev);
1242 struct e1000_adapter *adapter = netdev_priv(netdev);
1243 #ifdef CONFIG_E1000_NAPI
1247 cancel_work_sync(&adapter->reset_task);
1249 e1000_release_manageability(adapter);
1251 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1252 * would have already happened in close and is redundant. */
1253 e1000_release_hw_control(adapter);
1255 #ifdef CONFIG_E1000_NAPI
1256 for (i = 0; i < adapter->num_rx_queues; i++)
1257 dev_put(&adapter->polling_netdev[i]);
1260 unregister_netdev(netdev);
1262 if (!e1000_check_phy_reset_block(&adapter->hw))
1263 e1000_phy_hw_reset(&adapter->hw);
1265 kfree(adapter->tx_ring);
1266 kfree(adapter->rx_ring);
1267 #ifdef CONFIG_E1000_NAPI
1268 kfree(adapter->polling_netdev);
1271 iounmap(adapter->hw.hw_addr);
1272 if (adapter->hw.flash_address)
1273 iounmap(adapter->hw.flash_address);
1274 pci_release_regions(pdev);
1276 free_netdev(netdev);
1278 pci_disable_device(pdev);
1282 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1283 * @adapter: board private structure to initialize
1285 * e1000_sw_init initializes the Adapter private data structure.
1286 * Fields are initialized based on PCI device information and
1287 * OS network device settings (MTU size).
1290 static int __devinit
1291 e1000_sw_init(struct e1000_adapter *adapter)
1293 struct e1000_hw *hw = &adapter->hw;
1294 struct net_device *netdev = adapter->netdev;
1295 struct pci_dev *pdev = adapter->pdev;
1296 #ifdef CONFIG_E1000_NAPI
1300 /* PCI config space info */
1302 hw->vendor_id = pdev->vendor;
1303 hw->device_id = pdev->device;
1304 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1305 hw->subsystem_id = pdev->subsystem_device;
1306 hw->revision_id = pdev->revision;
1308 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1310 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1311 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1312 hw->max_frame_size = netdev->mtu +
1313 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1314 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1316 /* identify the MAC */
1318 if (e1000_set_mac_type(hw)) {
1319 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1323 switch (hw->mac_type) {
1328 case e1000_82541_rev_2:
1329 case e1000_82547_rev_2:
1330 hw->phy_init_script = 1;
1334 e1000_set_media_type(hw);
1336 hw->wait_autoneg_complete = FALSE;
1337 hw->tbi_compatibility_en = TRUE;
1338 hw->adaptive_ifs = TRUE;
1340 /* Copper options */
1342 if (hw->media_type == e1000_media_type_copper) {
1343 hw->mdix = AUTO_ALL_MODES;
1344 hw->disable_polarity_correction = FALSE;
1345 hw->master_slave = E1000_MASTER_SLAVE;
1348 adapter->num_tx_queues = 1;
1349 adapter->num_rx_queues = 1;
1351 if (e1000_alloc_queues(adapter)) {
1352 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1356 #ifdef CONFIG_E1000_NAPI
1357 for (i = 0; i < adapter->num_rx_queues; i++) {
1358 adapter->polling_netdev[i].priv = adapter;
1359 dev_hold(&adapter->polling_netdev[i]);
1360 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1362 spin_lock_init(&adapter->tx_queue_lock);
1365 /* Explicitly disable IRQ since the NIC can be in any state. */
1366 atomic_set(&adapter->irq_sem, 0);
1367 e1000_irq_disable(adapter);
1369 spin_lock_init(&adapter->stats_lock);
1371 set_bit(__E1000_DOWN, &adapter->flags);
1377 * e1000_alloc_queues - Allocate memory for all rings
1378 * @adapter: board private structure to initialize
1380 * We allocate one ring per queue at run-time since we don't know the
1381 * number of queues at compile-time. The polling_netdev array is
1382 * intended for Multiqueue, but should work fine with a single queue.
1385 static int __devinit
1386 e1000_alloc_queues(struct e1000_adapter *adapter)
1388 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1389 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1390 if (!adapter->tx_ring)
1393 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1394 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1395 if (!adapter->rx_ring) {
1396 kfree(adapter->tx_ring);
1400 #ifdef CONFIG_E1000_NAPI
1401 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1402 sizeof(struct net_device),
1404 if (!adapter->polling_netdev) {
1405 kfree(adapter->tx_ring);
1406 kfree(adapter->rx_ring);
1411 return E1000_SUCCESS;
1415 * e1000_open - Called when a network interface is made active
1416 * @netdev: network interface device structure
1418 * Returns 0 on success, negative value on failure
1420 * The open entry point is called when a network interface is made
1421 * active by the system (IFF_UP). At this point all resources needed
1422 * for transmit and receive operations are allocated, the interrupt
1423 * handler is registered with the OS, the watchdog timer is started,
1424 * and the stack is notified that the interface is ready.
1428 e1000_open(struct net_device *netdev)
1430 struct e1000_adapter *adapter = netdev_priv(netdev);
1433 /* disallow open during test */
1434 if (test_bit(__E1000_TESTING, &adapter->flags))
1437 /* allocate transmit descriptors */
1438 err = e1000_setup_all_tx_resources(adapter);
1442 /* allocate receive descriptors */
1443 err = e1000_setup_all_rx_resources(adapter);
1447 e1000_power_up_phy(adapter);
1449 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1450 if ((adapter->hw.mng_cookie.status &
1451 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1452 e1000_update_mng_vlan(adapter);
1455 /* If AMT is enabled, let the firmware know that the network
1456 * interface is now open */
1457 if (adapter->hw.mac_type == e1000_82573 &&
1458 e1000_check_mng_mode(&adapter->hw))
1459 e1000_get_hw_control(adapter);
1461 /* before we allocate an interrupt, we must be ready to handle it.
1462 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1463 * as soon as we call pci_request_irq, so we have to setup our
1464 * clean_rx handler before we do so. */
1465 e1000_configure(adapter);
1467 err = e1000_request_irq(adapter);
1471 /* From here on the code is the same as e1000_up() */
1472 clear_bit(__E1000_DOWN, &adapter->flags);
1474 #ifdef CONFIG_E1000_NAPI
1475 napi_enable(&adapter->napi);
1478 e1000_irq_enable(adapter);
1480 /* fire a link status change interrupt to start the watchdog */
1481 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1483 return E1000_SUCCESS;
1486 e1000_release_hw_control(adapter);
1487 e1000_power_down_phy(adapter);
1488 e1000_free_all_rx_resources(adapter);
1490 e1000_free_all_tx_resources(adapter);
1492 e1000_reset(adapter);
1498 * e1000_close - Disables a network interface
1499 * @netdev: network interface device structure
1501 * Returns 0, this is not allowed to fail
1503 * The close entry point is called when an interface is de-activated
1504 * by the OS. The hardware is still under the drivers control, but
1505 * needs to be disabled. A global MAC reset is issued to stop the
1506 * hardware, and all transmit and receive resources are freed.
1510 e1000_close(struct net_device *netdev)
1512 struct e1000_adapter *adapter = netdev_priv(netdev);
1514 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1515 e1000_down(adapter);
1516 e1000_power_down_phy(adapter);
1517 e1000_free_irq(adapter);
1519 e1000_free_all_tx_resources(adapter);
1520 e1000_free_all_rx_resources(adapter);
1522 /* kill manageability vlan ID if supported, but not if a vlan with
1523 * the same ID is registered on the host OS (let 8021q kill it) */
1524 if ((adapter->hw.mng_cookie.status &
1525 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1527 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1528 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1531 /* If AMT is enabled, let the firmware know that the network
1532 * interface is now closed */
1533 if (adapter->hw.mac_type == e1000_82573 &&
1534 e1000_check_mng_mode(&adapter->hw))
1535 e1000_release_hw_control(adapter);
1541 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1542 * @adapter: address of board private structure
1543 * @start: address of beginning of memory
1544 * @len: length of memory
1547 e1000_check_64k_bound(struct e1000_adapter *adapter,
1548 void *start, unsigned long len)
1550 unsigned long begin = (unsigned long) start;
1551 unsigned long end = begin + len;
1553 /* First rev 82545 and 82546 need to not allow any memory
1554 * write location to cross 64k boundary due to errata 23 */
1555 if (adapter->hw.mac_type == e1000_82545 ||
1556 adapter->hw.mac_type == e1000_82546) {
1557 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1564 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1565 * @adapter: board private structure
1566 * @txdr: tx descriptor ring (for a specific queue) to setup
1568 * Return 0 on success, negative on failure
1572 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1573 struct e1000_tx_ring *txdr)
1575 struct pci_dev *pdev = adapter->pdev;
1578 size = sizeof(struct e1000_buffer) * txdr->count;
1579 txdr->buffer_info = vmalloc(size);
1580 if (!txdr->buffer_info) {
1582 "Unable to allocate memory for the transmit descriptor ring\n");
1585 memset(txdr->buffer_info, 0, size);
1587 /* round up to nearest 4K */
1589 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1590 txdr->size = ALIGN(txdr->size, 4096);
1592 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1595 vfree(txdr->buffer_info);
1597 "Unable to allocate memory for the transmit descriptor ring\n");
1601 /* Fix for errata 23, can't cross 64kB boundary */
1602 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1603 void *olddesc = txdr->desc;
1604 dma_addr_t olddma = txdr->dma;
1605 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1606 "at %p\n", txdr->size, txdr->desc);
1607 /* Try again, without freeing the previous */
1608 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1609 /* Failed allocation, critical failure */
1611 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1612 goto setup_tx_desc_die;
1615 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1617 pci_free_consistent(pdev, txdr->size, txdr->desc,
1619 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1621 "Unable to allocate aligned memory "
1622 "for the transmit descriptor ring\n");
1623 vfree(txdr->buffer_info);
1626 /* Free old allocation, new allocation was successful */
1627 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1630 memset(txdr->desc, 0, txdr->size);
1632 txdr->next_to_use = 0;
1633 txdr->next_to_clean = 0;
1634 spin_lock_init(&txdr->tx_lock);
1640 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1641 * (Descriptors) for all queues
1642 * @adapter: board private structure
1644 * Return 0 on success, negative on failure
1648 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1652 for (i = 0; i < adapter->num_tx_queues; i++) {
1653 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1656 "Allocation for Tx Queue %u failed\n", i);
1657 for (i-- ; i >= 0; i--)
1658 e1000_free_tx_resources(adapter,
1659 &adapter->tx_ring[i]);
1668 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1669 * @adapter: board private structure
1671 * Configure the Tx unit of the MAC after a reset.
1675 e1000_configure_tx(struct e1000_adapter *adapter)
1678 struct e1000_hw *hw = &adapter->hw;
1679 uint32_t tdlen, tctl, tipg, tarc;
1680 uint32_t ipgr1, ipgr2;
1682 /* Setup the HW Tx Head and Tail descriptor pointers */
1684 switch (adapter->num_tx_queues) {
1687 tdba = adapter->tx_ring[0].dma;
1688 tdlen = adapter->tx_ring[0].count *
1689 sizeof(struct e1000_tx_desc);
1690 E1000_WRITE_REG(hw, TDLEN, tdlen);
1691 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1692 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1693 E1000_WRITE_REG(hw, TDT, 0);
1694 E1000_WRITE_REG(hw, TDH, 0);
1695 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1696 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1700 /* Set the default values for the Tx Inter Packet Gap timer */
1701 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1702 (hw->media_type == e1000_media_type_fiber ||
1703 hw->media_type == e1000_media_type_internal_serdes))
1704 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1706 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1708 switch (hw->mac_type) {
1709 case e1000_82542_rev2_0:
1710 case e1000_82542_rev2_1:
1711 tipg = DEFAULT_82542_TIPG_IPGT;
1712 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1713 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1715 case e1000_80003es2lan:
1716 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1717 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1720 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1721 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1724 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1725 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1726 E1000_WRITE_REG(hw, TIPG, tipg);
1728 /* Set the Tx Interrupt Delay register */
1730 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1731 if (hw->mac_type >= e1000_82540)
1732 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1734 /* Program the Transmit Control Register */
1736 tctl = E1000_READ_REG(hw, TCTL);
1737 tctl &= ~E1000_TCTL_CT;
1738 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1739 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1741 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1742 tarc = E1000_READ_REG(hw, TARC0);
1743 /* set the speed mode bit, we'll clear it if we're not at
1744 * gigabit link later */
1746 E1000_WRITE_REG(hw, TARC0, tarc);
1747 } else if (hw->mac_type == e1000_80003es2lan) {
1748 tarc = E1000_READ_REG(hw, TARC0);
1750 E1000_WRITE_REG(hw, TARC0, tarc);
1751 tarc = E1000_READ_REG(hw, TARC1);
1753 E1000_WRITE_REG(hw, TARC1, tarc);
1756 e1000_config_collision_dist(hw);
1758 /* Setup Transmit Descriptor Settings for eop descriptor */
1759 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1761 /* only set IDE if we are delaying interrupts using the timers */
1762 if (adapter->tx_int_delay)
1763 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1765 if (hw->mac_type < e1000_82543)
1766 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1768 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1770 /* Cache if we're 82544 running in PCI-X because we'll
1771 * need this to apply a workaround later in the send path. */
1772 if (hw->mac_type == e1000_82544 &&
1773 hw->bus_type == e1000_bus_type_pcix)
1774 adapter->pcix_82544 = 1;
1776 E1000_WRITE_REG(hw, TCTL, tctl);
1781 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1782 * @adapter: board private structure
1783 * @rxdr: rx descriptor ring (for a specific queue) to setup
1785 * Returns 0 on success, negative on failure
1789 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1790 struct e1000_rx_ring *rxdr)
1792 struct pci_dev *pdev = adapter->pdev;
1795 size = sizeof(struct e1000_buffer) * rxdr->count;
1796 rxdr->buffer_info = vmalloc(size);
1797 if (!rxdr->buffer_info) {
1799 "Unable to allocate memory for the receive descriptor ring\n");
1802 memset(rxdr->buffer_info, 0, size);
1804 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1806 if (!rxdr->ps_page) {
1807 vfree(rxdr->buffer_info);
1809 "Unable to allocate memory for the receive descriptor ring\n");
1813 rxdr->ps_page_dma = kcalloc(rxdr->count,
1814 sizeof(struct e1000_ps_page_dma),
1816 if (!rxdr->ps_page_dma) {
1817 vfree(rxdr->buffer_info);
1818 kfree(rxdr->ps_page);
1820 "Unable to allocate memory for the receive descriptor ring\n");
1824 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1825 desc_len = sizeof(struct e1000_rx_desc);
1827 desc_len = sizeof(union e1000_rx_desc_packet_split);
1829 /* Round up to nearest 4K */
1831 rxdr->size = rxdr->count * desc_len;
1832 rxdr->size = ALIGN(rxdr->size, 4096);
1834 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1838 "Unable to allocate memory for the receive descriptor ring\n");
1840 vfree(rxdr->buffer_info);
1841 kfree(rxdr->ps_page);
1842 kfree(rxdr->ps_page_dma);
1846 /* Fix for errata 23, can't cross 64kB boundary */
1847 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1848 void *olddesc = rxdr->desc;
1849 dma_addr_t olddma = rxdr->dma;
1850 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1851 "at %p\n", rxdr->size, rxdr->desc);
1852 /* Try again, without freeing the previous */
1853 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1854 /* Failed allocation, critical failure */
1856 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1858 "Unable to allocate memory "
1859 "for the receive descriptor ring\n");
1860 goto setup_rx_desc_die;
1863 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1865 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1867 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1869 "Unable to allocate aligned memory "
1870 "for the receive descriptor ring\n");
1871 goto setup_rx_desc_die;
1873 /* Free old allocation, new allocation was successful */
1874 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1877 memset(rxdr->desc, 0, rxdr->size);
1879 rxdr->next_to_clean = 0;
1880 rxdr->next_to_use = 0;
1886 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1887 * (Descriptors) for all queues
1888 * @adapter: board private structure
1890 * Return 0 on success, negative on failure
1894 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1898 for (i = 0; i < adapter->num_rx_queues; i++) {
1899 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1902 "Allocation for Rx Queue %u failed\n", i);
1903 for (i-- ; i >= 0; i--)
1904 e1000_free_rx_resources(adapter,
1905 &adapter->rx_ring[i]);
1914 * e1000_setup_rctl - configure the receive control registers
1915 * @adapter: Board private structure
1917 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1918 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1920 e1000_setup_rctl(struct e1000_adapter *adapter)
1922 uint32_t rctl, rfctl;
1923 uint32_t psrctl = 0;
1924 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1928 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1930 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1932 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1933 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1934 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1936 if (adapter->hw.tbi_compatibility_on == 1)
1937 rctl |= E1000_RCTL_SBP;
1939 rctl &= ~E1000_RCTL_SBP;
1941 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1942 rctl &= ~E1000_RCTL_LPE;
1944 rctl |= E1000_RCTL_LPE;
1946 /* Setup buffer sizes */
1947 rctl &= ~E1000_RCTL_SZ_4096;
1948 rctl |= E1000_RCTL_BSEX;
1949 switch (adapter->rx_buffer_len) {
1950 case E1000_RXBUFFER_256:
1951 rctl |= E1000_RCTL_SZ_256;
1952 rctl &= ~E1000_RCTL_BSEX;
1954 case E1000_RXBUFFER_512:
1955 rctl |= E1000_RCTL_SZ_512;
1956 rctl &= ~E1000_RCTL_BSEX;
1958 case E1000_RXBUFFER_1024:
1959 rctl |= E1000_RCTL_SZ_1024;
1960 rctl &= ~E1000_RCTL_BSEX;
1962 case E1000_RXBUFFER_2048:
1964 rctl |= E1000_RCTL_SZ_2048;
1965 rctl &= ~E1000_RCTL_BSEX;
1967 case E1000_RXBUFFER_4096:
1968 rctl |= E1000_RCTL_SZ_4096;
1970 case E1000_RXBUFFER_8192:
1971 rctl |= E1000_RCTL_SZ_8192;
1973 case E1000_RXBUFFER_16384:
1974 rctl |= E1000_RCTL_SZ_16384;
1978 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1979 /* 82571 and greater support packet-split where the protocol
1980 * header is placed in skb->data and the packet data is
1981 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1982 * In the case of a non-split, skb->data is linearly filled,
1983 * followed by the page buffers. Therefore, skb->data is
1984 * sized to hold the largest protocol header.
1986 /* allocations using alloc_page take too long for regular MTU
1987 * so only enable packet split for jumbo frames */
1988 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1989 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1990 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1991 adapter->rx_ps_pages = pages;
1993 adapter->rx_ps_pages = 0;
1995 if (adapter->rx_ps_pages) {
1996 /* Configure extra packet-split registers */
1997 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1998 rfctl |= E1000_RFCTL_EXTEN;
1999 /* disable packet split support for IPv6 extension headers,
2000 * because some malformed IPv6 headers can hang the RX */
2001 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2002 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2004 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
2006 rctl |= E1000_RCTL_DTYP_PS;
2008 psrctl |= adapter->rx_ps_bsize0 >>
2009 E1000_PSRCTL_BSIZE0_SHIFT;
2011 switch (adapter->rx_ps_pages) {
2013 psrctl |= PAGE_SIZE <<
2014 E1000_PSRCTL_BSIZE3_SHIFT;
2016 psrctl |= PAGE_SIZE <<
2017 E1000_PSRCTL_BSIZE2_SHIFT;
2019 psrctl |= PAGE_SIZE >>
2020 E1000_PSRCTL_BSIZE1_SHIFT;
2024 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
2027 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2031 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2032 * @adapter: board private structure
2034 * Configure the Rx unit of the MAC after a reset.
2038 e1000_configure_rx(struct e1000_adapter *adapter)
2041 struct e1000_hw *hw = &adapter->hw;
2042 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2044 if (adapter->rx_ps_pages) {
2045 /* this is a 32 byte descriptor */
2046 rdlen = adapter->rx_ring[0].count *
2047 sizeof(union e1000_rx_desc_packet_split);
2048 adapter->clean_rx = e1000_clean_rx_irq_ps;
2049 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2051 rdlen = adapter->rx_ring[0].count *
2052 sizeof(struct e1000_rx_desc);
2053 adapter->clean_rx = e1000_clean_rx_irq;
2054 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2057 /* disable receives while setting up the descriptors */
2058 rctl = E1000_READ_REG(hw, RCTL);
2059 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2061 /* set the Receive Delay Timer Register */
2062 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2064 if (hw->mac_type >= e1000_82540) {
2065 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2066 if (adapter->itr_setting != 0)
2067 E1000_WRITE_REG(hw, ITR,
2068 1000000000 / (adapter->itr * 256));
2071 if (hw->mac_type >= e1000_82571) {
2072 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2073 /* Reset delay timers after every interrupt */
2074 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2075 #ifdef CONFIG_E1000_NAPI
2076 /* Auto-Mask interrupts upon ICR access */
2077 ctrl_ext |= E1000_CTRL_EXT_IAME;
2078 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2080 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2081 E1000_WRITE_FLUSH(hw);
2084 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2085 * the Base and Length of the Rx Descriptor Ring */
2086 switch (adapter->num_rx_queues) {
2089 rdba = adapter->rx_ring[0].dma;
2090 E1000_WRITE_REG(hw, RDLEN, rdlen);
2091 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2092 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2093 E1000_WRITE_REG(hw, RDT, 0);
2094 E1000_WRITE_REG(hw, RDH, 0);
2095 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2096 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2100 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2101 if (hw->mac_type >= e1000_82543) {
2102 rxcsum = E1000_READ_REG(hw, RXCSUM);
2103 if (adapter->rx_csum == TRUE) {
2104 rxcsum |= E1000_RXCSUM_TUOFL;
2106 /* Enable 82571 IPv4 payload checksum for UDP fragments
2107 * Must be used in conjunction with packet-split. */
2108 if ((hw->mac_type >= e1000_82571) &&
2109 (adapter->rx_ps_pages)) {
2110 rxcsum |= E1000_RXCSUM_IPPCSE;
2113 rxcsum &= ~E1000_RXCSUM_TUOFL;
2114 /* don't need to clear IPPCSE as it defaults to 0 */
2116 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2119 /* enable early receives on 82573, only takes effect if using > 2048
2120 * byte total frame size. for example only for jumbo frames */
2121 #define E1000_ERT_2048 0x100
2122 if (hw->mac_type == e1000_82573)
2123 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2125 /* Enable Receives */
2126 E1000_WRITE_REG(hw, RCTL, rctl);
2130 * e1000_free_tx_resources - Free Tx Resources per Queue
2131 * @adapter: board private structure
2132 * @tx_ring: Tx descriptor ring for a specific queue
2134 * Free all transmit software resources
2138 e1000_free_tx_resources(struct e1000_adapter *adapter,
2139 struct e1000_tx_ring *tx_ring)
2141 struct pci_dev *pdev = adapter->pdev;
2143 e1000_clean_tx_ring(adapter, tx_ring);
2145 vfree(tx_ring->buffer_info);
2146 tx_ring->buffer_info = NULL;
2148 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2150 tx_ring->desc = NULL;
2154 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2155 * @adapter: board private structure
2157 * Free all transmit software resources
2161 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2165 for (i = 0; i < adapter->num_tx_queues; i++)
2166 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2170 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2171 struct e1000_buffer *buffer_info)
2173 if (buffer_info->dma) {
2174 pci_unmap_page(adapter->pdev,
2176 buffer_info->length,
2178 buffer_info->dma = 0;
2180 if (buffer_info->skb) {
2181 dev_kfree_skb_any(buffer_info->skb);
2182 buffer_info->skb = NULL;
2184 /* buffer_info must be completely set up in the transmit path */
2188 * e1000_clean_tx_ring - Free Tx Buffers
2189 * @adapter: board private structure
2190 * @tx_ring: ring to be cleaned
2194 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2195 struct e1000_tx_ring *tx_ring)
2197 struct e1000_buffer *buffer_info;
2201 /* Free all the Tx ring sk_buffs */
2203 for (i = 0; i < tx_ring->count; i++) {
2204 buffer_info = &tx_ring->buffer_info[i];
2205 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2208 size = sizeof(struct e1000_buffer) * tx_ring->count;
2209 memset(tx_ring->buffer_info, 0, size);
2211 /* Zero out the descriptor ring */
2213 memset(tx_ring->desc, 0, tx_ring->size);
2215 tx_ring->next_to_use = 0;
2216 tx_ring->next_to_clean = 0;
2217 tx_ring->last_tx_tso = 0;
2219 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2220 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2224 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2225 * @adapter: board private structure
2229 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2233 for (i = 0; i < adapter->num_tx_queues; i++)
2234 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2238 * e1000_free_rx_resources - Free Rx Resources
2239 * @adapter: board private structure
2240 * @rx_ring: ring to clean the resources from
2242 * Free all receive software resources
2246 e1000_free_rx_resources(struct e1000_adapter *adapter,
2247 struct e1000_rx_ring *rx_ring)
2249 struct pci_dev *pdev = adapter->pdev;
2251 e1000_clean_rx_ring(adapter, rx_ring);
2253 vfree(rx_ring->buffer_info);
2254 rx_ring->buffer_info = NULL;
2255 kfree(rx_ring->ps_page);
2256 rx_ring->ps_page = NULL;
2257 kfree(rx_ring->ps_page_dma);
2258 rx_ring->ps_page_dma = NULL;
2260 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2262 rx_ring->desc = NULL;
2266 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2267 * @adapter: board private structure
2269 * Free all receive software resources
2273 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2277 for (i = 0; i < adapter->num_rx_queues; i++)
2278 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2282 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2283 * @adapter: board private structure
2284 * @rx_ring: ring to free buffers from
2288 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2289 struct e1000_rx_ring *rx_ring)
2291 struct e1000_buffer *buffer_info;
2292 struct e1000_ps_page *ps_page;
2293 struct e1000_ps_page_dma *ps_page_dma;
2294 struct pci_dev *pdev = adapter->pdev;
2298 /* Free all the Rx ring sk_buffs */
2299 for (i = 0; i < rx_ring->count; i++) {
2300 buffer_info = &rx_ring->buffer_info[i];
2301 if (buffer_info->skb) {
2302 pci_unmap_single(pdev,
2304 buffer_info->length,
2305 PCI_DMA_FROMDEVICE);
2307 dev_kfree_skb(buffer_info->skb);
2308 buffer_info->skb = NULL;
2310 ps_page = &rx_ring->ps_page[i];
2311 ps_page_dma = &rx_ring->ps_page_dma[i];
2312 for (j = 0; j < adapter->rx_ps_pages; j++) {
2313 if (!ps_page->ps_page[j]) break;
2314 pci_unmap_page(pdev,
2315 ps_page_dma->ps_page_dma[j],
2316 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2317 ps_page_dma->ps_page_dma[j] = 0;
2318 put_page(ps_page->ps_page[j]);
2319 ps_page->ps_page[j] = NULL;
2323 size = sizeof(struct e1000_buffer) * rx_ring->count;
2324 memset(rx_ring->buffer_info, 0, size);
2325 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2326 memset(rx_ring->ps_page, 0, size);
2327 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2328 memset(rx_ring->ps_page_dma, 0, size);
2330 /* Zero out the descriptor ring */
2332 memset(rx_ring->desc, 0, rx_ring->size);
2334 rx_ring->next_to_clean = 0;
2335 rx_ring->next_to_use = 0;
2337 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2338 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2342 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2343 * @adapter: board private structure
2347 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2351 for (i = 0; i < adapter->num_rx_queues; i++)
2352 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2355 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2356 * and memory write and invalidate disabled for certain operations
2359 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2361 struct net_device *netdev = adapter->netdev;
2364 e1000_pci_clear_mwi(&adapter->hw);
2366 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2367 rctl |= E1000_RCTL_RST;
2368 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2369 E1000_WRITE_FLUSH(&adapter->hw);
2372 if (netif_running(netdev))
2373 e1000_clean_all_rx_rings(adapter);
2377 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2379 struct net_device *netdev = adapter->netdev;
2382 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2383 rctl &= ~E1000_RCTL_RST;
2384 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2385 E1000_WRITE_FLUSH(&adapter->hw);
2388 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2389 e1000_pci_set_mwi(&adapter->hw);
2391 if (netif_running(netdev)) {
2392 /* No need to loop, because 82542 supports only 1 queue */
2393 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2394 e1000_configure_rx(adapter);
2395 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2400 * e1000_set_mac - Change the Ethernet Address of the NIC
2401 * @netdev: network interface device structure
2402 * @p: pointer to an address structure
2404 * Returns 0 on success, negative on failure
2408 e1000_set_mac(struct net_device *netdev, void *p)
2410 struct e1000_adapter *adapter = netdev_priv(netdev);
2411 struct sockaddr *addr = p;
2413 if (!is_valid_ether_addr(addr->sa_data))
2414 return -EADDRNOTAVAIL;
2416 /* 82542 2.0 needs to be in reset to write receive address registers */
2418 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2419 e1000_enter_82542_rst(adapter);
2421 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2422 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2424 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2426 /* With 82571 controllers, LAA may be overwritten (with the default)
2427 * due to controller reset from the other port. */
2428 if (adapter->hw.mac_type == e1000_82571) {
2429 /* activate the work around */
2430 adapter->hw.laa_is_present = 1;
2432 /* Hold a copy of the LAA in RAR[14] This is done so that
2433 * between the time RAR[0] gets clobbered and the time it
2434 * gets fixed (in e1000_watchdog), the actual LAA is in one
2435 * of the RARs and no incoming packets directed to this port
2436 * are dropped. Eventaully the LAA will be in RAR[0] and
2438 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2439 E1000_RAR_ENTRIES - 1);
2442 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2443 e1000_leave_82542_rst(adapter);
2449 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2450 * @netdev: network interface device structure
2452 * The set_rx_mode entry point is called whenever the unicast or multicast
2453 * address lists or the network interface flags are updated. This routine is
2454 * responsible for configuring the hardware for proper unicast, multicast,
2455 * promiscuous mode, and all-multi behavior.
2459 e1000_set_rx_mode(struct net_device *netdev)
2461 struct e1000_adapter *adapter = netdev_priv(netdev);
2462 struct e1000_hw *hw = &adapter->hw;
2463 struct dev_addr_list *uc_ptr;
2464 struct dev_addr_list *mc_ptr;
2466 uint32_t hash_value;
2467 int i, rar_entries = E1000_RAR_ENTRIES;
2468 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2469 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2470 E1000_NUM_MTA_REGISTERS;
2472 if (adapter->hw.mac_type == e1000_ich8lan)
2473 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2475 /* reserve RAR[14] for LAA over-write work-around */
2476 if (adapter->hw.mac_type == e1000_82571)
2479 /* Check for Promiscuous and All Multicast modes */
2481 rctl = E1000_READ_REG(hw, RCTL);
2483 if (netdev->flags & IFF_PROMISC) {
2484 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2485 } else if (netdev->flags & IFF_ALLMULTI) {
2486 rctl |= E1000_RCTL_MPE;
2488 rctl &= ~E1000_RCTL_MPE;
2492 if (netdev->uc_count > rar_entries - 1) {
2493 rctl |= E1000_RCTL_UPE;
2494 } else if (!(netdev->flags & IFF_PROMISC)) {
2495 rctl &= ~E1000_RCTL_UPE;
2496 uc_ptr = netdev->uc_list;
2499 E1000_WRITE_REG(hw, RCTL, rctl);
2501 /* 82542 2.0 needs to be in reset to write receive address registers */
2503 if (hw->mac_type == e1000_82542_rev2_0)
2504 e1000_enter_82542_rst(adapter);
2506 /* load the first 14 addresses into the exact filters 1-14. Unicast
2507 * addresses take precedence to avoid disabling unicast filtering
2510 * RAR 0 is used for the station MAC adddress
2511 * if there are not 14 addresses, go ahead and clear the filters
2512 * -- with 82571 controllers only 0-13 entries are filled here
2514 mc_ptr = netdev->mc_list;
2516 for (i = 1; i < rar_entries; i++) {
2518 e1000_rar_set(hw, uc_ptr->da_addr, i);
2519 uc_ptr = uc_ptr->next;
2520 } else if (mc_ptr) {
2521 e1000_rar_set(hw, mc_ptr->da_addr, i);
2522 mc_ptr = mc_ptr->next;
2524 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2525 E1000_WRITE_FLUSH(hw);
2526 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2527 E1000_WRITE_FLUSH(hw);
2530 WARN_ON(uc_ptr != NULL);
2532 /* clear the old settings from the multicast hash table */
2534 for (i = 0; i < mta_reg_count; i++) {
2535 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2536 E1000_WRITE_FLUSH(hw);
2539 /* load any remaining addresses into the hash table */
2541 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2542 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2543 e1000_mta_set(hw, hash_value);
2546 if (hw->mac_type == e1000_82542_rev2_0)
2547 e1000_leave_82542_rst(adapter);
2550 /* Need to wait a few seconds after link up to get diagnostic information from
2554 e1000_update_phy_info(unsigned long data)
2556 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2557 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2561 * e1000_82547_tx_fifo_stall - Timer Call-back
2562 * @data: pointer to adapter cast into an unsigned long
2566 e1000_82547_tx_fifo_stall(unsigned long data)
2568 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2569 struct net_device *netdev = adapter->netdev;
2572 if (atomic_read(&adapter->tx_fifo_stall)) {
2573 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2574 E1000_READ_REG(&adapter->hw, TDH)) &&
2575 (E1000_READ_REG(&adapter->hw, TDFT) ==
2576 E1000_READ_REG(&adapter->hw, TDFH)) &&
2577 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2578 E1000_READ_REG(&adapter->hw, TDFHS))) {
2579 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2580 E1000_WRITE_REG(&adapter->hw, TCTL,
2581 tctl & ~E1000_TCTL_EN);
2582 E1000_WRITE_REG(&adapter->hw, TDFT,
2583 adapter->tx_head_addr);
2584 E1000_WRITE_REG(&adapter->hw, TDFH,
2585 adapter->tx_head_addr);
2586 E1000_WRITE_REG(&adapter->hw, TDFTS,
2587 adapter->tx_head_addr);
2588 E1000_WRITE_REG(&adapter->hw, TDFHS,
2589 adapter->tx_head_addr);
2590 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2591 E1000_WRITE_FLUSH(&adapter->hw);
2593 adapter->tx_fifo_head = 0;
2594 atomic_set(&adapter->tx_fifo_stall, 0);
2595 netif_wake_queue(netdev);
2597 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2603 * e1000_watchdog - Timer Call-back
2604 * @data: pointer to adapter cast into an unsigned long
2607 e1000_watchdog(unsigned long data)
2609 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2610 struct net_device *netdev = adapter->netdev;
2611 struct e1000_tx_ring *txdr = adapter->tx_ring;
2612 uint32_t link, tctl;
2615 ret_val = e1000_check_for_link(&adapter->hw);
2616 if ((ret_val == E1000_ERR_PHY) &&
2617 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2618 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2619 /* See e1000_kumeran_lock_loss_workaround() */
2621 "Gigabit has been disabled, downgrading speed\n");
2624 if (adapter->hw.mac_type == e1000_82573) {
2625 e1000_enable_tx_pkt_filtering(&adapter->hw);
2626 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2627 e1000_update_mng_vlan(adapter);
2630 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2631 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2632 link = !adapter->hw.serdes_link_down;
2634 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2637 if (!netif_carrier_ok(netdev)) {
2639 boolean_t txb2b = 1;
2640 e1000_get_speed_and_duplex(&adapter->hw,
2641 &adapter->link_speed,
2642 &adapter->link_duplex);
2644 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2645 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2646 "Flow Control: %s\n",
2647 adapter->link_speed,
2648 adapter->link_duplex == FULL_DUPLEX ?
2649 "Full Duplex" : "Half Duplex",
2650 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2651 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2652 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2653 E1000_CTRL_TFCE) ? "TX" : "None" )));
2655 /* tweak tx_queue_len according to speed/duplex
2656 * and adjust the timeout factor */
2657 netdev->tx_queue_len = adapter->tx_queue_len;
2658 adapter->tx_timeout_factor = 1;
2659 switch (adapter->link_speed) {
2662 netdev->tx_queue_len = 10;
2663 adapter->tx_timeout_factor = 8;
2667 netdev->tx_queue_len = 100;
2668 /* maybe add some timeout factor ? */
2672 if ((adapter->hw.mac_type == e1000_82571 ||
2673 adapter->hw.mac_type == e1000_82572) &&
2676 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2677 tarc0 &= ~(1 << 21);
2678 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2681 /* disable TSO for pcie and 10/100 speeds, to avoid
2682 * some hardware issues */
2683 if (!adapter->tso_force &&
2684 adapter->hw.bus_type == e1000_bus_type_pci_express){
2685 switch (adapter->link_speed) {
2689 "10/100 speed: disabling TSO\n");
2690 netdev->features &= ~NETIF_F_TSO;
2691 netdev->features &= ~NETIF_F_TSO6;
2694 netdev->features |= NETIF_F_TSO;
2695 netdev->features |= NETIF_F_TSO6;
2703 /* enable transmits in the hardware, need to do this
2704 * after setting TARC0 */
2705 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2706 tctl |= E1000_TCTL_EN;
2707 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2709 netif_carrier_on(netdev);
2710 netif_wake_queue(netdev);
2711 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2712 adapter->smartspeed = 0;
2714 /* make sure the receive unit is started */
2715 if (adapter->hw.rx_needs_kicking) {
2716 struct e1000_hw *hw = &adapter->hw;
2717 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2718 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2722 if (netif_carrier_ok(netdev)) {
2723 adapter->link_speed = 0;
2724 adapter->link_duplex = 0;
2725 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2726 netif_carrier_off(netdev);
2727 netif_stop_queue(netdev);
2728 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2730 /* 80003ES2LAN workaround--
2731 * For packet buffer work-around on link down event;
2732 * disable receives in the ISR and
2733 * reset device here in the watchdog
2735 if (adapter->hw.mac_type == e1000_80003es2lan)
2737 schedule_work(&adapter->reset_task);
2740 e1000_smartspeed(adapter);
2743 e1000_update_stats(adapter);
2745 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2746 adapter->tpt_old = adapter->stats.tpt;
2747 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2748 adapter->colc_old = adapter->stats.colc;
2750 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2751 adapter->gorcl_old = adapter->stats.gorcl;
2752 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2753 adapter->gotcl_old = adapter->stats.gotcl;
2755 e1000_update_adaptive(&adapter->hw);
2757 if (!netif_carrier_ok(netdev)) {
2758 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2759 /* We've lost link, so the controller stops DMA,
2760 * but we've got queued Tx work that's never going
2761 * to get done, so reset controller to flush Tx.
2762 * (Do the reset outside of interrupt context). */
2763 adapter->tx_timeout_count++;
2764 schedule_work(&adapter->reset_task);
2768 /* Cause software interrupt to ensure rx ring is cleaned */
2769 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2771 /* Force detection of hung controller every watchdog period */
2772 adapter->detect_tx_hung = TRUE;
2774 /* With 82571 controllers, LAA may be overwritten due to controller
2775 * reset from the other port. Set the appropriate LAA in RAR[0] */
2776 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2777 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2779 /* Reset the timer */
2780 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2783 enum latency_range {
2787 latency_invalid = 255
2791 * e1000_update_itr - update the dynamic ITR value based on statistics
2792 * Stores a new ITR value based on packets and byte
2793 * counts during the last interrupt. The advantage of per interrupt
2794 * computation is faster updates and more accurate ITR for the current
2795 * traffic pattern. Constants in this function were computed
2796 * based on theoretical maximum wire speed and thresholds were set based
2797 * on testing data as well as attempting to minimize response time
2798 * while increasing bulk throughput.
2799 * this functionality is controlled by the InterruptThrottleRate module
2800 * parameter (see e1000_param.c)
2801 * @adapter: pointer to adapter
2802 * @itr_setting: current adapter->itr
2803 * @packets: the number of packets during this measurement interval
2804 * @bytes: the number of bytes during this measurement interval
2806 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2807 uint16_t itr_setting,
2811 unsigned int retval = itr_setting;
2812 struct e1000_hw *hw = &adapter->hw;
2814 if (unlikely(hw->mac_type < e1000_82540))
2815 goto update_itr_done;
2818 goto update_itr_done;
2820 switch (itr_setting) {
2821 case lowest_latency:
2822 /* jumbo frames get bulk treatment*/
2823 if (bytes/packets > 8000)
2824 retval = bulk_latency;
2825 else if ((packets < 5) && (bytes > 512))
2826 retval = low_latency;
2828 case low_latency: /* 50 usec aka 20000 ints/s */
2829 if (bytes > 10000) {
2830 /* jumbo frames need bulk latency setting */
2831 if (bytes/packets > 8000)
2832 retval = bulk_latency;
2833 else if ((packets < 10) || ((bytes/packets) > 1200))
2834 retval = bulk_latency;
2835 else if ((packets > 35))
2836 retval = lowest_latency;
2837 } else if (bytes/packets > 2000)
2838 retval = bulk_latency;
2839 else if (packets <= 2 && bytes < 512)
2840 retval = lowest_latency;
2842 case bulk_latency: /* 250 usec aka 4000 ints/s */
2843 if (bytes > 25000) {
2845 retval = low_latency;
2846 } else if (bytes < 6000) {
2847 retval = low_latency;
2856 static void e1000_set_itr(struct e1000_adapter *adapter)
2858 struct e1000_hw *hw = &adapter->hw;
2859 uint16_t current_itr;
2860 uint32_t new_itr = adapter->itr;
2862 if (unlikely(hw->mac_type < e1000_82540))
2865 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2866 if (unlikely(adapter->link_speed != SPEED_1000)) {
2872 adapter->tx_itr = e1000_update_itr(adapter,
2874 adapter->total_tx_packets,
2875 adapter->total_tx_bytes);
2876 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2877 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2878 adapter->tx_itr = low_latency;
2880 adapter->rx_itr = e1000_update_itr(adapter,
2882 adapter->total_rx_packets,
2883 adapter->total_rx_bytes);
2884 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2885 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2886 adapter->rx_itr = low_latency;
2888 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2890 switch (current_itr) {
2891 /* counts and packets in update_itr are dependent on these numbers */
2892 case lowest_latency:
2896 new_itr = 20000; /* aka hwitr = ~200 */
2906 if (new_itr != adapter->itr) {
2907 /* this attempts to bias the interrupt rate towards Bulk
2908 * by adding intermediate steps when interrupt rate is
2910 new_itr = new_itr > adapter->itr ?
2911 min(adapter->itr + (new_itr >> 2), new_itr) :
2913 adapter->itr = new_itr;
2914 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2920 #define E1000_TX_FLAGS_CSUM 0x00000001
2921 #define E1000_TX_FLAGS_VLAN 0x00000002
2922 #define E1000_TX_FLAGS_TSO 0x00000004
2923 #define E1000_TX_FLAGS_IPV4 0x00000008
2924 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2925 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2928 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2929 struct sk_buff *skb)
2931 struct e1000_context_desc *context_desc;
2932 struct e1000_buffer *buffer_info;
2934 uint32_t cmd_length = 0;
2935 uint16_t ipcse = 0, tucse, mss;
2936 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2939 if (skb_is_gso(skb)) {
2940 if (skb_header_cloned(skb)) {
2941 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2946 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2947 mss = skb_shinfo(skb)->gso_size;
2948 if (skb->protocol == htons(ETH_P_IP)) {
2949 struct iphdr *iph = ip_hdr(skb);
2952 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2956 cmd_length = E1000_TXD_CMD_IP;
2957 ipcse = skb_transport_offset(skb) - 1;
2958 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2959 ipv6_hdr(skb)->payload_len = 0;
2960 tcp_hdr(skb)->check =
2961 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2962 &ipv6_hdr(skb)->daddr,
2966 ipcss = skb_network_offset(skb);
2967 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2968 tucss = skb_transport_offset(skb);
2969 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2972 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2973 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2975 i = tx_ring->next_to_use;
2976 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2977 buffer_info = &tx_ring->buffer_info[i];
2979 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2980 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2981 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2982 context_desc->upper_setup.tcp_fields.tucss = tucss;
2983 context_desc->upper_setup.tcp_fields.tucso = tucso;
2984 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2985 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2986 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2987 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2989 buffer_info->time_stamp = jiffies;
2990 buffer_info->next_to_watch = i;
2992 if (++i == tx_ring->count) i = 0;
2993 tx_ring->next_to_use = i;
3001 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3002 struct sk_buff *skb)
3004 struct e1000_context_desc *context_desc;
3005 struct e1000_buffer *buffer_info;
3009 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
3010 css = skb_transport_offset(skb);
3012 i = tx_ring->next_to_use;
3013 buffer_info = &tx_ring->buffer_info[i];
3014 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3016 context_desc->lower_setup.ip_config = 0;
3017 context_desc->upper_setup.tcp_fields.tucss = css;
3018 context_desc->upper_setup.tcp_fields.tucso =
3019 css + skb->csum_offset;
3020 context_desc->upper_setup.tcp_fields.tucse = 0;
3021 context_desc->tcp_seg_setup.data = 0;
3022 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3024 buffer_info->time_stamp = jiffies;
3025 buffer_info->next_to_watch = i;
3027 if (unlikely(++i == tx_ring->count)) i = 0;
3028 tx_ring->next_to_use = i;
3036 #define E1000_MAX_TXD_PWR 12
3037 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
3040 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3041 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3042 unsigned int nr_frags, unsigned int mss)
3044 struct e1000_buffer *buffer_info;
3045 unsigned int len = skb->len;
3046 unsigned int offset = 0, size, count = 0, i;
3048 len -= skb->data_len;
3050 i = tx_ring->next_to_use;
3053 buffer_info = &tx_ring->buffer_info[i];
3054 size = min(len, max_per_txd);
3055 /* Workaround for Controller erratum --
3056 * descriptor for non-tso packet in a linear SKB that follows a
3057 * tso gets written back prematurely before the data is fully
3058 * DMA'd to the controller */
3059 if (!skb->data_len && tx_ring->last_tx_tso &&
3061 tx_ring->last_tx_tso = 0;
3065 /* Workaround for premature desc write-backs
3066 * in TSO mode. Append 4-byte sentinel desc */
3067 if (unlikely(mss && !nr_frags && size == len && size > 8))
3069 /* work-around for errata 10 and it applies
3070 * to all controllers in PCI-X mode
3071 * The fix is to make sure that the first descriptor of a
3072 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3074 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3075 (size > 2015) && count == 0))
3078 /* Workaround for potential 82544 hang in PCI-X. Avoid
3079 * terminating buffers within evenly-aligned dwords. */
3080 if (unlikely(adapter->pcix_82544 &&
3081 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3085 buffer_info->length = size;
3087 pci_map_single(adapter->pdev,
3091 buffer_info->time_stamp = jiffies;
3092 buffer_info->next_to_watch = i;
3097 if (unlikely(++i == tx_ring->count)) i = 0;
3100 for (f = 0; f < nr_frags; f++) {
3101 struct skb_frag_struct *frag;
3103 frag = &skb_shinfo(skb)->frags[f];
3105 offset = frag->page_offset;
3108 buffer_info = &tx_ring->buffer_info[i];
3109 size = min(len, max_per_txd);
3110 /* Workaround for premature desc write-backs
3111 * in TSO mode. Append 4-byte sentinel desc */
3112 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3114 /* Workaround for potential 82544 hang in PCI-X.
3115 * Avoid terminating buffers within evenly-aligned
3117 if (unlikely(adapter->pcix_82544 &&
3118 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3122 buffer_info->length = size;
3124 pci_map_page(adapter->pdev,
3129 buffer_info->time_stamp = jiffies;
3130 buffer_info->next_to_watch = i;
3135 if (unlikely(++i == tx_ring->count)) i = 0;
3139 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3140 tx_ring->buffer_info[i].skb = skb;
3141 tx_ring->buffer_info[first].next_to_watch = i;
3147 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3148 int tx_flags, int count)
3150 struct e1000_tx_desc *tx_desc = NULL;
3151 struct e1000_buffer *buffer_info;
3152 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3155 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3156 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3158 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3160 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3161 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3164 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3165 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3166 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3169 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3170 txd_lower |= E1000_TXD_CMD_VLE;
3171 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3174 i = tx_ring->next_to_use;
3177 buffer_info = &tx_ring->buffer_info[i];
3178 tx_desc = E1000_TX_DESC(*tx_ring, i);
3179 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3180 tx_desc->lower.data =
3181 cpu_to_le32(txd_lower | buffer_info->length);
3182 tx_desc->upper.data = cpu_to_le32(txd_upper);
3183 if (unlikely(++i == tx_ring->count)) i = 0;
3186 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3188 /* Force memory writes to complete before letting h/w
3189 * know there are new descriptors to fetch. (Only
3190 * applicable for weak-ordered memory model archs,
3191 * such as IA-64). */
3194 tx_ring->next_to_use = i;
3195 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3196 /* we need this if more than one processor can write to our tail
3197 * at a time, it syncronizes IO on IA64/Altix systems */
3202 * 82547 workaround to avoid controller hang in half-duplex environment.
3203 * The workaround is to avoid queuing a large packet that would span
3204 * the internal Tx FIFO ring boundary by notifying the stack to resend
3205 * the packet at a later time. This gives the Tx FIFO an opportunity to
3206 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3207 * to the beginning of the Tx FIFO.
3210 #define E1000_FIFO_HDR 0x10
3211 #define E1000_82547_PAD_LEN 0x3E0
3214 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3216 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3217 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3219 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3221 if (adapter->link_duplex != HALF_DUPLEX)
3222 goto no_fifo_stall_required;
3224 if (atomic_read(&adapter->tx_fifo_stall))
3227 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3228 atomic_set(&adapter->tx_fifo_stall, 1);
3232 no_fifo_stall_required:
3233 adapter->tx_fifo_head += skb_fifo_len;
3234 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3235 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3239 #define MINIMUM_DHCP_PACKET_SIZE 282
3241 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3243 struct e1000_hw *hw = &adapter->hw;
3244 uint16_t length, offset;
3245 if (vlan_tx_tag_present(skb)) {
3246 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3247 ( adapter->hw.mng_cookie.status &
3248 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3251 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3252 struct ethhdr *eth = (struct ethhdr *) skb->data;
3253 if ((htons(ETH_P_IP) == eth->h_proto)) {
3254 const struct iphdr *ip =
3255 (struct iphdr *)((uint8_t *)skb->data+14);
3256 if (IPPROTO_UDP == ip->protocol) {
3257 struct udphdr *udp =
3258 (struct udphdr *)((uint8_t *)ip +
3260 if (ntohs(udp->dest) == 67) {
3261 offset = (uint8_t *)udp + 8 - skb->data;
3262 length = skb->len - offset;
3264 return e1000_mng_write_dhcp_info(hw,
3274 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3276 struct e1000_adapter *adapter = netdev_priv(netdev);
3277 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3279 netif_stop_queue(netdev);
3280 /* Herbert's original patch had:
3281 * smp_mb__after_netif_stop_queue();
3282 * but since that doesn't exist yet, just open code it. */
3285 /* We need to check again in a case another CPU has just
3286 * made room available. */
3287 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3291 netif_start_queue(netdev);
3292 ++adapter->restart_queue;
3296 static int e1000_maybe_stop_tx(struct net_device *netdev,
3297 struct e1000_tx_ring *tx_ring, int size)
3299 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3301 return __e1000_maybe_stop_tx(netdev, size);
3304 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3306 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3308 struct e1000_adapter *adapter = netdev_priv(netdev);
3309 struct e1000_tx_ring *tx_ring;
3310 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3311 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3312 unsigned int tx_flags = 0;
3313 unsigned int len = skb->len - skb->data_len;
3314 unsigned long flags;
3315 unsigned int nr_frags;
3321 /* This goes back to the question of how to logically map a tx queue
3322 * to a flow. Right now, performance is impacted slightly negatively
3323 * if using multiple tx queues. If the stack breaks away from a
3324 * single qdisc implementation, we can look at this again. */
3325 tx_ring = adapter->tx_ring;
3327 if (unlikely(skb->len <= 0)) {
3328 dev_kfree_skb_any(skb);
3329 return NETDEV_TX_OK;
3332 /* 82571 and newer doesn't need the workaround that limited descriptor
3334 if (adapter->hw.mac_type >= e1000_82571)
3337 mss = skb_shinfo(skb)->gso_size;
3338 /* The controller does a simple calculation to
3339 * make sure there is enough room in the FIFO before
3340 * initiating the DMA for each buffer. The calc is:
3341 * 4 = ceil(buffer len/mss). To make sure we don't
3342 * overrun the FIFO, adjust the max buffer len if mss
3346 max_per_txd = min(mss << 2, max_per_txd);
3347 max_txd_pwr = fls(max_per_txd) - 1;
3349 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3350 * points to just header, pull a few bytes of payload from
3351 * frags into skb->data */
3352 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3353 if (skb->data_len && hdr_len == len) {
3354 switch (adapter->hw.mac_type) {
3355 unsigned int pull_size;
3357 /* Make sure we have room to chop off 4 bytes,
3358 * and that the end alignment will work out to
3359 * this hardware's requirements
3360 * NOTE: this is a TSO only workaround
3361 * if end byte alignment not correct move us
3362 * into the next dword */
3363 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3370 pull_size = min((unsigned int)4, skb->data_len);
3371 if (!__pskb_pull_tail(skb, pull_size)) {
3373 "__pskb_pull_tail failed.\n");
3374 dev_kfree_skb_any(skb);
3375 return NETDEV_TX_OK;
3377 len = skb->len - skb->data_len;
3386 /* reserve a descriptor for the offload context */
3387 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3391 /* Controller Erratum workaround */
3392 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3395 count += TXD_USE_COUNT(len, max_txd_pwr);
3397 if (adapter->pcix_82544)
3400 /* work-around for errata 10 and it applies to all controllers
3401 * in PCI-X mode, so add one more descriptor to the count
3403 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3407 nr_frags = skb_shinfo(skb)->nr_frags;
3408 for (f = 0; f < nr_frags; f++)
3409 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3411 if (adapter->pcix_82544)
3415 if (adapter->hw.tx_pkt_filtering &&
3416 (adapter->hw.mac_type == e1000_82573))
3417 e1000_transfer_dhcp_info(adapter, skb);
3419 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3420 /* Collision - tell upper layer to requeue */
3421 return NETDEV_TX_LOCKED;
3423 /* need: count + 2 desc gap to keep tail from touching
3424 * head, otherwise try next time */
3425 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3426 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3427 return NETDEV_TX_BUSY;
3430 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3431 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3432 netif_stop_queue(netdev);
3433 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3434 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3435 return NETDEV_TX_BUSY;
3439 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3440 tx_flags |= E1000_TX_FLAGS_VLAN;
3441 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3444 first = tx_ring->next_to_use;
3446 tso = e1000_tso(adapter, tx_ring, skb);
3448 dev_kfree_skb_any(skb);
3449 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3450 return NETDEV_TX_OK;
3454 tx_ring->last_tx_tso = 1;
3455 tx_flags |= E1000_TX_FLAGS_TSO;
3456 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3457 tx_flags |= E1000_TX_FLAGS_CSUM;
3459 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3460 * 82571 hardware supports TSO capabilities for IPv6 as well...
3461 * no longer assume, we must. */
3462 if (likely(skb->protocol == htons(ETH_P_IP)))
3463 tx_flags |= E1000_TX_FLAGS_IPV4;
3465 e1000_tx_queue(adapter, tx_ring, tx_flags,
3466 e1000_tx_map(adapter, tx_ring, skb, first,
3467 max_per_txd, nr_frags, mss));
3469 netdev->trans_start = jiffies;
3471 /* Make sure there is space in the ring for the next send. */
3472 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3474 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3475 return NETDEV_TX_OK;
3479 * e1000_tx_timeout - Respond to a Tx Hang
3480 * @netdev: network interface device structure
3484 e1000_tx_timeout(struct net_device *netdev)
3486 struct e1000_adapter *adapter = netdev_priv(netdev);
3488 /* Do the reset outside of interrupt context */
3489 adapter->tx_timeout_count++;
3490 schedule_work(&adapter->reset_task);
3494 e1000_reset_task(struct work_struct *work)
3496 struct e1000_adapter *adapter =
3497 container_of(work, struct e1000_adapter, reset_task);
3499 e1000_reinit_locked(adapter);
3503 * e1000_get_stats - Get System Network Statistics
3504 * @netdev: network interface device structure
3506 * Returns the address of the device statistics structure.
3507 * The statistics are actually updated from the timer callback.
3510 static struct net_device_stats *
3511 e1000_get_stats(struct net_device *netdev)
3513 struct e1000_adapter *adapter = netdev_priv(netdev);
3515 /* only return the current stats */
3516 return &adapter->net_stats;
3520 * e1000_change_mtu - Change the Maximum Transfer Unit
3521 * @netdev: network interface device structure
3522 * @new_mtu: new value for maximum frame size
3524 * Returns 0 on success, negative on failure
3528 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3530 struct e1000_adapter *adapter = netdev_priv(netdev);
3531 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3532 uint16_t eeprom_data = 0;
3534 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3535 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3536 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3540 /* Adapter-specific max frame size limits. */
3541 switch (adapter->hw.mac_type) {
3542 case e1000_undefined ... e1000_82542_rev2_1:
3544 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3545 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3550 /* Jumbo Frames not supported if:
3551 * - this is not an 82573L device
3552 * - ASPM is enabled in any way (0x1A bits 3:2) */
3553 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3555 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3556 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3557 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3559 "Jumbo Frames not supported.\n");
3564 /* ERT will be enabled later to enable wire speed receives */
3566 /* fall through to get support */
3569 case e1000_80003es2lan:
3570 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3571 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3572 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3577 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3581 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3582 * means we reserve 2 more, this pushes us to allocate from the next
3584 * i.e. RXBUFFER_2048 --> size-4096 slab */
3586 if (max_frame <= E1000_RXBUFFER_256)
3587 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3588 else if (max_frame <= E1000_RXBUFFER_512)
3589 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3590 else if (max_frame <= E1000_RXBUFFER_1024)
3591 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3592 else if (max_frame <= E1000_RXBUFFER_2048)
3593 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3594 else if (max_frame <= E1000_RXBUFFER_4096)
3595 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3596 else if (max_frame <= E1000_RXBUFFER_8192)
3597 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3598 else if (max_frame <= E1000_RXBUFFER_16384)
3599 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3601 /* adjust allocation if LPE protects us, and we aren't using SBP */
3602 if (!adapter->hw.tbi_compatibility_on &&
3603 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3604 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3605 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3607 netdev->mtu = new_mtu;
3608 adapter->hw.max_frame_size = max_frame;
3610 if (netif_running(netdev))
3611 e1000_reinit_locked(adapter);
3617 * e1000_update_stats - Update the board statistics counters
3618 * @adapter: board private structure
3622 e1000_update_stats(struct e1000_adapter *adapter)
3624 struct e1000_hw *hw = &adapter->hw;
3625 struct pci_dev *pdev = adapter->pdev;
3626 unsigned long flags;
3629 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3632 * Prevent stats update while adapter is being reset, or if the pci
3633 * connection is down.
3635 if (adapter->link_speed == 0)
3637 if (pci_channel_offline(pdev))
3640 spin_lock_irqsave(&adapter->stats_lock, flags);
3642 /* these counters are modified from e1000_tbi_adjust_stats,
3643 * called from the interrupt context, so they must only
3644 * be written while holding adapter->stats_lock
3647 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3648 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3649 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3650 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3651 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3652 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3653 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3655 if (adapter->hw.mac_type != e1000_ich8lan) {
3656 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3657 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3658 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3659 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3660 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3661 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3664 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3665 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3666 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3667 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3668 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3669 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3670 adapter->stats.dc += E1000_READ_REG(hw, DC);
3671 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3672 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3673 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3674 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3675 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3676 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3677 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3678 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3679 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3680 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3681 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3682 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3683 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3684 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3685 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3686 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3687 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3688 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3689 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3691 if (adapter->hw.mac_type != e1000_ich8lan) {
3692 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3693 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3694 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3695 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3696 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3697 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3700 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3701 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3703 /* used for adaptive IFS */
3705 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3706 adapter->stats.tpt += hw->tx_packet_delta;
3707 hw->collision_delta = E1000_READ_REG(hw, COLC);
3708 adapter->stats.colc += hw->collision_delta;
3710 if (hw->mac_type >= e1000_82543) {
3711 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3712 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3713 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3714 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3715 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3716 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3718 if (hw->mac_type > e1000_82547_rev_2) {
3719 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3720 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3722 if (adapter->hw.mac_type != e1000_ich8lan) {
3723 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3724 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3725 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3726 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3727 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3728 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3729 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3733 /* Fill out the OS statistics structure */
3734 adapter->net_stats.multicast = adapter->stats.mprc;
3735 adapter->net_stats.collisions = adapter->stats.colc;
3739 /* RLEC on some newer hardware can be incorrect so build
3740 * our own version based on RUC and ROC */
3741 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3742 adapter->stats.crcerrs + adapter->stats.algnerrc +
3743 adapter->stats.ruc + adapter->stats.roc +
3744 adapter->stats.cexterr;
3745 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3746 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3747 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3748 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3749 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3752 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3753 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3754 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3755 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3756 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3757 if (adapter->hw.bad_tx_carr_stats_fd &&
3758 adapter->link_duplex == FULL_DUPLEX) {
3759 adapter->net_stats.tx_carrier_errors = 0;
3760 adapter->stats.tncrs = 0;
3763 /* Tx Dropped needs to be maintained elsewhere */
3766 if (hw->media_type == e1000_media_type_copper) {
3767 if ((adapter->link_speed == SPEED_1000) &&
3768 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3769 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3770 adapter->phy_stats.idle_errors += phy_tmp;
3773 if ((hw->mac_type <= e1000_82546) &&
3774 (hw->phy_type == e1000_phy_m88) &&
3775 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3776 adapter->phy_stats.receive_errors += phy_tmp;
3779 /* Management Stats */
3780 if (adapter->hw.has_smbus) {
3781 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3782 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3783 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3786 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3790 * e1000_intr_msi - Interrupt Handler
3791 * @irq: interrupt number
3792 * @data: pointer to a network interface device structure
3796 e1000_intr_msi(int irq, void *data)
3798 struct net_device *netdev = data;
3799 struct e1000_adapter *adapter = netdev_priv(netdev);
3800 struct e1000_hw *hw = &adapter->hw;
3801 #ifndef CONFIG_E1000_NAPI
3804 uint32_t icr = E1000_READ_REG(hw, ICR);
3806 #ifdef CONFIG_E1000_NAPI
3807 /* read ICR disables interrupts using IAM, so keep up with our
3808 * enable/disable accounting */
3809 atomic_inc(&adapter->irq_sem);
3811 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3812 hw->get_link_status = 1;
3813 /* 80003ES2LAN workaround-- For packet buffer work-around on
3814 * link down event; disable receives here in the ISR and reset
3815 * adapter in watchdog */
3816 if (netif_carrier_ok(netdev) &&
3817 (adapter->hw.mac_type == e1000_80003es2lan)) {
3818 /* disable receives */
3819 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3820 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3822 /* guard against interrupt when we're going down */
3823 if (!test_bit(__E1000_DOWN, &adapter->flags))
3824 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3827 #ifdef CONFIG_E1000_NAPI
3828 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3829 adapter->total_tx_bytes = 0;
3830 adapter->total_tx_packets = 0;
3831 adapter->total_rx_bytes = 0;
3832 adapter->total_rx_packets = 0;
3833 __netif_rx_schedule(netdev, &adapter->napi);
3835 e1000_irq_enable(adapter);
3837 adapter->total_tx_bytes = 0;
3838 adapter->total_rx_bytes = 0;
3839 adapter->total_tx_packets = 0;
3840 adapter->total_rx_packets = 0;
3842 for (i = 0; i < E1000_MAX_INTR; i++)
3843 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3844 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3847 if (likely(adapter->itr_setting & 3))
3848 e1000_set_itr(adapter);
3855 * e1000_intr - Interrupt Handler
3856 * @irq: interrupt number
3857 * @data: pointer to a network interface device structure
3861 e1000_intr(int irq, void *data)
3863 struct net_device *netdev = data;
3864 struct e1000_adapter *adapter = netdev_priv(netdev);
3865 struct e1000_hw *hw = &adapter->hw;
3866 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3867 #ifndef CONFIG_E1000_NAPI
3871 return IRQ_NONE; /* Not our interrupt */
3873 #ifdef CONFIG_E1000_NAPI
3874 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3875 * not set, then the adapter didn't send an interrupt */
3876 if (unlikely(hw->mac_type >= e1000_82571 &&
3877 !(icr & E1000_ICR_INT_ASSERTED)))
3880 /* Interrupt Auto-Mask...upon reading ICR,
3881 * interrupts are masked. No need for the
3882 * IMC write, but it does mean we should
3883 * account for it ASAP. */
3884 if (likely(hw->mac_type >= e1000_82571))
3885 atomic_inc(&adapter->irq_sem);
3888 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3889 hw->get_link_status = 1;
3890 /* 80003ES2LAN workaround--
3891 * For packet buffer work-around on link down event;
3892 * disable receives here in the ISR and
3893 * reset adapter in watchdog
3895 if (netif_carrier_ok(netdev) &&
3896 (adapter->hw.mac_type == e1000_80003es2lan)) {
3897 /* disable receives */
3898 rctl = E1000_READ_REG(hw, RCTL);
3899 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3901 /* guard against interrupt when we're going down */
3902 if (!test_bit(__E1000_DOWN, &adapter->flags))
3903 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3906 #ifdef CONFIG_E1000_NAPI
3907 if (unlikely(hw->mac_type < e1000_82571)) {
3908 /* disable interrupts, without the synchronize_irq bit */
3909 atomic_inc(&adapter->irq_sem);
3910 E1000_WRITE_REG(hw, IMC, ~0);
3911 E1000_WRITE_FLUSH(hw);
3913 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3914 adapter->total_tx_bytes = 0;
3915 adapter->total_tx_packets = 0;
3916 adapter->total_rx_bytes = 0;
3917 adapter->total_rx_packets = 0;
3918 __netif_rx_schedule(netdev, &adapter->napi);
3920 /* this really should not happen! if it does it is basically a
3921 * bug, but not a hard error, so enable ints and continue */
3922 e1000_irq_enable(adapter);
3924 /* Writing IMC and IMS is needed for 82547.
3925 * Due to Hub Link bus being occupied, an interrupt
3926 * de-assertion message is not able to be sent.
3927 * When an interrupt assertion message is generated later,
3928 * two messages are re-ordered and sent out.
3929 * That causes APIC to think 82547 is in de-assertion
3930 * state, while 82547 is in assertion state, resulting
3931 * in dead lock. Writing IMC forces 82547 into
3932 * de-assertion state.
3934 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3935 atomic_inc(&adapter->irq_sem);
3936 E1000_WRITE_REG(hw, IMC, ~0);
3939 adapter->total_tx_bytes = 0;
3940 adapter->total_rx_bytes = 0;
3941 adapter->total_tx_packets = 0;
3942 adapter->total_rx_packets = 0;
3944 for (i = 0; i < E1000_MAX_INTR; i++)
3945 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3946 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3949 if (likely(adapter->itr_setting & 3))
3950 e1000_set_itr(adapter);
3952 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3953 e1000_irq_enable(adapter);
3959 #ifdef CONFIG_E1000_NAPI
3961 * e1000_clean - NAPI Rx polling callback
3962 * @adapter: board private structure
3966 e1000_clean(struct napi_struct *napi, int budget)
3968 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3969 struct net_device *poll_dev = adapter->netdev;
3970 int tx_cleaned = 0, work_done = 0;
3972 /* Must NOT use netdev_priv macro here. */
3973 adapter = poll_dev->priv;
3975 /* e1000_clean is called per-cpu. This lock protects
3976 * tx_ring[0] from being cleaned by multiple cpus
3977 * simultaneously. A failure obtaining the lock means
3978 * tx_ring[0] is currently being cleaned anyway. */
3979 if (spin_trylock(&adapter->tx_queue_lock)) {
3980 tx_cleaned = e1000_clean_tx_irq(adapter,
3981 &adapter->tx_ring[0]);
3982 spin_unlock(&adapter->tx_queue_lock);
3985 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3986 &work_done, budget);
3991 /* If budget not fully consumed, exit the polling mode */
3992 if (work_done < budget) {
3993 if (likely(adapter->itr_setting & 3))
3994 e1000_set_itr(adapter);
3995 netif_rx_complete(poll_dev, napi);
3996 e1000_irq_enable(adapter);
4004 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4005 * @adapter: board private structure
4009 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4010 struct e1000_tx_ring *tx_ring)
4012 struct net_device *netdev = adapter->netdev;
4013 struct e1000_tx_desc *tx_desc, *eop_desc;
4014 struct e1000_buffer *buffer_info;
4015 unsigned int i, eop;
4016 #ifdef CONFIG_E1000_NAPI
4017 unsigned int count = 0;
4019 boolean_t cleaned = FALSE;
4020 unsigned int total_tx_bytes=0, total_tx_packets=0;
4022 i = tx_ring->next_to_clean;
4023 eop = tx_ring->buffer_info[i].next_to_watch;
4024 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4026 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4027 for (cleaned = FALSE; !cleaned; ) {
4028 tx_desc = E1000_TX_DESC(*tx_ring, i);
4029 buffer_info = &tx_ring->buffer_info[i];
4030 cleaned = (i == eop);
4033 struct sk_buff *skb = buffer_info->skb;
4034 unsigned int segs, bytecount;
4035 segs = skb_shinfo(skb)->gso_segs ?: 1;
4036 /* multiply data chunks by size of headers */
4037 bytecount = ((segs - 1) * skb_headlen(skb)) +
4039 total_tx_packets += segs;
4040 total_tx_bytes += bytecount;
4042 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4043 tx_desc->upper.data = 0;
4045 if (unlikely(++i == tx_ring->count)) i = 0;
4048 eop = tx_ring->buffer_info[i].next_to_watch;
4049 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4050 #ifdef CONFIG_E1000_NAPI
4051 #define E1000_TX_WEIGHT 64
4052 /* weight of a sort for tx, to avoid endless transmit cleanup */
4053 if (count++ == E1000_TX_WEIGHT) break;
4057 tx_ring->next_to_clean = i;
4059 #define TX_WAKE_THRESHOLD 32
4060 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4061 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4062 /* Make sure that anybody stopping the queue after this
4063 * sees the new next_to_clean.
4066 if (netif_queue_stopped(netdev)) {
4067 netif_wake_queue(netdev);
4068 ++adapter->restart_queue;
4072 if (adapter->detect_tx_hung) {
4073 /* Detect a transmit hang in hardware, this serializes the
4074 * check with the clearing of time_stamp and movement of i */
4075 adapter->detect_tx_hung = FALSE;
4076 if (tx_ring->buffer_info[eop].dma &&
4077 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4078 (adapter->tx_timeout_factor * HZ))
4079 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4080 E1000_STATUS_TXOFF)) {
4082 /* detected Tx unit hang */
4083 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4087 " next_to_use <%x>\n"
4088 " next_to_clean <%x>\n"
4089 "buffer_info[next_to_clean]\n"
4090 " time_stamp <%lx>\n"
4091 " next_to_watch <%x>\n"
4093 " next_to_watch.status <%x>\n",
4094 (unsigned long)((tx_ring - adapter->tx_ring) /
4095 sizeof(struct e1000_tx_ring)),
4096 readl(adapter->hw.hw_addr + tx_ring->tdh),
4097 readl(adapter->hw.hw_addr + tx_ring->tdt),
4098 tx_ring->next_to_use,
4099 tx_ring->next_to_clean,
4100 tx_ring->buffer_info[eop].time_stamp,
4103 eop_desc->upper.fields.status);
4104 netif_stop_queue(netdev);
4107 adapter->total_tx_bytes += total_tx_bytes;
4108 adapter->total_tx_packets += total_tx_packets;
4109 adapter->net_stats.tx_bytes += total_tx_bytes;
4110 adapter->net_stats.tx_packets += total_tx_packets;
4115 * e1000_rx_checksum - Receive Checksum Offload for 82543
4116 * @adapter: board private structure
4117 * @status_err: receive descriptor status and error fields
4118 * @csum: receive descriptor csum field
4119 * @sk_buff: socket buffer with received data
4123 e1000_rx_checksum(struct e1000_adapter *adapter,
4124 uint32_t status_err, uint32_t csum,
4125 struct sk_buff *skb)
4127 uint16_t status = (uint16_t)status_err;
4128 uint8_t errors = (uint8_t)(status_err >> 24);
4129 skb->ip_summed = CHECKSUM_NONE;
4131 /* 82543 or newer only */
4132 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4133 /* Ignore Checksum bit is set */
4134 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4135 /* TCP/UDP checksum error bit is set */
4136 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4137 /* let the stack verify checksum errors */
4138 adapter->hw_csum_err++;
4141 /* TCP/UDP Checksum has not been calculated */
4142 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4143 if (!(status & E1000_RXD_STAT_TCPCS))
4146 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4149 /* It must be a TCP or UDP packet with a valid checksum */
4150 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4151 /* TCP checksum is good */
4152 skb->ip_summed = CHECKSUM_UNNECESSARY;
4153 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4154 /* IP fragment with UDP payload */
4155 /* Hardware complements the payload checksum, so we undo it
4156 * and then put the value in host order for further stack use.
4158 __sum16 sum = (__force __sum16)htons(csum);
4159 skb->csum = csum_unfold(~sum);
4160 skb->ip_summed = CHECKSUM_COMPLETE;
4162 adapter->hw_csum_good++;
4166 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4167 * @adapter: board private structure
4171 #ifdef CONFIG_E1000_NAPI
4172 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4173 struct e1000_rx_ring *rx_ring,
4174 int *work_done, int work_to_do)
4176 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4177 struct e1000_rx_ring *rx_ring)
4180 struct net_device *netdev = adapter->netdev;
4181 struct pci_dev *pdev = adapter->pdev;
4182 struct e1000_rx_desc *rx_desc, *next_rxd;
4183 struct e1000_buffer *buffer_info, *next_buffer;
4184 unsigned long flags;
4188 int cleaned_count = 0;
4189 boolean_t cleaned = FALSE;
4190 unsigned int total_rx_bytes=0, total_rx_packets=0;
4192 i = rx_ring->next_to_clean;
4193 rx_desc = E1000_RX_DESC(*rx_ring, i);
4194 buffer_info = &rx_ring->buffer_info[i];
4196 while (rx_desc->status & E1000_RXD_STAT_DD) {
4197 struct sk_buff *skb;
4200 #ifdef CONFIG_E1000_NAPI
4201 if (*work_done >= work_to_do)
4205 status = rx_desc->status;
4206 skb = buffer_info->skb;
4207 buffer_info->skb = NULL;
4209 prefetch(skb->data - NET_IP_ALIGN);
4211 if (++i == rx_ring->count) i = 0;
4212 next_rxd = E1000_RX_DESC(*rx_ring, i);
4215 next_buffer = &rx_ring->buffer_info[i];
4219 pci_unmap_single(pdev,
4221 buffer_info->length,
4222 PCI_DMA_FROMDEVICE);
4224 length = le16_to_cpu(rx_desc->length);
4226 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4227 /* All receives must fit into a single buffer */
4228 E1000_DBG("%s: Receive packet consumed multiple"
4229 " buffers\n", netdev->name);
4231 buffer_info->skb = skb;
4235 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4236 last_byte = *(skb->data + length - 1);
4237 if (TBI_ACCEPT(&adapter->hw, status,
4238 rx_desc->errors, length, last_byte)) {
4239 spin_lock_irqsave(&adapter->stats_lock, flags);
4240 e1000_tbi_adjust_stats(&adapter->hw,
4243 spin_unlock_irqrestore(&adapter->stats_lock,
4248 buffer_info->skb = skb;
4253 /* adjust length to remove Ethernet CRC, this must be
4254 * done after the TBI_ACCEPT workaround above */
4257 /* probably a little skewed due to removing CRC */
4258 total_rx_bytes += length;
4261 /* code added for copybreak, this should improve
4262 * performance for small packets with large amounts
4263 * of reassembly being done in the stack */
4264 if (length < copybreak) {
4265 struct sk_buff *new_skb =
4266 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4268 skb_reserve(new_skb, NET_IP_ALIGN);
4269 skb_copy_to_linear_data_offset(new_skb,
4275 /* save the skb in buffer_info as good */
4276 buffer_info->skb = skb;
4279 /* else just continue with the old one */
4281 /* end copybreak code */
4282 skb_put(skb, length);
4284 /* Receive Checksum Offload */
4285 e1000_rx_checksum(adapter,
4286 (uint32_t)(status) |
4287 ((uint32_t)(rx_desc->errors) << 24),
4288 le16_to_cpu(rx_desc->csum), skb);
4290 skb->protocol = eth_type_trans(skb, netdev);
4291 #ifdef CONFIG_E1000_NAPI
4292 if (unlikely(adapter->vlgrp &&
4293 (status & E1000_RXD_STAT_VP))) {
4294 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4295 le16_to_cpu(rx_desc->special) &
4296 E1000_RXD_SPC_VLAN_MASK);
4298 netif_receive_skb(skb);
4300 #else /* CONFIG_E1000_NAPI */
4301 if (unlikely(adapter->vlgrp &&
4302 (status & E1000_RXD_STAT_VP))) {
4303 vlan_hwaccel_rx(skb, adapter->vlgrp,
4304 le16_to_cpu(rx_desc->special) &
4305 E1000_RXD_SPC_VLAN_MASK);
4309 #endif /* CONFIG_E1000_NAPI */
4310 netdev->last_rx = jiffies;
4313 rx_desc->status = 0;
4315 /* return some buffers to hardware, one at a time is too slow */
4316 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4317 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4321 /* use prefetched values */
4323 buffer_info = next_buffer;
4325 rx_ring->next_to_clean = i;
4327 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4329 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4331 adapter->total_rx_packets += total_rx_packets;
4332 adapter->total_rx_bytes += total_rx_bytes;
4333 adapter->net_stats.rx_bytes += total_rx_bytes;
4334 adapter->net_stats.rx_packets += total_rx_packets;
4339 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4340 * @adapter: board private structure
4344 #ifdef CONFIG_E1000_NAPI
4345 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4346 struct e1000_rx_ring *rx_ring,
4347 int *work_done, int work_to_do)
4349 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4350 struct e1000_rx_ring *rx_ring)
4353 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4354 struct net_device *netdev = adapter->netdev;
4355 struct pci_dev *pdev = adapter->pdev;
4356 struct e1000_buffer *buffer_info, *next_buffer;
4357 struct e1000_ps_page *ps_page;
4358 struct e1000_ps_page_dma *ps_page_dma;
4359 struct sk_buff *skb;
4361 uint32_t length, staterr;
4362 int cleaned_count = 0;
4363 boolean_t cleaned = FALSE;
4364 unsigned int total_rx_bytes=0, total_rx_packets=0;
4366 i = rx_ring->next_to_clean;
4367 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4368 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4369 buffer_info = &rx_ring->buffer_info[i];
4371 while (staterr & E1000_RXD_STAT_DD) {
4372 ps_page = &rx_ring->ps_page[i];
4373 ps_page_dma = &rx_ring->ps_page_dma[i];
4374 #ifdef CONFIG_E1000_NAPI
4375 if (unlikely(*work_done >= work_to_do))
4379 skb = buffer_info->skb;
4381 /* in the packet split case this is header only */
4382 prefetch(skb->data - NET_IP_ALIGN);
4384 if (++i == rx_ring->count) i = 0;
4385 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4388 next_buffer = &rx_ring->buffer_info[i];
4392 pci_unmap_single(pdev, buffer_info->dma,
4393 buffer_info->length,
4394 PCI_DMA_FROMDEVICE);
4396 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4397 E1000_DBG("%s: Packet Split buffers didn't pick up"
4398 " the full packet\n", netdev->name);
4399 dev_kfree_skb_irq(skb);
4403 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4404 dev_kfree_skb_irq(skb);
4408 length = le16_to_cpu(rx_desc->wb.middle.length0);
4410 if (unlikely(!length)) {
4411 E1000_DBG("%s: Last part of the packet spanning"
4412 " multiple descriptors\n", netdev->name);
4413 dev_kfree_skb_irq(skb);
4418 skb_put(skb, length);
4421 /* this looks ugly, but it seems compiler issues make it
4422 more efficient than reusing j */
4423 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4425 /* page alloc/put takes too long and effects small packet
4426 * throughput, so unsplit small packets and save the alloc/put*/
4427 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4429 /* there is no documentation about how to call
4430 * kmap_atomic, so we can't hold the mapping
4432 pci_dma_sync_single_for_cpu(pdev,
4433 ps_page_dma->ps_page_dma[0],
4435 PCI_DMA_FROMDEVICE);
4436 vaddr = kmap_atomic(ps_page->ps_page[0],
4437 KM_SKB_DATA_SOFTIRQ);
4438 memcpy(skb_tail_pointer(skb), vaddr, l1);
4439 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4440 pci_dma_sync_single_for_device(pdev,
4441 ps_page_dma->ps_page_dma[0],
4442 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4443 /* remove the CRC */
4450 for (j = 0; j < adapter->rx_ps_pages; j++) {
4451 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4453 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4454 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4455 ps_page_dma->ps_page_dma[j] = 0;
4456 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4458 ps_page->ps_page[j] = NULL;
4460 skb->data_len += length;
4461 skb->truesize += length;
4464 /* strip the ethernet crc, problem is we're using pages now so
4465 * this whole operation can get a little cpu intensive */
4466 pskb_trim(skb, skb->len - 4);
4469 total_rx_bytes += skb->len;
4472 e1000_rx_checksum(adapter, staterr,
4473 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4474 skb->protocol = eth_type_trans(skb, netdev);
4476 if (likely(rx_desc->wb.upper.header_status &
4477 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4478 adapter->rx_hdr_split++;
4479 #ifdef CONFIG_E1000_NAPI
4480 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4481 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4482 le16_to_cpu(rx_desc->wb.middle.vlan) &
4483 E1000_RXD_SPC_VLAN_MASK);
4485 netif_receive_skb(skb);
4487 #else /* CONFIG_E1000_NAPI */
4488 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4489 vlan_hwaccel_rx(skb, adapter->vlgrp,
4490 le16_to_cpu(rx_desc->wb.middle.vlan) &
4491 E1000_RXD_SPC_VLAN_MASK);
4495 #endif /* CONFIG_E1000_NAPI */
4496 netdev->last_rx = jiffies;
4499 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4500 buffer_info->skb = NULL;
4502 /* return some buffers to hardware, one at a time is too slow */
4503 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4504 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4508 /* use prefetched values */
4510 buffer_info = next_buffer;
4512 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4514 rx_ring->next_to_clean = i;
4516 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4518 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4520 adapter->total_rx_packets += total_rx_packets;
4521 adapter->total_rx_bytes += total_rx_bytes;
4522 adapter->net_stats.rx_bytes += total_rx_bytes;
4523 adapter->net_stats.rx_packets += total_rx_packets;
4528 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4529 * @adapter: address of board private structure
4533 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4534 struct e1000_rx_ring *rx_ring,
4537 struct net_device *netdev = adapter->netdev;
4538 struct pci_dev *pdev = adapter->pdev;
4539 struct e1000_rx_desc *rx_desc;
4540 struct e1000_buffer *buffer_info;
4541 struct sk_buff *skb;
4543 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4545 i = rx_ring->next_to_use;
4546 buffer_info = &rx_ring->buffer_info[i];
4548 while (cleaned_count--) {
4549 skb = buffer_info->skb;
4555 skb = netdev_alloc_skb(netdev, bufsz);
4556 if (unlikely(!skb)) {
4557 /* Better luck next round */
4558 adapter->alloc_rx_buff_failed++;
4562 /* Fix for errata 23, can't cross 64kB boundary */
4563 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4564 struct sk_buff *oldskb = skb;
4565 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4566 "at %p\n", bufsz, skb->data);
4567 /* Try again, without freeing the previous */
4568 skb = netdev_alloc_skb(netdev, bufsz);
4569 /* Failed allocation, critical failure */
4571 dev_kfree_skb(oldskb);
4575 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4578 dev_kfree_skb(oldskb);
4579 break; /* while !buffer_info->skb */
4582 /* Use new allocation */
4583 dev_kfree_skb(oldskb);
4585 /* Make buffer alignment 2 beyond a 16 byte boundary
4586 * this will result in a 16 byte aligned IP header after
4587 * the 14 byte MAC header is removed
4589 skb_reserve(skb, NET_IP_ALIGN);
4591 buffer_info->skb = skb;
4592 buffer_info->length = adapter->rx_buffer_len;
4594 buffer_info->dma = pci_map_single(pdev,
4596 adapter->rx_buffer_len,
4597 PCI_DMA_FROMDEVICE);
4599 /* Fix for errata 23, can't cross 64kB boundary */
4600 if (!e1000_check_64k_bound(adapter,
4601 (void *)(unsigned long)buffer_info->dma,
4602 adapter->rx_buffer_len)) {
4603 DPRINTK(RX_ERR, ERR,
4604 "dma align check failed: %u bytes at %p\n",
4605 adapter->rx_buffer_len,
4606 (void *)(unsigned long)buffer_info->dma);
4608 buffer_info->skb = NULL;
4610 pci_unmap_single(pdev, buffer_info->dma,
4611 adapter->rx_buffer_len,
4612 PCI_DMA_FROMDEVICE);
4614 break; /* while !buffer_info->skb */
4616 rx_desc = E1000_RX_DESC(*rx_ring, i);
4617 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4619 if (unlikely(++i == rx_ring->count))
4621 buffer_info = &rx_ring->buffer_info[i];
4624 if (likely(rx_ring->next_to_use != i)) {
4625 rx_ring->next_to_use = i;
4626 if (unlikely(i-- == 0))
4627 i = (rx_ring->count - 1);
4629 /* Force memory writes to complete before letting h/w
4630 * know there are new descriptors to fetch. (Only
4631 * applicable for weak-ordered memory model archs,
4632 * such as IA-64). */
4634 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4639 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4640 * @adapter: address of board private structure
4644 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4645 struct e1000_rx_ring *rx_ring,
4648 struct net_device *netdev = adapter->netdev;
4649 struct pci_dev *pdev = adapter->pdev;
4650 union e1000_rx_desc_packet_split *rx_desc;
4651 struct e1000_buffer *buffer_info;
4652 struct e1000_ps_page *ps_page;
4653 struct e1000_ps_page_dma *ps_page_dma;
4654 struct sk_buff *skb;
4657 i = rx_ring->next_to_use;
4658 buffer_info = &rx_ring->buffer_info[i];
4659 ps_page = &rx_ring->ps_page[i];
4660 ps_page_dma = &rx_ring->ps_page_dma[i];
4662 while (cleaned_count--) {
4663 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4665 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4666 if (j < adapter->rx_ps_pages) {
4667 if (likely(!ps_page->ps_page[j])) {
4668 ps_page->ps_page[j] =
4669 alloc_page(GFP_ATOMIC);
4670 if (unlikely(!ps_page->ps_page[j])) {
4671 adapter->alloc_rx_buff_failed++;
4674 ps_page_dma->ps_page_dma[j] =
4676 ps_page->ps_page[j],
4678 PCI_DMA_FROMDEVICE);
4680 /* Refresh the desc even if buffer_addrs didn't
4681 * change because each write-back erases
4684 rx_desc->read.buffer_addr[j+1] =
4685 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4687 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
4690 skb = netdev_alloc_skb(netdev,
4691 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4693 if (unlikely(!skb)) {
4694 adapter->alloc_rx_buff_failed++;
4698 /* Make buffer alignment 2 beyond a 16 byte boundary
4699 * this will result in a 16 byte aligned IP header after
4700 * the 14 byte MAC header is removed
4702 skb_reserve(skb, NET_IP_ALIGN);
4704 buffer_info->skb = skb;
4705 buffer_info->length = adapter->rx_ps_bsize0;
4706 buffer_info->dma = pci_map_single(pdev, skb->data,
4707 adapter->rx_ps_bsize0,
4708 PCI_DMA_FROMDEVICE);
4710 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4712 if (unlikely(++i == rx_ring->count)) i = 0;
4713 buffer_info = &rx_ring->buffer_info[i];
4714 ps_page = &rx_ring->ps_page[i];
4715 ps_page_dma = &rx_ring->ps_page_dma[i];
4719 if (likely(rx_ring->next_to_use != i)) {
4720 rx_ring->next_to_use = i;
4721 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4723 /* Force memory writes to complete before letting h/w
4724 * know there are new descriptors to fetch. (Only
4725 * applicable for weak-ordered memory model archs,
4726 * such as IA-64). */
4728 /* Hardware increments by 16 bytes, but packet split
4729 * descriptors are 32 bytes...so we increment tail
4732 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4737 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4742 e1000_smartspeed(struct e1000_adapter *adapter)
4744 uint16_t phy_status;
4747 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4748 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4751 if (adapter->smartspeed == 0) {
4752 /* If Master/Slave config fault is asserted twice,
4753 * we assume back-to-back */
4754 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4755 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4756 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4757 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4758 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4759 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4760 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4761 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4763 adapter->smartspeed++;
4764 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4765 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4767 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4768 MII_CR_RESTART_AUTO_NEG);
4769 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4774 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4775 /* If still no link, perhaps using 2/3 pair cable */
4776 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4777 phy_ctrl |= CR_1000T_MS_ENABLE;
4778 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4779 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4780 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4781 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4782 MII_CR_RESTART_AUTO_NEG);
4783 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4786 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4787 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4788 adapter->smartspeed = 0;
4799 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4805 return e1000_mii_ioctl(netdev, ifr, cmd);
4819 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4821 struct e1000_adapter *adapter = netdev_priv(netdev);
4822 struct mii_ioctl_data *data = if_mii(ifr);
4826 unsigned long flags;
4828 if (adapter->hw.media_type != e1000_media_type_copper)
4833 data->phy_id = adapter->hw.phy_addr;
4836 if (!capable(CAP_NET_ADMIN))
4838 spin_lock_irqsave(&adapter->stats_lock, flags);
4839 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4841 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4844 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4847 if (!capable(CAP_NET_ADMIN))
4849 if (data->reg_num & ~(0x1F))
4851 mii_reg = data->val_in;
4852 spin_lock_irqsave(&adapter->stats_lock, flags);
4853 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4855 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4858 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4859 if (adapter->hw.media_type == e1000_media_type_copper) {
4860 switch (data->reg_num) {
4862 if (mii_reg & MII_CR_POWER_DOWN)
4864 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4865 adapter->hw.autoneg = 1;
4866 adapter->hw.autoneg_advertised = 0x2F;
4869 spddplx = SPEED_1000;
4870 else if (mii_reg & 0x2000)
4871 spddplx = SPEED_100;
4874 spddplx += (mii_reg & 0x100)
4877 retval = e1000_set_spd_dplx(adapter,
4882 if (netif_running(adapter->netdev))
4883 e1000_reinit_locked(adapter);
4885 e1000_reset(adapter);
4887 case M88E1000_PHY_SPEC_CTRL:
4888 case M88E1000_EXT_PHY_SPEC_CTRL:
4889 if (e1000_phy_reset(&adapter->hw))
4894 switch (data->reg_num) {
4896 if (mii_reg & MII_CR_POWER_DOWN)
4898 if (netif_running(adapter->netdev))
4899 e1000_reinit_locked(adapter);
4901 e1000_reset(adapter);
4909 return E1000_SUCCESS;
4913 e1000_pci_set_mwi(struct e1000_hw *hw)
4915 struct e1000_adapter *adapter = hw->back;
4916 int ret_val = pci_set_mwi(adapter->pdev);
4919 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4923 e1000_pci_clear_mwi(struct e1000_hw *hw)
4925 struct e1000_adapter *adapter = hw->back;
4927 pci_clear_mwi(adapter->pdev);
4931 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4933 struct e1000_adapter *adapter = hw->back;
4934 return pcix_get_mmrbc(adapter->pdev);
4938 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4940 struct e1000_adapter *adapter = hw->back;
4941 pcix_set_mmrbc(adapter->pdev, mmrbc);
4945 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4947 struct e1000_adapter *adapter = hw->back;
4948 uint16_t cap_offset;
4950 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4952 return -E1000_ERR_CONFIG;
4954 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4956 return E1000_SUCCESS;
4960 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4966 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4968 struct e1000_adapter *adapter = netdev_priv(netdev);
4969 uint32_t ctrl, rctl;
4971 e1000_irq_disable(adapter);
4972 adapter->vlgrp = grp;
4975 /* enable VLAN tag insert/strip */
4976 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4977 ctrl |= E1000_CTRL_VME;
4978 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4980 if (adapter->hw.mac_type != e1000_ich8lan) {
4981 /* enable VLAN receive filtering */
4982 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4983 rctl |= E1000_RCTL_VFE;
4984 rctl &= ~E1000_RCTL_CFIEN;
4985 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4986 e1000_update_mng_vlan(adapter);
4989 /* disable VLAN tag insert/strip */
4990 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4991 ctrl &= ~E1000_CTRL_VME;
4992 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4994 if (adapter->hw.mac_type != e1000_ich8lan) {
4995 /* disable VLAN filtering */
4996 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4997 rctl &= ~E1000_RCTL_VFE;
4998 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4999 if (adapter->mng_vlan_id !=
5000 (uint16_t)E1000_MNG_VLAN_NONE) {
5001 e1000_vlan_rx_kill_vid(netdev,
5002 adapter->mng_vlan_id);
5003 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
5008 e1000_irq_enable(adapter);
5012 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5014 struct e1000_adapter *adapter = netdev_priv(netdev);
5015 uint32_t vfta, index;
5017 if ((adapter->hw.mng_cookie.status &
5018 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5019 (vid == adapter->mng_vlan_id))
5021 /* add VID to filter table */
5022 index = (vid >> 5) & 0x7F;
5023 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5024 vfta |= (1 << (vid & 0x1F));
5025 e1000_write_vfta(&adapter->hw, index, vfta);
5029 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5031 struct e1000_adapter *adapter = netdev_priv(netdev);
5032 uint32_t vfta, index;
5034 e1000_irq_disable(adapter);
5035 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5036 e1000_irq_enable(adapter);
5038 if ((adapter->hw.mng_cookie.status &
5039 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5040 (vid == adapter->mng_vlan_id)) {
5041 /* release control to f/w */
5042 e1000_release_hw_control(adapter);
5046 /* remove VID from filter table */
5047 index = (vid >> 5) & 0x7F;
5048 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5049 vfta &= ~(1 << (vid & 0x1F));
5050 e1000_write_vfta(&adapter->hw, index, vfta);
5054 e1000_restore_vlan(struct e1000_adapter *adapter)
5056 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5058 if (adapter->vlgrp) {
5060 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5061 if (!vlan_group_get_device(adapter->vlgrp, vid))
5063 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5069 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5071 adapter->hw.autoneg = 0;
5073 /* Fiber NICs only allow 1000 gbps Full duplex */
5074 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5075 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5076 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5081 case SPEED_10 + DUPLEX_HALF:
5082 adapter->hw.forced_speed_duplex = e1000_10_half;
5084 case SPEED_10 + DUPLEX_FULL:
5085 adapter->hw.forced_speed_duplex = e1000_10_full;
5087 case SPEED_100 + DUPLEX_HALF:
5088 adapter->hw.forced_speed_duplex = e1000_100_half;
5090 case SPEED_100 + DUPLEX_FULL:
5091 adapter->hw.forced_speed_duplex = e1000_100_full;
5093 case SPEED_1000 + DUPLEX_FULL:
5094 adapter->hw.autoneg = 1;
5095 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5097 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5099 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5106 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5108 struct net_device *netdev = pci_get_drvdata(pdev);
5109 struct e1000_adapter *adapter = netdev_priv(netdev);
5110 uint32_t ctrl, ctrl_ext, rctl, status;
5111 uint32_t wufc = adapter->wol;
5116 netif_device_detach(netdev);
5118 if (netif_running(netdev)) {
5119 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5120 e1000_down(adapter);
5124 retval = pci_save_state(pdev);
5129 status = E1000_READ_REG(&adapter->hw, STATUS);
5130 if (status & E1000_STATUS_LU)
5131 wufc &= ~E1000_WUFC_LNKC;
5134 e1000_setup_rctl(adapter);
5135 e1000_set_rx_mode(netdev);
5137 /* turn on all-multi mode if wake on multicast is enabled */
5138 if (wufc & E1000_WUFC_MC) {
5139 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5140 rctl |= E1000_RCTL_MPE;
5141 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5144 if (adapter->hw.mac_type >= e1000_82540) {
5145 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5146 /* advertise wake from D3Cold */
5147 #define E1000_CTRL_ADVD3WUC 0x00100000
5148 /* phy power management enable */
5149 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5150 ctrl |= E1000_CTRL_ADVD3WUC |
5151 E1000_CTRL_EN_PHY_PWR_MGMT;
5152 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5155 if (adapter->hw.media_type == e1000_media_type_fiber ||
5156 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5157 /* keep the laser running in D3 */
5158 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5159 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5160 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5163 /* Allow time for pending master requests to run */
5164 e1000_disable_pciex_master(&adapter->hw);
5166 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5167 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5168 pci_enable_wake(pdev, PCI_D3hot, 1);
5169 pci_enable_wake(pdev, PCI_D3cold, 1);
5171 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5172 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5173 pci_enable_wake(pdev, PCI_D3hot, 0);
5174 pci_enable_wake(pdev, PCI_D3cold, 0);
5177 e1000_release_manageability(adapter);
5179 /* make sure adapter isn't asleep if manageability is enabled */
5180 if (adapter->en_mng_pt) {
5181 pci_enable_wake(pdev, PCI_D3hot, 1);
5182 pci_enable_wake(pdev, PCI_D3cold, 1);
5185 if (adapter->hw.phy_type == e1000_phy_igp_3)
5186 e1000_phy_powerdown_workaround(&adapter->hw);
5188 if (netif_running(netdev))
5189 e1000_free_irq(adapter);
5191 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5192 * would have already happened in close and is redundant. */
5193 e1000_release_hw_control(adapter);
5195 pci_disable_device(pdev);
5197 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5204 e1000_resume(struct pci_dev *pdev)
5206 struct net_device *netdev = pci_get_drvdata(pdev);
5207 struct e1000_adapter *adapter = netdev_priv(netdev);
5210 pci_set_power_state(pdev, PCI_D0);
5211 pci_restore_state(pdev);
5212 if ((err = pci_enable_device(pdev))) {
5213 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5216 pci_set_master(pdev);
5218 pci_enable_wake(pdev, PCI_D3hot, 0);
5219 pci_enable_wake(pdev, PCI_D3cold, 0);
5221 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5224 e1000_power_up_phy(adapter);
5225 e1000_reset(adapter);
5226 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5228 e1000_init_manageability(adapter);
5230 if (netif_running(netdev))
5233 netif_device_attach(netdev);
5235 /* If the controller is 82573 and f/w is AMT, do not set
5236 * DRV_LOAD until the interface is up. For all other cases,
5237 * let the f/w know that the h/w is now under the control
5239 if (adapter->hw.mac_type != e1000_82573 ||
5240 !e1000_check_mng_mode(&adapter->hw))
5241 e1000_get_hw_control(adapter);
5247 static void e1000_shutdown(struct pci_dev *pdev)
5249 e1000_suspend(pdev, PMSG_SUSPEND);
5252 #ifdef CONFIG_NET_POLL_CONTROLLER
5254 * Polling 'interrupt' - used by things like netconsole to send skbs
5255 * without having to re-enable interrupts. It's not called while
5256 * the interrupt routine is executing.
5259 e1000_netpoll(struct net_device *netdev)
5261 struct e1000_adapter *adapter = netdev_priv(netdev);
5263 disable_irq(adapter->pdev->irq);
5264 e1000_intr(adapter->pdev->irq, netdev);
5265 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5266 #ifndef CONFIG_E1000_NAPI
5267 adapter->clean_rx(adapter, adapter->rx_ring);
5269 enable_irq(adapter->pdev->irq);
5274 * e1000_io_error_detected - called when PCI error is detected
5275 * @pdev: Pointer to PCI device
5276 * @state: The current pci conneection state
5278 * This function is called after a PCI bus error affecting
5279 * this device has been detected.
5281 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5283 struct net_device *netdev = pci_get_drvdata(pdev);
5284 struct e1000_adapter *adapter = netdev->priv;
5286 netif_device_detach(netdev);
5288 if (netif_running(netdev))
5289 e1000_down(adapter);
5290 pci_disable_device(pdev);
5292 /* Request a slot slot reset. */
5293 return PCI_ERS_RESULT_NEED_RESET;
5297 * e1000_io_slot_reset - called after the pci bus has been reset.
5298 * @pdev: Pointer to PCI device
5300 * Restart the card from scratch, as if from a cold-boot. Implementation
5301 * resembles the first-half of the e1000_resume routine.
5303 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5305 struct net_device *netdev = pci_get_drvdata(pdev);
5306 struct e1000_adapter *adapter = netdev->priv;
5308 if (pci_enable_device(pdev)) {
5309 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5310 return PCI_ERS_RESULT_DISCONNECT;
5312 pci_set_master(pdev);
5314 pci_enable_wake(pdev, PCI_D3hot, 0);
5315 pci_enable_wake(pdev, PCI_D3cold, 0);
5317 e1000_reset(adapter);
5318 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5320 return PCI_ERS_RESULT_RECOVERED;
5324 * e1000_io_resume - called when traffic can start flowing again.
5325 * @pdev: Pointer to PCI device
5327 * This callback is called when the error recovery driver tells us that
5328 * its OK to resume normal operation. Implementation resembles the
5329 * second-half of the e1000_resume routine.
5331 static void e1000_io_resume(struct pci_dev *pdev)
5333 struct net_device *netdev = pci_get_drvdata(pdev);
5334 struct e1000_adapter *adapter = netdev->priv;
5336 e1000_init_manageability(adapter);
5338 if (netif_running(netdev)) {
5339 if (e1000_up(adapter)) {
5340 printk("e1000: can't bring device back up after reset\n");
5345 netif_device_attach(netdev);
5347 /* If the controller is 82573 and f/w is AMT, do not set
5348 * DRV_LOAD until the interface is up. For all other cases,
5349 * let the f/w know that the h/w is now under the control
5351 if (adapter->hw.mac_type != e1000_82573 ||
5352 !e1000_check_mng_mode(&adapter->hw))
5353 e1000_get_hw_control(adapter);