2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
44 #include <asm/uaccess.h>
46 #include <acpi/acpi_bus.h>
47 #include <acpi/processor.h>
49 #define ACPI_PROCESSOR_COMPONENT 0x01000000
50 #define ACPI_PROCESSOR_CLASS "processor"
51 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
52 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
53 ACPI_MODULE_NAME("acpi_processor")
54 #define ACPI_PROCESSOR_FILE_POWER "power"
55 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
56 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
58 static void (*pm_idle_save) (void) __read_mostly;
59 module_param(max_cstate, uint, 0644);
61 static unsigned int nocst __read_mostly;
62 module_param(nocst, uint, 0000);
65 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
66 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
67 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
68 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
69 * reduce history for more aggressive entry into C3
71 static unsigned int bm_history __read_mostly =
72 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
73 module_param(bm_history, uint, 0644);
74 /* --------------------------------------------------------------------------
76 -------------------------------------------------------------------------- */
79 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
80 * For now disable this. Probably a bug somewhere else.
82 * To skip this limit, boot/load with a large max_cstate limit.
84 static int set_max_cstate(struct dmi_system_id *id)
86 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
89 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
90 " Override with \"processor.max_cstate=%d\"\n", id->ident,
91 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
93 max_cstate = (long)id->driver_data;
98 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
99 callers to only run once -AK */
100 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
101 { set_max_cstate, "IBM ThinkPad R40e", {
102 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
103 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
104 { set_max_cstate, "IBM ThinkPad R40e", {
105 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
106 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
107 { set_max_cstate, "IBM ThinkPad R40e", {
108 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
109 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
110 { set_max_cstate, "IBM ThinkPad R40e", {
111 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
112 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
113 { set_max_cstate, "IBM ThinkPad R40e", {
114 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
115 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
116 { set_max_cstate, "IBM ThinkPad R40e", {
117 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
118 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
119 { set_max_cstate, "IBM ThinkPad R40e", {
120 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
121 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
122 { set_max_cstate, "IBM ThinkPad R40e", {
123 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
124 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
125 { set_max_cstate, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
128 { set_max_cstate, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
131 { set_max_cstate, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
134 { set_max_cstate, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
137 { set_max_cstate, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
140 { set_max_cstate, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
143 { set_max_cstate, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
146 { set_max_cstate, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
149 { set_max_cstate, "Medion 41700", {
150 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
151 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
152 { set_max_cstate, "Clevo 5600D", {
153 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
154 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
159 static inline u32 ticks_elapsed(u32 t1, u32 t2)
163 else if (!acpi_fadt.tmr_val_ext)
164 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
166 return ((0xFFFFFFFF - t1) + t2);
170 acpi_processor_power_activate(struct acpi_processor *pr,
171 struct acpi_processor_cx *new)
173 struct acpi_processor_cx *old;
178 old = pr->power.state;
181 old->promotion.count = 0;
182 new->demotion.count = 0;
184 /* Cleanup from old state. */
188 /* Disable bus master reload */
189 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
190 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
191 ACPI_MTX_DO_NOT_LOCK);
196 /* Prepare to use new state. */
199 /* Enable bus master reload */
200 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
202 ACPI_MTX_DO_NOT_LOCK);
206 pr->power.state = new;
211 static void acpi_safe_halt(void)
213 current_thread_info()->status &= ~TS_POLLING;
214 smp_mb__after_clear_bit();
217 current_thread_info()->status |= TS_POLLING;
220 static atomic_t c3_cpu_count;
222 /* Common C-state entry for C2, C3, .. */
223 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
225 if (cstate->space_id == ACPI_CSTATE_FFH) {
226 /* Call into architectural FFH based C-state */
227 acpi_processor_ffh_cstate_enter(cstate);
230 /* IO port based C-state */
231 inb(cstate->address);
232 /* Dummy wait op - must do something useless after P_LVL2 read
233 because chipsets cannot guarantee that STPCLK# signal
234 gets asserted in time to freeze execution properly. */
235 unused = inl(acpi_fadt.xpm_tmr_blk.address);
239 static void acpi_processor_idle(void)
241 struct acpi_processor *pr = NULL;
242 struct acpi_processor_cx *cx = NULL;
243 struct acpi_processor_cx *next_state = NULL;
247 pr = processors[smp_processor_id()];
252 * Interrupts must be disabled during bus mastering calculations and
253 * for C2/C3 transitions.
258 * Check whether we truly need to go idle, or should
261 if (unlikely(need_resched())) {
266 cx = pr->power.state;
278 * Check for bus mastering activity (if required), record, and check
281 if (pr->flags.bm_check) {
283 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
288 pr->power.bm_activity <<= diff;
290 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
291 &bm_status, ACPI_MTX_DO_NOT_LOCK);
293 pr->power.bm_activity |= 0x1;
294 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
295 1, ACPI_MTX_DO_NOT_LOCK);
298 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
299 * the true state of bus mastering activity; forcing us to
300 * manually check the BMIDEA bit of each IDE channel.
302 else if (errata.piix4.bmisx) {
303 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
304 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
305 pr->power.bm_activity |= 0x1;
308 pr->power.bm_check_timestamp = jiffies;
311 * If bus mastering is or was active this jiffy, demote
312 * to avoid a faulty transition. Note that the processor
313 * won't enter a low-power state during this call (to this
314 * function) but should upon the next.
316 * TBD: A better policy might be to fallback to the demotion
317 * state (use it for this quantum only) istead of
318 * demoting -- and rely on duration as our sole demotion
319 * qualification. This may, however, introduce DMA
320 * issues (e.g. floppy DMA transfer overrun/underrun).
322 if ((pr->power.bm_activity & 0x1) &&
323 cx->demotion.threshold.bm) {
325 next_state = cx->demotion.state;
330 #ifdef CONFIG_HOTPLUG_CPU
332 * Check for P_LVL2_UP flag before entering C2 and above on
333 * an SMP system. We do it here instead of doing it at _CST/P_LVL
334 * detection phase, to work cleanly with logical CPU hotplug.
336 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
337 !pr->flags.has_cst && !acpi_fadt.plvl2_up)
338 cx = &pr->power.states[ACPI_STATE_C1];
344 * Invoke the current Cx state to put the processor to sleep.
346 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
347 current_thread_info()->status &= ~TS_POLLING;
348 smp_mb__after_clear_bit();
349 if (need_resched()) {
350 current_thread_info()->status |= TS_POLLING;
361 * Use the appropriate idle routine, the one that would
362 * be used without acpi C-states.
370 * TBD: Can't get time duration while in C1, as resumes
371 * go to an ISR rather than here. Need to instrument
372 * base interrupt handler.
374 sleep_ticks = 0xFFFFFFFF;
378 /* Get start time (ticks) */
379 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
381 acpi_cstate_enter(cx);
382 /* Get end time (ticks) */
383 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
385 #ifdef CONFIG_GENERIC_TIME
386 /* TSC halts in C2, so notify users */
389 /* Re-enable interrupts */
391 current_thread_info()->status |= TS_POLLING;
392 /* Compute time (ticks) that we were actually asleep */
394 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
399 if (pr->flags.bm_check) {
400 if (atomic_inc_return(&c3_cpu_count) ==
403 * All CPUs are trying to go to C3
404 * Disable bus master arbitration
406 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
407 ACPI_MTX_DO_NOT_LOCK);
410 /* SMP with no shared cache... Invalidate cache */
411 ACPI_FLUSH_CPU_CACHE();
414 /* Get start time (ticks) */
415 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
417 acpi_cstate_enter(cx);
418 /* Get end time (ticks) */
419 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
420 if (pr->flags.bm_check) {
421 /* Enable bus master arbitration */
422 atomic_dec(&c3_cpu_count);
423 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
424 ACPI_MTX_DO_NOT_LOCK);
427 #ifdef CONFIG_GENERIC_TIME
428 /* TSC halts in C3, so notify users */
431 /* Re-enable interrupts */
433 current_thread_info()->status |= TS_POLLING;
434 /* Compute time (ticks) that we were actually asleep */
436 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
444 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
445 cx->time += sleep_ticks;
447 next_state = pr->power.state;
449 #ifdef CONFIG_HOTPLUG_CPU
450 /* Don't do promotion/demotion */
451 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
452 !pr->flags.has_cst && !acpi_fadt.plvl2_up) {
461 * Track the number of longs (time asleep is greater than threshold)
462 * and promote when the count threshold is reached. Note that bus
463 * mastering activity may prevent promotions.
464 * Do not promote above max_cstate.
466 if (cx->promotion.state &&
467 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
468 if (sleep_ticks > cx->promotion.threshold.ticks &&
469 cx->promotion.state->latency <= system_latency_constraint()) {
470 cx->promotion.count++;
471 cx->demotion.count = 0;
472 if (cx->promotion.count >=
473 cx->promotion.threshold.count) {
474 if (pr->flags.bm_check) {
476 (pr->power.bm_activity & cx->
477 promotion.threshold.bm)) {
483 next_state = cx->promotion.state;
493 * Track the number of shorts (time asleep is less than time threshold)
494 * and demote when the usage threshold is reached.
496 if (cx->demotion.state) {
497 if (sleep_ticks < cx->demotion.threshold.ticks) {
498 cx->demotion.count++;
499 cx->promotion.count = 0;
500 if (cx->demotion.count >= cx->demotion.threshold.count) {
501 next_state = cx->demotion.state;
509 * Demote if current state exceeds max_cstate
510 * or if the latency of the current state is unacceptable
512 if ((pr->power.state - pr->power.states) > max_cstate ||
513 pr->power.state->latency > system_latency_constraint()) {
514 if (cx->demotion.state)
515 next_state = cx->demotion.state;
521 * If we're going to start using a new Cx state we must clean up
522 * from the previous and prepare to use the new.
524 if (next_state != pr->power.state)
525 acpi_processor_power_activate(pr, next_state);
528 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
531 unsigned int state_is_set = 0;
532 struct acpi_processor_cx *lower = NULL;
533 struct acpi_processor_cx *higher = NULL;
534 struct acpi_processor_cx *cx;
541 * This function sets the default Cx state policy (OS idle handler).
542 * Our scheme is to promote quickly to C2 but more conservatively
543 * to C3. We're favoring C2 for its characteristics of low latency
544 * (quick response), good power savings, and ability to allow bus
545 * mastering activity. Note that the Cx state policy is completely
546 * customizable and can be altered dynamically.
550 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
551 cx = &pr->power.states[i];
556 pr->power.state = cx;
565 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
566 cx = &pr->power.states[i];
571 cx->demotion.state = lower;
572 cx->demotion.threshold.ticks = cx->latency_ticks;
573 cx->demotion.threshold.count = 1;
574 if (cx->type == ACPI_STATE_C3)
575 cx->demotion.threshold.bm = bm_history;
582 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
583 cx = &pr->power.states[i];
588 cx->promotion.state = higher;
589 cx->promotion.threshold.ticks = cx->latency_ticks;
590 if (cx->type >= ACPI_STATE_C2)
591 cx->promotion.threshold.count = 4;
593 cx->promotion.threshold.count = 10;
594 if (higher->type == ACPI_STATE_C3)
595 cx->promotion.threshold.bm = bm_history;
604 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
613 /* if info is obtained from pblk/fadt, type equals state */
614 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
615 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
617 #ifndef CONFIG_HOTPLUG_CPU
619 * Check for P_LVL2_UP flag before entering C2 and above on
622 if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up)
626 /* determine C2 and C3 address from pblk */
627 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
628 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
630 /* determine latencies from FADT */
631 pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
632 pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
634 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
635 "lvl2[0x%08x] lvl3[0x%08x]\n",
636 pr->power.states[ACPI_STATE_C2].address,
637 pr->power.states[ACPI_STATE_C3].address));
642 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
644 if (!pr->power.states[ACPI_STATE_C1].valid) {
645 /* set the first C-State to C1 */
646 /* all processors need to support C1 */
647 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
648 pr->power.states[ACPI_STATE_C1].valid = 1;
650 /* the C0 state only exists as a filler in our array */
651 pr->power.states[ACPI_STATE_C0].valid = 1;
655 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
657 acpi_status status = 0;
661 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
662 union acpi_object *cst;
670 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
671 if (ACPI_FAILURE(status)) {
672 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
676 cst = (union acpi_object *)buffer.pointer;
678 /* There must be at least 2 elements */
679 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
680 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
685 count = cst->package.elements[0].integer.value;
687 /* Validate number of power states. */
688 if (count < 1 || count != cst->package.count - 1) {
689 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
694 /* Tell driver that at least _CST is supported. */
695 pr->flags.has_cst = 1;
697 for (i = 1; i <= count; i++) {
698 union acpi_object *element;
699 union acpi_object *obj;
700 struct acpi_power_register *reg;
701 struct acpi_processor_cx cx;
703 memset(&cx, 0, sizeof(cx));
705 element = (union acpi_object *)&(cst->package.elements[i]);
706 if (element->type != ACPI_TYPE_PACKAGE)
709 if (element->package.count != 4)
712 obj = (union acpi_object *)&(element->package.elements[0]);
714 if (obj->type != ACPI_TYPE_BUFFER)
717 reg = (struct acpi_power_register *)obj->buffer.pointer;
719 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
720 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
723 /* There should be an easy way to extract an integer... */
724 obj = (union acpi_object *)&(element->package.elements[1]);
725 if (obj->type != ACPI_TYPE_INTEGER)
728 cx.type = obj->integer.value;
730 * Some buggy BIOSes won't list C1 in _CST -
731 * Let acpi_processor_get_power_info_default() handle them later
733 if (i == 1 && cx.type != ACPI_STATE_C1)
736 cx.address = reg->address;
737 cx.index = current_count + 1;
739 cx.space_id = ACPI_CSTATE_SYSTEMIO;
740 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
741 if (acpi_processor_ffh_cstate_probe
742 (pr->id, &cx, reg) == 0) {
743 cx.space_id = ACPI_CSTATE_FFH;
744 } else if (cx.type != ACPI_STATE_C1) {
746 * C1 is a special case where FIXED_HARDWARE
747 * can be handled in non-MWAIT way as well.
748 * In that case, save this _CST entry info.
749 * That is, we retain space_id of SYSTEM_IO for
751 * Otherwise, ignore this info and continue.
757 obj = (union acpi_object *)&(element->package.elements[2]);
758 if (obj->type != ACPI_TYPE_INTEGER)
761 cx.latency = obj->integer.value;
763 obj = (union acpi_object *)&(element->package.elements[3]);
764 if (obj->type != ACPI_TYPE_INTEGER)
767 cx.power = obj->integer.value;
770 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
773 * We support total ACPI_PROCESSOR_MAX_POWER - 1
774 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
776 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
778 "Limiting number of power states to max (%d)\n",
779 ACPI_PROCESSOR_MAX_POWER);
781 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
786 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
789 /* Validate number of power states discovered */
790 if (current_count < 2)
794 kfree(buffer.pointer);
799 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
806 * C2 latency must be less than or equal to 100
809 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
810 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
811 "latency too large [%d]\n", cx->latency));
816 * Otherwise we've met all of our C2 requirements.
817 * Normalize the C2 latency to expidite policy
820 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
825 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
826 struct acpi_processor_cx *cx)
828 static int bm_check_flag;
835 * C3 latency must be less than or equal to 1000
838 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
839 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
840 "latency too large [%d]\n", cx->latency));
845 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
846 * DMA transfers are used by any ISA device to avoid livelock.
847 * Note that we could disable Type-F DMA (as recommended by
848 * the erratum), but this is known to disrupt certain ISA
849 * devices thus we take the conservative approach.
851 else if (errata.piix4.fdma) {
852 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
853 "C3 not supported on PIIX4 with Type-F DMA\n"));
857 /* All the logic here assumes flags.bm_check is same across all CPUs */
858 if (!bm_check_flag) {
859 /* Determine whether bm_check is needed based on CPU */
860 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
861 bm_check_flag = pr->flags.bm_check;
863 pr->flags.bm_check = bm_check_flag;
866 if (pr->flags.bm_check) {
867 /* bus mastering control is necessary */
868 if (!pr->flags.bm_control) {
869 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
870 "C3 support requires bus mastering control\n"));
875 * WBINVD should be set in fadt, for C3 state to be
876 * supported on when bm_check is not required.
878 if (acpi_fadt.wb_invd != 1) {
879 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
880 "Cache invalidation should work properly"
881 " for C3 to be enabled on SMP systems\n"));
884 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
885 0, ACPI_MTX_DO_NOT_LOCK);
889 * Otherwise we've met all of our C3 requirements.
890 * Normalize the C3 latency to expidite policy. Enable
891 * checking of bus mastering status (bm_check) so we can
892 * use this in our C3 policy
895 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
900 static int acpi_processor_power_verify(struct acpi_processor *pr)
903 unsigned int working = 0;
905 #ifdef ARCH_APICTIMER_STOPS_ON_C3
906 int timer_broadcast = 0;
907 cpumask_t mask = cpumask_of_cpu(pr->id);
908 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
911 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
912 struct acpi_processor_cx *cx = &pr->power.states[i];
920 acpi_processor_power_verify_c2(cx);
921 #ifdef ARCH_APICTIMER_STOPS_ON_C3
922 /* Some AMD systems fake C3 as C2, but still
923 have timer troubles */
925 boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
931 acpi_processor_power_verify_c3(pr, cx);
932 #ifdef ARCH_APICTIMER_STOPS_ON_C3
943 #ifdef ARCH_APICTIMER_STOPS_ON_C3
945 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
951 static int acpi_processor_get_power_info(struct acpi_processor *pr)
957 /* NOTE: the idle thread may not be running while calling
960 /* Zero initialize all the C-states info. */
961 memset(pr->power.states, 0, sizeof(pr->power.states));
963 result = acpi_processor_get_power_info_cst(pr);
964 if (result == -ENODEV)
965 result = acpi_processor_get_power_info_fadt(pr);
970 acpi_processor_get_power_info_default(pr);
972 pr->power.count = acpi_processor_power_verify(pr);
977 * Now that we know which states are supported, set the default
978 * policy. Note that this policy can be changed dynamically
979 * (e.g. encourage deeper sleeps to conserve battery life when
982 result = acpi_processor_set_power_policy(pr);
987 * if one state of type C2 or C3 is available, mark this
988 * CPU as being "idle manageable"
990 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
991 if (pr->power.states[i].valid) {
993 if (pr->power.states[i].type >= ACPI_STATE_C2)
1001 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1013 if (!pr->flags.power_setup_done)
1016 /* Fall back to the default idle loop */
1017 pm_idle = pm_idle_save;
1018 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1020 pr->flags.power = 0;
1021 result = acpi_processor_get_power_info(pr);
1022 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1023 pm_idle = acpi_processor_idle;
1028 /* proc interface */
1030 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1032 struct acpi_processor *pr = (struct acpi_processor *)seq->private;
1039 seq_printf(seq, "active state: C%zd\n"
1041 "bus master activity: %08x\n"
1042 "maximum allowed latency: %d usec\n",
1043 pr->power.state ? pr->power.state - pr->power.states : 0,
1044 max_cstate, (unsigned)pr->power.bm_activity,
1045 system_latency_constraint());
1047 seq_puts(seq, "states:\n");
1049 for (i = 1; i <= pr->power.count; i++) {
1050 seq_printf(seq, " %cC%d: ",
1051 (&pr->power.states[i] ==
1052 pr->power.state ? '*' : ' '), i);
1054 if (!pr->power.states[i].valid) {
1055 seq_puts(seq, "<not supported>\n");
1059 switch (pr->power.states[i].type) {
1061 seq_printf(seq, "type[C1] ");
1064 seq_printf(seq, "type[C2] ");
1067 seq_printf(seq, "type[C3] ");
1070 seq_printf(seq, "type[--] ");
1074 if (pr->power.states[i].promotion.state)
1075 seq_printf(seq, "promotion[C%zd] ",
1076 (pr->power.states[i].promotion.state -
1079 seq_puts(seq, "promotion[--] ");
1081 if (pr->power.states[i].demotion.state)
1082 seq_printf(seq, "demotion[C%zd] ",
1083 (pr->power.states[i].demotion.state -
1086 seq_puts(seq, "demotion[--] ");
1088 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1089 pr->power.states[i].latency,
1090 pr->power.states[i].usage,
1091 pr->power.states[i].time);
1098 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1100 return single_open(file, acpi_processor_power_seq_show,
1104 static const struct file_operations acpi_processor_power_fops = {
1105 .open = acpi_processor_power_open_fs,
1107 .llseek = seq_lseek,
1108 .release = single_release,
1112 static void smp_callback(void *v)
1114 /* we already woke the CPU up, nothing more to do */
1118 * This function gets called when a part of the kernel has a new latency
1119 * requirement. This means we need to get all processors out of their C-state,
1120 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1121 * wakes them all right up.
1123 static int acpi_processor_latency_notify(struct notifier_block *b,
1124 unsigned long l, void *v)
1126 smp_call_function(smp_callback, NULL, 0, 1);
1130 static struct notifier_block acpi_processor_latency_notifier = {
1131 .notifier_call = acpi_processor_latency_notify,
1135 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1136 struct acpi_device *device)
1138 acpi_status status = 0;
1139 static int first_run;
1140 struct proc_dir_entry *entry = NULL;
1145 dmi_check_system(processor_power_dmi_table);
1146 if (max_cstate < ACPI_C_STATES_MAX)
1148 "ACPI: processor limited to max C-state %d\n",
1152 register_latency_notifier(&acpi_processor_latency_notifier);
1159 if (acpi_fadt.cst_cnt && !nocst) {
1161 acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
1162 if (ACPI_FAILURE(status)) {
1163 ACPI_EXCEPTION((AE_INFO, status,
1164 "Notifying BIOS of _CST ability failed"));
1168 acpi_processor_get_power_info(pr);
1171 * Install the idle handler if processor power management is supported.
1172 * Note that we use previously set idle handler will be used on
1173 * platforms that only support C1.
1175 if ((pr->flags.power) && (!boot_option_idle_override)) {
1176 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1177 for (i = 1; i <= pr->power.count; i++)
1178 if (pr->power.states[i].valid)
1179 printk(" C%d[C%d]", i,
1180 pr->power.states[i].type);
1184 pm_idle_save = pm_idle;
1185 pm_idle = acpi_processor_idle;
1190 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1191 S_IRUGO, acpi_device_dir(device));
1195 entry->proc_fops = &acpi_processor_power_fops;
1196 entry->data = acpi_driver_data(device);
1197 entry->owner = THIS_MODULE;
1200 pr->flags.power_setup_done = 1;
1205 int acpi_processor_power_exit(struct acpi_processor *pr,
1206 struct acpi_device *device)
1209 pr->flags.power_setup_done = 0;
1211 if (acpi_device_dir(device))
1212 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1213 acpi_device_dir(device));
1215 /* Unregister the idle handler when processor #0 is removed. */
1217 pm_idle = pm_idle_save;
1220 * We are about to unload the current idle thread pm callback
1221 * (pm_idle), Wait for all processors to update cached/local
1222 * copies of pm_idle before proceeding.
1226 unregister_latency_notifier(&acpi_processor_latency_notifier);