2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/poll.h>
29 #include <linux/ptrace.h>
30 #include <linux/slab.h>
31 #include <linux/wait.h>
35 #include <linux/mutex.h>
37 #include <asm/spu_priv1.h>
38 #include <asm/mmu_context.h>
40 #include "interrupt.h"
42 const struct spu_priv1_ops *spu_priv1_ops;
44 EXPORT_SYMBOL_GPL(spu_priv1_ops);
46 static int __spu_trap_invalid_dma(struct spu *spu)
48 pr_debug("%s\n", __FUNCTION__);
49 force_sig(SIGBUS, /* info, */ current);
53 static int __spu_trap_dma_align(struct spu *spu)
55 pr_debug("%s\n", __FUNCTION__);
56 force_sig(SIGBUS, /* info, */ current);
60 static int __spu_trap_error(struct spu *spu)
62 pr_debug("%s\n", __FUNCTION__);
63 force_sig(SIGILL, /* info, */ current);
67 static void spu_restart_dma(struct spu *spu)
69 struct spu_priv2 __iomem *priv2 = spu->priv2;
71 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
72 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
75 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
77 struct spu_priv2 __iomem *priv2 = spu->priv2;
78 struct mm_struct *mm = spu->mm;
81 pr_debug("%s\n", __FUNCTION__);
83 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
84 /* SLBs are pre-loaded for context switch, so
85 * we should never get here!
87 printk("%s: invalid access during switch!\n", __func__);
90 if (!mm || (REGION_ID(ea) != USER_REGION_ID)) {
91 /* Future: support kernel segments so that drivers
94 pr_debug("invalid region access at %016lx\n", ea);
98 esid = (ea & ESID_MASK) | SLB_ESID_V;
99 #ifdef CONFIG_HUGETLB_PAGE
100 if (in_hugepage_area(mm->context, ea))
101 llp = mmu_psize_defs[mmu_huge_psize].sllp;
104 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
105 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
108 out_be64(&priv2->slb_index_W, spu->slb_replace);
109 out_be64(&priv2->slb_vsid_RW, vsid);
110 out_be64(&priv2->slb_esid_RW, esid);
113 if (spu->slb_replace >= 8)
114 spu->slb_replace = 0;
116 spu_restart_dma(spu);
121 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
122 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
124 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
126 /* Handle kernel space hash faults immediately.
127 User hash faults need to be deferred to process context. */
128 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
129 && REGION_ID(ea) != USER_REGION_ID
130 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
131 spu_restart_dma(spu);
135 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
136 printk("%s: invalid access during switch!\n", __func__);
143 spu->stop_callback(spu);
148 spu_irq_class_0(int irq, void *data, struct pt_regs *regs)
153 spu->class_0_pending = 1;
154 spu->stop_callback(spu);
160 spu_irq_class_0_bottom(struct spu *spu)
162 unsigned long stat, mask;
164 spu->class_0_pending = 0;
166 mask = spu_int_mask_get(spu, 0);
167 stat = spu_int_stat_get(spu, 0);
171 if (stat & 1) /* invalid DMA alignment */
172 __spu_trap_dma_align(spu);
174 if (stat & 2) /* invalid MFC DMA */
175 __spu_trap_invalid_dma(spu);
177 if (stat & 4) /* error on SPU */
178 __spu_trap_error(spu);
180 spu_int_stat_clear(spu, 0, stat);
182 return (stat & 0x7) ? -EIO : 0;
184 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
187 spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
190 unsigned long stat, mask, dar, dsisr;
194 /* atomically read & clear class1 status. */
195 spin_lock(&spu->register_lock);
196 mask = spu_int_mask_get(spu, 1);
197 stat = spu_int_stat_get(spu, 1) & mask;
198 dar = spu_mfc_dar_get(spu);
199 dsisr = spu_mfc_dsisr_get(spu);
200 if (stat & 2) /* mapping fault */
201 spu_mfc_dsisr_set(spu, 0ul);
202 spu_int_stat_clear(spu, 1, stat);
203 spin_unlock(&spu->register_lock);
204 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
207 if (stat & 1) /* segment fault */
208 __spu_trap_data_seg(spu, dar);
210 if (stat & 2) { /* mapping fault */
211 __spu_trap_data_map(spu, dar, dsisr);
214 if (stat & 4) /* ls compare & suspend on get */
217 if (stat & 8) /* ls compare & suspend on put */
220 return stat ? IRQ_HANDLED : IRQ_NONE;
222 EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom);
225 spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
232 spin_lock(&spu->register_lock);
233 stat = spu_int_stat_get(spu, 2);
234 mask = spu_int_mask_get(spu, 2);
235 /* ignore interrupts we're not waiting for */
238 * mailbox interrupts (0x1 and 0x10) are level triggered.
239 * mask them now before acknowledging.
242 spu_int_mask_and(spu, 2, ~(stat & 0x11));
243 /* acknowledge all interrupts before the callbacks */
244 spu_int_stat_clear(spu, 2, stat);
245 spin_unlock(&spu->register_lock);
247 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
249 if (stat & 1) /* PPC core mailbox */
250 spu->ibox_callback(spu);
252 if (stat & 2) /* SPU stop-and-signal */
253 spu->stop_callback(spu);
255 if (stat & 4) /* SPU halted */
256 spu->stop_callback(spu);
258 if (stat & 8) /* DMA tag group complete */
259 spu->mfc_callback(spu);
261 if (stat & 0x10) /* SPU mailbox threshold */
262 spu->wbox_callback(spu);
264 return stat ? IRQ_HANDLED : IRQ_NONE;
267 static int spu_request_irqs(struct spu *spu)
271 if (spu->irqs[0] != NO_IRQ) {
272 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
274 ret = request_irq(spu->irqs[0], spu_irq_class_0,
280 if (spu->irqs[1] != NO_IRQ) {
281 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
283 ret = request_irq(spu->irqs[1], spu_irq_class_1,
289 if (spu->irqs[2] != NO_IRQ) {
290 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
292 ret = request_irq(spu->irqs[2], spu_irq_class_2,
301 if (spu->irqs[1] != NO_IRQ)
302 free_irq(spu->irqs[1], spu);
304 if (spu->irqs[0] != NO_IRQ)
305 free_irq(spu->irqs[0], spu);
310 static void spu_free_irqs(struct spu *spu)
312 if (spu->irqs[0] != NO_IRQ)
313 free_irq(spu->irqs[0], spu);
314 if (spu->irqs[1] != NO_IRQ)
315 free_irq(spu->irqs[1], spu);
316 if (spu->irqs[2] != NO_IRQ)
317 free_irq(spu->irqs[2], spu);
320 static LIST_HEAD(spu_list);
321 static DEFINE_MUTEX(spu_mutex);
323 static void spu_init_channels(struct spu *spu)
325 static const struct {
329 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
330 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
332 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
333 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
334 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
336 struct spu_priv2 __iomem *priv2;
341 /* initialize all channel data to zero */
342 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
345 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
346 for (count = 0; count < zero_list[i].count; count++)
347 out_be64(&priv2->spu_chnldata_RW, 0);
350 /* initialize channel counts to meaningful values */
351 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
352 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
353 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
357 struct spu *spu_alloc(void)
361 mutex_lock(&spu_mutex);
362 if (!list_empty(&spu_list)) {
363 spu = list_entry(spu_list.next, struct spu, list);
364 list_del_init(&spu->list);
365 pr_debug("Got SPU %x %d\n", spu->isrc, spu->number);
367 pr_debug("No SPU left\n");
370 mutex_unlock(&spu_mutex);
373 spu_init_channels(spu);
377 EXPORT_SYMBOL_GPL(spu_alloc);
379 void spu_free(struct spu *spu)
381 mutex_lock(&spu_mutex);
382 list_add_tail(&spu->list, &spu_list);
383 mutex_unlock(&spu_mutex);
385 EXPORT_SYMBOL_GPL(spu_free);
387 static int spu_handle_mm_fault(struct spu *spu)
389 struct mm_struct *mm = spu->mm;
390 struct vm_area_struct *vma;
391 u64 ea, dsisr, is_write;
397 if (!IS_VALID_EA(ea)) {
404 if (mm->pgd == NULL) {
408 down_read(&mm->mmap_sem);
409 vma = find_vma(mm, ea);
412 if (vma->vm_start <= ea)
414 if (!(vma->vm_flags & VM_GROWSDOWN))
417 if (expand_stack(vma, ea))
421 is_write = dsisr & MFC_DSISR_ACCESS_PUT;
423 if (!(vma->vm_flags & VM_WRITE))
426 if (dsisr & MFC_DSISR_ACCESS_DENIED)
428 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
432 switch (handle_mm_fault(mm, vma, ea, is_write)) {
439 case VM_FAULT_SIGBUS:
448 up_read(&mm->mmap_sem);
452 up_read(&mm->mmap_sem);
456 int spu_irq_class_1_bottom(struct spu *spu)
458 u64 ea, dsisr, access, error = 0UL;
463 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
466 access = (_PAGE_PRESENT | _PAGE_USER);
467 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
468 local_irq_save(flags);
469 if (hash_page(ea, access, 0x300) != 0)
470 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
471 local_irq_restore(flags);
473 if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
474 if ((ret = spu_handle_mm_fault(spu)) != 0)
475 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
477 error &= ~CLASS1_ENABLE_STORAGE_FAULT_INTR;
482 spu_restart_dma(spu);
484 __spu_trap_invalid_dma(spu);
489 static int __init find_spu_node_id(struct device_node *spe)
491 const unsigned int *id;
492 struct device_node *cpu;
493 cpu = spe->parent->parent;
494 id = get_property(cpu, "node-id", NULL);
498 static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe,
501 static DEFINE_MUTEX(add_spumem_mutex);
503 const struct address_prop {
504 unsigned long address;
506 } __attribute__((packed)) *p;
509 unsigned long start_pfn, nr_pages;
510 struct pglist_data *pgdata;
514 p = get_property(spe, prop, &proplen);
515 WARN_ON(proplen != sizeof (*p));
517 start_pfn = p->address >> PAGE_SHIFT;
518 nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT;
520 pgdata = NODE_DATA(spu->nid);
521 zone = pgdata->node_zones;
523 /* XXX rethink locking here */
524 mutex_lock(&add_spumem_mutex);
525 ret = __add_pages(zone, start_pfn, nr_pages);
526 mutex_unlock(&add_spumem_mutex);
531 static void __iomem * __init map_spe_prop(struct spu *spu,
532 struct device_node *n, const char *name)
534 const struct address_prop {
535 unsigned long address;
537 } __attribute__((packed)) *prop;
541 void __iomem *ret = NULL;
544 p = get_property(n, name, &proplen);
545 if (proplen != sizeof (struct address_prop))
550 err = cell_spuprop_present(spu, n, name);
551 if (err && (err != -EEXIST))
554 ret = ioremap(prop->address, prop->len);
560 static void spu_unmap(struct spu *spu)
564 iounmap(spu->problem);
565 iounmap((__force u8 __iomem *)spu->local_store);
568 /* This function shall be abstracted for HV platforms */
569 static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)
571 struct irq_host *host;
575 host = iic_get_irq_host(spu->node);
579 /* Get the interrupt source from the device-tree */
580 tmp = get_property(np, "isrc", NULL);
583 spu->isrc = isrc = tmp[0];
585 /* Now map interrupts of all 3 classes */
586 spu->irqs[0] = irq_create_mapping(host, 0x00 | isrc);
587 spu->irqs[1] = irq_create_mapping(host, 0x10 | isrc);
588 spu->irqs[2] = irq_create_mapping(host, 0x20 | isrc);
590 /* Right now, we only fail if class 2 failed */
591 return spu->irqs[2] == NO_IRQ ? -EINVAL : 0;
594 static int __init spu_map_device(struct spu *spu, struct device_node *node)
600 spu->name = get_property(node, "name", NULL);
604 prop = get_property(node, "local-store", NULL);
607 spu->local_store_phys = *(unsigned long *)prop;
609 /* we use local store as ram, not io memory */
610 spu->local_store = (void __force *)
611 map_spe_prop(spu, node, "local-store");
612 if (!spu->local_store)
615 prop = get_property(node, "problem", NULL);
618 spu->problem_phys = *(unsigned long *)prop;
620 spu->problem= map_spe_prop(spu, node, "problem");
624 spu->priv1= map_spe_prop(spu, node, "priv1");
625 /* priv1 is not available on a hypervisor */
627 spu->priv2= map_spe_prop(spu, node, "priv2");
639 struct sysdev_class spu_sysdev_class = {
643 static ssize_t spu_show_isrc(struct sys_device *sysdev, char *buf)
645 struct spu *spu = container_of(sysdev, struct spu, sysdev);
646 return sprintf(buf, "%d\n", spu->isrc);
649 static SYSDEV_ATTR(isrc, 0400, spu_show_isrc, NULL);
651 extern int attach_sysdev_to_node(struct sys_device *dev, int nid);
653 static int spu_create_sysdev(struct spu *spu)
657 spu->sysdev.id = spu->number;
658 spu->sysdev.cls = &spu_sysdev_class;
659 ret = sysdev_register(&spu->sysdev);
661 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
667 sysdev_create_file(&spu->sysdev, &attr_isrc);
668 sysfs_add_device_to_node(&spu->sysdev, spu->nid);
673 static void spu_destroy_sysdev(struct spu *spu)
675 sysdev_remove_file(&spu->sysdev, &attr_isrc);
676 sysfs_remove_device_from_node(&spu->sysdev, spu->nid);
677 sysdev_unregister(&spu->sysdev);
680 static int __init create_spu(struct device_node *spe)
687 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
691 ret = spu_map_device(spu, spe);
695 spu->node = find_spu_node_id(spe);
696 spu->nid = of_node_to_nid(spe);
699 ret = spu_map_interrupts(spu, spe);
702 spin_lock_init(&spu->register_lock);
703 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
704 spu_mfc_sr1_set(spu, 0x33);
705 mutex_lock(&spu_mutex);
707 spu->number = number++;
708 ret = spu_request_irqs(spu);
712 ret = spu_create_sysdev(spu);
716 list_add(&spu->list, &spu_list);
717 mutex_unlock(&spu_mutex);
719 pr_debug(KERN_DEBUG "Using SPE %s %02x %p %p %p %p %d\n",
720 spu->name, spu->isrc, spu->local_store,
721 spu->problem, spu->priv1, spu->priv2, spu->number);
728 mutex_unlock(&spu_mutex);
736 static void destroy_spu(struct spu *spu)
738 list_del_init(&spu->list);
740 spu_destroy_sysdev(spu);
746 static void cleanup_spu_base(void)
748 struct spu *spu, *tmp;
749 mutex_lock(&spu_mutex);
750 list_for_each_entry_safe(spu, tmp, &spu_list, list)
752 mutex_unlock(&spu_mutex);
753 sysdev_class_unregister(&spu_sysdev_class);
755 module_exit(cleanup_spu_base);
757 static int __init init_spu_base(void)
759 struct device_node *node;
762 /* create sysdev class for spus */
763 ret = sysdev_class_register(&spu_sysdev_class);
768 for (node = of_find_node_by_type(NULL, "spe");
769 node; node = of_find_node_by_type(node, "spe")) {
770 ret = create_spu(node);
772 printk(KERN_WARNING "%s: Error initializing %s\n",
773 __FUNCTION__, node->name);
778 /* in some old firmware versions, the spe is called 'spc', so we
779 look for that as well */
780 for (node = of_find_node_by_type(NULL, "spc");
781 node; node = of_find_node_by_type(node, "spc")) {
782 ret = create_spu(node);
784 printk(KERN_WARNING "%s: Error initializing %s\n",
785 __FUNCTION__, node->name);
792 module_init(init_spu_base);
794 MODULE_LICENSE("GPL");
795 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");