4 * Normal mappings of chips in physical memory
5 * $Id: ichxrom.c,v 1.19 2005/11/07 11:14:27 gleixner Exp $
8 #include <linux/module.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/map.h>
15 #include <linux/mtd/cfi.h>
16 #include <linux/mtd/flashchip.h>
17 #include <linux/pci.h>
18 #include <linux/pci_ids.h>
19 #include <linux/list.h>
21 #define xstr(s) str(s)
23 #define MOD_NAME xstr(KBUILD_BASENAME)
25 #define ADDRESS_NAME_LEN 18
27 #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
29 #define BIOS_CNTL 0x4e
30 #define FWH_DEC_EN1 0xE3
31 #define FWH_DEC_EN2 0xF0
35 struct ichxrom_window {
39 struct list_head maps;
44 struct ichxrom_map_info {
45 struct list_head list;
49 char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
52 static struct ichxrom_window ichxrom_window = {
53 .maps = LIST_HEAD_INIT(ichxrom_window.maps),
56 static void ichxrom_cleanup(struct ichxrom_window *window)
58 struct ichxrom_map_info *map, *scratch;
61 /* Disable writes through the rom window */
62 pci_read_config_word(window->pdev, BIOS_CNTL, &word);
63 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1);
64 pci_dev_put(window->pdev);
66 /* Free all of the mtd devices */
67 list_for_each_entry_safe(map, scratch, &window->maps, list) {
69 release_resource(&map->rsrc);
70 del_mtd_device(map->mtd);
71 map_destroy(map->mtd);
75 if (window->rsrc.parent)
76 release_resource(&window->rsrc);
78 iounmap(window->virt);
87 static int __devinit ichxrom_init_one (struct pci_dev *pdev,
88 const struct pci_device_id *ent)
90 static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
91 struct ichxrom_window *window = &ichxrom_window;
92 struct ichxrom_map_info *map = NULL;
93 unsigned long map_top;
97 /* For now I just handle the ichx and I assume there
98 * are not a lot of resources up at the top of the address
99 * space. It is possible to handle other devices in the
100 * top 16MB but it is very painful. Also since
101 * you can only really attach a FWH to an ICHX there
102 * a number of simplifications you can make.
104 * Also you can page firmware hubs if an 8MB window isn't enough
105 * but don't currently handle that case either.
109 /* Find a region continuous to the end of the ROM window */
111 pci_read_config_byte(pdev, FWH_DEC_EN1, &byte);
113 window->phys = 0xffc00000;
114 pci_read_config_byte(pdev, FWH_DEC_EN2, &byte);
115 if ((byte & 0x0f) == 0x0f) {
116 window->phys = 0xff400000;
118 else if ((byte & 0x0e) == 0x0e) {
119 window->phys = 0xff500000;
121 else if ((byte & 0x0c) == 0x0c) {
122 window->phys = 0xff600000;
124 else if ((byte & 0x08) == 0x08) {
125 window->phys = 0xff700000;
128 else if ((byte & 0xfe) == 0xfe) {
129 window->phys = 0xffc80000;
131 else if ((byte & 0xfc) == 0xfc) {
132 window->phys = 0xffd00000;
134 else if ((byte & 0xf8) == 0xf8) {
135 window->phys = 0xffd80000;
137 else if ((byte & 0xf0) == 0xf0) {
138 window->phys = 0xffe00000;
140 else if ((byte & 0xe0) == 0xe0) {
141 window->phys = 0xffe80000;
143 else if ((byte & 0xc0) == 0xc0) {
144 window->phys = 0xfff00000;
146 else if ((byte & 0x80) == 0x80) {
147 window->phys = 0xfff80000;
150 if (window->phys == 0) {
151 printk(KERN_ERR MOD_NAME ": Rom window is closed\n");
154 window->phys -= 0x400000UL;
155 window->size = (0xffffffffUL - window->phys) + 1UL;
157 /* Enable writes through the rom window */
158 pci_read_config_word(pdev, BIOS_CNTL, &word);
159 if (!(word & 1) && (word & (1<<1))) {
160 /* The BIOS will generate an error if I enable
161 * this device, so don't even try.
163 printk(KERN_ERR MOD_NAME ": firmware access control, I can't enable writes\n");
166 pci_write_config_word(pdev, BIOS_CNTL, word | 1);
169 * Try to reserve the window mem region. If this fails then
170 * it is likely due to the window being "reseved" by the BIOS.
172 window->rsrc.name = MOD_NAME;
173 window->rsrc.start = window->phys;
174 window->rsrc.end = window->phys + window->size - 1;
175 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
176 if (request_resource(&iomem_resource, &window->rsrc)) {
177 window->rsrc.parent = NULL;
178 printk(KERN_DEBUG MOD_NAME
179 ": %s(): Unable to register resource"
180 " 0x%.16llx-0x%.16llx - kernel bug?\n",
182 (unsigned long long)window->rsrc.start,
183 (unsigned long long)window->rsrc.end);
186 /* Map the firmware hub into my address space. */
187 window->virt = ioremap_nocache(window->phys, window->size);
189 printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
190 window->phys, window->size);
194 /* Get the first address to look for an rom chip at */
195 map_top = window->phys;
196 if ((window->phys & 0x3fffff) != 0) {
197 map_top = window->phys + 0x400000;
200 /* The probe sequence run over the firmware hub lock
201 * registers sets them to 0x7 (no access).
202 * Probe at most the last 4M of the address space.
204 if (map_top < 0xffc00000) {
205 map_top = 0xffc00000;
208 /* Loop through and look for rom chips */
209 while((map_top - 1) < 0xffffffffUL) {
210 struct cfi_private *cfi;
211 unsigned long offset;
215 map = kmalloc(sizeof(*map), GFP_KERNEL);
218 printk(KERN_ERR MOD_NAME ": kmalloc failed");
221 memset(map, 0, sizeof(*map));
222 INIT_LIST_HEAD(&map->list);
223 map->map.name = map->map_name;
224 map->map.phys = map_top;
225 offset = map_top - window->phys;
226 map->map.virt = (void __iomem *)
227 (((unsigned long)(window->virt)) + offset);
228 map->map.size = 0xffffffffUL - map_top + 1UL;
229 /* Set the name of the map to the address I am trying */
230 sprintf(map->map_name, "%s @%08Lx",
231 MOD_NAME, (unsigned long long)map->map.phys);
233 /* Firmware hubs only use vpp when being programmed
234 * in a factory setting. So in-place programming
235 * needs to use a different method.
237 for(map->map.bankwidth = 32; map->map.bankwidth;
238 map->map.bankwidth >>= 1)
241 /* Skip bankwidths that are not supported */
242 if (!map_bankwidth_supported(map->map.bankwidth))
245 /* Setup the map methods */
246 simple_map_init(&map->map);
248 /* Try all of the probe methods */
249 probe_type = rom_probe_types;
250 for(; *probe_type; probe_type++) {
251 map->mtd = do_map_probe(*probe_type, &map->map);
256 map_top += ROM_PROBE_STEP_SIZE;
259 /* Trim the size if we are larger than the map */
260 if (map->mtd->size > map->map.size) {
261 printk(KERN_WARNING MOD_NAME
262 " rom(%u) larger than window(%lu). fixing...\n",
263 map->mtd->size, map->map.size);
264 map->mtd->size = map->map.size;
266 if (window->rsrc.parent) {
268 * Registering the MTD device in iomem may not be possible
269 * if there is a BIOS "reserved" and BUSY range. If this
270 * fails then continue anyway.
272 map->rsrc.name = map->map_name;
273 map->rsrc.start = map->map.phys;
274 map->rsrc.end = map->map.phys + map->mtd->size - 1;
275 map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
276 if (request_resource(&window->rsrc, &map->rsrc)) {
277 printk(KERN_ERR MOD_NAME
278 ": cannot reserve MTD resource\n");
279 map->rsrc.parent = NULL;
283 /* Make the whole region visible in the map */
284 map->map.virt = window->virt;
285 map->map.phys = window->phys;
286 cfi = map->map.fldrv_priv;
287 for(i = 0; i < cfi->numchips; i++) {
288 cfi->chips[i].start += offset;
291 /* Now that the mtd devices is complete claim and export it */
292 map->mtd->owner = THIS_MODULE;
293 if (add_mtd_device(map->mtd)) {
294 map_destroy(map->mtd);
300 /* Calculate the new value of map_top */
301 map_top += map->mtd->size;
303 /* File away the map structure */
304 list_add(&map->list, &window->maps);
309 /* Free any left over map structures */
312 /* See if I have any map structures */
313 if (list_empty(&window->maps)) {
314 ichxrom_cleanup(window);
321 static void __devexit ichxrom_remove_one (struct pci_dev *pdev)
323 struct ichxrom_window *window = &ichxrom_window;
324 ichxrom_cleanup(window);
327 static struct pci_device_id ichxrom_pci_tbl[] __devinitdata = {
328 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0,
329 PCI_ANY_ID, PCI_ANY_ID, },
330 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,
331 PCI_ANY_ID, PCI_ANY_ID, },
332 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,
333 PCI_ANY_ID, PCI_ANY_ID, },
334 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0,
335 PCI_ANY_ID, PCI_ANY_ID, },
336 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1,
337 PCI_ANY_ID, PCI_ANY_ID, },
342 MODULE_DEVICE_TABLE(pci, ichxrom_pci_tbl);
344 static struct pci_driver ichxrom_driver = {
346 .id_table = ichxrom_pci_tbl,
347 .probe = ichxrom_init_one,
348 .remove = ichxrom_remove_one,
352 static int __init init_ichxrom(void)
354 struct pci_dev *pdev;
355 struct pci_device_id *id;
358 for (id = ichxrom_pci_tbl; id->vendor; id++) {
359 pdev = pci_get_device(id->vendor, id->device, NULL);
365 return ichxrom_init_one(pdev, &ichxrom_pci_tbl[0]);
369 return pci_register_driver(&ichxrom_driver);
373 static void __exit cleanup_ichxrom(void)
375 ichxrom_remove_one(ichxrom_window.pdev);
378 module_init(init_ichxrom);
379 module_exit(cleanup_ichxrom);
381 MODULE_LICENSE("GPL");
382 MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
383 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICHX southbridge");