2 * linux/drivers/message/fusion/mptbase.c
3 * This is the Fusion MPT base driver which supports multiple
4 * (SCSI + LAN) specialized protocol drivers.
5 * For use with LSI Logic PCI chip/adapter(s)
6 * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
8 * Copyright (c) 1999-2005 LSI Logic Corporation
9 * (mailto:mpt_linux_developer@lsil.com)
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; version 2 of the License.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
24 THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25 CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27 MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28 solely responsible for determining the appropriateness of using and
29 distributing the Program and assumes all risks associated with its
30 exercise of rights under this Agreement, including but not limited to
31 the risks and costs of program errors, damage to or loss of data,
32 programs or equipment, and unavailability or interruption of operations.
34 DISCLAIMER OF LIABILITY
35 NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39 TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40 USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41 HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
43 You should have received a copy of the GNU General Public License
44 along with this program; if not, write to the Free Software
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/errno.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/types.h>
55 #include <linux/pci.h>
56 #include <linux/kdev_t.h>
57 #include <linux/blkdev.h>
58 #include <linux/delay.h>
59 #include <linux/interrupt.h> /* needed for in_interrupt() proto */
60 #include <linux/dma-mapping.h>
68 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
69 #define my_NAME "Fusion MPT base driver"
70 #define my_VERSION MPT_LINUX_VERSION_COMMON
71 #define MYNAM "mptbase"
73 MODULE_AUTHOR(MODULEAUTHOR);
74 MODULE_DESCRIPTION(my_NAME);
75 MODULE_LICENSE("GPL");
80 static int mpt_msi_enable;
81 module_param(mpt_msi_enable, int, 0);
82 MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
85 static int mfcounter = 0;
86 #define PRINT_MF_COUNT 20000
89 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
93 int mpt_lan_index = -1;
94 int mpt_stm_index = -1;
96 struct proc_dir_entry *mpt_proc_root_dir;
98 #define WHOINIT_UNKNOWN 0xAA
100 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
104 /* Adapter link list */
106 /* Callback lookup table */
107 static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
108 /* Protocol driver class lookup table */
109 static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
110 /* Event handler lookup table */
111 static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
112 /* Reset handler lookup table */
113 static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
114 static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
116 static int mpt_base_index = -1;
117 static int last_drv_idx = -1;
119 static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
121 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
125 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
126 static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
127 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
128 u32 *req, int replyBytes, u16 *u16reply, int maxwait,
130 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
131 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
132 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
133 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
135 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
136 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
137 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
138 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
139 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
140 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
141 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
142 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
143 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
144 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
145 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
146 static int PrimeIocFifos(MPT_ADAPTER *ioc);
147 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
148 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
149 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
150 static int GetLanConfigPages(MPT_ADAPTER *ioc);
151 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
152 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
153 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
154 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
155 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
156 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
157 static void mpt_timer_expired(unsigned long data);
158 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
159 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
160 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
161 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
163 #ifdef CONFIG_PROC_FS
164 static int procmpt_summary_read(char *buf, char **start, off_t offset,
165 int request, int *eof, void *data);
166 static int procmpt_version_read(char *buf, char **start, off_t offset,
167 int request, int *eof, void *data);
168 static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
169 int request, int *eof, void *data);
171 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
173 //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
174 static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
175 static void mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
176 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
177 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
178 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
179 static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
181 /* module entry point */
182 static int __init fusion_init (void);
183 static void __exit fusion_exit (void);
185 #define CHIPREG_READ32(addr) readl_relaxed(addr)
186 #define CHIPREG_READ32_dmasync(addr) readl(addr)
187 #define CHIPREG_WRITE32(addr,val) writel(val, addr)
188 #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
189 #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
192 pci_disable_io_access(struct pci_dev *pdev)
196 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
198 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
202 pci_enable_io_access(struct pci_dev *pdev)
206 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
208 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
212 * Process turbo (context) reply...
215 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
217 MPT_FRAME_HDR *mf = NULL;
218 MPT_FRAME_HDR *mr = NULL;
222 dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n",
225 switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
226 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
227 req_idx = pa & 0x0000FFFF;
228 cb_idx = (pa & 0x00FF0000) >> 16;
229 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
231 case MPI_CONTEXT_REPLY_TYPE_LAN:
232 cb_idx = mpt_lan_index;
234 * Blind set of mf to NULL here was fatal
235 * after lan_reply says "freeme"
236 * Fix sort of combined with an optimization here;
237 * added explicit check for case where lan_reply
238 * was just returning 1 and doing nothing else.
239 * For this case skip the callback, but set up
240 * proper mf value first here:-)
242 if ((pa & 0x58000000) == 0x58000000) {
243 req_idx = pa & 0x0000FFFF;
244 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
245 mpt_free_msg_frame(ioc, mf);
250 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
252 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
253 cb_idx = mpt_stm_index;
254 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
261 /* Check for (valid) IO callback! */
262 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
263 MptCallbacks[cb_idx] == NULL) {
264 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
265 __FUNCTION__, ioc->name, cb_idx);
269 if (MptCallbacks[cb_idx](ioc, mf, mr))
270 mpt_free_msg_frame(ioc, mf);
276 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
287 /* non-TURBO reply! Hmmm, something may be up...
288 * Newest turbo reply mechanism; get address
289 * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
292 /* Map DMA address of reply header to cpu address.
293 * pa is 32 bits - but the dma address may be 32 or 64 bits
294 * get offset based only only the low addresses
297 reply_dma_low = (pa <<= 1);
298 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
299 (reply_dma_low - ioc->reply_frames_low_dma));
301 req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
302 cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
303 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
305 dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
306 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
307 DBG_DUMP_REPLY_FRAME(mr)
309 /* Check/log IOC log info
311 ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
312 if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
313 u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
314 if (ioc->bus_type == FC)
315 mpt_fc_log_info(ioc, log_info);
316 else if (ioc->bus_type == SPI)
317 mpt_spi_log_info(ioc, log_info);
318 else if (ioc->bus_type == SAS)
319 mpt_sas_log_info(ioc, log_info);
321 if (ioc_stat & MPI_IOCSTATUS_MASK) {
322 if (ioc->bus_type == SPI &&
323 cb_idx != mpt_stm_index &&
324 cb_idx != mpt_lan_index)
325 mpt_sp_ioc_info(ioc, (u32)ioc_stat, mf);
329 /* Check for (valid) IO callback! */
330 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
331 MptCallbacks[cb_idx] == NULL) {
332 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
333 __FUNCTION__, ioc->name, cb_idx);
338 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
341 /* Flush (non-TURBO) reply with a WRITE! */
342 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
345 mpt_free_msg_frame(ioc, mf);
349 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
351 * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
352 * @irq: irq number (not used)
353 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
355 * This routine is registered via the request_irq() kernel API call,
356 * and handles all interrupts generated from a specific MPT adapter
357 * (also referred to as a IO Controller or IOC).
358 * This routine must clear the interrupt from the adapter and does
359 * so by reading the reply FIFO. Multiple replies may be processed
360 * per single call to this routine.
362 * This routine handles register-level access of the adapter but
363 * dispatches (calls) a protocol-specific callback routine to handle
364 * the protocol-specific details of the MPT request completion.
367 mpt_interrupt(int irq, void *bus_id)
369 MPT_ADAPTER *ioc = bus_id;
370 u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
372 if (pa == 0xFFFFFFFF)
376 * Drain the reply FIFO!
379 if (pa & MPI_ADDRESS_REPLY_A_BIT)
382 mpt_turbo_reply(ioc, pa);
383 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
384 } while (pa != 0xFFFFFFFF);
389 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
391 * mpt_base_reply - MPT base driver's callback routine
392 * @ioc: Pointer to MPT_ADAPTER structure
393 * @mf: Pointer to original MPT request frame
394 * @reply: Pointer to MPT reply frame (NULL if TurboReply)
396 * MPT base driver's callback routine; all base driver
397 * "internal" request/reply processing is routed here.
398 * Currently used for EventNotification and EventAck handling.
400 * Returns 1 indicating original alloc'd request frame ptr
401 * should be freed, or 0 if it shouldn't.
404 mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
409 dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name));
411 #if defined(MPT_DEBUG_MSG_FRAME)
412 if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
413 dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
414 DBG_DUMP_REQUEST_FRAME_HDR(mf)
418 func = reply->u.hdr.Function;
419 dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n",
422 if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
423 EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
427 results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
428 if (results != evHandlers) {
429 /* CHECKME! Any special handling needed here? */
430 devtverboseprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
431 ioc->name, evHandlers, results));
435 * Hmmm... It seems that EventNotificationReply is an exception
436 * to the rule of one reply per request.
438 if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
441 devtverboseprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
442 ioc->name, pEvReply));
445 #ifdef CONFIG_PROC_FS
446 // LogEvent(ioc, pEvReply);
449 } else if (func == MPI_FUNCTION_EVENT_ACK) {
450 dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n",
452 } else if (func == MPI_FUNCTION_CONFIG) {
456 dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n",
457 ioc->name, mf, reply));
459 pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
462 /* disable timer and remove from linked list */
463 del_timer(&pCfg->timer);
465 spin_lock_irqsave(&ioc->FreeQlock, flags);
466 list_del(&pCfg->linkage);
467 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
470 * If IOC Status is SUCCESS, save the header
471 * and set the status code to GOOD.
473 pCfg->status = MPT_CONFIG_ERROR;
475 ConfigReply_t *pReply = (ConfigReply_t *)reply;
478 status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
479 dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
480 status, le32_to_cpu(pReply->IOCLogInfo)));
482 pCfg->status = status;
483 if (status == MPI_IOCSTATUS_SUCCESS) {
484 if ((pReply->Header.PageType &
485 MPI_CONFIG_PAGETYPE_MASK) ==
486 MPI_CONFIG_PAGETYPE_EXTENDED) {
487 pCfg->cfghdr.ehdr->ExtPageLength =
488 le16_to_cpu(pReply->ExtPageLength);
489 pCfg->cfghdr.ehdr->ExtPageType =
492 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
494 /* If this is a regular header, save PageLength. */
495 /* LMP Do this better so not using a reserved field! */
496 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
497 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
498 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
503 * Wake up the original calling thread
508 } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
509 /* we should be always getting a reply frame */
510 memcpy(ioc->persist_reply_frame, reply,
511 min(MPT_DEFAULT_FRAME_SIZE,
512 4*reply->u.reply.MsgLength));
513 del_timer(&ioc->persist_timer);
514 ioc->persist_wait_done = 1;
517 printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
522 * Conditionally tell caller to free the original
523 * EventNotification/EventAck/unexpected request frame!
528 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
530 * mpt_register - Register protocol-specific main callback handler.
531 * @cbfunc: callback function pointer
532 * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
534 * This routine is called by a protocol-specific driver (SCSI host,
535 * LAN, SCSI target) to register its reply callback routine. Each
536 * protocol-specific driver must do this before it will be able to
537 * use any IOC resources, such as obtaining request frames.
539 * NOTES: The SCSI protocol driver currently calls this routine thrice
540 * in order to register separate callbacks; one for "normal" SCSI IO;
541 * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
543 * Returns a positive integer valued "handle" in the
544 * range (and S.O.D. order) {N,...,7,6,5,...,1} if successful.
545 * Any non-positive return value (including zero!) should be considered
546 * an error by the caller.
549 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
556 * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
557 * (slot/handle 0 is reserved!)
559 for (i = MPT_MAX_PROTOCOL_DRIVERS-1; i; i--) {
560 if (MptCallbacks[i] == NULL) {
561 MptCallbacks[i] = cbfunc;
562 MptDriverClass[i] = dclass;
563 MptEvHandlers[i] = NULL;
572 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
574 * mpt_deregister - Deregister a protocol drivers resources.
575 * @cb_idx: previously registered callback handle
577 * Each protocol-specific driver should call this routine when its
578 * module is unloaded.
581 mpt_deregister(int cb_idx)
583 if ((cb_idx >= 0) && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
584 MptCallbacks[cb_idx] = NULL;
585 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
586 MptEvHandlers[cb_idx] = NULL;
592 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
594 * mpt_event_register - Register protocol-specific event callback
596 * @cb_idx: previously registered (via mpt_register) callback handle
597 * @ev_cbfunc: callback function
599 * This routine can be called by one or more protocol-specific drivers
600 * if/when they choose to be notified of MPT events.
602 * Returns 0 for success.
605 mpt_event_register(int cb_idx, MPT_EVHANDLER ev_cbfunc)
607 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
610 MptEvHandlers[cb_idx] = ev_cbfunc;
614 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
616 * mpt_event_deregister - Deregister protocol-specific event callback
618 * @cb_idx: previously registered callback handle
620 * Each protocol-specific driver should call this routine
621 * when it does not (or can no longer) handle events,
622 * or when its module is unloaded.
625 mpt_event_deregister(int cb_idx)
627 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
630 MptEvHandlers[cb_idx] = NULL;
633 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
635 * mpt_reset_register - Register protocol-specific IOC reset handler.
636 * @cb_idx: previously registered (via mpt_register) callback handle
637 * @reset_func: reset function
639 * This routine can be called by one or more protocol-specific drivers
640 * if/when they choose to be notified of IOC resets.
642 * Returns 0 for success.
645 mpt_reset_register(int cb_idx, MPT_RESETHANDLER reset_func)
647 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
650 MptResetHandlers[cb_idx] = reset_func;
654 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
656 * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
657 * @cb_idx: previously registered callback handle
659 * Each protocol-specific driver should call this routine
660 * when it does not (or can no longer) handle IOC reset handling,
661 * or when its module is unloaded.
664 mpt_reset_deregister(int cb_idx)
666 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
669 MptResetHandlers[cb_idx] = NULL;
672 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
674 * mpt_device_driver_register - Register device driver hooks
675 * @dd_cbfunc: driver callbacks struct
676 * @cb_idx: MPT protocol driver index
679 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, int cb_idx)
682 const struct pci_device_id *id;
684 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
687 MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
689 /* call per pci device probe entry point */
690 list_for_each_entry(ioc, &ioc_list, list) {
691 id = ioc->pcidev->driver ?
692 ioc->pcidev->driver->id_table : NULL;
693 if (dd_cbfunc->probe)
694 dd_cbfunc->probe(ioc->pcidev, id);
700 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
702 * mpt_device_driver_deregister - DeRegister device driver hooks
703 * @cb_idx: MPT protocol driver index
706 mpt_device_driver_deregister(int cb_idx)
708 struct mpt_pci_driver *dd_cbfunc;
711 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
714 dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
716 list_for_each_entry(ioc, &ioc_list, list) {
717 if (dd_cbfunc->remove)
718 dd_cbfunc->remove(ioc->pcidev);
721 MptDeviceDriverHandlers[cb_idx] = NULL;
725 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
727 * mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
728 * allocated per MPT adapter.
729 * @handle: Handle of registered MPT protocol driver
730 * @ioc: Pointer to MPT adapter structure
732 * Returns pointer to a MPT request frame or %NULL if none are available
733 * or IOC is not active.
736 mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc)
740 u16 req_idx; /* Request index */
742 /* validate handle and ioc identifier */
746 printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
749 /* If interrupts are not attached, do not return a request frame */
753 spin_lock_irqsave(&ioc->FreeQlock, flags);
754 if (!list_empty(&ioc->FreeQ)) {
757 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
758 u.frame.linkage.list);
759 list_del(&mf->u.frame.linkage.list);
760 mf->u.frame.linkage.arg1 = 0;
761 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
762 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
764 req_idx = req_offset / ioc->req_sz;
765 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
766 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
767 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
774 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
778 printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
780 if (mfcounter == PRINT_MF_COUNT)
781 printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
784 dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
785 ioc->name, handle, ioc->id, mf));
789 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
791 * mpt_put_msg_frame - Send a protocol specific MPT request frame
793 * @handle: Handle of registered MPT protocol driver
794 * @ioc: Pointer to MPT adapter structure
795 * @mf: Pointer to MPT request frame
797 * This routine posts a MPT request frame to the request post FIFO of a
798 * specific MPT adapter.
801 mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
805 u16 req_idx; /* Request index */
807 /* ensure values are reset properly! */
808 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
809 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
811 req_idx = req_offset / ioc->req_sz;
812 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
813 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
815 #ifdef MPT_DEBUG_MSG_FRAME
817 u32 *m = mf->u.frame.hwhdr.__hdr;
820 printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",
822 n = ioc->req_sz/4 - 1;
825 for (ii=0; ii<=n; ii++) {
826 if (ii && ((ii%8)==0))
827 printk("\n" KERN_INFO " ");
828 printk(" %08x", le32_to_cpu(m[ii]));
834 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
835 dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
836 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
839 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
841 * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
842 * @handle: Handle of registered MPT protocol driver
843 * @ioc: Pointer to MPT adapter structure
844 * @mf: Pointer to MPT request frame
846 * This routine places a MPT request frame back on the MPT adapter's
850 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
854 /* Put Request back on FreeQ! */
855 spin_lock_irqsave(&ioc->FreeQlock, flags);
856 mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
857 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
861 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
864 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
866 * mpt_add_sge - Place a simple SGE at address pAddr.
867 * @pAddr: virtual address for SGE
868 * @flagslength: SGE flags and data transfer length
869 * @dma_addr: Physical address
871 * This routine places a MPT request frame back on the MPT adapter's
875 mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
877 if (sizeof(dma_addr_t) == sizeof(u64)) {
878 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
879 u32 tmp = dma_addr & 0xFFFFFFFF;
881 pSge->FlagsLength = cpu_to_le32(flagslength);
882 pSge->Address.Low = cpu_to_le32(tmp);
883 tmp = (u32) ((u64)dma_addr >> 32);
884 pSge->Address.High = cpu_to_le32(tmp);
887 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
888 pSge->FlagsLength = cpu_to_le32(flagslength);
889 pSge->Address = cpu_to_le32(dma_addr);
893 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
895 * mpt_send_handshake_request - Send MPT request via doorbell handshake method.
896 * @handle: Handle of registered MPT protocol driver
897 * @ioc: Pointer to MPT adapter structure
898 * @reqBytes: Size of the request in bytes
899 * @req: Pointer to MPT request frame
900 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
902 * This routine is used exclusively to send MptScsiTaskMgmt
903 * requests since they are required to be sent via doorbell handshake.
905 * NOTE: It is the callers responsibility to byte-swap fields in the
906 * request which are greater than 1 byte in size.
908 * Returns 0 for success, non-zero for failure.
911 mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
917 /* State is known to be good upon entering
918 * this function so issue the bus reset
923 * Emulate what mpt_put_msg_frame() does /wrt to sanity
924 * setting cb_idx/req_idx. But ONLY if this request
925 * is in proper (pre-alloc'd) request buffer range...
927 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
928 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
929 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
930 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
931 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;
934 /* Make sure there are no doorbells */
935 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
937 CHIPREG_WRITE32(&ioc->chip->Doorbell,
938 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
939 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
941 /* Wait for IOC doorbell int */
942 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
946 /* Read doorbell and check for active bit */
947 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
950 dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
953 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
955 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
959 /* Send request via doorbell handshake */
960 req_as_bytes = (u8 *) req;
961 for (ii = 0; ii < reqBytes/4; ii++) {
964 word = ((req_as_bytes[(ii*4) + 0] << 0) |
965 (req_as_bytes[(ii*4) + 1] << 8) |
966 (req_as_bytes[(ii*4) + 2] << 16) |
967 (req_as_bytes[(ii*4) + 3] << 24));
968 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
969 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
975 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
980 /* Make sure there are no doorbells */
981 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
986 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
988 * mpt_host_page_access_control - control the IOC's Host Page Buffer access
989 * @ioc: Pointer to MPT adapter structure
990 * @access_control_value: define bits below
991 * @sleepFlag: Specifies whether the process can sleep
993 * Provides mechanism for the host driver to control the IOC's
994 * Host Page Buffer access.
996 * Access Control Value - bits[15:12]
998 * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
999 * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1000 * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1002 * Returns 0 for success, non-zero for failure.
1006 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1010 /* return if in use */
1011 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1012 & MPI_DOORBELL_ACTIVE)
1015 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1017 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1018 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1019 <<MPI_DOORBELL_FUNCTION_SHIFT) |
1020 (access_control_value<<12)));
1022 /* Wait for IOC to clear Doorbell Status bit */
1023 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1029 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1031 * mpt_host_page_alloc - allocate system memory for the fw
1032 * @ioc: Pointer to pointer to IOC adapter
1033 * @ioc_init: Pointer to ioc init config page
1035 * If we already allocated memory in past, then resend the same pointer.
1036 * Returns 0 for success, non-zero for failure.
1039 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1043 u32 host_page_buffer_sz=0;
1045 if(!ioc->HostPageBuffer) {
1047 host_page_buffer_sz =
1048 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1050 if(!host_page_buffer_sz)
1051 return 0; /* fw doesn't need any host buffers */
1053 /* spin till we get enough memory */
1054 while(host_page_buffer_sz > 0) {
1056 if((ioc->HostPageBuffer = pci_alloc_consistent(
1058 host_page_buffer_sz,
1059 &ioc->HostPageBuffer_dma)) != NULL) {
1061 dinitprintk((MYIOC_s_INFO_FMT
1062 "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1063 ioc->name, ioc->HostPageBuffer,
1064 (u32)ioc->HostPageBuffer_dma,
1065 host_page_buffer_sz));
1066 ioc->alloc_total += host_page_buffer_sz;
1067 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1071 host_page_buffer_sz -= (4*1024);
1075 if(!ioc->HostPageBuffer) {
1076 printk(MYIOC_s_ERR_FMT
1077 "Failed to alloc memory for host_page_buffer!\n",
1082 psge = (char *)&ioc_init->HostPageBufferSGE;
1083 flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1084 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1085 MPI_SGE_FLAGS_32_BIT_ADDRESSING |
1086 MPI_SGE_FLAGS_HOST_TO_IOC |
1087 MPI_SGE_FLAGS_END_OF_BUFFER;
1088 if (sizeof(dma_addr_t) == sizeof(u64)) {
1089 flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
1091 flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1092 flags_length |= ioc->HostPageBuffer_sz;
1093 mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1094 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1099 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1101 * mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1102 * @iocid: IOC unique identifier (integer)
1103 * @iocpp: Pointer to pointer to IOC adapter
1105 * Given a unique IOC identifier, set pointer to the associated MPT
1106 * adapter structure.
1108 * Returns iocid and sets iocpp if iocid is found.
1109 * Returns -1 if iocid is not found.
1112 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1116 list_for_each_entry(ioc,&ioc_list,list) {
1117 if (ioc->id == iocid) {
1127 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1129 * mpt_attach - Install a PCI intelligent MPT adapter.
1130 * @pdev: Pointer to pci_dev structure
1131 * @id: PCI device ID information
1133 * This routine performs all the steps necessary to bring the IOC of
1134 * a MPT adapter to a OPERATIONAL state. This includes registering
1135 * memory regions, registering the interrupt, and allocating request
1136 * and reply memory pools.
1138 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1141 * Returns 0 for success, non-zero for failure.
1143 * TODO: Add support for polled controllers
1146 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1150 unsigned long mem_phys;
1158 static int mpt_ids = 0;
1159 #ifdef CONFIG_PROC_FS
1160 struct proc_dir_entry *dent, *ent;
1163 if (pci_enable_device(pdev))
1166 dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1168 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1169 dprintk((KERN_INFO MYNAM
1170 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
1171 } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1172 printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
1176 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1177 dprintk((KERN_INFO MYNAM
1178 ": Using 64 bit consistent mask\n"));
1180 dprintk((KERN_INFO MYNAM
1181 ": Not using 64 bit consistent mask\n"));
1183 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1185 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1188 ioc->alloc_total = sizeof(MPT_ADAPTER);
1189 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1190 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1193 ioc->diagPending = 0;
1194 spin_lock_init(&ioc->diagLock);
1195 spin_lock_init(&ioc->initializing_hba_lock);
1197 /* Initialize the event logging.
1199 ioc->eventTypes = 0; /* None */
1200 ioc->eventContext = 0;
1201 ioc->eventLogSize = 0;
1208 ioc->cached_fw = NULL;
1210 /* Initilize SCSI Config Data structure
1212 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1214 /* Initialize the running configQ head.
1216 INIT_LIST_HEAD(&ioc->configQ);
1218 /* Initialize the fc rport list head.
1220 INIT_LIST_HEAD(&ioc->fc_rports);
1222 /* Find lookup slot. */
1223 INIT_LIST_HEAD(&ioc->list);
1224 ioc->id = mpt_ids++;
1226 mem_phys = msize = 0;
1228 for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1229 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1232 /* Get I/O space! */
1233 port = pci_resource_start(pdev, ii);
1234 psize = pci_resource_len(pdev,ii);
1239 mem_phys = pci_resource_start(pdev, ii);
1240 msize = pci_resource_len(pdev,ii);
1243 ioc->mem_size = msize;
1246 /* Get logical ptr for PciMem0 space */
1247 /*mem = ioremap(mem_phys, msize);*/
1248 mem = ioremap(mem_phys, msize);
1250 printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
1255 dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
1257 dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
1258 &ioc->facts, &ioc->pfacts[0]));
1260 ioc->mem_phys = mem_phys;
1261 ioc->chip = (SYSIF_REGS __iomem *)mem;
1263 /* Save Port IO values in case we need to do downloadboot */
1265 u8 *pmem = (u8*)port;
1266 ioc->pio_mem_phys = port;
1267 ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
1270 if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC909) {
1271 ioc->prod_name = "LSIFC909";
1274 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929) {
1275 ioc->prod_name = "LSIFC929";
1278 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919) {
1279 ioc->prod_name = "LSIFC919";
1282 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929X) {
1283 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1285 if (revision < XL_929) {
1286 ioc->prod_name = "LSIFC929X";
1287 /* 929X Chip Fix. Set Split transactions level
1288 * for PCIX. Set MOST bits to zero.
1290 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1292 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1294 ioc->prod_name = "LSIFC929XL";
1295 /* 929XL Chip Fix. Set MMRBC to 0x08.
1297 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1299 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1302 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919X) {
1303 ioc->prod_name = "LSIFC919X";
1305 /* 919X Chip Fix. Set Split transactions level
1306 * for PCIX. Set MOST bits to zero.
1308 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1310 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1312 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC939X) {
1313 ioc->prod_name = "LSIFC939X";
1315 ioc->errata_flag_1064 = 1;
1317 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949X) {
1318 ioc->prod_name = "LSIFC949X";
1320 ioc->errata_flag_1064 = 1;
1322 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949E) {
1323 ioc->prod_name = "LSIFC949E";
1326 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_53C1030) {
1327 ioc->prod_name = "LSI53C1030";
1328 ioc->bus_type = SPI;
1329 /* 1030 Chip Fix. Disable Split transactions
1330 * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1332 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1333 if (revision < C0_1030) {
1334 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1336 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1339 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) {
1340 ioc->prod_name = "LSI53C1035";
1341 ioc->bus_type = SPI;
1343 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064) {
1344 ioc->prod_name = "LSISAS1064";
1345 ioc->bus_type = SAS;
1346 ioc->errata_flag_1064 = 1;
1348 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068) {
1349 ioc->prod_name = "LSISAS1068";
1350 ioc->bus_type = SAS;
1351 ioc->errata_flag_1064 = 1;
1353 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064E) {
1354 ioc->prod_name = "LSISAS1064E";
1355 ioc->bus_type = SAS;
1357 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068E) {
1358 ioc->prod_name = "LSISAS1068E";
1359 ioc->bus_type = SAS;
1361 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
1362 ioc->prod_name = "LSISAS1078";
1363 ioc->bus_type = SAS;
1366 if (ioc->errata_flag_1064)
1367 pci_disable_io_access(pdev);
1369 sprintf(ioc->name, "ioc%d", ioc->id);
1371 spin_lock_init(&ioc->FreeQlock);
1374 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1376 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1378 /* Set lookup ptr. */
1379 list_add_tail(&ioc->list, &ioc_list);
1381 /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1383 mpt_detect_bound_ports(ioc, pdev);
1385 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1387 printk(KERN_WARNING MYNAM
1388 ": WARNING - %s did not initialize properly! (%d)\n",
1391 list_del(&ioc->list);
1393 ioc->alt_ioc->alt_ioc = NULL;
1396 pci_set_drvdata(pdev, NULL);
1400 /* call per device driver probe entry point */
1401 for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
1402 if(MptDeviceDriverHandlers[ii] &&
1403 MptDeviceDriverHandlers[ii]->probe) {
1404 MptDeviceDriverHandlers[ii]->probe(pdev,id);
1408 #ifdef CONFIG_PROC_FS
1410 * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
1412 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1414 ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
1416 ent->read_proc = procmpt_iocinfo_read;
1419 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
1421 ent->read_proc = procmpt_summary_read;
1430 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1432 * mpt_detach - Remove a PCI intelligent MPT adapter.
1433 * @pdev: Pointer to pci_dev structure
1437 mpt_detach(struct pci_dev *pdev)
1439 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1443 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
1444 remove_proc_entry(pname, NULL);
1445 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
1446 remove_proc_entry(pname, NULL);
1447 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
1448 remove_proc_entry(pname, NULL);
1450 /* call per device driver remove entry point */
1451 for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
1452 if(MptDeviceDriverHandlers[ii] &&
1453 MptDeviceDriverHandlers[ii]->remove) {
1454 MptDeviceDriverHandlers[ii]->remove(pdev);
1458 /* Disable interrupts! */
1459 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1462 synchronize_irq(pdev->irq);
1464 /* Clear any lingering interrupt */
1465 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1467 CHIPREG_READ32(&ioc->chip->IntStatus);
1469 mpt_adapter_dispose(ioc);
1471 pci_set_drvdata(pdev, NULL);
1474 /**************************************************************************
1478 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1480 * mpt_suspend - Fusion MPT base driver suspend routine.
1481 * @pdev: Pointer to pci_dev structure
1482 * @state: new state to enter
1485 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
1488 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1490 device_state=pci_choose_state(pdev, state);
1492 printk(MYIOC_s_INFO_FMT
1493 "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
1494 ioc->name, pdev, pci_name(pdev), device_state);
1496 pci_save_state(pdev);
1498 /* put ioc into READY_STATE */
1499 if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
1500 printk(MYIOC_s_ERR_FMT
1501 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
1504 /* disable interrupts */
1505 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1508 /* Clear any lingering interrupt */
1509 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1511 pci_disable_device(pdev);
1512 pci_set_power_state(pdev, device_state);
1517 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1519 * mpt_resume - Fusion MPT base driver resume routine.
1520 * @pdev: Pointer to pci_dev structure
1523 mpt_resume(struct pci_dev *pdev)
1525 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1526 u32 device_state = pdev->current_state;
1529 printk(MYIOC_s_INFO_FMT
1530 "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
1531 ioc->name, pdev, pci_name(pdev), device_state);
1533 pci_set_power_state(pdev, 0);
1534 pci_restore_state(pdev);
1535 pci_enable_device(pdev);
1537 /* enable interrupts */
1538 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1541 printk(MYIOC_s_INFO_FMT
1542 "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
1544 (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
1545 CHIPREG_READ32(&ioc->chip->Doorbell));
1547 /* bring ioc to operational state */
1548 if ((recovery_state = mpt_do_ioc_recovery(ioc,
1549 MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
1550 printk(MYIOC_s_INFO_FMT
1551 "pci-resume: Cannot recover, error:[%x]\n",
1552 ioc->name, recovery_state);
1554 printk(MYIOC_s_INFO_FMT
1555 "pci-resume: success\n", ioc->name);
1563 mpt_signal_reset(int index, MPT_ADAPTER *ioc, int reset_phase)
1565 if ((MptDriverClass[index] == MPTSPI_DRIVER &&
1566 ioc->bus_type != SPI) ||
1567 (MptDriverClass[index] == MPTFC_DRIVER &&
1568 ioc->bus_type != FC) ||
1569 (MptDriverClass[index] == MPTSAS_DRIVER &&
1570 ioc->bus_type != SAS))
1571 /* make sure we only call the relevant reset handler
1574 return (MptResetHandlers[index])(ioc, reset_phase);
1577 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1579 * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
1580 * @ioc: Pointer to MPT adapter structure
1581 * @reason: Event word / reason
1582 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1584 * This routine performs all the steps necessary to bring the IOC
1585 * to a OPERATIONAL state.
1587 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1592 * -1 if failed to get board READY
1593 * -2 if READY but IOCFacts Failed
1594 * -3 if READY but PrimeIOCFifos Failed
1595 * -4 if READY but IOCInit Failed
1598 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
1600 int hard_reset_done = 0;
1601 int alt_ioc_ready = 0;
1607 int reset_alt_ioc_active = 0;
1608 int irq_allocated = 0;
1610 printk(KERN_INFO MYNAM ": Initiating %s %s\n",
1611 ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
1613 /* Disable reply interrupts (also blocks FreeQ) */
1614 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1618 if (ioc->alt_ioc->active)
1619 reset_alt_ioc_active = 1;
1621 /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
1622 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
1623 ioc->alt_ioc->active = 0;
1627 if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
1630 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
1631 if (hard_reset_done == -4) {
1632 printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
1635 if (reset_alt_ioc_active && ioc->alt_ioc) {
1636 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
1637 dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
1638 ioc->alt_ioc->name));
1639 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1640 ioc->alt_ioc->active = 1;
1644 printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
1650 /* hard_reset_done = 0 if a soft reset was performed
1651 * and 1 if a hard reset was performed.
1653 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
1654 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
1657 printk(KERN_WARNING MYNAM
1658 ": alt-%s: Not ready WARNING!\n",
1659 ioc->alt_ioc->name);
1662 for (ii=0; ii<5; ii++) {
1663 /* Get IOC facts! Allow 5 retries */
1664 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
1670 dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
1672 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1673 MptDisplayIocCapabilities(ioc);
1676 if (alt_ioc_ready) {
1677 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
1678 dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
1679 /* Retry - alt IOC was initialized once
1681 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
1684 dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
1686 reset_alt_ioc_active = 0;
1687 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1688 MptDisplayIocCapabilities(ioc->alt_ioc);
1693 * Device is reset now. It must have de-asserted the interrupt line
1694 * (if it was asserted) and it should be safe to register for the
1697 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
1699 if (ioc->pcidev->irq) {
1700 if (mpt_msi_enable && !pci_enable_msi(ioc->pcidev))
1701 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
1703 rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
1704 IRQF_SHARED, ioc->name, ioc);
1706 printk(MYIOC_s_ERR_FMT "Unable to allocate "
1707 "interrupt %d!\n", ioc->name,
1710 pci_disable_msi(ioc->pcidev);
1714 ioc->pci_irq = ioc->pcidev->irq;
1715 pci_set_master(ioc->pcidev); /* ?? */
1716 pci_set_drvdata(ioc->pcidev, ioc);
1717 dprintk((KERN_INFO MYNAM ": %s installed at interrupt "
1718 "%d\n", ioc->name, ioc->pcidev->irq));
1722 /* Prime reply & request queues!
1723 * (mucho alloc's) Must be done prior to
1724 * init as upper addresses are needed for init.
1725 * If fails, continue with alt-ioc processing
1727 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
1730 /* May need to check/upload firmware & data here!
1731 * If fails, continue with alt-ioc processing
1733 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
1736 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
1737 printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
1738 ioc->alt_ioc->name, rc);
1740 reset_alt_ioc_active = 0;
1743 if (alt_ioc_ready) {
1744 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
1746 reset_alt_ioc_active = 0;
1747 printk(KERN_WARNING MYNAM
1748 ": alt-%s: (%d) init failure WARNING!\n",
1749 ioc->alt_ioc->name, rc);
1753 if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
1754 if (ioc->upload_fw) {
1755 ddlprintk((MYIOC_s_INFO_FMT
1756 "firmware upload required!\n", ioc->name));
1758 /* Controller is not operational, cannot do upload
1761 rc = mpt_do_upload(ioc, sleepFlag);
1763 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
1765 * Maintain only one pointer to FW memory
1766 * so there will not be two attempt to
1767 * downloadboot onboard dual function
1768 * chips (mpt_adapter_disable,
1771 ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n",
1772 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
1773 ioc->alt_ioc->cached_fw = NULL;
1776 printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
1784 /* Enable! (reply interrupt) */
1785 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1789 if (reset_alt_ioc_active && ioc->alt_ioc) {
1790 /* (re)Enable alt-IOC! (reply interrupt) */
1791 dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
1792 ioc->alt_ioc->name));
1793 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1794 ioc->alt_ioc->active = 1;
1797 /* Enable MPT base driver management of EventNotification
1798 * and EventAck handling.
1800 if ((ret == 0) && (!ioc->facts.EventState))
1801 (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
1803 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
1804 (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
1806 /* Add additional "reason" check before call to GetLanConfigPages
1807 * (combined with GetIoUnitPage2 call). This prevents a somewhat
1808 * recursive scenario; GetLanConfigPages times out, timer expired
1809 * routine calls HardResetHandler, which calls into here again,
1810 * and we try GetLanConfigPages again...
1812 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
1813 if (ioc->bus_type == SAS) {
1815 /* clear persistency table */
1816 if(ioc->facts.IOCExceptions &
1817 MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
1818 ret = mptbase_sas_persist_operation(ioc,
1819 MPI_SAS_OP_CLEAR_NOT_PRESENT);
1826 mpt_findImVolumes(ioc);
1828 } else if (ioc->bus_type == FC) {
1829 if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
1830 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
1832 * Pre-fetch the ports LAN MAC address!
1833 * (LANPage1_t stuff)
1835 (void) GetLanConfigPages(ioc);
1838 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
1839 dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
1840 ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] ));
1845 /* Get NVRAM and adapter maximums from SPP 0 and 2
1847 mpt_GetScsiPortSettings(ioc, 0);
1849 /* Get version and length of SDP 1
1851 mpt_readScsiDevicePageHeaders(ioc, 0);
1855 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
1856 mpt_findImVolumes(ioc);
1858 /* Check, and possibly reset, the coalescing value
1860 mpt_read_ioc_pg_1(ioc);
1862 mpt_read_ioc_pg_4(ioc);
1865 GetIoUnitPage2(ioc);
1869 * Call each currently registered protocol IOC reset handler
1870 * with post-reset indication.
1871 * NOTE: If we're doing _IOC_BRINGUP, there can be no
1872 * MptResetHandlers[] registered yet.
1874 if (hard_reset_done) {
1876 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
1877 if ((ret == 0) && MptResetHandlers[ii]) {
1878 dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
1880 rc += mpt_signal_reset(ii, ioc, MPT_IOC_POST_RESET);
1884 if (alt_ioc_ready && MptResetHandlers[ii]) {
1885 drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
1886 ioc->name, ioc->alt_ioc->name, ii));
1887 rc += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_POST_RESET);
1891 /* FIXME? Examine results here? */
1895 if ((ret != 0) && irq_allocated) {
1896 free_irq(ioc->pci_irq, ioc);
1898 pci_disable_msi(ioc->pcidev);
1903 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1905 * mpt_detect_bound_ports - Search for matching PCI bus/dev_function
1906 * @ioc: Pointer to MPT adapter structure
1907 * @pdev: Pointer to (struct pci_dev) structure
1909 * Search for PCI bus/dev_function which matches
1910 * PCI bus/dev_function (+/-1) for newly discovered 929,
1911 * 929X, 1030 or 1035.
1913 * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
1914 * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
1917 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
1919 struct pci_dev *peer=NULL;
1920 unsigned int slot = PCI_SLOT(pdev->devfn);
1921 unsigned int func = PCI_FUNC(pdev->devfn);
1922 MPT_ADAPTER *ioc_srch;
1924 dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x,"
1925 " searching for devfn match on %x or %x\n",
1926 ioc->name, pci_name(pdev), pdev->bus->number,
1927 pdev->devfn, func-1, func+1));
1929 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
1931 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
1936 list_for_each_entry(ioc_srch, &ioc_list, list) {
1937 struct pci_dev *_pcidev = ioc_srch->pcidev;
1938 if (_pcidev == peer) {
1939 /* Paranoia checks */
1940 if (ioc->alt_ioc != NULL) {
1941 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
1942 ioc->name, ioc->alt_ioc->name);
1944 } else if (ioc_srch->alt_ioc != NULL) {
1945 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
1946 ioc_srch->name, ioc_srch->alt_ioc->name);
1949 dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
1950 ioc->name, ioc_srch->name));
1951 ioc_srch->alt_ioc = ioc;
1952 ioc->alt_ioc = ioc_srch;
1958 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1960 * mpt_adapter_disable - Disable misbehaving MPT adapter.
1961 * @ioc: Pointer to MPT adapter structure
1964 mpt_adapter_disable(MPT_ADAPTER *ioc)
1969 if (ioc->cached_fw != NULL) {
1970 ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
1971 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
1972 printk(KERN_WARNING MYNAM
1973 ": firmware downloadboot failure (%d)!\n", ret);
1977 /* Disable adapter interrupts! */
1978 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1980 /* Clear any lingering interrupt */
1981 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1983 if (ioc->alloc != NULL) {
1985 dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n",
1986 ioc->name, ioc->alloc, ioc->alloc_sz));
1987 pci_free_consistent(ioc->pcidev, sz,
1988 ioc->alloc, ioc->alloc_dma);
1989 ioc->reply_frames = NULL;
1990 ioc->req_frames = NULL;
1992 ioc->alloc_total -= sz;
1995 if (ioc->sense_buf_pool != NULL) {
1996 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
1997 pci_free_consistent(ioc->pcidev, sz,
1998 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
1999 ioc->sense_buf_pool = NULL;
2000 ioc->alloc_total -= sz;
2003 if (ioc->events != NULL){
2004 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2007 ioc->alloc_total -= sz;
2010 if (ioc->cached_fw != NULL) {
2011 sz = ioc->facts.FWImageSize;
2012 pci_free_consistent(ioc->pcidev, sz,
2013 ioc->cached_fw, ioc->cached_fw_dma);
2014 ioc->cached_fw = NULL;
2015 ioc->alloc_total -= sz;
2018 kfree(ioc->spi_data.nvram);
2019 kfree(ioc->raid_data.pIocPg3);
2020 ioc->spi_data.nvram = NULL;
2021 ioc->raid_data.pIocPg3 = NULL;
2023 if (ioc->spi_data.pIocPg4 != NULL) {
2024 sz = ioc->spi_data.IocPg4Sz;
2025 pci_free_consistent(ioc->pcidev, sz,
2026 ioc->spi_data.pIocPg4,
2027 ioc->spi_data.IocPg4_dma);
2028 ioc->spi_data.pIocPg4 = NULL;
2029 ioc->alloc_total -= sz;
2032 if (ioc->ReqToChain != NULL) {
2033 kfree(ioc->ReqToChain);
2034 kfree(ioc->RequestNB);
2035 ioc->ReqToChain = NULL;
2038 kfree(ioc->ChainToChain);
2039 ioc->ChainToChain = NULL;
2041 if (ioc->HostPageBuffer != NULL) {
2042 if((ret = mpt_host_page_access_control(ioc,
2043 MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2044 printk(KERN_ERR MYNAM
2045 ": %s: host page buffers free failed (%d)!\n",
2048 dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n",
2049 ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
2050 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2051 ioc->HostPageBuffer,
2052 ioc->HostPageBuffer_dma);
2053 ioc->HostPageBuffer = NULL;
2054 ioc->HostPageBuffer_sz = 0;
2055 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2059 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2061 * mpt_adapter_dispose - Free all resources associated with an MPT adapter
2062 * @ioc: Pointer to MPT adapter structure
2064 * This routine unregisters h/w resources and frees all alloc'd memory
2065 * associated with a MPT adapter structure.
2068 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2070 int sz_first, sz_last;
2075 sz_first = ioc->alloc_total;
2077 mpt_adapter_disable(ioc);
2079 if (ioc->pci_irq != -1) {
2080 free_irq(ioc->pci_irq, ioc);
2082 pci_disable_msi(ioc->pcidev);
2086 if (ioc->memmap != NULL) {
2087 iounmap(ioc->memmap);
2091 #if defined(CONFIG_MTRR) && 0
2092 if (ioc->mtrr_reg > 0) {
2093 mtrr_del(ioc->mtrr_reg, 0, 0);
2094 dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
2098 /* Zap the adapter lookup ptr! */
2099 list_del(&ioc->list);
2101 sz_last = ioc->alloc_total;
2102 dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
2103 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2106 ioc->alt_ioc->alt_ioc = NULL;
2111 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2113 * MptDisplayIocCapabilities - Disply IOC's capabilities.
2114 * @ioc: Pointer to MPT adapter structure
2117 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2121 printk(KERN_INFO "%s: ", ioc->name);
2122 if (ioc->prod_name && strlen(ioc->prod_name) > 3)
2123 printk("%s: ", ioc->prod_name+3);
2124 printk("Capabilities={");
2126 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2127 printk("Initiator");
2131 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2132 printk("%sTarget", i ? "," : "");
2136 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2137 printk("%sLAN", i ? "," : "");
2143 * This would probably evoke more questions than it's worth
2145 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2146 printk("%sLogBusAddr", i ? "," : "");
2154 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2156 * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2157 * @ioc: Pointer to MPT_ADAPTER structure
2158 * @force: Force hard KickStart of IOC
2159 * @sleepFlag: Specifies whether the process can sleep
2162 * 1 - DIAG reset and READY
2163 * 0 - READY initially OR soft reset and READY
2164 * -1 - Any failure on KickStart
2165 * -2 - Msg Unit Reset Failed
2166 * -3 - IO Unit Reset Failed
2167 * -4 - IOC owned by a PEER
2170 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2175 int hard_reset_done = 0;
2180 /* Get current [raw] IOC state */
2181 ioc_state = mpt_GetIocState(ioc, 0);
2182 dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
2185 * Check to see if IOC got left/stuck in doorbell handshake
2186 * grip of death. If so, hard reset the IOC.
2188 if (ioc_state & MPI_DOORBELL_ACTIVE) {
2190 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2194 /* Is it already READY? */
2195 if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
2199 * Check to see if IOC is in FAULT state.
2201 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2203 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2205 printk(KERN_WARNING " FAULT code = %04xh\n",
2206 ioc_state & MPI_DOORBELL_DATA_MASK);
2210 * Hmmm... Did it get left operational?
2212 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2213 dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n",
2217 * If PCI Peer, exit.
2218 * Else, if no fault conditions are present, issue a MessageUnitReset
2219 * Else, fall through to KickStart case
2221 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2222 dinitprintk((KERN_INFO MYNAM
2223 ": whoinit 0x%x statefault %d force %d\n",
2224 whoinit, statefault, force));
2225 if (whoinit == MPI_WHOINIT_PCI_PEER)
2228 if ((statefault == 0 ) && (force == 0)) {
2229 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2236 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2237 if (hard_reset_done < 0)
2241 * Loop here waiting for IOC to come READY.
2244 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
2246 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2247 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2249 * BIOS or previous driver load left IOC in OP state.
2250 * Reset messaging FIFOs.
2252 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2253 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2256 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2258 * Something is wrong. Try to get IOC back
2261 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2262 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2269 printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
2270 ioc->name, (int)((ii+5)/HZ));
2274 if (sleepFlag == CAN_SLEEP) {
2277 mdelay (1); /* 1 msec delay */
2282 if (statefault < 3) {
2283 printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
2285 statefault==1 ? "stuck handshake" : "IOC FAULT");
2288 return hard_reset_done;
2291 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2293 * mpt_GetIocState - Get the current state of a MPT adapter.
2294 * @ioc: Pointer to MPT_ADAPTER structure
2295 * @cooked: Request raw or cooked IOC state
2297 * Returns all IOC Doorbell register bits if cooked==0, else just the
2298 * Doorbell bits in MPI_IOC_STATE_MASK.
2301 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2306 s = CHIPREG_READ32(&ioc->chip->Doorbell);
2307 // dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
2308 sc = s & MPI_IOC_STATE_MASK;
2311 ioc->last_state = sc;
2313 return cooked ? sc : s;
2316 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2318 * GetIocFacts - Send IOCFacts request to MPT adapter.
2319 * @ioc: Pointer to MPT_ADAPTER structure
2320 * @sleepFlag: Specifies whether the process can sleep
2321 * @reason: If recovery, only update facts.
2323 * Returns 0 for success, non-zero for failure.
2326 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
2328 IOCFacts_t get_facts;
2329 IOCFactsReply_t *facts;
2337 /* IOC *must* NOT be in RESET state! */
2338 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2339 printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
2345 facts = &ioc->facts;
2347 /* Destination (reply area)... */
2348 reply_sz = sizeof(*facts);
2349 memset(facts, 0, reply_sz);
2351 /* Request area (get_facts on the stack right now!) */
2352 req_sz = sizeof(get_facts);
2353 memset(&get_facts, 0, req_sz);
2355 get_facts.Function = MPI_FUNCTION_IOC_FACTS;
2356 /* Assert: All other get_facts fields are zero! */
2358 dinitprintk((MYIOC_s_INFO_FMT
2359 "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
2360 ioc->name, req_sz, reply_sz));
2362 /* No non-zero fields in the get_facts request are greater than
2363 * 1 byte in size, so we can just fire it off as is.
2365 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
2366 reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
2371 * Now byte swap (GRRR) the necessary fields before any further
2372 * inspection of reply contents.
2374 * But need to do some sanity checks on MsgLength (byte) field
2375 * to make sure we don't zero IOC's req_sz!
2377 /* Did we get a valid reply? */
2378 if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
2379 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2381 * If not been here, done that, save off first WhoInit value
2383 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
2384 ioc->FirstWhoInit = facts->WhoInit;
2387 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
2388 facts->MsgContext = le32_to_cpu(facts->MsgContext);
2389 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
2390 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
2391 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
2392 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
2393 /* CHECKME! IOCStatus, IOCLogInfo */
2395 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
2396 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
2399 * FC f/w version changed between 1.1 and 1.2
2400 * Old: u16{Major(4),Minor(4),SubMinor(8)}
2401 * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
2403 if (facts->MsgVersion < 0x0102) {
2405 * Handle old FC f/w style, convert to new...
2407 u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
2408 facts->FWVersion.Word =
2409 ((oldv<<12) & 0xFF000000) |
2410 ((oldv<<8) & 0x000FFF00);
2412 facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
2414 facts->ProductID = le16_to_cpu(facts->ProductID);
2415 facts->CurrentHostMfaHighAddr =
2416 le32_to_cpu(facts->CurrentHostMfaHighAddr);
2417 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
2418 facts->CurrentSenseBufferHighAddr =
2419 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
2420 facts->CurReplyFrameSize =
2421 le16_to_cpu(facts->CurReplyFrameSize);
2422 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
2425 * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
2426 * Older MPI-1.00.xx struct had 13 dwords, and enlarged
2427 * to 14 in MPI-1.01.0x.
2429 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
2430 facts->MsgVersion > 0x0100) {
2431 facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
2434 sz = facts->FWImageSize;
2439 facts->FWImageSize = sz;
2441 if (!facts->RequestFrameSize) {
2442 /* Something is wrong! */
2443 printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
2448 r = sz = facts->BlockSize;
2449 vv = ((63 / (sz * 4)) + 1) & 0x03;
2450 ioc->NB_for_64_byte_frame = vv;
2456 ioc->NBShiftFactor = shiftFactor;
2457 dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
2458 ioc->name, vv, shiftFactor, r));
2460 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2462 * Set values for this IOC's request & reply frame sizes,
2463 * and request & reply queue depths...
2465 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
2466 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
2467 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
2468 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
2470 dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n",
2471 ioc->name, ioc->reply_sz, ioc->reply_depth));
2472 dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n",
2473 ioc->name, ioc->req_sz, ioc->req_depth));
2475 /* Get port facts! */
2476 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
2480 printk(MYIOC_s_ERR_FMT
2481 "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
2482 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
2483 RequestFrameSize)/sizeof(u32)));
2490 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2492 * GetPortFacts - Send PortFacts request to MPT adapter.
2493 * @ioc: Pointer to MPT_ADAPTER structure
2494 * @portnum: Port number
2495 * @sleepFlag: Specifies whether the process can sleep
2497 * Returns 0 for success, non-zero for failure.
2500 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2502 PortFacts_t get_pfacts;
2503 PortFactsReply_t *pfacts;
2508 /* IOC *must* NOT be in RESET state! */
2509 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2510 printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
2516 pfacts = &ioc->pfacts[portnum];
2518 /* Destination (reply area)... */
2519 reply_sz = sizeof(*pfacts);
2520 memset(pfacts, 0, reply_sz);
2522 /* Request area (get_pfacts on the stack right now!) */
2523 req_sz = sizeof(get_pfacts);
2524 memset(&get_pfacts, 0, req_sz);
2526 get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
2527 get_pfacts.PortNumber = portnum;
2528 /* Assert: All other get_pfacts fields are zero! */
2530 dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n",
2531 ioc->name, portnum));
2533 /* No non-zero fields in the get_pfacts request are greater than
2534 * 1 byte in size, so we can just fire it off as is.
2536 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
2537 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
2541 /* Did we get a valid reply? */
2543 /* Now byte swap the necessary fields in the response. */
2544 pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
2545 pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
2546 pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
2547 pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
2548 pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
2549 pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
2550 pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
2551 pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
2552 pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
2557 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2559 * SendIocInit - Send IOCInit request to MPT adapter.
2560 * @ioc: Pointer to MPT_ADAPTER structure
2561 * @sleepFlag: Specifies whether the process can sleep
2563 * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
2565 * Returns 0 for success, non-zero for failure.
2568 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
2571 MPIDefaultReply_t init_reply;
2577 memset(&ioc_init, 0, sizeof(ioc_init));
2578 memset(&init_reply, 0, sizeof(init_reply));
2580 ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
2581 ioc_init.Function = MPI_FUNCTION_IOC_INIT;
2583 /* If we are in a recovery mode and we uploaded the FW image,
2584 * then this pointer is not NULL. Skip the upload a second time.
2585 * Set this flag if cached_fw set for either IOC.
2587 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
2591 ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n",
2592 ioc->name, ioc->upload_fw, ioc->facts.Flags));
2594 if(ioc->bus_type == SAS)
2595 ioc_init.MaxDevices = ioc->facts.MaxDevices;
2596 else if(ioc->bus_type == FC)
2597 ioc_init.MaxDevices = MPT_MAX_FC_DEVICES;
2599 ioc_init.MaxDevices = MPT_MAX_SCSI_DEVICES;
2600 ioc_init.MaxBuses = MPT_MAX_BUS;
2601 dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n",
2602 ioc->name, ioc->facts.MsgVersion));
2603 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
2604 // set MsgVersion and HeaderVersion host driver was built with
2605 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
2606 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
2608 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
2609 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
2610 } else if(mpt_host_page_alloc(ioc, &ioc_init))
2613 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
2615 if (sizeof(dma_addr_t) == sizeof(u64)) {
2616 /* Save the upper 32-bits of the request
2617 * (reply) and sense buffers.
2619 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
2620 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
2622 /* Force 32-bit addressing */
2623 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
2624 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
2627 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
2628 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
2629 ioc->facts.MaxDevices = ioc_init.MaxDevices;
2630 ioc->facts.MaxBuses = ioc_init.MaxBuses;
2632 dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n",
2633 ioc->name, &ioc_init));
2635 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
2636 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
2638 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
2642 /* No need to byte swap the multibyte fields in the reply
2643 * since we don't even look at its contents.
2646 dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n",
2647 ioc->name, &ioc_init));
2649 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
2650 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
2654 /* YIKES! SUPER IMPORTANT!!!
2655 * Poll IocState until _OPERATIONAL while IOC is doing
2656 * LoopInit and TargetDiscovery!
2659 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
2660 state = mpt_GetIocState(ioc, 1);
2661 while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
2662 if (sleepFlag == CAN_SLEEP) {
2669 printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
2670 ioc->name, (int)((count+5)/HZ));
2674 state = mpt_GetIocState(ioc, 1);
2677 dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
2680 ioc->aen_event_read_flag=0;
2684 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2686 * SendPortEnable - Send PortEnable request to MPT adapter port.
2687 * @ioc: Pointer to MPT_ADAPTER structure
2688 * @portnum: Port number to enable
2689 * @sleepFlag: Specifies whether the process can sleep
2691 * Send PortEnable to bring IOC to OPERATIONAL state.
2693 * Returns 0 for success, non-zero for failure.
2696 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2698 PortEnable_t port_enable;
2699 MPIDefaultReply_t reply_buf;
2704 /* Destination... */
2705 reply_sz = sizeof(MPIDefaultReply_t);
2706 memset(&reply_buf, 0, reply_sz);
2708 req_sz = sizeof(PortEnable_t);
2709 memset(&port_enable, 0, req_sz);
2711 port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
2712 port_enable.PortNumber = portnum;
2713 /* port_enable.ChainOffset = 0; */
2714 /* port_enable.MsgFlags = 0; */
2715 /* port_enable.MsgContext = 0; */
2717 dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n",
2718 ioc->name, portnum, &port_enable));
2720 /* RAID FW may take a long time to enable
2722 if (((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
2723 > MPI_FW_HEADER_PID_PROD_TARGET_SCSI) ||
2724 (ioc->bus_type == SAS)) {
2725 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
2726 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
2727 300 /*seconds*/, sleepFlag);
2729 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
2730 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
2731 30 /*seconds*/, sleepFlag);
2737 * mpt_alloc_fw_memory - allocate firmware memory
2738 * @ioc: Pointer to MPT_ADAPTER structure
2739 * @size: total FW bytes
2741 * If memory has already been allocated, the same (cached) value
2745 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
2748 return; /* use already allocated memory */
2749 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2750 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
2751 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
2752 ioc->alloc_total += size;
2753 ioc->alt_ioc->alloc_total -= size;
2755 if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
2756 ioc->alloc_total += size;
2760 * mpt_free_fw_memory - free firmware memory
2761 * @ioc: Pointer to MPT_ADAPTER structure
2763 * If alt_img is NULL, delete from ioc structure.
2764 * Else, delete a secondary image in same format.
2767 mpt_free_fw_memory(MPT_ADAPTER *ioc)
2771 sz = ioc->facts.FWImageSize;
2772 dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
2773 ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
2774 pci_free_consistent(ioc->pcidev, sz,
2775 ioc->cached_fw, ioc->cached_fw_dma);
2776 ioc->cached_fw = NULL;
2782 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2784 * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
2785 * @ioc: Pointer to MPT_ADAPTER structure
2786 * @sleepFlag: Specifies whether the process can sleep
2788 * Returns 0 for success, >0 for handshake failure
2789 * <0 for fw upload failure.
2791 * Remark: If bound IOC and a successful FWUpload was performed
2792 * on the bound IOC, the second image is discarded
2793 * and memory is free'd. Both channels must upload to prevent
2794 * IOC from running in degraded mode.
2797 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
2799 u8 request[ioc->req_sz];
2800 u8 reply[sizeof(FWUploadReply_t)];
2801 FWUpload_t *prequest;
2802 FWUploadReply_t *preply;
2803 FWUploadTCSGE_t *ptcsge;
2806 int ii, sz, reply_sz;
2809 /* If the image size is 0, we are done.
2811 if ((sz = ioc->facts.FWImageSize) == 0)
2814 mpt_alloc_fw_memory(ioc, sz);
2816 dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
2817 ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
2819 if (ioc->cached_fw == NULL) {
2825 prequest = (FWUpload_t *)&request;
2826 preply = (FWUploadReply_t *)&reply;
2828 /* Destination... */
2829 memset(prequest, 0, ioc->req_sz);
2831 reply_sz = sizeof(reply);
2832 memset(preply, 0, reply_sz);
2834 prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
2835 prequest->Function = MPI_FUNCTION_FW_UPLOAD;
2837 ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
2838 ptcsge->DetailsLength = 12;
2839 ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
2840 ptcsge->ImageSize = cpu_to_le32(sz);
2842 sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
2844 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
2845 mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
2847 sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
2848 dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
2849 prequest, sgeoffset));
2850 DBG_DUMP_FW_REQUEST_FRAME(prequest)
2852 ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
2853 reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
2855 dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
2857 cmdStatus = -EFAULT;
2859 /* Handshake transfer was complete and successful.
2860 * Check the Reply Frame.
2862 int status, transfer_sz;
2863 status = le16_to_cpu(preply->IOCStatus);
2864 if (status == MPI_IOCSTATUS_SUCCESS) {
2865 transfer_sz = le32_to_cpu(preply->ActualImageSize);
2866 if (transfer_sz == sz)
2870 dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n",
2871 ioc->name, cmdStatus));
2876 ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n",
2878 mpt_free_fw_memory(ioc);
2884 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2886 * mpt_downloadboot - DownloadBoot code
2887 * @ioc: Pointer to MPT_ADAPTER structure
2888 * @pFwHeader: Pointer to firmware header info
2889 * @sleepFlag: Specifies whether the process can sleep
2891 * FwDownloadBoot requires Programmed IO access.
2893 * Returns 0 for success
2894 * -1 FW Image size is 0
2895 * -2 No valid cached_fw Pointer
2896 * <0 for fw upload failure.
2899 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
2901 MpiExtImageHeader_t *pExtImage;
2911 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
2912 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
2914 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
2915 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
2916 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
2917 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
2918 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
2919 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
2921 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
2924 if (sleepFlag == CAN_SLEEP) {
2930 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
2931 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
2933 for (count = 0; count < 30; count ++) {
2934 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
2935 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
2936 ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n",
2941 if (sleepFlag == CAN_SLEEP) {
2948 if ( count == 30 ) {
2949 ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! "
2950 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
2951 ioc->name, diag0val));
2955 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
2956 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
2957 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
2958 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
2959 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
2960 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
2962 /* Set the DiagRwEn and Disable ARM bits */
2963 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
2965 fwSize = (pFwHeader->ImageSize + 3)/4;
2966 ptrFw = (u32 *) pFwHeader;
2968 /* Write the LoadStartAddress to the DiagRw Address Register
2969 * using Programmed IO
2971 if (ioc->errata_flag_1064)
2972 pci_enable_io_access(ioc->pcidev);
2974 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
2975 ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n",
2976 ioc->name, pFwHeader->LoadStartAddress));
2978 ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n",
2979 ioc->name, fwSize*4, ptrFw));
2981 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
2984 nextImage = pFwHeader->NextImageHeaderOffset;
2986 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
2988 load_addr = pExtImage->LoadStartAddress;
2990 fwSize = (pExtImage->ImageSize + 3) >> 2;
2991 ptrFw = (u32 *)pExtImage;
2993 ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
2994 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
2995 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
2998 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3000 nextImage = pExtImage->NextImageHeaderOffset;
3003 /* Write the IopResetVectorRegAddr */
3004 ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
3005 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3007 /* Write the IopResetVectorValue */
3008 ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3009 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3011 /* Clear the internal flash bad bit - autoincrementing register,
3012 * so must do two writes.
3014 if (ioc->bus_type == SPI) {
3016 * 1030 and 1035 H/W errata, workaround to access
3017 * the ClearFlashBadSignatureBit
3019 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3020 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3021 diagRwData |= 0x40000000;
3022 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3023 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3025 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3026 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3027 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3028 MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3031 if (sleepFlag == CAN_SLEEP) {
3038 if (ioc->errata_flag_1064)
3039 pci_disable_io_access(ioc->pcidev);
3041 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3042 ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, "
3043 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3044 ioc->name, diag0val));
3045 diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3046 ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n",
3047 ioc->name, diag0val));
3048 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3050 /* Write 0xFF to reset the sequencer */
3051 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3053 if (ioc->bus_type == SAS) {
3054 ioc_state = mpt_GetIocState(ioc, 0);
3055 if ( (GetIocFacts(ioc, sleepFlag,
3056 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3057 ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n",
3058 ioc->name, ioc_state));
3063 for (count=0; count<HZ*20; count++) {
3064 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3065 ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n",
3066 ioc->name, count, ioc_state));
3067 if (ioc->bus_type == SAS) {
3070 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3071 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n",
3075 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n",
3079 if (sleepFlag == CAN_SLEEP) {
3085 ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n",
3086 ioc->name, ioc_state));
3090 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3092 * KickStart - Perform hard reset of MPT adapter.
3093 * @ioc: Pointer to MPT_ADAPTER structure
3094 * @force: Force hard reset
3095 * @sleepFlag: Specifies whether the process can sleep
3097 * This routine places MPT adapter in diagnostic mode via the
3098 * WriteSequence register, and then performs a hard reset of adapter
3099 * via the Diagnostic register.
3101 * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
3102 * or NO_SLEEP (interrupt thread, use mdelay)
3103 * force - 1 if doorbell active, board fault state
3104 * board operational, IOC_RECOVERY or
3105 * IOC_BRINGUP and there is an alt_ioc.
3109 * 1 - hard reset, READY
3110 * 0 - no reset due to History bit, READY
3111 * -1 - no reset due to History bit but not READY
3112 * OR reset but failed to come READY
3113 * -2 - no reset, could not enter DIAG mode
3114 * -3 - reset but bad FW bit
3117 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3119 int hard_reset_done = 0;
3123 dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
3124 if (ioc->bus_type == SPI) {
3125 /* Always issue a Msg Unit Reset first. This will clear some
3126 * SCSI bus hang conditions.
3128 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3130 if (sleepFlag == CAN_SLEEP) {
3137 hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3138 if (hard_reset_done < 0)
3139 return hard_reset_done;
3141 dinitprintk((MYIOC_s_INFO_FMT "Diagnostic reset successful!\n",
3144 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
3145 for (cnt=0; cnt<cntdn; cnt++) {
3146 ioc_state = mpt_GetIocState(ioc, 1);
3147 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3148 dinitprintk((MYIOC_s_INFO_FMT "KickStart successful! (cnt=%d)\n",
3150 return hard_reset_done;
3152 if (sleepFlag == CAN_SLEEP) {
3159 printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3160 ioc->name, ioc_state);
3164 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3166 * mpt_diag_reset - Perform hard reset of the adapter.
3167 * @ioc: Pointer to MPT_ADAPTER structure
3168 * @ignore: Set if to honor and clear to ignore
3169 * the reset history bit
3170 * @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3171 * else set to NO_SLEEP (use mdelay instead)
3173 * This routine places the adapter in diagnostic mode via the
3174 * WriteSequence register and then performs a hard reset of adapter
3175 * via the Diagnostic register. Adapter should be in ready state
3176 * upon successful completion.
3178 * Returns: 1 hard reset successful
3179 * 0 no reset performed because reset history bit set
3180 * -2 enabling diagnostic mode failed
3181 * -3 diagnostic reset failed
3184 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3186 MPT_ADAPTER *iocp=NULL;
3189 int hard_reset_done = 0;
3195 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3196 drsprintk((MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3197 "address=%p\n", ioc->name, __FUNCTION__,
3198 &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3199 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3200 if (sleepFlag == CAN_SLEEP)
3205 for (count = 0; count < 60; count ++) {
3206 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3207 doorbell &= MPI_IOC_STATE_MASK;
3209 drsprintk((MYIOC_s_INFO_FMT
3210 "looking for READY STATE: doorbell=%x"
3212 ioc->name, doorbell, count));
3213 if (doorbell == MPI_IOC_STATE_READY) {
3218 if (sleepFlag == CAN_SLEEP)
3226 /* Clear any existing interrupts */
3227 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3229 /* Use "Diagnostic reset" method! (only thing available!) */
3230 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3234 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3235 dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n",
3236 ioc->name, diag0val, diag1val));
3239 /* Do the reset if we are told to ignore the reset history
3240 * or if the reset history is 0
3242 if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
3243 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3244 /* Write magic sequence to WriteSequence register
3245 * Loop until in diagnostic mode
3247 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3248 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3249 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3250 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3251 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3252 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3255 if (sleepFlag == CAN_SLEEP) {
3263 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3264 ioc->name, diag0val);
3269 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3271 dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
3272 ioc->name, diag0val));
3277 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3278 dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n",
3279 ioc->name, diag0val, diag1val));
3282 * Disable the ARM (Bug fix)
3285 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
3289 * Now hit the reset bit in the Diagnostic register
3290 * (THE BIG HAMMER!) (Clears DRWE bit).
3292 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3293 hard_reset_done = 1;
3294 dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n",
3298 * Call each currently registered protocol IOC reset handler
3299 * with pre-reset indication.
3300 * NOTE: If we're doing _IOC_BRINGUP, there can be no
3301 * MptResetHandlers[] registered yet.
3307 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
3308 if (MptResetHandlers[ii]) {
3309 dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",
3311 r += mpt_signal_reset(ii, ioc, MPT_IOC_PRE_RESET);
3313 dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",
3314 ioc->name, ioc->alt_ioc->name, ii));
3315 r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_PRE_RESET);
3319 /* FIXME? Examine results here? */
3324 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
3325 iocp = ioc->alt_ioc;
3327 /* If the DownloadBoot operation fails, the
3328 * IOC will be left unusable. This is a fatal error
3329 * case. _diag_reset will return < 0
3331 for (count = 0; count < 30; count ++) {
3332 diag0val = CHIPREG_READ32(&iocp->chip->Diagnostic);
3333 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3337 dprintk((MYIOC_s_INFO_FMT "cached_fw: diag0val=%x count=%d\n",
3338 iocp->name, diag0val, count));
3340 if (sleepFlag == CAN_SLEEP) {
3346 if ((count = mpt_downloadboot(ioc,
3347 (MpiFwHeader_t *)iocp->cached_fw, sleepFlag)) < 0) {
3348 printk(KERN_WARNING MYNAM
3349 ": firmware downloadboot failure (%d)!\n", count);
3353 /* Wait for FW to reload and for board
3354 * to go to the READY state.
3355 * Maximum wait is 60 seconds.
3356 * If fail, no error will check again
3357 * with calling program.
3359 for (count = 0; count < 60; count ++) {
3360 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3361 doorbell &= MPI_IOC_STATE_MASK;
3363 if (doorbell == MPI_IOC_STATE_READY) {
3368 if (sleepFlag == CAN_SLEEP) {
3377 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3380 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3381 dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n",
3382 ioc->name, diag0val, diag1val));
3385 /* Clear RESET_HISTORY bit! Place board in the
3386 * diagnostic mode to update the diag register.
3388 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3390 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3391 /* Write magic sequence to WriteSequence register
3392 * Loop until in diagnostic mode
3394 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3395 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3396 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3397 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3398 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3399 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3402 if (sleepFlag == CAN_SLEEP) {
3410 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3411 ioc->name, diag0val);
3414 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3416 diag0val &= ~MPI_DIAG_RESET_HISTORY;
3417 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3418 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3419 if (diag0val & MPI_DIAG_RESET_HISTORY) {
3420 printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
3424 /* Disable Diagnostic Mode
3426 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
3428 /* Check FW reload status flags.
3430 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3431 if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
3432 printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
3433 ioc->name, diag0val);
3439 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3440 dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n",
3441 ioc->name, diag0val, diag1val));
3445 * Reset flag that says we've enabled event notification
3447 ioc->facts.EventState = 0;
3450 ioc->alt_ioc->facts.EventState = 0;
3452 return hard_reset_done;
3455 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3457 * SendIocReset - Send IOCReset request to MPT adapter.
3458 * @ioc: Pointer to MPT_ADAPTER structure
3459 * @reset_type: reset type, expected values are
3460 * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
3461 * @sleepFlag: Specifies whether the process can sleep
3463 * Send IOCReset request to the MPT adapter.
3465 * Returns 0 for success, non-zero for failure.
3468 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
3474 drsprintk((KERN_INFO MYNAM ": %s: Sending IOC reset(0x%02x)!\n",
3475 ioc->name, reset_type));
3476 CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
3477 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3480 /* FW ACK'd request, wait for READY state
3483 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
3485 while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
3489 if (sleepFlag != CAN_SLEEP)
3492 printk(KERN_ERR MYNAM ": %s: ERROR - Wait IOC_READY state timeout(%d)!\n",
3493 ioc->name, (int)((count+5)/HZ));
3497 if (sleepFlag == CAN_SLEEP) {
3500 mdelay (1); /* 1 msec delay */
3505 * Cleanup all event stuff for this IOC; re-issue EventNotification
3506 * request if needed.
3508 if (ioc->facts.Function)
3509 ioc->facts.EventState = 0;
3514 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3516 * initChainBuffers - Allocate memory for and initialize chain buffers
3517 * @ioc: Pointer to MPT_ADAPTER structure
3519 * Allocates memory for and initializes chain buffers,
3520 * chain buffer control arrays and spinlock.
3523 initChainBuffers(MPT_ADAPTER *ioc)
3526 int sz, ii, num_chain;
3527 int scale, num_sge, numSGE;
3529 /* ReqToChain size must equal the req_depth
3532 if (ioc->ReqToChain == NULL) {
3533 sz = ioc->req_depth * sizeof(int);
3534 mem = kmalloc(sz, GFP_ATOMIC);
3538 ioc->ReqToChain = (int *) mem;
3539 dinitprintk((KERN_INFO MYNAM ": %s ReqToChain alloc @ %p, sz=%d bytes\n",
3540 ioc->name, mem, sz));
3541 mem = kmalloc(sz, GFP_ATOMIC);
3545 ioc->RequestNB = (int *) mem;
3546 dinitprintk((KERN_INFO MYNAM ": %s RequestNB alloc @ %p, sz=%d bytes\n",
3547 ioc->name, mem, sz));
3549 for (ii = 0; ii < ioc->req_depth; ii++) {
3550 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
3553 /* ChainToChain size must equal the total number
3554 * of chain buffers to be allocated.
3557 * Calculate the number of chain buffers needed(plus 1) per I/O
3558 * then multiply the the maximum number of simultaneous cmds
3560 * num_sge = num sge in request frame + last chain buffer
3561 * scale = num sge per chain buffer if no chain element
3563 scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
3564 if (sizeof(dma_addr_t) == sizeof(u64))
3565 num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
3567 num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
3569 if (sizeof(dma_addr_t) == sizeof(u64)) {
3570 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
3571 (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
3573 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
3574 (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
3576 dinitprintk((KERN_INFO MYNAM ": %s num_sge=%d numSGE=%d\n",
3577 ioc->name, num_sge, numSGE));
3579 if ( numSGE > MPT_SCSI_SG_DEPTH )
3580 numSGE = MPT_SCSI_SG_DEPTH;
3583 while (numSGE - num_sge > 0) {
3585 num_sge += (scale - 1);
3589 dinitprintk((KERN_INFO MYNAM ": %s Now numSGE=%d num_sge=%d num_chain=%d\n",
3590 ioc->name, numSGE, num_sge, num_chain));
3592 if (ioc->bus_type == SPI)
3593 num_chain *= MPT_SCSI_CAN_QUEUE;
3595 num_chain *= MPT_FC_CAN_QUEUE;
3597 ioc->num_chain = num_chain;
3599 sz = num_chain * sizeof(int);
3600 if (ioc->ChainToChain == NULL) {
3601 mem = kmalloc(sz, GFP_ATOMIC);
3605 ioc->ChainToChain = (int *) mem;
3606 dinitprintk((KERN_INFO MYNAM ": %s ChainToChain alloc @ %p, sz=%d bytes\n",
3607 ioc->name, mem, sz));
3609 mem = (u8 *) ioc->ChainToChain;
3611 memset(mem, 0xFF, sz);
3615 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3617 * PrimeIocFifos - Initialize IOC request and reply FIFOs.
3618 * @ioc: Pointer to MPT_ADAPTER structure
3620 * This routine allocates memory for the MPT reply and request frame
3621 * pools (if necessary), and primes the IOC reply FIFO with
3624 * Returns 0 for success, non-zero for failure.
3627 PrimeIocFifos(MPT_ADAPTER *ioc)
3630 unsigned long flags;
3631 dma_addr_t alloc_dma;
3633 int i, reply_sz, sz, total_size, num_chain;
3635 /* Prime reply FIFO... */
3637 if (ioc->reply_frames == NULL) {
3638 if ( (num_chain = initChainBuffers(ioc)) < 0)
3641 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
3642 dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
3643 ioc->name, ioc->reply_sz, ioc->reply_depth));
3644 dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d[%x] bytes\n",
3645 ioc->name, reply_sz, reply_sz));
3647 sz = (ioc->req_sz * ioc->req_depth);
3648 dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d bytes, RequestDepth=%d\n",
3649 ioc->name, ioc->req_sz, ioc->req_depth));
3650 dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d[%x] bytes\n",
3651 ioc->name, sz, sz));
3654 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
3655 dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d bytes, ChainDepth=%d\n",
3656 ioc->name, ioc->req_sz, num_chain));
3657 dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
3658 ioc->name, sz, sz, num_chain));
3661 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
3663 printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
3668 dinitprintk((KERN_INFO MYNAM ": %s.Total alloc @ %p[%p], sz=%d[%x] bytes\n",
3669 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
3671 memset(mem, 0, total_size);
3672 ioc->alloc_total += total_size;
3674 ioc->alloc_dma = alloc_dma;
3675 ioc->alloc_sz = total_size;
3676 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
3677 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
3679 dinitprintk((KERN_INFO MYNAM ": %s ReplyBuffers @ %p[%p]\n",
3680 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
3682 alloc_dma += reply_sz;
3685 /* Request FIFO - WE manage this! */
3687 ioc->req_frames = (MPT_FRAME_HDR *) mem;
3688 ioc->req_frames_dma = alloc_dma;
3690 dinitprintk((KERN_INFO MYNAM ": %s RequestBuffers @ %p[%p]\n",
3691 ioc->name, mem, (void *)(ulong)alloc_dma));
3693 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
3695 #if defined(CONFIG_MTRR) && 0
3697 * Enable Write Combining MTRR for IOC's memory region.
3698 * (at least as much as we can; "size and base must be
3699 * multiples of 4 kiB"
3701 ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
3703 MTRR_TYPE_WRCOMB, 1);
3704 dprintk((MYIOC_s_INFO_FMT "MTRR region registered (base:size=%08x:%x)\n",
3705 ioc->name, ioc->req_frames_dma, sz));
3708 for (i = 0; i < ioc->req_depth; i++) {
3709 alloc_dma += ioc->req_sz;
3713 ioc->ChainBuffer = mem;
3714 ioc->ChainBufferDMA = alloc_dma;
3716 dinitprintk((KERN_INFO MYNAM " :%s ChainBuffers @ %p(%p)\n",
3717 ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
3719 /* Initialize the free chain Q.
3722 INIT_LIST_HEAD(&ioc->FreeChainQ);
3724 /* Post the chain buffers to the FreeChainQ.
3726 mem = (u8 *)ioc->ChainBuffer;
3727 for (i=0; i < num_chain; i++) {
3728 mf = (MPT_FRAME_HDR *) mem;
3729 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
3733 /* Initialize Request frames linked list
3735 alloc_dma = ioc->req_frames_dma;
3736 mem = (u8 *) ioc->req_frames;
3738 spin_lock_irqsave(&ioc->FreeQlock, flags);
3739 INIT_LIST_HEAD(&ioc->FreeQ);
3740 for (i = 0; i < ioc->req_depth; i++) {
3741 mf = (MPT_FRAME_HDR *) mem;
3743 /* Queue REQUESTs *internally*! */
3744 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
3748 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
3750 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
3751 ioc->sense_buf_pool =
3752 pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
3753 if (ioc->sense_buf_pool == NULL) {
3754 printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
3759 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
3760 ioc->alloc_total += sz;
3761 dinitprintk((KERN_INFO MYNAM ": %s.SenseBuffers @ %p[%p]\n",
3762 ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
3766 /* Post Reply frames to FIFO
3768 alloc_dma = ioc->alloc_dma;
3769 dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffers @ %p[%p]\n",
3770 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
3772 for (i = 0; i < ioc->reply_depth; i++) {
3773 /* Write each address to the IOC! */
3774 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
3775 alloc_dma += ioc->reply_sz;
3781 if (ioc->alloc != NULL) {
3783 pci_free_consistent(ioc->pcidev,
3785 ioc->alloc, ioc->alloc_dma);
3786 ioc->reply_frames = NULL;
3787 ioc->req_frames = NULL;
3788 ioc->alloc_total -= sz;
3790 if (ioc->sense_buf_pool != NULL) {
3791 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
3792 pci_free_consistent(ioc->pcidev,
3794 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
3795 ioc->sense_buf_pool = NULL;
3800 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3802 * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
3803 * from IOC via doorbell handshake method.
3804 * @ioc: Pointer to MPT_ADAPTER structure
3805 * @reqBytes: Size of the request in bytes
3806 * @req: Pointer to MPT request frame
3807 * @replyBytes: Expected size of the reply in bytes
3808 * @u16reply: Pointer to area where reply should be written
3809 * @maxwait: Max wait time for a reply (in seconds)
3810 * @sleepFlag: Specifies whether the process can sleep
3812 * NOTES: It is the callers responsibility to byte-swap fields in the
3813 * request which are greater than 1 byte in size. It is also the
3814 * callers responsibility to byte-swap response fields which are
3815 * greater than 1 byte in size.
3817 * Returns 0 for success, non-zero for failure.
3820 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
3821 int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
3823 MPIDefaultReply_t *mptReply;
3828 * Get ready to cache a handshake reply
3830 ioc->hs_reply_idx = 0;
3831 mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
3832 mptReply->MsgLength = 0;
3835 * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
3836 * then tell IOC that we want to handshake a request of N words.
3837 * (WRITE u32val to Doorbell reg).
3839 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3840 CHIPREG_WRITE32(&ioc->chip->Doorbell,
3841 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
3842 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
3845 * Wait for IOC's doorbell handshake int
3847 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
3850 dhsprintk((MYIOC_s_INFO_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
3851 ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
3853 /* Read doorbell and check for active bit */
3854 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
3858 * Clear doorbell int (WRITE 0 to IntStatus reg),
3859 * then wait for IOC to ACKnowledge that it's ready for
3860 * our handshake request.
3862 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3863 if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3868 u8 *req_as_bytes = (u8 *) req;
3871 * Stuff request words via doorbell handshake,
3872 * with ACK from IOC for each.
3874 for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
3875 u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
3876 (req_as_bytes[(ii*4) + 1] << 8) |
3877 (req_as_bytes[(ii*4) + 2] << 16) |
3878 (req_as_bytes[(ii*4) + 3] << 24));
3880 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
3881 if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
3885 dhsprintk((KERN_INFO MYNAM ": Handshake request frame (@%p) header\n", req));
3886 DBG_DUMP_REQUEST_FRAME_HDR(req)
3888 dhsprintk((MYIOC_s_INFO_FMT "HandShake request post done, WaitCnt=%d%s\n",
3889 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
3892 * Wait for completion of doorbell handshake reply from the IOC
3894 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
3897 dhsprintk((MYIOC_s_INFO_FMT "HandShake reply count=%d%s\n",
3898 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
3901 * Copy out the cached reply...
3903 for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
3904 u16reply[ii] = ioc->hs_reply[ii];
3912 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3914 * WaitForDoorbellAck - Wait for IOC doorbell handshake acknowledge
3915 * @ioc: Pointer to MPT_ADAPTER structure
3916 * @howlong: How long to wait (in seconds)
3917 * @sleepFlag: Specifies whether the process can sleep
3919 * This routine waits (up to ~2 seconds max) for IOC doorbell
3920 * handshake ACKnowledge, indicated by the IOP_DOORBELL_STATUS
3921 * bit in its IntStatus register being clear.
3923 * Returns a negative value on failure, else wait loop count.
3926 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
3932 cntdn = 1000 * howlong;
3934 if (sleepFlag == CAN_SLEEP) {
3937 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3938 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
3945 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3946 if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
3953 dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell ACK (count=%d)\n",
3958 printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
3959 ioc->name, count, intstat);
3963 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3965 * WaitForDoorbellInt - Wait for IOC to set its doorbell interrupt bit
3966 * @ioc: Pointer to MPT_ADAPTER structure
3967 * @howlong: How long to wait (in seconds)
3968 * @sleepFlag: Specifies whether the process can sleep
3970 * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt
3971 * (MPI_HIS_DOORBELL_INTERRUPT) to be set in the IntStatus register.
3973 * Returns a negative value on failure, else wait loop count.
3976 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
3982 cntdn = 1000 * howlong;
3983 if (sleepFlag == CAN_SLEEP) {
3985 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3986 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
3993 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
3994 if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
4002 dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4003 ioc->name, count, howlong));
4007 printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
4008 ioc->name, count, intstat);
4012 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4014 * WaitForDoorbellReply - Wait for and capture an IOC handshake reply.
4015 * @ioc: Pointer to MPT_ADAPTER structure
4016 * @howlong: How long to wait (in seconds)
4017 * @sleepFlag: Specifies whether the process can sleep
4019 * This routine polls the IOC for a handshake reply, 16 bits at a time.
4020 * Reply is cached to IOC private area large enough to hold a maximum
4021 * of 128 bytes of reply data.
4023 * Returns a negative value on failure, else size of reply in WORDS.
4026 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4031 u16 *hs_reply = ioc->hs_reply;
4032 volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4035 hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
4038 * Get first two u16's so we can look at IOC's intended reply MsgLength
4041 if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4044 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4045 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4046 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4049 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4050 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4054 dhsprintk((MYIOC_s_INFO_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4055 ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4056 failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4059 * If no error (and IOC said MsgLength is > 0), piece together
4060 * reply 16 bits at a time.
4062 for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
4063 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4065 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4066 /* don't overflow our IOC hs_reply[] buffer! */
4067 if (u16cnt < sizeof(ioc->hs_reply) / sizeof(ioc->hs_reply[0]))
4068 hs_reply[u16cnt] = hword;
4069 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4072 if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4074 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4077 printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
4082 else if (u16cnt != (2 * mptReply->MsgLength)) {
4085 else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
4090 dhsprintk((MYIOC_s_INFO_FMT "Got Handshake reply:\n", ioc->name));
4091 DBG_DUMP_REPLY_FRAME(mptReply)
4093 dhsprintk((MYIOC_s_INFO_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4094 ioc->name, t, u16cnt/2));
4098 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4100 * GetLanConfigPages - Fetch LANConfig pages.
4101 * @ioc: Pointer to MPT_ADAPTER structure
4103 * Return: 0 for success
4104 * -ENOMEM if no memory available
4105 * -EPERM if not allowed due to ISR context
4106 * -EAGAIN if no msg frames currently available
4107 * -EFAULT for non-successful reply or no reply (timeout)
4110 GetLanConfigPages(MPT_ADAPTER *ioc)
4112 ConfigPageHeader_t hdr;
4114 LANPage0_t *ppage0_alloc;
4115 dma_addr_t page0_dma;
4116 LANPage1_t *ppage1_alloc;
4117 dma_addr_t page1_dma;
4122 /* Get LAN Page 0 header */
4123 hdr.PageVersion = 0;
4126 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4127 cfg.cfghdr.hdr = &hdr;
4129 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4134 if ((rc = mpt_config(ioc, &cfg)) != 0)
4137 if (hdr.PageLength > 0) {
4138 data_sz = hdr.PageLength * 4;
4139 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4142 memset((u8 *)ppage0_alloc, 0, data_sz);
4143 cfg.physAddr = page0_dma;
4144 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4146 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4148 copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
4149 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4153 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4156 * Normalize endianness of structure data,
4157 * by byte-swapping all > 1 byte fields!
4166 /* Get LAN Page 1 header */
4167 hdr.PageVersion = 0;
4170 hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
4171 cfg.cfghdr.hdr = &hdr;
4173 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4177 if ((rc = mpt_config(ioc, &cfg)) != 0)
4180 if (hdr.PageLength == 0)
4183 data_sz = hdr.PageLength * 4;
4185 ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
4187 memset((u8 *)ppage1_alloc, 0, data_sz);
4188 cfg.physAddr = page1_dma;
4189 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4191 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4193 copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
4194 memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
4197 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
4200 * Normalize endianness of structure data,
4201 * by byte-swapping all > 1 byte fields!
4209 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4211 * mptbase_sas_persist_operation - Perform operation on SAS Persistent Table
4212 * @ioc: Pointer to MPT_ADAPTER structure
4213 * @persist_opcode: see below
4215 * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
4216 * devices not currently present.
4217 * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
4219 * NOTE: Don't use not this function during interrupt time.
4221 * Returns 0 for success, non-zero error
4224 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4226 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
4228 SasIoUnitControlRequest_t *sasIoUnitCntrReq;
4229 SasIoUnitControlReply_t *sasIoUnitCntrReply;
4230 MPT_FRAME_HDR *mf = NULL;
4231 MPIHeader_t *mpi_hdr;
4234 /* insure garbage is not sent to fw */
4235 switch(persist_opcode) {
4237 case MPI_SAS_OP_CLEAR_NOT_PRESENT:
4238 case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
4246 printk("%s: persist_opcode=%x\n",__FUNCTION__, persist_opcode);
4248 /* Get a MF for this command.
4250 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
4251 printk("%s: no msg frames!\n",__FUNCTION__);
4255 mpi_hdr = (MPIHeader_t *) mf;
4256 sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
4257 memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
4258 sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
4259 sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
4260 sasIoUnitCntrReq->Operation = persist_opcode;
4262 init_timer(&ioc->persist_timer);
4263 ioc->persist_timer.data = (unsigned long) ioc;
4264 ioc->persist_timer.function = mpt_timer_expired;
4265 ioc->persist_timer.expires = jiffies + HZ*10 /* 10 sec */;
4266 ioc->persist_wait_done=0;
4267 add_timer(&ioc->persist_timer);
4268 mpt_put_msg_frame(mpt_base_index, ioc, mf);
4269 wait_event(mpt_waitq, ioc->persist_wait_done);
4271 sasIoUnitCntrReply =
4272 (SasIoUnitControlReply_t *)ioc->persist_reply_frame;
4273 if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
4274 printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
4276 sasIoUnitCntrReply->IOCStatus,
4277 sasIoUnitCntrReply->IOCLogInfo);
4281 printk("%s: success\n",__FUNCTION__);
4285 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4288 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
4289 MpiEventDataRaid_t * pRaidEventData)
4298 volume = pRaidEventData->VolumeID;
4299 reason = pRaidEventData->ReasonCode;
4300 disk = pRaidEventData->PhysDiskNum;
4301 status = le32_to_cpu(pRaidEventData->SettingsStatus);
4302 flags = (status >> 0) & 0xff;
4303 state = (status >> 8) & 0xff;
4305 if (reason == MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED) {
4309 if ((reason >= MPI_EVENT_RAID_RC_PHYSDISK_CREATED &&
4310 reason <= MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED) ||
4311 (reason == MPI_EVENT_RAID_RC_SMART_DATA)) {
4312 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for PhysDisk %d\n",
4315 printk(MYIOC_s_INFO_FMT "RAID STATUS CHANGE for VolumeID %d\n",
4320 case MPI_EVENT_RAID_RC_VOLUME_CREATED:
4321 printk(MYIOC_s_INFO_FMT " volume has been created\n",
4325 case MPI_EVENT_RAID_RC_VOLUME_DELETED:
4327 printk(MYIOC_s_INFO_FMT " volume has been deleted\n",
4331 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED:
4332 printk(MYIOC_s_INFO_FMT " volume settings have been changed\n",
4336 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED:
4337 printk(MYIOC_s_INFO_FMT " volume is now %s%s%s%s\n",
4339 state == MPI_RAIDVOL0_STATUS_STATE_OPTIMAL
4341 : state == MPI_RAIDVOL0_STATUS_STATE_DEGRADED
4343 : state == MPI_RAIDVOL0_STATUS_STATE_FAILED
4346 flags & MPI_RAIDVOL0_STATUS_FLAG_ENABLED
4348 flags & MPI_RAIDVOL0_STATUS_FLAG_QUIESCED
4349 ? ", quiesced" : "",
4350 flags & MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
4351 ? ", resync in progress" : "" );
4354 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED:
4355 printk(MYIOC_s_INFO_FMT " volume membership of PhysDisk %d has changed\n",
4359 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED:
4360 printk(MYIOC_s_INFO_FMT " PhysDisk has been created\n",
4364 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED:
4365 printk(MYIOC_s_INFO_FMT " PhysDisk has been deleted\n",
4369 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED:
4370 printk(MYIOC_s_INFO_FMT " PhysDisk settings have been changed\n",
4374 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED:
4375 printk(MYIOC_s_INFO_FMT " PhysDisk is now %s%s%s\n",
4377 state == MPI_PHYSDISK0_STATUS_ONLINE
4379 : state == MPI_PHYSDISK0_STATUS_MISSING
4381 : state == MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE
4383 : state == MPI_PHYSDISK0_STATUS_FAILED
4385 : state == MPI_PHYSDISK0_STATUS_INITIALIZING
4387 : state == MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED
4388 ? "offline requested"
4389 : state == MPI_PHYSDISK0_STATUS_FAILED_REQUESTED
4390 ? "failed requested"
4391 : state == MPI_PHYSDISK0_STATUS_OTHER_OFFLINE
4394 flags & MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
4395 ? ", out of sync" : "",
4396 flags & MPI_PHYSDISK0_STATUS_FLAG_QUIESCED
4397 ? ", quiesced" : "" );
4400 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED:
4401 printk(MYIOC_s_INFO_FMT " Domain Validation needed for PhysDisk %d\n",
4405 case MPI_EVENT_RAID_RC_SMART_DATA:
4406 printk(MYIOC_s_INFO_FMT " SMART data received, ASC/ASCQ = %02xh/%02xh\n",
4407 ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
4410 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED:
4411 printk(MYIOC_s_INFO_FMT " replacement of PhysDisk %d has started\n",
4417 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4419 * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
4420 * @ioc: Pointer to MPT_ADAPTER structure
4422 * Returns: 0 for success
4423 * -ENOMEM if no memory available
4424 * -EPERM if not allowed due to ISR context
4425 * -EAGAIN if no msg frames currently available
4426 * -EFAULT for non-successful reply or no reply (timeout)
4429 GetIoUnitPage2(MPT_ADAPTER *ioc)
4431 ConfigPageHeader_t hdr;
4433 IOUnitPage2_t *ppage_alloc;
4434 dma_addr_t page_dma;
4438 /* Get the page header */
4439 hdr.PageVersion = 0;
4442 hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
4443 cfg.cfghdr.hdr = &hdr;
4445 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4450 if ((rc = mpt_config(ioc, &cfg)) != 0)
4453 if (hdr.PageLength == 0)
4456 /* Read the config page */
4457 data_sz = hdr.PageLength * 4;
4459 ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
4461 memset((u8 *)ppage_alloc, 0, data_sz);
4462 cfg.physAddr = page_dma;
4463 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4465 /* If Good, save data */
4466 if ((rc = mpt_config(ioc, &cfg)) == 0)
4467 ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
4469 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
4475 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4477 * mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
4478 * @ioc: Pointer to a Adapter Strucutre
4479 * @portnum: IOC port number
4481 * Return: -EFAULT if read of config page header fails
4483 * If read of SCSI Port Page 0 fails,
4484 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
4485 * Adapter settings: async, narrow
4487 * If read of SCSI Port Page 2 fails,
4488 * Adapter settings valid
4489 * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
4494 * CHECK - what type of locking mechanisms should be used????
4497 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
4502 ConfigPageHeader_t header;
4508 if (!ioc->spi_data.nvram) {
4511 sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
4512 mem = kmalloc(sz, GFP_ATOMIC);
4516 ioc->spi_data.nvram = (int *) mem;
4518 dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
4519 ioc->name, ioc->spi_data.nvram, sz));
4522 /* Invalidate NVRAM information
4524 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
4525 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
4528 /* Read SPP0 header, allocate memory, then read page.
4530 header.PageVersion = 0;
4531 header.PageLength = 0;
4532 header.PageNumber = 0;
4533 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
4534 cfg.cfghdr.hdr = &header;
4536 cfg.pageAddr = portnum;
4537 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4539 cfg.timeout = 0; /* use default */
4540 if (mpt_config(ioc, &cfg) != 0)
4543 if (header.PageLength > 0) {
4544 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
4546 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4547 cfg.physAddr = buf_dma;
4548 if (mpt_config(ioc, &cfg) != 0) {
4549 ioc->spi_data.maxBusWidth = MPT_NARROW;
4550 ioc->spi_data.maxSyncOffset = 0;
4551 ioc->spi_data.minSyncFactor = MPT_ASYNC;
4552 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
4554 ddvprintk((MYIOC_s_INFO_FMT "Unable to read PortPage0 minSyncFactor=%x\n",
4555 ioc->name, ioc->spi_data.minSyncFactor));
4557 /* Save the Port Page 0 data
4559 SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
4560 pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
4561 pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
4563 if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
4564 ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
4565 ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n",
4566 ioc->name, pPP0->Capabilities));
4568 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
4569 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
4571 ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
4572 data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
4573 ioc->spi_data.minSyncFactor = (u8) (data >> 8);
4574 ddvprintk((MYIOC_s_INFO_FMT "PortPage0 minSyncFactor=%x\n",
4575 ioc->name, ioc->spi_data.minSyncFactor));
4577 ioc->spi_data.maxSyncOffset = 0;
4578 ioc->spi_data.minSyncFactor = MPT_ASYNC;
4581 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
4583 /* Update the minSyncFactor based on bus type.
4585 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
4586 (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
4588 if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
4589 ioc->spi_data.minSyncFactor = MPT_ULTRA;
4590 ddvprintk((MYIOC_s_INFO_FMT "HVD or SE detected, minSyncFactor=%x\n",
4591 ioc->name, ioc->spi_data.minSyncFactor));
4596 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
4601 /* SCSI Port Page 2 - Read the header then the page.
4603 header.PageVersion = 0;
4604 header.PageLength = 0;
4605 header.PageNumber = 2;
4606 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
4607 cfg.cfghdr.hdr = &header;
4609 cfg.pageAddr = portnum;
4610 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4612 if (mpt_config(ioc, &cfg) != 0)
4615 if (header.PageLength > 0) {
4616 /* Allocate memory and read SCSI Port Page 2
4618 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
4620 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
4621 cfg.physAddr = buf_dma;
4622 if (mpt_config(ioc, &cfg) != 0) {
4623 /* Nvram data is left with INVALID mark
4627 SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
4628 MpiDeviceInfo_t *pdevice = NULL;
4631 * Save "Set to Avoid SCSI Bus Resets" flag
4633 ioc->spi_data.bus_reset =
4634 (le32_to_cpu(pPP2->PortFlags) &
4635 MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET) ?
4638 /* Save the Port Page 2 data
4639 * (reformat into a 32bit quantity)
4641 data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
4642 ioc->spi_data.PortFlags = data;
4643 for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
4644 pdevice = &pPP2->DeviceSettings[ii];
4645 data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
4646 (pdevice->SyncFactor << 8) | pdevice->Timeout;
4647 ioc->spi_data.nvram[ii] = data;
4651 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
4655 /* Update Adapter limits with those from NVRAM
4656 * Comment: Don't need to do this. Target performance
4657 * parameters will never exceed the adapters limits.
4663 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4665 * mpt_readScsiDevicePageHeaders - save version and length of SDP1
4666 * @ioc: Pointer to a Adapter Strucutre
4667 * @portnum: IOC port number
4669 * Return: -EFAULT if read of config page header fails
4673 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
4676 ConfigPageHeader_t header;
4678 /* Read the SCSI Device Page 1 header
4680 header.PageVersion = 0;
4681 header.PageLength = 0;
4682 header.PageNumber = 1;
4683 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
4684 cfg.cfghdr.hdr = &header;
4686 cfg.pageAddr = portnum;
4687 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4690 if (mpt_config(ioc, &cfg) != 0)
4693 ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
4694 ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
4696 header.PageVersion = 0;
4697 header.PageLength = 0;
4698 header.PageNumber = 0;
4699 header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
4700 if (mpt_config(ioc, &cfg) != 0)
4703 ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
4704 ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
4706 dcprintk((MYIOC_s_INFO_FMT "Headers: 0: version %d length %d\n",
4707 ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
4709 dcprintk((MYIOC_s_INFO_FMT "Headers: 1: version %d length %d\n",
4710 ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
4714 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
4716 * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
4717 * @ioc: Pointer to a Adapter Strucutre
4718 * @portnum: IOC port number
4722 * -EFAULT if read of config page header fails or data pointer not NULL
4723 * -ENOMEM if pci_alloc failed
4726 mpt_findImVolumes(MPT_ADAPTER *ioc)
4730 ConfigPageIoc2RaidVol_t *pIocRv;
4731 dma_addr_t ioc2_dma;
4733 ConfigPageHeader_t header;
4740 /* Read IOCP2 header then the page.
4742 header.PageVersion = 0;
4743 header.PageLength = 0;
4744 header.PageNumber = 2;
4745 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4746 cfg.cfghdr.hdr = &header;
4749 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4752 if (mpt_config(ioc, &cfg) != 0)
4755 if (header.PageLength == 0)
4758 iocpage2sz = header.PageLength * 4;
4759 pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
4763 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4764 cfg.physAddr = ioc2_dma;
4765 if (mpt_config(ioc, &cfg) != 0)
4768 if ( (mem = (u8 *)ioc->raid_data.pIocPg2) == NULL ) {
4769 mem = kmalloc(iocpage2sz, GFP_ATOMIC);
4771 ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
4776 memcpy(mem, (u8 *)pIoc2, iocpage2sz);
4778 /* Identify RAID Volume Id's */
4779 nVols = pIoc2->NumActiveVolumes;
4785 /* At least 1 RAID Volume
4787 pIocRv = pIoc2->RaidVolume;
4788 ioc->raid_data.isRaid = 0;
4789 for (jj = 0; jj < nVols; jj++, pIocRv++) {
4790 vid = pIocRv->VolumeID;
4791 vbus = pIocRv->VolumeBus;
4792 vioc = pIocRv->VolumeIOC;
4797 ioc->raid_data.isRaid |= (1 << vid);
4799 /* Error! Always bus 0
4805 /* Identify Hidden Physical Disk Id's */
4806 nPhys = pIoc2->NumActivePhysDisks;
4808 /* No physical disks.
4811 mpt_read_ioc_pg_3(ioc);
4815 pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
4821 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
4826 ConfigPageHeader_t header;
4827 dma_addr_t ioc3_dma;
4830 /* Free the old page
4832 kfree(ioc->raid_data.pIocPg3);
4833 ioc->raid_data.pIocPg3 = NULL;
4835 /* There is at least one physical disk.
4836 * Read and save IOC Page 3
4838 header.PageVersion = 0;
4839 header.PageLength = 0;
4840 header.PageNumber = 3;
4841 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4842 cfg.cfghdr.hdr = &header;
4845 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4848 if (mpt_config(ioc, &cfg) != 0)
4851 if (header.PageLength == 0)
4854 /* Read Header good, alloc memory
4856 iocpage3sz = header.PageLength * 4;
4857 pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
4861 /* Read the Page and save the data
4862 * into malloc'd memory.
4864 cfg.physAddr = ioc3_dma;
4865 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4866 if (mpt_config(ioc, &cfg) == 0) {
4867 mem = kmalloc(iocpage3sz, GFP_ATOMIC);
4869 memcpy(mem, (u8 *)pIoc3, iocpage3sz);
4870 ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
4874 pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
4880 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
4884 ConfigPageHeader_t header;
4885 dma_addr_t ioc4_dma;
4888 /* Read and save IOC Page 4
4890 header.PageVersion = 0;
4891 header.PageLength = 0;
4892 header.PageNumber = 4;
4893 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4894 cfg.cfghdr.hdr = &header;
4897 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4900 if (mpt_config(ioc, &cfg) != 0)
4903 if (header.PageLength == 0)
4906 if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
4907 iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
4908 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
4911 ioc->alloc_total += iocpage4sz;
4913 ioc4_dma = ioc->spi_data.IocPg4_dma;
4914 iocpage4sz = ioc->spi_data.IocPg4Sz;
4917 /* Read the Page into dma memory.
4919 cfg.physAddr = ioc4_dma;
4920 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4921 if (mpt_config(ioc, &cfg) == 0) {
4922 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
4923 ioc->spi_data.IocPg4_dma = ioc4_dma;
4924 ioc->spi_data.IocPg4Sz = iocpage4sz;
4926 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
4927 ioc->spi_data.pIocPg4 = NULL;
4928 ioc->alloc_total -= iocpage4sz;
4933 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
4937 ConfigPageHeader_t header;
4938 dma_addr_t ioc1_dma;
4942 /* Check the Coalescing Timeout in IOC Page 1
4944 header.PageVersion = 0;
4945 header.PageLength = 0;
4946 header.PageNumber = 1;
4947 header.PageType = MPI_CONFIG_PAGETYPE_IOC;
4948 cfg.cfghdr.hdr = &header;
4951 cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
4954 if (mpt_config(ioc, &cfg) != 0)
4957 if (header.PageLength == 0)
4960 /* Read Header good, alloc memory
4962 iocpage1sz = header.PageLength * 4;
4963 pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
4967 /* Read the Page and check coalescing timeout
4969 cfg.physAddr = ioc1_dma;
4970 cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
4971 if (mpt_config(ioc, &cfg) == 0) {
4973 tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
4974 if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
4975 tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
4977 dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n",
4980 if (tmp > MPT_COALESCING_TIMEOUT) {
4981 pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
4983 /* Write NVRAM and current
4986 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
4987 if (mpt_config(ioc, &cfg) == 0) {
4988 dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n",
4989 ioc->name, MPT_COALESCING_TIMEOUT));
4991 cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
4992 if (mpt_config(ioc, &cfg) == 0) {
4993 dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n",
4994 ioc->name, MPT_COALESCING_TIMEOUT));
4996 dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n",
5001 dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n",
5007 dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
5011 pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
5016 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5018 * SendEventNotification - Send EventNotification (on or off) request to adapter
5019 * @ioc: Pointer to MPT_ADAPTER structure
5020 * @EvSwitch: Event switch flags
5023 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch)
5025 EventNotification_t *evnp;
5027 evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc);
5029 devtverboseprintk((MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n",
5033 memset(evnp, 0, sizeof(*evnp));
5035 devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp));
5037 evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
5038 evnp->ChainOffset = 0;
5040 evnp->Switch = EvSwitch;
5042 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)evnp);
5047 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5049 * SendEventAck - Send EventAck request to MPT adapter.
5050 * @ioc: Pointer to MPT_ADAPTER structure
5051 * @evnp: Pointer to original EventNotification request
5054 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
5058 if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5059 dfailprintk((MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
5060 ioc->name,__FUNCTION__));
5064 devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventAck\n", ioc->name));
5066 pAck->Function = MPI_FUNCTION_EVENT_ACK;
5067 pAck->ChainOffset = 0;
5068 pAck->Reserved[0] = pAck->Reserved[1] = 0;
5070 pAck->Reserved1[0] = pAck->Reserved1[1] = pAck->Reserved1[2] = 0;
5071 pAck->Event = evnp->Event;
5072 pAck->EventContext = evnp->EventContext;
5074 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
5079 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5081 * mpt_config - Generic function to issue config message
5082 * @ioc: Pointer to an adapter structure
5083 * @pCfg: Pointer to a configuration structure. Struct contains
5084 * action, page address, direction, physical address
5085 * and pointer to a configuration page header
5086 * Page header is updated.
5088 * Returns 0 for success
5089 * -EPERM if not allowed due to ISR context
5090 * -EAGAIN if no msg frames currently available
5091 * -EFAULT for non-successful reply or no reply (timeout)
5094 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
5097 ConfigExtendedPageHeader_t *pExtHdr = NULL;
5099 unsigned long flags;
5104 /* Prevent calling wait_event() (below), if caller happens
5105 * to be in ISR context, because that is fatal!
5107 in_isr = in_interrupt();
5109 dcprintk((MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
5114 /* Get and Populate a free Frame
5116 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
5117 dcprintk((MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n",
5121 pReq = (Config_t *)mf;
5122 pReq->Action = pCfg->action;
5124 pReq->ChainOffset = 0;
5125 pReq->Function = MPI_FUNCTION_CONFIG;
5127 /* Assume page type is not extended and clear "reserved" fields. */
5128 pReq->ExtPageLength = 0;
5129 pReq->ExtPageType = 0;
5132 for (ii=0; ii < 8; ii++)
5133 pReq->Reserved2[ii] = 0;
5135 pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
5136 pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
5137 pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
5138 pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
5140 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
5141 pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
5142 pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
5143 pReq->ExtPageType = pExtHdr->ExtPageType;
5144 pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
5146 /* Page Length must be treated as a reserved field for the extended header. */
5147 pReq->Header.PageLength = 0;
5150 pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
5152 /* Add a SGE to the config request.
5155 flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
5157 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
5159 if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
5160 flagsLength |= pExtHdr->ExtPageLength * 4;
5162 dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
5163 ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action));
5166 flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
5168 dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
5169 ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
5172 mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
5174 /* Append pCfg pointer to end of mf
5176 *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
5178 /* Initalize the timer
5180 init_timer(&pCfg->timer);
5181 pCfg->timer.data = (unsigned long) ioc;
5182 pCfg->timer.function = mpt_timer_expired;
5183 pCfg->wait_done = 0;
5185 /* Set the timer; ensure 10 second minimum */
5186 if (pCfg->timeout < 10)
5187 pCfg->timer.expires = jiffies + HZ*10;
5189 pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
5191 /* Add to end of Q, set timer and then issue this command */
5192 spin_lock_irqsave(&ioc->FreeQlock, flags);
5193 list_add_tail(&pCfg->linkage, &ioc->configQ);
5194 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5196 add_timer(&pCfg->timer);
5197 mpt_put_msg_frame(mpt_base_index, ioc, mf);
5198 wait_event(mpt_waitq, pCfg->wait_done);
5200 /* mf has been freed - do not access */
5207 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5209 * mpt_timer_expired - Callback for timer process.
5210 * Used only internal config functionality.
5211 * @data: Pointer to MPT_SCSI_HOST recast as an unsigned long
5214 mpt_timer_expired(unsigned long data)
5216 MPT_ADAPTER *ioc = (MPT_ADAPTER *) data;
5218 dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired! \n", ioc->name));
5220 /* Perform a FW reload */
5221 if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0)
5222 printk(MYIOC_s_WARN_FMT "Firmware Reload FAILED!\n", ioc->name);
5224 /* No more processing.
5225 * Hard reset clean-up will wake up
5226 * process and free all resources.
5228 dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired complete!\n", ioc->name));
5233 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5235 * mpt_ioc_reset - Base cleanup for hard reset
5236 * @ioc: Pointer to the adapter structure
5237 * @reset_phase: Indicates pre- or post-reset functionality
5239 * Remark: Frees resources with internally generated commands.
5242 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
5245 unsigned long flags;
5247 dprintk((KERN_WARNING MYNAM
5248 ": IOC %s_reset routed to MPT base driver!\n",
5249 reset_phase==MPT_IOC_SETUP_RESET ? "setup" : (
5250 reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post")));
5252 if (reset_phase == MPT_IOC_SETUP_RESET) {
5254 } else if (reset_phase == MPT_IOC_PRE_RESET) {
5255 /* If the internal config Q is not empty -
5256 * delete timer. MF resources will be freed when
5257 * the FIFO's are primed.
5259 spin_lock_irqsave(&ioc->FreeQlock, flags);
5260 list_for_each_entry(pCfg, &ioc->configQ, linkage)
5261 del_timer(&pCfg->timer);
5262 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5267 /* Search the configQ for internal commands.
5268 * Flush the Q, and wake up all suspended threads.
5270 spin_lock_irqsave(&ioc->FreeQlock, flags);
5271 list_for_each_entry_safe(pCfg, pNext, &ioc->configQ, linkage) {
5272 list_del(&pCfg->linkage);
5274 pCfg->status = MPT_CONFIG_ERROR;
5275 pCfg->wait_done = 1;
5276 wake_up(&mpt_waitq);
5278 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
5281 return 1; /* currently means nothing really */
5285 #ifdef CONFIG_PROC_FS /* { */
5286 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5288 * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
5290 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5292 * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
5294 * Returns 0 for success, non-zero for failure.
5297 procmpt_create(void)
5299 struct proc_dir_entry *ent;
5301 mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
5302 if (mpt_proc_root_dir == NULL)
5305 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, mpt_proc_root_dir);
5307 ent->read_proc = procmpt_summary_read;
5309 ent = create_proc_entry("version", S_IFREG|S_IRUGO, mpt_proc_root_dir);
5311 ent->read_proc = procmpt_version_read;
5316 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5318 * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
5320 * Returns 0 for success, non-zero for failure.
5323 procmpt_destroy(void)
5325 remove_proc_entry("version", mpt_proc_root_dir);
5326 remove_proc_entry("summary", mpt_proc_root_dir);
5327 remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
5330 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5332 * procmpt_summary_read - Handle read request of a summary file
5333 * @buf: Pointer to area to write information
5334 * @start: Pointer to start pointer
5335 * @offset: Offset to start writing
5336 * @request: Amount of read data requested
5337 * @eof: Pointer to EOF integer
5340 * Handles read request from /proc/mpt/summary or /proc/mpt/iocN/summary.
5341 * Returns number of characters written to process performing the read.
5344 procmpt_summary_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5354 mpt_print_ioc_summary(ioc, out, &more, 0, 1);
5358 list_for_each_entry(ioc, &ioc_list, list) {
5361 mpt_print_ioc_summary(ioc, out, &more, 0, 1);
5364 if ((out-buf) >= request)
5371 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5374 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5376 * procmpt_version_read - Handle read request from /proc/mpt/version.
5377 * @buf: Pointer to area to write information
5378 * @start: Pointer to start pointer
5379 * @offset: Offset to start writing
5380 * @request: Amount of read data requested
5381 * @eof: Pointer to EOF integer
5384 * Returns number of characters written to process performing the read.
5387 procmpt_version_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5390 int scsi, fc, sas, lan, ctl, targ, dmp;
5394 len = sprintf(buf, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
5395 len += sprintf(buf+len, " Fusion MPT base driver\n");
5397 scsi = fc = sas = lan = ctl = targ = dmp = 0;
5398 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
5400 if (MptCallbacks[ii]) {
5401 switch (MptDriverClass[ii]) {
5403 if (!scsi++) drvname = "SPI host";
5406 if (!fc++) drvname = "FC host";
5409 if (!sas++) drvname = "SAS host";
5412 if (!lan++) drvname = "LAN";
5415 if (!targ++) drvname = "SCSI target";
5418 if (!ctl++) drvname = "ioctl";
5423 len += sprintf(buf+len, " Fusion MPT %s driver\n", drvname);
5427 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5430 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5432 * procmpt_iocinfo_read - Handle read request from /proc/mpt/iocN/info.
5433 * @buf: Pointer to area to write information
5434 * @start: Pointer to start pointer
5435 * @offset: Offset to start writing
5436 * @request: Amount of read data requested
5437 * @eof: Pointer to EOF integer
5440 * Returns number of characters written to process performing the read.
5443 procmpt_iocinfo_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
5445 MPT_ADAPTER *ioc = data;
5451 mpt_get_fw_exp_ver(expVer, ioc);
5453 len = sprintf(buf, "%s:", ioc->name);
5454 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
5455 len += sprintf(buf+len, " (f/w download boot flag set)");
5456 // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
5457 // len += sprintf(buf+len, " CONFIG_CHECKSUM_FAIL!");
5459 len += sprintf(buf+len, "\n ProductID = 0x%04x (%s)\n",
5460 ioc->facts.ProductID,
5462 len += sprintf(buf+len, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
5463 if (ioc->facts.FWImageSize)
5464 len += sprintf(buf+len, " (fw_size=%d)", ioc->facts.FWImageSize);
5465 len += sprintf(buf+len, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
5466 len += sprintf(buf+len, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
5467 len += sprintf(buf+len, " EventState = 0x%02x\n", ioc->facts.EventState);
5469 len += sprintf(buf+len, " CurrentHostMfaHighAddr = 0x%08x\n",
5470 ioc->facts.CurrentHostMfaHighAddr);
5471 len += sprintf(buf+len, " CurrentSenseBufferHighAddr = 0x%08x\n",
5472 ioc->facts.CurrentSenseBufferHighAddr);
5474 len += sprintf(buf+len, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
5475 len += sprintf(buf+len, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
5477 len += sprintf(buf+len, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
5478 (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
5480 * Rounding UP to nearest 4-kB boundary here...
5482 sz = (ioc->req_sz * ioc->req_depth) + 128;
5483 sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
5484 len += sprintf(buf+len, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
5485 ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
5486 len += sprintf(buf+len, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
5487 4*ioc->facts.RequestFrameSize,
5488 ioc->facts.GlobalCredits);
5490 len += sprintf(buf+len, " Frames @ 0x%p (Dma @ 0x%p)\n",
5491 (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
5492 sz = (ioc->reply_sz * ioc->reply_depth) + 128;
5493 len += sprintf(buf+len, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
5494 ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
5495 len += sprintf(buf+len, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
5496 ioc->facts.CurReplyFrameSize,
5497 ioc->facts.ReplyQueueDepth);
5499 len += sprintf(buf+len, " MaxDevices = %d\n",
5500 (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
5501 len += sprintf(buf+len, " MaxBuses = %d\n", ioc->facts.MaxBuses);
5504 for (p=0; p < ioc->facts.NumberOfPorts; p++) {
5505 len += sprintf(buf+len, " PortNumber = %d (of %d)\n",
5507 ioc->facts.NumberOfPorts);
5508 if (ioc->bus_type == FC) {
5509 if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
5510 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
5511 len += sprintf(buf+len, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
5512 a[5], a[4], a[3], a[2], a[1], a[0]);
5514 len += sprintf(buf+len, " WWN = %08X%08X:%08X%08X\n",
5515 ioc->fc_port_page0[p].WWNN.High,
5516 ioc->fc_port_page0[p].WWNN.Low,
5517 ioc->fc_port_page0[p].WWPN.High,
5518 ioc->fc_port_page0[p].WWPN.Low);
5522 MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
5525 #endif /* CONFIG_PROC_FS } */
5527 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5529 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
5532 if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
5533 sprintf(buf, " (Exp %02d%02d)",
5534 (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
5535 (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
5538 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
5539 strcat(buf, " [MDBG]");
5543 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5545 * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
5546 * @ioc: Pointer to MPT_ADAPTER structure
5547 * @buffer: Pointer to buffer where IOC summary info should be written
5548 * @size: Pointer to number of bytes we wrote (set by this routine)
5549 * @len: Offset at which to start writing in buffer
5550 * @showlan: Display LAN stuff?
5552 * This routine writes (english readable) ASCII text, which represents
5553 * a summary of IOC information, to a buffer.
5556 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
5561 mpt_get_fw_exp_ver(expVer, ioc);
5564 * Shorter summary of attached ioc's...
5566 y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
5569 MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
5570 ioc->facts.FWVersion.Word,
5572 ioc->facts.NumberOfPorts,
5575 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
5576 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
5577 y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
5578 a[5], a[4], a[3], a[2], a[1], a[0]);
5581 y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
5584 y += sprintf(buffer+len+y, " (disabled)");
5586 y += sprintf(buffer+len+y, "\n");
5591 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5595 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5597 * mpt_HardResetHandler - Generic reset handler
5598 * @ioc: Pointer to MPT_ADAPTER structure
5599 * @sleepFlag: Indicates if sleep or schedule must be called.
5601 * Issues SCSI Task Management call based on input arg values.
5602 * If TaskMgmt fails, returns associated SCSI request.
5604 * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
5605 * or a non-interrupt thread. In the former, must not call schedule().
5607 * Note: A return of -1 is a FATAL error case, as it means a
5608 * FW reload/initialization failed.
5610 * Returns 0 for SUCCESS or -1 if FAILED.
5613 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
5616 unsigned long flags;
5618 dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name));
5620 printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
5621 printk("MF count 0x%x !\n", ioc->mfcnt);
5624 /* Reset the adapter. Prevent more than 1 call to
5625 * mpt_do_ioc_recovery at any instant in time.
5627 spin_lock_irqsave(&ioc->diagLock, flags);
5628 if ((ioc->diagPending) || (ioc->alt_ioc && ioc->alt_ioc->diagPending)){
5629 spin_unlock_irqrestore(&ioc->diagLock, flags);
5632 ioc->diagPending = 1;
5634 spin_unlock_irqrestore(&ioc->diagLock, flags);
5636 /* FIXME: If do_ioc_recovery fails, repeat....
5639 /* The SCSI driver needs to adjust timeouts on all current
5640 * commands prior to the diagnostic reset being issued.
5641 * Prevents timeouts occurring during a diagnostic reset...very bad.
5642 * For all other protocol drivers, this is a no-op.
5648 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
5649 if (MptResetHandlers[ii]) {
5650 dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n",
5652 r += mpt_signal_reset(ii, ioc, MPT_IOC_SETUP_RESET);
5654 dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n",
5655 ioc->name, ioc->alt_ioc->name, ii));
5656 r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_SETUP_RESET);
5662 if ((rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag)) != 0) {
5663 printk(KERN_WARNING MYNAM ": WARNING - (%d) Cannot recover %s\n",
5668 ioc->alt_ioc->reload_fw = 0;
5670 spin_lock_irqsave(&ioc->diagLock, flags);
5671 ioc->diagPending = 0;
5673 ioc->alt_ioc->diagPending = 0;
5674 spin_unlock_irqrestore(&ioc->diagLock, flags);
5676 dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler rc = %d!\n", ioc->name, rc));
5681 # define EVENT_DESCR_STR_SZ 100
5683 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5685 EventDescriptionStr(u8 event, u32 evData0, char *evStr)
5690 case MPI_EVENT_NONE:
5693 case MPI_EVENT_LOG_DATA:
5696 case MPI_EVENT_STATE_CHANGE:
5697 ds = "State Change";
5699 case MPI_EVENT_UNIT_ATTENTION:
5700 ds = "Unit Attention";
5702 case MPI_EVENT_IOC_BUS_RESET:
5703 ds = "IOC Bus Reset";
5705 case MPI_EVENT_EXT_BUS_RESET:
5706 ds = "External Bus Reset";
5708 case MPI_EVENT_RESCAN:
5709 ds = "Bus Rescan Event";
5710 /* Ok, do we need to do anything here? As far as
5711 I can tell, this is when a new device gets added
5714 case MPI_EVENT_LINK_STATUS_CHANGE:
5715 if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
5716 ds = "Link Status(FAILURE) Change";
5718 ds = "Link Status(ACTIVE) Change";
5720 case MPI_EVENT_LOOP_STATE_CHANGE:
5721 if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
5722 ds = "Loop State(LIP) Change";
5723 else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
5724 ds = "Loop State(LPE) Change"; /* ??? */
5726 ds = "Loop State(LPB) Change"; /* ??? */
5728 case MPI_EVENT_LOGOUT:
5731 case MPI_EVENT_EVENT_CHANGE:
5737 case MPI_EVENT_INTEGRATED_RAID:
5739 u8 ReasonCode = (u8)(evData0 >> 16);
5740 switch (ReasonCode) {
5741 case MPI_EVENT_RAID_RC_VOLUME_CREATED :
5742 ds = "Integrated Raid: Volume Created";
5744 case MPI_EVENT_RAID_RC_VOLUME_DELETED :
5745 ds = "Integrated Raid: Volume Deleted";
5747 case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
5748 ds = "Integrated Raid: Volume Settings Changed";
5750 case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
5751 ds = "Integrated Raid: Volume Status Changed";
5753 case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
5754 ds = "Integrated Raid: Volume Physdisk Changed";
5756 case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
5757 ds = "Integrated Raid: Physdisk Created";
5759 case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
5760 ds = "Integrated Raid: Physdisk Deleted";
5762 case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
5763 ds = "Integrated Raid: Physdisk Settings Changed";
5765 case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
5766 ds = "Integrated Raid: Physdisk Status Changed";
5768 case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
5769 ds = "Integrated Raid: Domain Validation Needed";
5771 case MPI_EVENT_RAID_RC_SMART_DATA :
5772 ds = "Integrated Raid; Smart Data";
5774 case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
5775 ds = "Integrated Raid: Replace Action Started";
5778 ds = "Integrated Raid";
5783 case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
5784 ds = "SCSI Device Status Change";
5786 case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
5788 u8 id = (u8)(evData0);
5789 u8 ReasonCode = (u8)(evData0 >> 16);
5790 switch (ReasonCode) {
5791 case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
5792 snprintf(evStr, EVENT_DESCR_STR_SZ,
5793 "SAS Device Status Change: Added: id=%d", id);
5795 case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
5796 snprintf(evStr, EVENT_DESCR_STR_SZ,
5797 "SAS Device Status Change: Deleted: id=%d", id);
5799 case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
5800 snprintf(evStr, EVENT_DESCR_STR_SZ,
5801 "SAS Device Status Change: SMART Data: id=%d",
5804 case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
5805 snprintf(evStr, EVENT_DESCR_STR_SZ,
5806 "SAS Device Status Change: No Persistancy: id=%d", id);
5808 case MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
5809 snprintf(evStr, EVENT_DESCR_STR_SZ,
5810 "SAS Device Status Change: Internal Device Reset : id=%d", id);
5812 case MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
5813 snprintf(evStr, EVENT_DESCR_STR_SZ,
5814 "SAS Device Status Change: Internal Task Abort : id=%d", id);
5816 case MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
5817 snprintf(evStr, EVENT_DESCR_STR_SZ,
5818 "SAS Device Status Change: Internal Abort Task Set : id=%d", id);
5820 case MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
5821 snprintf(evStr, EVENT_DESCR_STR_SZ,
5822 "SAS Device Status Change: Internal Clear Task Set : id=%d", id);
5824 case MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
5825 snprintf(evStr, EVENT_DESCR_STR_SZ,
5826 "SAS Device Status Change: Internal Query Task : id=%d", id);
5829 snprintf(evStr, EVENT_DESCR_STR_SZ,
5830 "SAS Device Status Change: Unknown: id=%d", id);
5835 case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
5836 ds = "Bus Timer Expired";
5838 case MPI_EVENT_QUEUE_FULL:
5841 case MPI_EVENT_SAS_SES:
5842 ds = "SAS SES Event";
5844 case MPI_EVENT_PERSISTENT_TABLE_FULL:
5845 ds = "Persistent Table Full";
5847 case MPI_EVENT_SAS_PHY_LINK_STATUS:
5849 u8 LinkRates = (u8)(evData0 >> 8);
5850 u8 PhyNumber = (u8)(evData0);
5851 LinkRates = (LinkRates & MPI_EVENT_SAS_PLS_LR_CURRENT_MASK) >>
5852 MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT;
5853 switch (LinkRates) {
5854 case MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN:
5855 snprintf(evStr, EVENT_DESCR_STR_SZ,
5856 "SAS PHY Link Status: Phy=%d:"
5857 " Rate Unknown",PhyNumber);
5859 case MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED:
5860 snprintf(evStr, EVENT_DESCR_STR_SZ,
5861 "SAS PHY Link Status: Phy=%d:"
5862 " Phy Disabled",PhyNumber);
5864 case MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION:
5865 snprintf(evStr, EVENT_DESCR_STR_SZ,
5866 "SAS PHY Link Status: Phy=%d:"
5867 " Failed Speed Nego",PhyNumber);
5869 case MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE:
5870 snprintf(evStr, EVENT_DESCR_STR_SZ,
5871 "SAS PHY Link Status: Phy=%d:"
5872 " Sata OOB Completed",PhyNumber);
5874 case MPI_EVENT_SAS_PLS_LR_RATE_1_5:
5875 snprintf(evStr, EVENT_DESCR_STR_SZ,
5876 "SAS PHY Link Status: Phy=%d:"
5877 " Rate 1.5 Gbps",PhyNumber);
5879 case MPI_EVENT_SAS_PLS_LR_RATE_3_0:
5880 snprintf(evStr, EVENT_DESCR_STR_SZ,
5881 "SAS PHY Link Status: Phy=%d:"
5882 " Rate 3.0 Gpbs",PhyNumber);
5885 snprintf(evStr, EVENT_DESCR_STR_SZ,
5886 "SAS PHY Link Status: Phy=%d", PhyNumber);
5891 case MPI_EVENT_SAS_DISCOVERY_ERROR:
5892 ds = "SAS Discovery Error";
5894 case MPI_EVENT_IR_RESYNC_UPDATE:
5896 u8 resync_complete = (u8)(evData0 >> 16);
5897 snprintf(evStr, EVENT_DESCR_STR_SZ,
5898 "IR Resync Update: Complete = %d:",resync_complete);
5903 u8 ReasonCode = (u8)(evData0 >> 16);
5904 switch (ReasonCode) {
5905 case MPI_EVENT_IR2_RC_LD_STATE_CHANGED:
5906 ds = "IR2: LD State Changed";
5908 case MPI_EVENT_IR2_RC_PD_STATE_CHANGED:
5909 ds = "IR2: PD State Changed";
5911 case MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL:
5912 ds = "IR2: Bad Block Table Full";
5914 case MPI_EVENT_IR2_RC_PD_INSERTED:
5915 ds = "IR2: PD Inserted";
5917 case MPI_EVENT_IR2_RC_PD_REMOVED:
5918 ds = "IR2: PD Removed";
5920 case MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED:
5921 ds = "IR2: Foreign CFG Detected";
5923 case MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR:
5924 ds = "IR2: Rebuild Medium Error";
5932 case MPI_EVENT_SAS_DISCOVERY:
5935 ds = "SAS Discovery: Start";
5937 ds = "SAS Discovery: Stop";
5940 case MPI_EVENT_LOG_ENTRY_ADDED:
5941 ds = "SAS Log Entry Added";
5945 * MPT base "custom" events may be added here...
5952 strncpy(evStr, ds, EVENT_DESCR_STR_SZ);
5955 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
5957 * ProcessEventNotification - Route EventNotificationReply to all event handlers
5958 * @ioc: Pointer to MPT_ADAPTER structure
5959 * @pEventReply: Pointer to EventNotification reply frame
5960 * @evHandlers: Pointer to integer, number of event handlers
5962 * Routes a received EventNotificationReply to all currently registered
5964 * Returns sum of event handlers return values.
5967 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
5975 char evStr[EVENT_DESCR_STR_SZ];
5979 * Do platform normalization of values
5981 event = le32_to_cpu(pEventReply->Event) & 0xFF;
5982 // evCtx = le32_to_cpu(pEventReply->EventContext);
5983 evDataLen = le16_to_cpu(pEventReply->EventDataLength);
5985 evData0 = le32_to_cpu(pEventReply->Data[0]);
5988 EventDescriptionStr(event, evData0, evStr);
5989 devtprintk((MYIOC_s_INFO_FMT "MPT event:(%02Xh) : %s\n",
5994 #if defined(MPT_DEBUG) || defined(MPT_DEBUG_VERBOSE_EVENTS)
5995 printk(KERN_INFO MYNAM ": Event data:\n" KERN_INFO);
5996 for (ii = 0; ii < evDataLen; ii++)
5997 printk(" %08x", le32_to_cpu(pEventReply->Data[ii]));
6002 * Do general / base driver event processing
6005 case MPI_EVENT_EVENT_CHANGE: /* 0A */
6007 u8 evState = evData0 & 0xFF;
6009 /* CHECKME! What if evState unexpectedly says OFF (0)? */
6011 /* Update EventState field in cached IocFacts */
6012 if (ioc->facts.Function) {
6013 ioc->facts.EventState = evState;
6017 case MPI_EVENT_INTEGRATED_RAID:
6018 mptbase_raid_process_event_data(ioc,
6019 (MpiEventDataRaid_t *)pEventReply->Data);
6026 * Should this event be logged? Events are written sequentially.
6027 * When buffer is full, start again at the top.
6029 if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
6032 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
6034 ioc->events[idx].event = event;
6035 ioc->events[idx].eventContext = ioc->eventContext;
6037 for (ii = 0; ii < 2; ii++) {
6039 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
6041 ioc->events[idx].data[ii] = 0;
6044 ioc->eventContext++;
6049 * Call each currently registered protocol event handler.
6051 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
6052 if (MptEvHandlers[ii]) {
6053 devtverboseprintk((MYIOC_s_INFO_FMT "Routing Event to event handler #%d\n",
6055 r += (*(MptEvHandlers[ii]))(ioc, pEventReply);
6059 /* FIXME? Examine results here? */
6062 * If needed, send (a single) EventAck.
6064 if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
6065 devtverboseprintk((MYIOC_s_WARN_FMT
6066 "EventAck required\n",ioc->name));
6067 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
6068 devtverboseprintk((MYIOC_s_WARN_FMT "SendEventAck returned %d\n",
6073 *evHandlers = handlers;
6077 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6079 * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
6080 * @ioc: Pointer to MPT_ADAPTER structure
6081 * @log_info: U32 LogInfo reply word from the IOC
6083 * Refer to lsi/mpi_log_fc.h.
6086 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
6088 static char *subcl_str[8] = {
6089 "FCP Initiator", "FCP Target", "LAN", "MPI Message Layer",
6090 "FC Link", "Context Manager", "Invalid Field Offset", "State Change Info"
6092 u8 subcl = (log_info >> 24) & 0x7;
6094 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubCl={%s}\n",
6095 ioc->name, log_info, subcl_str[subcl]);
6098 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6100 * mpt_spi_log_info - Log information returned from SCSI Parallel IOC.
6101 * @ioc: Pointer to MPT_ADAPTER structure
6102 * @mr: Pointer to MPT reply frame
6103 * @log_info: U32 LogInfo word from the IOC
6105 * Refer to lsi/sp_log.h.
6108 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
6110 u32 info = log_info & 0x00FF0000;
6111 char *desc = "unknown";
6115 desc = "bug! MID not found";
6116 if (ioc->reload_fw == 0)
6121 desc = "Parity Error";
6125 desc = "ASYNC Outbound Overrun";
6129 desc = "SYNC Offset Error";
6137 desc = "Msg In Overflow";
6145 desc = "Outbound DMA Overrun";
6149 desc = "Task Management";
6153 desc = "Device Problem";
6157 desc = "Invalid Phase Change";
6161 desc = "Untagged Table Size";
6166 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
6169 /* strings for sas loginfo */
6170 static char *originator_str[] = {
6175 static char *iop_code_str[] = {
6177 "Invalid SAS Address", /* 01h */
6179 "Invalid Page", /* 03h */
6180 "Diag Message Error", /* 04h */
6181 "Task Terminated", /* 05h */
6182 "Enclosure Management", /* 06h */
6183 "Target Mode" /* 07h */
6185 static char *pl_code_str[] = {
6187 "Open Failure", /* 01h */
6188 "Invalid Scatter Gather List", /* 02h */
6189 "Wrong Relative Offset or Frame Length", /* 03h */
6190 "Frame Transfer Error", /* 04h */
6191 "Transmit Frame Connected Low", /* 05h */
6192 "SATA Non-NCQ RW Error Bit Set", /* 06h */
6193 "SATA Read Log Receive Data Error", /* 07h */
6194 "SATA NCQ Fail All Commands After Error", /* 08h */
6195 "SATA Error in Receive Set Device Bit FIS", /* 09h */
6196 "Receive Frame Invalid Message", /* 0Ah */
6197 "Receive Context Message Valid Error", /* 0Bh */
6198 "Receive Frame Current Frame Error", /* 0Ch */
6199 "SATA Link Down", /* 0Dh */
6200 "Discovery SATA Init W IOS", /* 0Eh */
6201 "Config Invalid Page", /* 0Fh */
6202 "Discovery SATA Init Timeout", /* 10h */
6205 "IO Not Yet Executed", /* 13h */
6206 "IO Executed", /* 14h */
6207 "Persistent Reservation Out Not Affiliation Owner", /* 15h */
6208 "Open Transmit DMA Abort", /* 16h */
6209 "IO Device Missing Delay Retry", /* 17h */
6218 "Enclosure Management" /* 20h */
6221 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6223 * mpt_sas_log_info - Log information returned from SAS IOC.
6224 * @ioc: Pointer to MPT_ADAPTER structure
6225 * @log_info: U32 LogInfo reply word from the IOC
6227 * Refer to lsi/mpi_log_sas.h.
6230 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info)
6232 union loginfo_type {
6241 union loginfo_type sas_loginfo;
6242 char *code_desc = NULL;
6244 sas_loginfo.loginfo = log_info;
6245 if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
6246 (sas_loginfo.dw.originator < sizeof(originator_str)/sizeof(char*)))
6248 if ((sas_loginfo.dw.originator == 0 /*IOP*/) &&
6249 (sas_loginfo.dw.code < sizeof(iop_code_str)/sizeof(char*))) {
6250 code_desc = iop_code_str[sas_loginfo.dw.code];
6251 }else if ((sas_loginfo.dw.originator == 1 /*PL*/) &&
6252 (sas_loginfo.dw.code < sizeof(pl_code_str)/sizeof(char*) )) {
6253 code_desc = pl_code_str[sas_loginfo.dw.code];
6256 if (code_desc != NULL)
6257 printk(MYIOC_s_INFO_FMT
6258 "LogInfo(0x%08x): Originator={%s}, Code={%s},"
6259 " SubCode(0x%04x)\n",
6262 originator_str[sas_loginfo.dw.originator],
6264 sas_loginfo.dw.subcode);
6266 printk(MYIOC_s_INFO_FMT
6267 "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
6268 " SubCode(0x%04x)\n",
6271 originator_str[sas_loginfo.dw.originator],
6272 sas_loginfo.dw.code,
6273 sas_loginfo.dw.subcode);
6276 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6278 * mpt_sp_ioc_info - IOC information returned from SCSI Parallel IOC.
6279 * @ioc: Pointer to MPT_ADAPTER structure
6280 * @ioc_status: U32 IOCStatus word from IOC
6281 * @mf: Pointer to MPT request frame
6283 * Refer to lsi/mpi.h.
6286 mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
6288 u32 status = ioc_status & MPI_IOCSTATUS_MASK;
6292 case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
6293 desc = "Invalid Function";
6296 case MPI_IOCSTATUS_BUSY: /* 0x0002 */
6300 case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
6301 desc = "Invalid SGL";
6304 case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
6305 desc = "Internal Error";
6308 case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
6312 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
6313 desc = "Insufficient Resources";
6316 case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
6317 desc = "Invalid Field";
6320 case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
6321 desc = "Invalid State";
6324 case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
6325 case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
6326 case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
6327 case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
6328 case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
6329 case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
6330 /* No message for Config IOCStatus values */
6333 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
6334 /* No message for recovered error
6335 desc = "SCSI Recovered Error";
6339 case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
6340 desc = "SCSI Invalid Bus";
6343 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
6344 desc = "SCSI Invalid TargetID";
6347 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
6349 SCSIIORequest_t *pScsiReq = (SCSIIORequest_t *) mf;
6350 U8 cdb = pScsiReq->CDB[0];
6351 if (cdb != 0x12) { /* Inquiry is issued for device scanning */
6352 desc = "SCSI Device Not There";
6357 case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
6358 desc = "SCSI Data Overrun";
6361 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
6362 /* This error is checked in scsi_io_done(). Skip.
6363 desc = "SCSI Data Underrun";
6367 case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
6368 desc = "SCSI I/O Data Error";
6371 case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
6372 desc = "SCSI Protocol Error";
6375 case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
6376 desc = "SCSI Task Terminated";
6379 case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
6380 desc = "SCSI Residual Mismatch";
6383 case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
6384 desc = "SCSI Task Management Failed";
6387 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
6388 desc = "SCSI IOC Terminated";
6391 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
6392 desc = "SCSI Ext Terminated";
6400 printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04x): %s\n", ioc->name, status, desc);
6403 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6404 EXPORT_SYMBOL(mpt_attach);
6405 EXPORT_SYMBOL(mpt_detach);
6407 EXPORT_SYMBOL(mpt_resume);
6408 EXPORT_SYMBOL(mpt_suspend);
6410 EXPORT_SYMBOL(ioc_list);
6411 EXPORT_SYMBOL(mpt_proc_root_dir);
6412 EXPORT_SYMBOL(mpt_register);
6413 EXPORT_SYMBOL(mpt_deregister);
6414 EXPORT_SYMBOL(mpt_event_register);
6415 EXPORT_SYMBOL(mpt_event_deregister);
6416 EXPORT_SYMBOL(mpt_reset_register);
6417 EXPORT_SYMBOL(mpt_reset_deregister);
6418 EXPORT_SYMBOL(mpt_device_driver_register);
6419 EXPORT_SYMBOL(mpt_device_driver_deregister);
6420 EXPORT_SYMBOL(mpt_get_msg_frame);
6421 EXPORT_SYMBOL(mpt_put_msg_frame);
6422 EXPORT_SYMBOL(mpt_free_msg_frame);
6423 EXPORT_SYMBOL(mpt_add_sge);
6424 EXPORT_SYMBOL(mpt_send_handshake_request);
6425 EXPORT_SYMBOL(mpt_verify_adapter);
6426 EXPORT_SYMBOL(mpt_GetIocState);
6427 EXPORT_SYMBOL(mpt_print_ioc_summary);
6428 EXPORT_SYMBOL(mpt_lan_index);
6429 EXPORT_SYMBOL(mpt_stm_index);
6430 EXPORT_SYMBOL(mpt_HardResetHandler);
6431 EXPORT_SYMBOL(mpt_config);
6432 EXPORT_SYMBOL(mpt_findImVolumes);
6433 EXPORT_SYMBOL(mpt_alloc_fw_memory);
6434 EXPORT_SYMBOL(mpt_free_fw_memory);
6435 EXPORT_SYMBOL(mptbase_sas_persist_operation);
6437 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6439 * fusion_init - Fusion MPT base driver initialization routine.
6441 * Returns 0 for success, non-zero for failure.
6448 show_mptmod_ver(my_NAME, my_VERSION);
6449 printk(KERN_INFO COPYRIGHT "\n");
6451 for (i = 0; i < MPT_MAX_PROTOCOL_DRIVERS; i++) {
6452 MptCallbacks[i] = NULL;
6453 MptDriverClass[i] = MPTUNKNOWN_DRIVER;
6454 MptEvHandlers[i] = NULL;
6455 MptResetHandlers[i] = NULL;
6458 /* Register ourselves (mptbase) in order to facilitate
6459 * EventNotification handling.
6461 mpt_base_index = mpt_register(mpt_base_reply, MPTBASE_DRIVER);
6463 /* Register for hard reset handling callbacks.
6465 if (mpt_reset_register(mpt_base_index, mpt_ioc_reset) == 0) {
6466 dprintk((KERN_INFO MYNAM ": Register for IOC reset notification\n"));
6471 #ifdef CONFIG_PROC_FS
6472 (void) procmpt_create();
6477 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
6479 * fusion_exit - Perform driver unload cleanup.
6481 * This routine frees all resources associated with each MPT adapter
6482 * and removes all %MPT_PROCFS_MPTBASEDIR entries.
6488 dexitprintk((KERN_INFO MYNAM ": fusion_exit() called!\n"));
6490 mpt_reset_deregister(mpt_base_index);
6492 #ifdef CONFIG_PROC_FS
6497 module_init(fusion_init);
6498 module_exit(fusion_exit);