2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/mmc/host.h>
30 #include <asm/scatterlist.h>
31 #include <asm/sizes.h>
33 #include <asm/arch/pxa-regs.h>
34 #include <asm/arch/mmc.h>
38 #define DRIVER_NAME "pxa2xx-mci"
52 unsigned int power_mode;
53 struct pxamci_platform_data *pdata;
55 struct mmc_request *mrq;
56 struct mmc_command *cmd;
57 struct mmc_data *data;
60 struct pxa_dma_desc *sg_cpu;
66 static void pxamci_stop_clock(struct pxamci_host *host)
68 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
69 unsigned long timeout = 10000;
72 writel(STOP_CLOCK, host->base + MMC_STRPCL);
75 v = readl(host->base + MMC_STAT);
76 if (!(v & STAT_CLK_EN))
82 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
86 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
90 spin_lock_irqsave(&host->lock, flags);
92 writel(host->imask, host->base + MMC_I_MASK);
93 spin_unlock_irqrestore(&host->lock, flags);
96 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
100 spin_lock_irqsave(&host->lock, flags);
102 writel(host->imask, host->base + MMC_I_MASK);
103 spin_unlock_irqrestore(&host->lock, flags);
106 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
108 unsigned int nob = data->blocks;
109 unsigned long long clks;
110 unsigned int timeout;
116 if (data->flags & MMC_DATA_STREAM)
119 writel(nob, host->base + MMC_NOB);
120 writel(data->blksz, host->base + MMC_BLKLEN);
122 clks = (unsigned long long)data->timeout_ns * CLOCKRATE;
123 do_div(clks, 1000000000UL);
124 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
125 writel((timeout + 255) / 256, host->base + MMC_RDTO);
127 if (data->flags & MMC_DATA_READ) {
128 host->dma_dir = DMA_FROM_DEVICE;
129 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
131 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
133 host->dma_dir = DMA_TO_DEVICE;
134 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
136 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
139 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
141 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
144 for (i = 0; i < host->dma_len; i++) {
145 unsigned int length = sg_dma_len(&data->sg[i]);
146 host->sg_cpu[i].dcmd = dcmd | length;
147 if (length & 31 && !(data->flags & MMC_DATA_READ))
148 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
149 if (data->flags & MMC_DATA_READ) {
150 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
151 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
153 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
154 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
156 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
157 sizeof(struct pxa_dma_desc);
159 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
162 DDADR(host->dma) = host->sg_dma;
163 DCSR(host->dma) = DCSR_RUN;
166 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
168 WARN_ON(host->cmd != NULL);
171 if (cmd->flags & MMC_RSP_BUSY)
174 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
175 switch (RSP_TYPE(mmc_resp_type(cmd))) {
176 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
177 cmdat |= CMDAT_RESP_SHORT;
179 case RSP_TYPE(MMC_RSP_R3):
180 cmdat |= CMDAT_RESP_R3;
182 case RSP_TYPE(MMC_RSP_R2):
183 cmdat |= CMDAT_RESP_R2;
189 writel(cmd->opcode, host->base + MMC_CMD);
190 writel(cmd->arg >> 16, host->base + MMC_ARGH);
191 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
192 writel(cmdat, host->base + MMC_CMDAT);
193 writel(host->clkrt, host->base + MMC_CLKRT);
195 writel(START_CLOCK, host->base + MMC_STRPCL);
197 pxamci_enable_irq(host, END_CMD_RES);
200 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
205 mmc_request_done(host->mmc, mrq);
208 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
210 struct mmc_command *cmd = host->cmd;
220 * Did I mention this is Sick. We always need to
221 * discard the upper 8 bits of the first 16-bit word.
223 v = readl(host->base + MMC_RES) & 0xffff;
224 for (i = 0; i < 4; i++) {
225 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
226 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
227 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
231 if (stat & STAT_TIME_OUT_RESPONSE) {
232 cmd->error = -ETIMEDOUT;
233 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
236 * workaround for erratum #42:
237 * Intel PXA27x Family Processor Specification Update Rev 001
238 * A bogus CRC error can appear if the msb of a 136 bit
241 if (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000) {
242 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
245 cmd->error = -EILSEQ;
248 pxamci_disable_irq(host, END_CMD_RES);
249 if (host->data && !cmd->error) {
250 pxamci_enable_irq(host, DATA_TRAN_DONE);
252 pxamci_finish_request(host, host->mrq);
258 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
260 struct mmc_data *data = host->data;
266 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
269 if (stat & STAT_READ_TIME_OUT)
270 data->error = -ETIMEDOUT;
271 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
272 data->error = -EILSEQ;
275 * There appears to be a hardware design bug here. There seems to
276 * be no way to find out how much data was transferred to the card.
277 * This means that if there was an error on any block, we mark all
278 * data blocks as being in error.
281 data->bytes_xfered = data->blocks * data->blksz;
283 data->bytes_xfered = 0;
285 pxamci_disable_irq(host, DATA_TRAN_DONE);
288 if (host->mrq->stop) {
289 pxamci_stop_clock(host);
290 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
292 pxamci_finish_request(host, host->mrq);
298 static irqreturn_t pxamci_irq(int irq, void *devid)
300 struct pxamci_host *host = devid;
304 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
307 unsigned stat = readl(host->base + MMC_STAT);
309 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
311 if (ireg & END_CMD_RES)
312 handled |= pxamci_cmd_done(host, stat);
313 if (ireg & DATA_TRAN_DONE)
314 handled |= pxamci_data_done(host, stat);
315 if (ireg & SDIO_INT) {
316 mmc_signal_sdio_irq(host->mmc);
321 return IRQ_RETVAL(handled);
324 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
326 struct pxamci_host *host = mmc_priv(mmc);
329 WARN_ON(host->mrq != NULL);
333 pxamci_stop_clock(host);
336 host->cmdat &= ~CMDAT_INIT;
339 pxamci_setup_data(host, mrq->data);
341 cmdat &= ~CMDAT_BUSY;
342 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
343 if (mrq->data->flags & MMC_DATA_WRITE)
344 cmdat |= CMDAT_WRITE;
346 if (mrq->data->flags & MMC_DATA_STREAM)
347 cmdat |= CMDAT_STREAM;
350 pxamci_start_cmd(host, mrq->cmd, cmdat);
353 static int pxamci_get_ro(struct mmc_host *mmc)
355 struct pxamci_host *host = mmc_priv(mmc);
357 if (host->pdata && host->pdata->get_ro)
358 return host->pdata->get_ro(mmc_dev(mmc));
359 /* Host doesn't support read only detection so assume writeable */
363 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
365 struct pxamci_host *host = mmc_priv(mmc);
368 unsigned int clk = CLOCKRATE / ios->clock;
369 if (CLOCKRATE / clk > ios->clock)
371 host->clkrt = fls(clk) - 1;
372 pxa_set_cken(CKEN_MMC, 1);
375 * we write clkrt on the next command
378 pxamci_stop_clock(host);
379 pxa_set_cken(CKEN_MMC, 0);
382 if (host->power_mode != ios->power_mode) {
383 host->power_mode = ios->power_mode;
385 if (host->pdata && host->pdata->setpower)
386 host->pdata->setpower(mmc_dev(mmc), ios->vdd);
388 if (ios->power_mode == MMC_POWER_ON)
389 host->cmdat |= CMDAT_INIT;
392 if (ios->bus_width == MMC_BUS_WIDTH_4)
393 host->cmdat |= CMDAT_SD_4DAT;
395 host->cmdat &= ~CMDAT_SD_4DAT;
397 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
398 host->clkrt, host->cmdat);
401 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
403 struct pxamci_host *pxa_host = mmc_priv(host);
406 pxamci_enable_irq(pxa_host, SDIO_INT);
408 pxamci_disable_irq(pxa_host, SDIO_INT);
411 static const struct mmc_host_ops pxamci_ops = {
412 .request = pxamci_request,
413 .get_ro = pxamci_get_ro,
414 .set_ios = pxamci_set_ios,
415 .enable_sdio_irq = pxamci_enable_sdio_irq,
418 static void pxamci_dma_irq(int dma, void *devid)
420 struct pxamci_host *host = devid;
421 int dcsr = DCSR(dma);
422 DCSR(dma) = dcsr & ~DCSR_STOPIRQEN;
424 if (dcsr & DCSR_ENDINTR) {
425 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
427 printk(KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n",
428 mmc_hostname(host->mmc), dma, dcsr);
429 host->data->error = -EIO;
430 pxamci_data_done(host, 0);
434 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
436 struct pxamci_host *host = mmc_priv(devid);
438 mmc_detect_change(devid, host->pdata->detect_delay);
442 static int pxamci_probe(struct platform_device *pdev)
444 struct mmc_host *mmc;
445 struct pxamci_host *host = NULL;
449 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
450 irq = platform_get_irq(pdev, 0);
454 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
458 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
464 mmc->ops = &pxamci_ops;
465 mmc->f_min = CLOCKRATE_MIN;
466 mmc->f_max = CLOCKRATE_MAX;
469 * We can do SG-DMA, but we don't because we never know how much
470 * data we successfully wrote to the card.
472 mmc->max_phys_segs = NR_SG;
475 * Our hardware DMA can handle a maximum of one page per SG entry.
477 mmc->max_seg_size = PAGE_SIZE;
480 * Block length register is only 10 bits before PXA27x.
482 mmc->max_blk_size = (cpu_is_pxa21x() || cpu_is_pxa25x()) ? 1023 : 2048;
485 * Block count register is 16 bits.
487 mmc->max_blk_count = 65535;
489 host = mmc_priv(mmc);
492 host->pdata = pdev->dev.platform_data;
493 mmc->ocr_avail = host->pdata ?
494 host->pdata->ocr_mask :
495 MMC_VDD_32_33|MMC_VDD_33_34;
498 if (!cpu_is_pxa21x() && !cpu_is_pxa25x()) {
499 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
500 host->cmdat |= CMDAT_SDIO_INT_EN;
503 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
509 spin_lock_init(&host->lock);
512 host->imask = MMC_I_MASK_ALL;
514 host->base = ioremap(r->start, SZ_4K);
521 * Ensure that the host controller is shut down, and setup
524 pxamci_stop_clock(host);
525 writel(0, host->base + MMC_SPI);
526 writel(64, host->base + MMC_RESTO);
527 writel(host->imask, host->base + MMC_I_MASK);
529 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
530 pxamci_dma_irq, host);
536 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
540 platform_set_drvdata(pdev, mmc);
542 if (host->pdata && host->pdata->init)
543 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
552 pxa_free_dma(host->dma);
556 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
564 static int pxamci_remove(struct platform_device *pdev)
566 struct mmc_host *mmc = platform_get_drvdata(pdev);
568 platform_set_drvdata(pdev, NULL);
571 struct pxamci_host *host = mmc_priv(mmc);
573 if (host->pdata && host->pdata->exit)
574 host->pdata->exit(&pdev->dev, mmc);
576 mmc_remove_host(mmc);
578 pxamci_stop_clock(host);
579 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
580 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
581 host->base + MMC_I_MASK);
586 free_irq(host->irq, host);
587 pxa_free_dma(host->dma);
589 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
591 release_resource(host->res);
599 static int pxamci_suspend(struct platform_device *dev, pm_message_t state)
601 struct mmc_host *mmc = platform_get_drvdata(dev);
605 ret = mmc_suspend_host(mmc, state);
610 static int pxamci_resume(struct platform_device *dev)
612 struct mmc_host *mmc = platform_get_drvdata(dev);
616 ret = mmc_resume_host(mmc);
621 #define pxamci_suspend NULL
622 #define pxamci_resume NULL
625 static struct platform_driver pxamci_driver = {
626 .probe = pxamci_probe,
627 .remove = pxamci_remove,
628 .suspend = pxamci_suspend,
629 .resume = pxamci_resume,
635 static int __init pxamci_init(void)
637 return platform_driver_register(&pxamci_driver);
640 static void __exit pxamci_exit(void)
642 platform_driver_unregister(&pxamci_driver);
645 module_init(pxamci_init);
646 module_exit(pxamci_exit);
648 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
649 MODULE_LICENSE("GPL");