2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/pci.h>
14 #include <linux/init.h>
15 #include <linux/timer.h>
17 #include <linux/interrupt.h>
18 #include <linux/ide.h>
19 #include <linux/dma-mapping.h>
26 * ide_match_hwif - match a PCI IDE against an ide_hwif
27 * @io_base: I/O base of device
28 * @bootable: set if its bootable
29 * @name: name of device
31 * Match a PCI IDE port against an entry in ide_hwifs[],
32 * based on io_base port if possible. Return the matching hwif,
33 * or a new hwif. If we find an error (clashing, out of devices, etc)
36 * FIXME: we need to handle mmio matches here too
39 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
45 * Look for a hwif with matching io_base specified using
46 * parameters to ide_setup().
48 for (h = 0; h < MAX_HWIFS; ++h) {
50 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
51 if (hwif->chipset == ide_forced)
52 return hwif; /* a perfect match */
56 * Look for a hwif with matching io_base default value.
57 * If chipset is "ide_unknown", then claim that hwif slot.
58 * Otherwise, some other chipset has already claimed it.. :(
60 for (h = 0; h < MAX_HWIFS; ++h) {
62 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
63 if (hwif->chipset == ide_unknown)
64 return hwif; /* match */
65 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
66 name, io_base, hwif->name);
67 return NULL; /* already claimed */
71 * Okay, there is no hwif matching our io_base,
72 * so we'll just claim an unassigned slot.
73 * Give preference to claiming other slots before claiming ide0/ide1,
74 * just in case there's another interface yet-to-be-scanned
75 * which uses ports 1f0/170 (the ide0/ide1 defaults).
77 * Unless there is a bootable card that does not use the standard
78 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
81 for (h = 0; h < MAX_HWIFS; ++h) {
83 if (hwif->chipset == ide_unknown)
84 return hwif; /* pick an unused entry */
87 for (h = 2; h < MAX_HWIFS; ++h) {
89 if (hwif->chipset == ide_unknown)
90 return hwif; /* pick an unused entry */
93 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
95 if (hwif->chipset == ide_unknown)
96 return hwif; /* pick an unused entry */
98 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
103 * ide_setup_pci_baseregs - place a PCI IDE controller native
104 * @dev: PCI device of interface to switch native
105 * @name: Name of interface
107 * We attempt to place the PCI interface into PCI native mode. If
108 * we succeed the BARs are ok and the controller is in PCI mode.
109 * Returns 0 on success or an errno code.
111 * FIXME: if we program the interface and then fail to set the BARS
112 * we don't switch it back to legacy mode. Do we actually care ??
115 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
120 * Place both IDE interfaces into PCI "native" mode:
122 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
124 if ((progif & 0xa) != 0xa) {
125 printk(KERN_INFO "%s: device not capable of full "
126 "native PCI mode\n", name);
129 printk("%s: placing both ports into native PCI mode\n", name);
130 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
131 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
133 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
134 "0x%04x, got 0x%04x\n",
135 name, progif|5, progif);
142 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
144 * ide_get_or_set_dma_base - setup BMIBA
146 * @hwif: IDE interface
148 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
149 * Where a device has a partner that is already in DMA mode we check
150 * and enforce IDE simplex rules.
153 static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
155 unsigned long dma_base = 0;
156 struct pci_dev *dev = hwif->pci_dev;
159 return hwif->dma_base;
161 if (hwif->mate && hwif->mate->dma_base) {
162 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
164 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
166 dma_base = pci_resource_start(dev, baridx);
169 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
172 if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) {
174 dma_base += hwif->channel ? 8 : 0;
176 switch(dev->device) {
177 case PCI_DEVICE_ID_AL_M5219:
178 case PCI_DEVICE_ID_AL_M5229:
179 case PCI_DEVICE_ID_AMD_VIPER_7409:
180 case PCI_DEVICE_ID_CMD_643:
181 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
182 case PCI_DEVICE_ID_REVOLUTION:
183 simplex_stat = inb(dma_base + 2);
184 outb(simplex_stat & 0x60, dma_base + 2);
185 simplex_stat = inb(dma_base + 2);
186 if (simplex_stat & 0x80) {
187 printk(KERN_INFO "%s: simplex device: "
194 * If the device claims "simplex" DMA,
195 * this means only one of the two interfaces
196 * can be trusted with DMA at any point in time.
197 * So we should enable DMA only on one of the
200 simplex_stat = hwif->INB(dma_base + 2);
201 if (simplex_stat & 0x80) {
202 /* simplex device? */
204 * At this point we haven't probed the drives so we can't make the
205 * appropriate decision. Really we should defer this problem
206 * until we tune the drive then try to grab DMA ownership if we want
207 * to be the DMA end. This has to be become dynamic to handle hot
210 if (hwif->mate && hwif->mate->dma_base) {
211 printk(KERN_INFO "%s: simplex device: "
221 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
223 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
225 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
226 " PCI slot %s\n", d->name, dev->vendor, dev->device,
227 dev->revision, pci_name(dev));
230 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
234 * ide_pci_enable - do PCI enables
238 * Enable the IDE PCI device. We attempt to enable the device in full
239 * but if that fails then we only need BAR4 so we will enable that.
241 * Returns zero on success or an error code
244 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
248 if (pci_enable_device(dev)) {
249 ret = pci_enable_device_bars(dev, 1 << 4);
251 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
252 "Could not enable device.\n", d->name);
255 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
259 * assume all devices can do 32-bit DMA for now, we can add
260 * a DMA mask field to the struct ide_port_info if we need it
261 * (or let lower level driver set the DMA mask)
263 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
265 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
269 /* FIXME: Temporary - until we put in the hotplug interface logic
270 Check that the bits we want are not in use by someone else. */
271 ret = pci_request_region(dev, 4, "ide_tmp");
275 pci_release_region(dev, 4);
281 * ide_pci_configure - configure an unconfigured device
285 * Enable and configure the PCI device we have been passed.
286 * Returns zero on success or an error code.
289 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
293 * PnP BIOS was *supposed* to have setup this device, but we
294 * can do it ourselves, so long as the BIOS has assigned an IRQ
295 * (or possibly the device is using a "legacy header" for IRQs).
296 * Maybe the user deliberately *disabled* the device,
297 * but we'll eventually ignore it again if no drives respond.
299 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
301 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
304 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
305 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
308 if (!(pcicmd & PCI_COMMAND_IO)) {
309 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
316 * ide_pci_check_iomem - check a register is I/O
321 * Checks if a BAR is configured and points to MMIO space. If so
322 * print an error and return an error code. Otherwise return 0
325 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
327 ulong flags = pci_resource_flags(dev, bar);
330 if (!flags || pci_resource_len(dev, bar) == 0)
334 if(flags & PCI_BASE_ADDRESS_IO_MASK)
338 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
340 "<andre@linux-ide.org>.\n", d->name);
345 * ide_hwif_configure - configure an IDE interface
346 * @dev: PCI device holding interface
348 * @mate: Paired interface if any
350 * Perform the initial set up for the hardware interface structure. This
351 * is done per interface port rather than per PCI device. There may be
352 * more than one port per device.
354 * Returns the new hardware interface structure, or NULL on a failure
357 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq)
359 unsigned long ctl = 0, base = 0;
361 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
363 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
364 /* Possibly we should fail if these checks report true */
365 ide_pci_check_iomem(dev, d, 2*port);
366 ide_pci_check_iomem(dev, d, 2*port+1);
368 ctl = pci_resource_start(dev, 2*port+1);
369 base = pci_resource_start(dev, 2*port);
370 if ((ctl && !base) || (base && !ctl)) {
371 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
372 "for port %d, skipping\n", d->name, port);
378 /* Use default values */
379 ctl = port ? 0x374 : 0x3f4;
380 base = port ? 0x170 : 0x1f0;
382 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
383 return NULL; /* no room in ide_hwifs[] */
384 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
385 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
388 memset(&hw, 0, sizeof(hw));
389 #ifndef CONFIG_IDE_ARCH_OBSOLETE_INIT
390 ide_std_init_ports(&hw, base, ctl | 2);
392 ide_init_hwif_ports(&hw, base, ctl | 2, NULL);
394 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
395 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
397 hwif->chipset = d->chipset ? d->chipset : ide_pci;
400 hwif->channel = port;
412 * ide_hwif_setup_dma - configure DMA interface
415 * @hwif: IDE interface
417 * Set up the DMA base for the interface. Enable the master bits as
418 * necessary and attempt to bring the device DMA into a ready to use
422 static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif)
424 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
427 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
429 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
430 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
431 (dev->class & 0x80))) {
432 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
433 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
435 * Set up BM-DMA capability
436 * (PnP BIOS should have done this)
439 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
440 printk(KERN_ERR "%s: %s error updating PCICMD\n",
441 hwif->name, d->name);
447 d->init_dma(hwif, dma_base);
449 ide_setup_dma(hwif, dma_base, 8);
452 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
453 "(BIOS)\n", hwif->name, d->name);
456 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
460 * ide_setup_pci_controller - set up IDE PCI
463 * @noisy: verbose flag
464 * @config: returned as 1 if we configured the hardware
466 * Set up the PCI and controller side of the IDE interface. This brings
467 * up the PCI side of the device, checks that the device is enabled
468 * and enables it if need be
471 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
477 ide_setup_pci_noise(dev, d);
479 ret = ide_pci_enable(dev, d);
483 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
485 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
488 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
489 ret = ide_pci_configure(dev, d);
493 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
501 * ide_pci_setup_ports - configure ports/devices on PCI IDE
505 * @idx: ATA index table to update
507 * Scan the interfaces attached to this device and do any
508 * necessary per port setup. Attach the devices and ask the
509 * generic DMA layer to do its work for us.
511 * Normally called automaticall from do_ide_pci_setup_device,
512 * but is also used directly as a helper function by some controllers
513 * where the chipset setup is not the default PCI IDE one.
516 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
518 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
519 ide_hwif_t *hwif, *mate = NULL;
523 * Set up the IDE ports
526 for (port = 0; port < channels; ++port) {
527 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
529 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
530 (tmp & e->mask) != e->val)) {
531 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
532 continue; /* port not enabled */
535 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
538 /* setup proper ancestral information */
539 hwif->gendev.parent = &dev->dev;
541 *(idx + port) = hwif->index;
547 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
548 ide_hwif_setup_dma(dev, d, hwif);
550 if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) ||
551 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
552 hwif->irq = port ? 15 : 14;
554 hwif->fixup = d->fixup;
556 hwif->host_flags = d->host_flags;
557 hwif->pio_mask = d->pio_mask;
559 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
560 hwif->mate->serialized = hwif->serialized = 1;
562 if (d->host_flags & IDE_HFLAG_IO_32BIT) {
563 hwif->drives[0].io_32bit = 1;
564 hwif->drives[1].io_32bit = 1;
567 if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) {
568 hwif->drives[0].unmask = 1;
569 hwif->drives[1].unmask = 1;
572 if (hwif->dma_base) {
573 hwif->swdma_mask = d->swdma_mask;
574 hwif->mwdma_mask = d->mwdma_mask;
575 hwif->ultra_mask = d->udma_mask;
578 hwif->drives[0].autotune = 1;
579 hwif->drives[1].autotune = 1;
581 if (d->host_flags & IDE_HFLAG_RQSIZE_256)
585 /* Call chipset-specific routine
586 * for each enabled hwif
594 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
597 * ide_setup_pci_device() looks at the primary/secondary interfaces
598 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
599 * for use with them. This generic code works for most PCI chipsets.
601 * One thing that is not standardized is the location of the
602 * primary/secondary interface "enable/disable" bits. For chipsets that
603 * we "know" about, this information is in the struct ide_port_info;
604 * for all other chipsets, we just assume both interfaces are enabled.
606 static int do_ide_setup_pci_device(struct pci_dev *dev,
607 const struct ide_port_info *d,
610 int tried_config = 0;
613 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
618 * Can we trust the reported IRQ?
622 /* Is it an "IDE storage" device in non-PCI mode? */
623 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
625 printk(KERN_INFO "%s: not 100%% native mode: "
626 "will probe irqs later\n", d->name);
628 * This allows offboard ide-pci cards the enable a BIOS,
629 * verify interrupt settings of split-mirror pci-config
630 * space, place chipset into init-mode, and/or preserve
631 * an interrupt if the card is not native ide support.
633 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
637 } else if (tried_config) {
639 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
641 } else if (!pciirq) {
643 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
647 if (d->init_chipset) {
648 ret = d->init_chipset(dev, d->name);
653 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
657 /* FIXME: silent failure can happen */
659 ide_pci_setup_ports(dev, d, pciirq, idx);
664 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
666 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
669 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
677 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
679 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
680 const struct ide_port_info *d)
682 struct pci_dev *pdev[] = { dev1, dev2 };
684 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
686 for (i = 0; i < 2; i++) {
687 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
689 * FIXME: Mom, mom, they stole me the helper function to undo
690 * do_ide_setup_pci_device() on the first device!
701 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
703 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
708 static int pre_init = 1; /* Before first ordered IDE scan */
709 static LIST_HEAD(ide_pci_drivers);
712 * __ide_pci_register_driver - attach IDE driver
713 * @driver: pci driver
714 * @module: owner module of the driver
716 * Registers a driver with the IDE layer. The IDE layer arranges that
717 * boot time setup is done in the expected device order and then
718 * hands the controllers off to the core PCI code to do the rest of
721 * Returns are the same as for pci_register_driver
724 int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
725 const char *mod_name)
728 return __pci_register_driver(driver, module, mod_name);
729 driver->driver.owner = module;
730 list_add_tail(&driver->node, &ide_pci_drivers);
734 EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
737 * ide_scan_pcidev - find an IDE driver for a device
738 * @dev: PCI device to check
740 * Look for an IDE driver to handle the device we are considering.
741 * This is only used during boot up to get the ordering correct. After
742 * boot up the pci layer takes over the job.
745 static int __init ide_scan_pcidev(struct pci_dev *dev)
748 struct pci_driver *d;
750 list_for_each(l, &ide_pci_drivers) {
751 d = list_entry(l, struct pci_driver, node);
753 const struct pci_device_id *id = pci_match_id(d->id_table,
755 if (id != NULL && d->probe(dev, id) >= 0) {
766 * ide_scan_pcibus - perform the initial IDE driver scan
767 * @scan_direction: set for reverse order scanning
769 * Perform the initial bus rather than driver ordered scan of the
770 * PCI drivers. After this all IDE pci handling becomes standard
771 * module ordering not traditionally ordered.
774 void __init ide_scan_pcibus (int scan_direction)
776 struct pci_dev *dev = NULL;
777 struct pci_driver *d;
778 struct list_head *l, *n;
782 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
783 ide_scan_pcidev(dev);
785 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev))
787 ide_scan_pcidev(dev);
790 * Hand the drivers over to the PCI layer now we
794 list_for_each_safe(l, n, &ide_pci_drivers) {
796 d = list_entry(l, struct pci_driver, node);
797 if (__pci_register_driver(d, d->driver.owner, d->driver.mod_name))
798 printk(KERN_ERR "%s: failed to register driver for %s\n",
799 __FUNCTION__, d->driver.mod_name);