2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
4 * Based on alpha version.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13 #define _ASM_POWERPC_OPROFILE_IMPL_H
16 #define OP_MAX_COUNTER 8
18 /* Per-counter configuration as set via oprofilefs. */
19 struct op_counter_config {
20 unsigned long enabled;
23 /* Classic doesn't support per-counter user/kernel selection */
26 unsigned long unit_mask;
29 /* System-wide configuration as set via oprofilefs. */
30 struct op_system_config {
36 unsigned long enable_kernel;
37 unsigned long enable_user;
40 /* Per-arch configuration */
41 struct op_powerpc_model {
42 void (*reg_setup) (struct op_counter_config *,
43 struct op_system_config *,
45 void (*cpu_setup) (struct op_counter_config *);
46 void (*start) (struct op_counter_config *);
48 void (*handle_interrupt) (struct pt_regs *,
49 struct op_counter_config *);
53 extern struct op_powerpc_model op_model_fsl_booke;
54 extern struct op_powerpc_model op_model_rs64;
55 extern struct op_powerpc_model op_model_power4;
56 extern struct op_powerpc_model op_model_7450;
58 #ifndef CONFIG_FSL_BOOKE
60 /* All the classic PPC parts use these */
61 static inline unsigned int ctr_read(unsigned int i)
65 return mfspr(SPRN_PMC1);
67 return mfspr(SPRN_PMC2);
69 return mfspr(SPRN_PMC3);
71 return mfspr(SPRN_PMC4);
73 return mfspr(SPRN_PMC5);
75 return mfspr(SPRN_PMC6);
77 /* No PPC32 chip has more than 6 so far */
80 return mfspr(SPRN_PMC7);
82 return mfspr(SPRN_PMC8);
89 static inline void ctr_write(unsigned int i, unsigned int val)
93 mtspr(SPRN_PMC1, val);
96 mtspr(SPRN_PMC2, val);
99 mtspr(SPRN_PMC3, val);
102 mtspr(SPRN_PMC4, val);
105 mtspr(SPRN_PMC5, val);
108 mtspr(SPRN_PMC6, val);
111 /* No PPC32 chip has more than 6, yet */
114 mtspr(SPRN_PMC7, val);
117 mtspr(SPRN_PMC8, val);
124 #else /* CONFIG_FSL_BOOKE */
125 static inline u32 get_pmlca(int ctr)
131 pmlca = mfpmr(PMRN_PMLCA0);
134 pmlca = mfpmr(PMRN_PMLCA1);
137 pmlca = mfpmr(PMRN_PMLCA2);
140 pmlca = mfpmr(PMRN_PMLCA3);
143 panic("Bad ctr number\n");
149 static inline void set_pmlca(int ctr, u32 pmlca)
153 mtpmr(PMRN_PMLCA0, pmlca);
156 mtpmr(PMRN_PMLCA1, pmlca);
159 mtpmr(PMRN_PMLCA2, pmlca);
162 mtpmr(PMRN_PMLCA3, pmlca);
165 panic("Bad ctr number\n");
169 static inline unsigned int ctr_read(unsigned int i)
173 return mfpmr(PMRN_PMC0);
175 return mfpmr(PMRN_PMC1);
177 return mfpmr(PMRN_PMC2);
179 return mfpmr(PMRN_PMC3);
185 static inline void ctr_write(unsigned int i, unsigned int val)
189 mtpmr(PMRN_PMC0, val);
192 mtpmr(PMRN_PMC1, val);
195 mtpmr(PMRN_PMC2, val);
198 mtpmr(PMRN_PMC3, val);
206 #endif /* CONFIG_FSL_BOOKE */
209 extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
211 #endif /* __KERNEL__ */
212 #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */