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   1 /*
   2  *  linux/arch/arm/mach-pxa/mainstone.c
   3  *
   4  *  Support for the Intel HCDDBBVA0 Development Platform.
   5  *  (go figure how they came up with such name...)
   6  *
   7  *  Author:     Nicolas Pitre
   8  *  Created:    Nov 05, 2002
   9  *  Copyright:  MontaVista Software Inc.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License version 2 as
  13  *  published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23
  24 #include <asm/types.h>
  25 #include <asm/setup.h>
  26 #include <asm/memory.h>
  27 #include <asm/mach-types.h>
  28 #include <asm/hardware.h>
  29 #include <asm/irq.h>
  30
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/map.h>
  33 #include <asm/mach/irq.h>
  34
  35 #include <asm/arch/pxa-regs.h>
  36 #include <asm/arch/mainstone.h>
  37 #include <asm/arch/audio.h>
  38 #include <asm/arch/pxafb.h>
  39 #include <asm/arch/mmc.h>
  40
  41 #include "generic.h"
  42
  43
  44 static unsigned long mainstone_irq_enabled;
  45
  46 static void mainstone_mask_irq(unsigned int irq)
  47 {
  48         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  49         MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  50 }
  51
  52 static void mainstone_unmask_irq(unsigned int irq)
  53 {
  54         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  55         /* the irq can be acknowledged only if deasserted, so it's done here */
  56         MST_INTSETCLR &= ~(1 << mainstone_irq);
  57         MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  58 }
  59
  60 static struct irqchip mainstone_irq_chip = {
  61         .ack            = mainstone_mask_irq,
  62         .mask           = mainstone_mask_irq,
  63         .unmask         = mainstone_unmask_irq,
  64 };
  65
  66 static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
  67                                   struct pt_regs *regs)
  68 {
  69         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  70         do {
  71                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
  72                 if (likely(pending)) {
  73                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
  74                         desc = irq_desc + irq;
  75                         desc_handle_irq(irq, desc, regs);
  76                 }
  77                 pending = MST_INTSETCLR & mainstone_irq_enabled;
  78         } while (pending);
  79 }
  80
  81 static void __init mainstone_init_irq(void)
  82 {
  83         int irq;
  84
  85         pxa_init_irq();
  86
  87         /* setup extra Mainstone irqs */
  88         for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  89                 set_irq_chip(irq, &mainstone_irq_chip);
  90                 set_irq_handler(irq, do_level_IRQ);
  91                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  92         }
  93         set_irq_flags(MAINSTONE_IRQ(8), 0);
  94         set_irq_flags(MAINSTONE_IRQ(12), 0);
  95
  96         MST_INTMSKENA = 0;
  97         MST_INTSETCLR = 0;
  98
  99         set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
 100         set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
 101 }
 102
 103 #ifdef CONFIG_PM
 104
 105 static int mainstone_irq_resume(struct sys_device *dev)
 106 {
 107         MST_INTMSKENA = mainstone_irq_enabled;
 108         return 0;
 109 }
 110
 111 static struct sysdev_class mainstone_irq_sysclass = {
 112         set_kset_name("cpld_irq"),
 113         .resume = mainstone_irq_resume,
 114 };
 115
 116 static struct sys_device mainstone_irq_device = {
 117         .cls = &mainstone_irq_sysclass,
 118 };
 119
 120 static int __init mainstone_irq_device_init(void)
 121 {
 122         int ret = sysdev_class_register(&mainstone_irq_sysclass);
 123         if (ret == 0)
 124                 ret = sysdev_register(&mainstone_irq_device);
 125         return ret;
 126 }
 127
 128 device_initcall(mainstone_irq_device_init);
 129
 130 #endif
 131
 132
 133 static struct resource smc91x_resources[] = {
 134         [0] = {
 135                 .start  = (MST_ETH_PHYS + 0x300),
 136                 .end    = (MST_ETH_PHYS + 0xfffff),
 137                 .flags  = IORESOURCE_MEM,
 138         },
 139         [1] = {
 140                 .start  = MAINSTONE_IRQ(3),
 141                 .end    = MAINSTONE_IRQ(3),
 142                 .flags  = IORESOURCE_IRQ,
 143         }
 144 };
 145
 146 static struct platform_device smc91x_device = {
 147         .name           = "smc91x",
 148         .id             = 0,
 149         .num_resources  = ARRAY_SIZE(smc91x_resources),
 150         .resource       = smc91x_resources,
 151 };
 152
 153 static int mst_audio_startup(snd_pcm_substream_t *substream, void *priv)
 154 {
 155         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 156                 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
 157         return 0;
 158 }
 159
 160 static void mst_audio_shutdown(snd_pcm_substream_t *substream, void *priv)
 161 {
 162         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 163                 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
 164 }
 165
 166 static long mst_audio_suspend_mask;
 167
 168 static void mst_audio_suspend(void *priv)
 169 {
 170         mst_audio_suspend_mask = MST_MSCWR2;
 171         MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
 172 }
 173
 174 static void mst_audio_resume(void *priv)
 175 {
 176         MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
 177 }
 178
 179 static pxa2xx_audio_ops_t mst_audio_ops = {
 180         .startup        = mst_audio_startup,
 181         .shutdown       = mst_audio_shutdown,
 182         .suspend        = mst_audio_suspend,
 183         .resume         = mst_audio_resume,
 184 };
 185
 186 static struct platform_device mst_audio_device = {
 187         .name           = "pxa2xx-ac97",
 188         .id             = -1,
 189         .dev            = { .platform_data = &mst_audio_ops },
 190 };
 191
 192 static void mainstone_backlight_power(int on)
 193 {
 194         if (on) {
 195                 pxa_gpio_mode(GPIO16_PWM0_MD);
 196                 pxa_set_cken(CKEN0_PWM0, 1);
 197                 PWM_CTRL0 = 0;
 198                 PWM_PWDUTY0 = 0x3ff;
 199                 PWM_PERVAL0 = 0x3ff;
 200         } else {
 201                 PWM_CTRL0 = 0;
 202                 PWM_PWDUTY0 = 0x0;
 203                 PWM_PERVAL0 = 0x3FF;
 204                 pxa_set_cken(CKEN0_PWM0, 0);
 205         }
 206 }
 207
 208 static struct pxafb_mach_info toshiba_ltm04c380k __initdata = {
 209         .pixclock               = 50000,
 210         .xres                   = 640,
 211         .yres                   = 480,
 212         .bpp                    = 16,
 213         .hsync_len              = 1,
 214         .left_margin            = 0x9f,
 215         .right_margin           = 1,
 216         .vsync_len              = 44,
 217         .upper_margin           = 0,
 218         .lower_margin           = 0,
 219         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
 220         .lccr0                  = LCCR0_Act,
 221         .lccr3                  = LCCR3_PCP,
 222         .pxafb_backlight_power  = mainstone_backlight_power,
 223 };
 224
 225 static struct pxafb_mach_info toshiba_ltm035a776c __initdata = {
 226         .pixclock               = 110000,
 227         .xres                   = 240,
 228         .yres                   = 320,
 229         .bpp                    = 16,
 230         .hsync_len              = 4,
 231         .left_margin            = 8,
 232         .right_margin           = 20,
 233         .vsync_len              = 3,
 234         .upper_margin           = 1,
 235         .lower_margin           = 10,
 236         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
 237         .lccr0                  = LCCR0_Act,
 238         .lccr3                  = LCCR3_PCP,
 239         .pxafb_backlight_power  = mainstone_backlight_power,
 240 };
 241
 242 static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data)
 243 {
 244         int err;
 245
 246         /*
 247          * setup GPIO for PXA27x MMC controller
 248          */
 249         pxa_gpio_mode(GPIO32_MMCCLK_MD);
 250         pxa_gpio_mode(GPIO112_MMCCMD_MD);
 251         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
 252         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
 253         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
 254         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
 255
 256         /* make sure SD/Memory Stick multiplexer's signals
 257          * are routed to MMC controller
 258          */
 259         MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
 260
 261         err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT,
 262                              "MMC card detect", data);
 263         if (err) {
 264                 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
 265                 return -1;
 266         }
 267
 268         return 0;
 269 }
 270
 271 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
 272 {
 273         struct pxamci_platform_data* p_d = dev->platform_data;
 274
 275         if (( 1 << vdd) & p_d->ocr_mask) {
 276                 printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
 277                 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
 278                 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
 279         } else {
 280                 printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
 281                 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
 282         }
 283 }
 284
 285 static void mainstone_mci_exit(struct device *dev, void *data)
 286 {
 287         free_irq(MAINSTONE_MMC_IRQ, data);
 288 }
 289
 290 static struct pxamci_platform_data mainstone_mci_platform_data = {
 291         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 292         .init           = mainstone_mci_init,
 293         .setpower       = mainstone_mci_setpower,
 294         .exit           = mainstone_mci_exit,
 295 };
 296
 297 static void __init mainstone_init(void)
 298 {
 299         /*
 300          * On Mainstone, we route AC97_SYSCLK via GPIO45 to
 301          * the audio daughter card
 302          */
 303         pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
 304
 305         platform_device_register(&smc91x_device);
 306         platform_device_register(&mst_audio_device);
 307
 308         /* reading Mainstone's "Virtual Configuration Register"
 309            might be handy to select LCD type here */
 310         if (0)
 311                 set_pxa_fb_info(&toshiba_ltm04c380k);
 312         else
 313                 set_pxa_fb_info(&toshiba_ltm035a776c);
 314
 315         pxa_set_mci_info(&mainstone_mci_platform_data);
 316 }
 317
 318
 319 static struct map_desc mainstone_io_desc[] __initdata = {
 320         {       /* CPLD */
 321                 .virtual        =  MST_FPGA_VIRT,
 322                 .pfn            = __phys_to_pfn(MST_FPGA_PHYS),
 323                 .length         = 0x00100000,
 324                 .type           = MT_DEVICE
 325         }
 326 };
 327
 328 static void __init mainstone_map_io(void)
 329 {
 330         pxa_map_io();
 331         iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
 332
 333         /* initialize sleep mode regs (wake-up sources, etc) */
 334         PGSR0 = 0x00008800;
 335         PGSR1 = 0x00000002;
 336         PGSR2 = 0x0001FC00;
 337         PGSR3 = 0x00001F81;
 338         PWER  = 0xC0000002;
 339         PRER  = 0x00000002;
 340         PFER  = 0x00000002;
 341         /*      for use I SRAM as framebuffer.  */
 342         PSLR |= 0xF04;
 343         PCFR = 0x66;
 344         /*      For Keypad wakeup.      */
 345         KPC &=~KPC_ASACT;
 346         KPC |=KPC_AS;
 347         PKWR  = 0x000FD000;
 348         /*      Need read PKWR back after set it.       */
 349         PKWR;
 350 }
 351
 352 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
 353         /* Maintainer: MontaVista Software Inc. */
 354         .phys_ram       = 0xa0000000,
 355         .phys_io        = 0x40000000,
 356         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 357         .map_io         = mainstone_map_io,
 358         .init_irq       = mainstone_init_irq,
 359         .timer          = &pxa_timer,
 360         .init_machine   = mainstone_init,
 361 MACHINE_END