2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/tty.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/config.h>
28 #include <linux/init.h>
29 #include <linux/initrd.h>
30 #include <linux/highmem.h>
31 #include <linux/bootmem.h>
32 #include <linux/module.h>
33 #include <asm/processor.h>
34 #include <linux/console.h>
35 #include <linux/seq_file.h>
36 #include <linux/crash_dump.h>
37 #include <linux/root_dev.h>
38 #include <linux/pci.h>
39 #include <linux/acpi.h>
40 #include <linux/kallsyms.h>
41 #include <linux/edd.h>
42 #include <linux/mmzone.h>
43 #include <linux/kexec.h>
44 #include <linux/cpufreq.h>
45 #include <linux/dmi.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/ctype.h>
50 #include <asm/uaccess.h>
51 #include <asm/system.h>
56 #include <video/edid.h>
59 #include <asm/mpspec.h>
60 #include <asm/mmu_context.h>
61 #include <asm/bootsetup.h>
62 #include <asm/proto.h>
63 #include <asm/setup.h>
64 #include <asm/mach_apic.h>
66 #include <asm/sections.h>
73 struct cpuinfo_x86 boot_cpu_data __read_mostly;
74 EXPORT_SYMBOL(boot_cpu_data);
76 unsigned long mmu_cr4_features;
79 EXPORT_SYMBOL(acpi_disabled);
81 extern int __initdata acpi_ht;
82 extern acpi_interrupt_flags acpi_sci_flags;
83 int __initdata acpi_force = 0;
86 int acpi_numa __initdata;
88 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
91 unsigned long saved_video_mode;
97 char dmi_alloc_data[DMI_MAX_DATA];
102 struct screen_info screen_info;
103 EXPORT_SYMBOL(screen_info);
104 struct sys_desc_table_struct {
105 unsigned short length;
106 unsigned char table[0];
109 struct edid_info edid_info;
112 extern int root_mountflags;
114 char command_line[COMMAND_LINE_SIZE];
116 struct resource standard_io_resources[] = {
117 { .name = "dma1", .start = 0x00, .end = 0x1f,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "pic1", .start = 0x20, .end = 0x21,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "timer0", .start = 0x40, .end = 0x43,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "timer1", .start = 0x50, .end = 0x53,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "keyboard", .start = 0x60, .end = 0x6f,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "pic2", .start = 0xa0, .end = 0xa1,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "dma2", .start = 0xc0, .end = 0xdf,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "fpu", .start = 0xf0, .end = 0xff,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
137 #define STANDARD_IO_RESOURCES \
138 (sizeof standard_io_resources / sizeof standard_io_resources[0])
140 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
142 struct resource data_resource = {
143 .name = "Kernel data",
146 .flags = IORESOURCE_RAM,
148 struct resource code_resource = {
149 .name = "Kernel code",
152 .flags = IORESOURCE_RAM,
155 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
157 static struct resource system_rom_resource = {
158 .name = "System ROM",
161 .flags = IORESOURCE_ROM,
164 static struct resource extension_rom_resource = {
165 .name = "Extension ROM",
168 .flags = IORESOURCE_ROM,
171 static struct resource adapter_rom_resources[] = {
172 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM },
178 { .name = "Adapter ROM", .start = 0, .end = 0,
179 .flags = IORESOURCE_ROM },
180 { .name = "Adapter ROM", .start = 0, .end = 0,
181 .flags = IORESOURCE_ROM },
182 { .name = "Adapter ROM", .start = 0, .end = 0,
183 .flags = IORESOURCE_ROM }
186 #define ADAPTER_ROM_RESOURCES \
187 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
189 static struct resource video_rom_resource = {
193 .flags = IORESOURCE_ROM,
196 static struct resource video_ram_resource = {
197 .name = "Video RAM area",
200 .flags = IORESOURCE_RAM,
203 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
205 static int __init romchecksum(unsigned char *rom, unsigned long length)
207 unsigned char *p, sum = 0;
209 for (p = rom; p < rom + length; p++)
214 static void __init probe_roms(void)
216 unsigned long start, length, upper;
221 upper = adapter_rom_resources[0].start;
222 for (start = video_rom_resource.start; start < upper; start += 2048) {
223 rom = isa_bus_to_virt(start);
224 if (!romsignature(rom))
227 video_rom_resource.start = start;
229 /* 0 < length <= 0x7f * 512, historically */
230 length = rom[2] * 512;
232 /* if checksum okay, trust length byte */
233 if (length && romchecksum(rom, length))
234 video_rom_resource.end = start + length - 1;
236 request_resource(&iomem_resource, &video_rom_resource);
240 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
245 request_resource(&iomem_resource, &system_rom_resource);
246 upper = system_rom_resource.start;
248 /* check for extension rom (ignore length byte!) */
249 rom = isa_bus_to_virt(extension_rom_resource.start);
250 if (romsignature(rom)) {
251 length = extension_rom_resource.end - extension_rom_resource.start + 1;
252 if (romchecksum(rom, length)) {
253 request_resource(&iomem_resource, &extension_rom_resource);
254 upper = extension_rom_resource.start;
258 /* check for adapter roms on 2k boundaries */
259 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
260 rom = isa_bus_to_virt(start);
261 if (!romsignature(rom))
264 /* 0 < length <= 0x7f * 512, historically */
265 length = rom[2] * 512;
267 /* but accept any length that fits if checksum okay */
268 if (!length || start + length > upper || !romchecksum(rom, length))
271 adapter_rom_resources[i].start = start;
272 adapter_rom_resources[i].end = start + length - 1;
273 request_resource(&iomem_resource, &adapter_rom_resources[i]);
275 start = adapter_rom_resources[i++].end & ~2047UL;
279 /* Check for full argument with no trailing characters */
280 static int fullarg(char *p, char *arg)
283 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
286 static __init void parse_cmdline_early (char ** cmdline_p)
288 char c = ' ', *to = command_line, *from = COMMAND_LINE;
298 * If the BIOS enumerates physical processors before logical,
299 * maxcpus=N at enumeration-time can be used to disable HT.
301 else if (!memcmp(from, "maxcpus=", 8)) {
302 extern unsigned int maxcpus;
304 maxcpus = simple_strtoul(from + 8, NULL, 0);
308 /* "acpi=off" disables both ACPI table parsing and interpreter init */
309 if (fullarg(from,"acpi=off"))
312 if (fullarg(from, "acpi=force")) {
313 /* add later when we do DMI horrors: */
318 /* acpi=ht just means: do ACPI MADT parsing
319 at bootup, but don't enable the full ACPI interpreter */
320 if (fullarg(from, "acpi=ht")) {
325 else if (fullarg(from, "pci=noacpi"))
327 else if (fullarg(from, "acpi=noirq"))
330 else if (fullarg(from, "acpi_sci=edge"))
331 acpi_sci_flags.trigger = 1;
332 else if (fullarg(from, "acpi_sci=level"))
333 acpi_sci_flags.trigger = 3;
334 else if (fullarg(from, "acpi_sci=high"))
335 acpi_sci_flags.polarity = 1;
336 else if (fullarg(from, "acpi_sci=low"))
337 acpi_sci_flags.polarity = 3;
339 /* acpi=strict disables out-of-spec workarounds */
340 else if (fullarg(from, "acpi=strict")) {
343 #ifdef CONFIG_X86_IO_APIC
344 else if (fullarg(from, "acpi_skip_timer_override"))
345 acpi_skip_timer_override = 1;
349 if (fullarg(from, "disable_timer_pin_1"))
350 disable_timer_pin_1 = 1;
351 if (fullarg(from, "enable_timer_pin_1"))
352 disable_timer_pin_1 = -1;
354 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
355 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
359 if (fullarg(from, "noapic"))
360 skip_ioapic_setup = 1;
362 if (fullarg(from,"apic")) {
363 skip_ioapic_setup = 0;
367 if (!memcmp(from, "mem=", 4))
368 parse_memopt(from+4, &from);
370 if (!memcmp(from, "memmap=", 7)) {
371 /* exactmap option is for used defined memory */
372 if (!memcmp(from+7, "exactmap", 8)) {
373 #ifdef CONFIG_CRASH_DUMP
374 /* If we are doing a crash dump, we
375 * still need to know the real mem
376 * size before original memory map is
379 saved_max_pfn = e820_end_of_ram();
387 parse_memmapopt(from+7, &from);
393 if (!memcmp(from, "numa=", 5))
397 if (!memcmp(from,"iommu=",6)) {
401 if (fullarg(from,"oops=panic"))
404 if (!memcmp(from, "noexec=", 7))
405 nonx_setup(from + 7);
408 /* crashkernel=size@addr specifies the location to reserve for
409 * a crash kernel. By reserving this memory we guarantee
410 * that linux never set's it up as a DMA target.
411 * Useful for holding code to do something appropriate
412 * after a kernel panic.
414 else if (!memcmp(from, "crashkernel=", 12)) {
415 unsigned long size, base;
416 size = memparse(from+12, &from);
418 base = memparse(from+1, &from);
419 /* FIXME: Do I want a sanity check
420 * to validate the memory range?
422 crashk_res.start = base;
423 crashk_res.end = base + size - 1;
428 #ifdef CONFIG_PROC_VMCORE
429 /* elfcorehdr= specifies the location of elf core header
430 * stored by the crashed kernel. This option will be passed
431 * by kexec loader to the capture kernel.
433 else if(!memcmp(from, "elfcorehdr=", 11))
434 elfcorehdr_addr = memparse(from+11, &from);
437 #ifdef CONFIG_HOTPLUG_CPU
438 else if (!memcmp(from, "additional_cpus=", 16))
439 setup_additional_cpus(from+16);
446 if (COMMAND_LINE_SIZE <= ++len)
451 printk(KERN_INFO "user-defined physical RAM map:\n");
452 e820_print_map("user");
455 *cmdline_p = command_line;
460 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
462 unsigned long bootmap_size, bootmap;
464 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
465 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
467 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
468 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
469 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
470 reserve_bootmem(bootmap, bootmap_size);
474 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
476 #ifdef CONFIG_EDD_MODULE
480 * copy_edd() - Copy the BIOS EDD information
481 * from boot_params into a safe place.
484 static inline void copy_edd(void)
486 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
487 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
488 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
489 edd.edd_info_nr = EDD_NR;
492 static inline void copy_edd(void)
497 #define EBDA_ADDR_POINTER 0x40E
499 unsigned __initdata ebda_addr;
500 unsigned __initdata ebda_size;
502 static void discover_ebda(void)
505 * there is a real-mode segmented pointer pointing to the
506 * 4K EBDA area at 0x40E
508 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
511 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
513 /* Round EBDA up to pages */
517 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
518 if (ebda_size > 64*1024)
522 void __init setup_arch(char **cmdline_p)
524 unsigned long kernel_end;
526 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
527 screen_info = SCREEN_INFO;
528 edid_info = EDID_INFO;
529 saved_video_mode = SAVED_VIDEO_MODE;
530 bootloader_type = LOADER_TYPE;
532 #ifdef CONFIG_BLK_DEV_RAM
533 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
534 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
535 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
537 setup_memory_region();
540 if (!MOUNT_ROOT_RDONLY)
541 root_mountflags &= ~MS_RDONLY;
542 init_mm.start_code = (unsigned long) &_text;
543 init_mm.end_code = (unsigned long) &_etext;
544 init_mm.end_data = (unsigned long) &_edata;
545 init_mm.brk = (unsigned long) &_end;
547 code_resource.start = virt_to_phys(&_text);
548 code_resource.end = virt_to_phys(&_etext)-1;
549 data_resource.start = virt_to_phys(&_etext);
550 data_resource.end = virt_to_phys(&_edata)-1;
552 parse_cmdline_early(cmdline_p);
554 early_identify_cpu(&boot_cpu_data);
557 * partially used pages are not usable - thus
558 * we are rounding upwards:
560 end_pfn = e820_end_of_ram();
561 num_physpages = end_pfn; /* for pfn_valid */
567 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
575 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
576 * Call this early for SRAT node setup.
578 acpi_boot_table_init();
581 #ifdef CONFIG_ACPI_NUMA
583 * Parse SRAT to discover nodes.
589 numa_initmem_init(0, end_pfn);
591 contig_initmem_init(0, end_pfn);
594 /* Reserve direct mapping */
595 reserve_bootmem_generic(table_start << PAGE_SHIFT,
596 (table_end - table_start) << PAGE_SHIFT);
599 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
600 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
603 * reserve physical page 0 - it's a special BIOS page on many boxes,
604 * enabling clean reboots, SMP operation, laptop functions.
606 reserve_bootmem_generic(0, PAGE_SIZE);
608 /* reserve ebda region */
610 reserve_bootmem_generic(ebda_addr, ebda_size);
614 * But first pinch a few for the stack/trampoline stuff
615 * FIXME: Don't need the extra page at 4K, but need to fix
616 * trampoline before removing it. (see the GDT stuff)
618 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
620 /* Reserve SMP trampoline */
621 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
624 #ifdef CONFIG_ACPI_SLEEP
626 * Reserve low memory region for sleep support.
628 acpi_reserve_bootmem();
630 #ifdef CONFIG_X86_LOCAL_APIC
632 * Find and reserve possible boot-time SMP configuration:
636 #ifdef CONFIG_BLK_DEV_INITRD
637 if (LOADER_TYPE && INITRD_START) {
638 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
639 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
641 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
642 initrd_end = initrd_start+INITRD_SIZE;
645 printk(KERN_ERR "initrd extends beyond end of memory "
646 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
647 (unsigned long)(INITRD_START + INITRD_SIZE),
648 (unsigned long)(end_pfn << PAGE_SHIFT));
654 if (crashk_res.start != crashk_res.end) {
655 reserve_bootmem_generic(crashk_res.start,
656 crashk_res.end - crashk_res.start + 1);
665 * set this early, so we dont allocate cpu0
666 * if MADT list doesnt list BSP first
667 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
669 cpu_set(0, cpu_present_map);
672 * Read APIC and some other early information from ACPI tables.
679 #ifdef CONFIG_X86_LOCAL_APIC
681 * get boot-time SMP configuration:
683 if (smp_found_config)
685 init_apic_mappings();
689 * Request address space for all standard RAM and ROM resources
690 * and also for regions reported as reserved by the e820.
693 e820_reserve_resources();
695 request_resource(&iomem_resource, &video_ram_resource);
699 /* request I/O space for devices used on all i[345]86 PCs */
700 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
701 request_resource(&ioport_resource, &standard_io_resources[i]);
707 #if defined(CONFIG_VGA_CONSOLE)
708 conswitchp = &vga_con;
709 #elif defined(CONFIG_DUMMY_CONSOLE)
710 conswitchp = &dummy_con;
715 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
719 if (c->extended_cpuid_level < 0x80000004)
722 v = (unsigned int *) c->x86_model_id;
723 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
724 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
725 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
726 c->x86_model_id[48] = 0;
731 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
733 unsigned int n, dummy, eax, ebx, ecx, edx;
735 n = c->extended_cpuid_level;
737 if (n >= 0x80000005) {
738 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
739 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
740 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
741 c->x86_cache_size=(ecx>>24)+(edx>>24);
742 /* On K8 L1 TLB is inclusive, so don't count it */
746 if (n >= 0x80000006) {
747 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
748 ecx = cpuid_ecx(0x80000006);
749 c->x86_cache_size = ecx >> 16;
750 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
752 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
753 c->x86_cache_size, ecx & 0xFF);
757 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
758 if (n >= 0x80000008) {
759 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
760 c->x86_virt_bits = (eax >> 8) & 0xff;
761 c->x86_phys_bits = eax & 0xff;
766 static int nearby_node(int apicid)
769 for (i = apicid - 1; i >= 0; i--) {
770 int node = apicid_to_node[i];
771 if (node != NUMA_NO_NODE && node_online(node))
774 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
775 int node = apicid_to_node[i];
776 if (node != NUMA_NO_NODE && node_online(node))
779 return first_node(node_online_map); /* Shouldn't happen */
784 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
785 * Assumes number of cores is a power of two.
787 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
792 int cpu = smp_processor_id();
794 unsigned apicid = hard_smp_processor_id();
796 unsigned ecx = cpuid_ecx(0x80000008);
798 c->x86_max_cores = (ecx & 0xff) + 1;
800 /* CPU telling us the core id bits shift? */
801 bits = (ecx >> 12) & 0xF;
803 /* Otherwise recompute */
805 while ((1 << bits) < c->x86_max_cores)
809 /* Low order bits define the core id (index of core in socket) */
810 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
811 /* Convert the APIC ID into the socket ID */
812 c->phys_proc_id = phys_pkg_id(bits);
815 node = c->phys_proc_id;
816 if (apicid_to_node[apicid] != NUMA_NO_NODE)
817 node = apicid_to_node[apicid];
818 if (!node_online(node)) {
819 /* Two possibilities here:
820 - The CPU is missing memory and no node was created.
821 In that case try picking one from a nearby CPU
822 - The APIC IDs differ from the HyperTransport node IDs
823 which the K8 northbridge parsing fills in.
824 Assume they are all increased by a constant offset,
825 but in the same order as the HT nodeids.
826 If that doesn't result in a usable node fall back to the
827 path for the previous case. */
828 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
829 if (ht_nodeid >= 0 &&
830 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
831 node = apicid_to_node[ht_nodeid];
832 /* Pick a nearby node */
833 if (!node_online(node))
834 node = nearby_node(apicid);
836 numa_set_node(cpu, node);
838 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
843 static void __init init_amd(struct cpuinfo_x86 *c)
851 * Disable TLB flush filter by setting HWCR.FFDIS on K8
852 * bit 6 of msr C001_0015
854 * Errata 63 for SH-B3 steppings
855 * Errata 122 for all steppings (F+ have it disabled by default)
858 rdmsrl(MSR_K8_HWCR, value);
860 wrmsrl(MSR_K8_HWCR, value);
864 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
865 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
866 clear_bit(0*32+31, &c->x86_capability);
868 /* On C+ stepping K8 rep microcode works well for copy/memset */
869 level = cpuid_eax(1);
870 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
871 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
873 /* Enable workaround for FXSAVE leak */
875 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
877 level = get_model_name(c);
881 /* Should distinguish Models here, but this is only
882 a fallback anyways. */
883 strcpy(c->x86_model_id, "Hammer");
887 display_cacheinfo(c);
889 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
890 if (c->x86_power & (1<<8))
891 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
893 /* Multi core CPU? */
894 if (c->extended_cpuid_level >= 0x80000008)
897 /* Fix cpuid4 emulation for more */
898 num_cache_leaves = 3;
901 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
904 u32 eax, ebx, ecx, edx;
905 int index_msb, core_bits;
907 cpuid(1, &eax, &ebx, &ecx, &edx);
910 if (!cpu_has(c, X86_FEATURE_HT))
912 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
915 smp_num_siblings = (ebx & 0xff0000) >> 16;
917 if (smp_num_siblings == 1) {
918 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
919 } else if (smp_num_siblings > 1 ) {
921 if (smp_num_siblings > NR_CPUS) {
922 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
923 smp_num_siblings = 1;
927 index_msb = get_count_order(smp_num_siblings);
928 c->phys_proc_id = phys_pkg_id(index_msb);
930 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
932 index_msb = get_count_order(smp_num_siblings) ;
934 core_bits = get_count_order(c->x86_max_cores);
936 c->cpu_core_id = phys_pkg_id(index_msb) &
937 ((1 << core_bits) - 1);
940 if ((c->x86_max_cores * smp_num_siblings) > 1) {
941 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
942 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
949 * find out the number of processor cores on the die
951 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
955 if (c->cpuid_level < 4)
958 cpuid_count(4, 0, &eax, &t, &t, &t);
961 return ((eax >> 26) + 1);
966 static void srat_detect_node(void)
970 int cpu = smp_processor_id();
971 int apicid = hard_smp_processor_id();
973 /* Don't do the funky fallback heuristics the AMD version employs
975 node = apicid_to_node[apicid];
976 if (node == NUMA_NO_NODE)
977 node = first_node(node_online_map);
978 numa_set_node(cpu, node);
981 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
985 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
990 init_intel_cacheinfo(c);
991 n = c->extended_cpuid_level;
992 if (n >= 0x80000008) {
993 unsigned eax = cpuid_eax(0x80000008);
994 c->x86_virt_bits = (eax >> 8) & 0xff;
995 c->x86_phys_bits = eax & 0xff;
996 /* CPUID workaround for Intel 0F34 CPU */
997 if (c->x86_vendor == X86_VENDOR_INTEL &&
998 c->x86 == 0xF && c->x86_model == 0x3 &&
1000 c->x86_phys_bits = 36;
1004 c->x86_cache_alignment = c->x86_clflush_size * 2;
1005 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1006 (c->x86 == 0x6 && c->x86_model >= 0x0e))
1007 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1008 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1009 c->x86_max_cores = intel_num_cpu_cores(c);
1014 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1016 char *v = c->x86_vendor_id;
1018 if (!strcmp(v, "AuthenticAMD"))
1019 c->x86_vendor = X86_VENDOR_AMD;
1020 else if (!strcmp(v, "GenuineIntel"))
1021 c->x86_vendor = X86_VENDOR_INTEL;
1023 c->x86_vendor = X86_VENDOR_UNKNOWN;
1026 struct cpu_model_info {
1029 char *model_names[16];
1032 /* Do some early cpuid on the boot CPU to get some parameter that are
1033 needed before check_bugs. Everything advanced is in identify_cpu
1035 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1039 c->loops_per_jiffy = loops_per_jiffy;
1040 c->x86_cache_size = -1;
1041 c->x86_vendor = X86_VENDOR_UNKNOWN;
1042 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1043 c->x86_vendor_id[0] = '\0'; /* Unset */
1044 c->x86_model_id[0] = '\0'; /* Unset */
1045 c->x86_clflush_size = 64;
1046 c->x86_cache_alignment = c->x86_clflush_size;
1047 c->x86_max_cores = 1;
1048 c->extended_cpuid_level = 0;
1049 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1051 /* Get vendor name */
1052 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1053 (unsigned int *)&c->x86_vendor_id[0],
1054 (unsigned int *)&c->x86_vendor_id[8],
1055 (unsigned int *)&c->x86_vendor_id[4]);
1059 /* Initialize the standard set of capabilities */
1060 /* Note that the vendor-specific code below might override */
1062 /* Intel-defined flags: level 0x00000001 */
1063 if (c->cpuid_level >= 0x00000001) {
1065 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1066 &c->x86_capability[0]);
1067 c->x86 = (tfms >> 8) & 0xf;
1068 c->x86_model = (tfms >> 4) & 0xf;
1069 c->x86_mask = tfms & 0xf;
1071 c->x86 += (tfms >> 20) & 0xff;
1073 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1074 if (c->x86_capability[0] & (1<<19))
1075 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1077 /* Have CPUID level 0 only - unheard of */
1082 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
1087 * This does the hard work of actually picking apart the CPU stuff...
1089 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1094 early_identify_cpu(c);
1096 /* AMD-defined flags: level 0x80000001 */
1097 xlvl = cpuid_eax(0x80000000);
1098 c->extended_cpuid_level = xlvl;
1099 if ((xlvl & 0xffff0000) == 0x80000000) {
1100 if (xlvl >= 0x80000001) {
1101 c->x86_capability[1] = cpuid_edx(0x80000001);
1102 c->x86_capability[6] = cpuid_ecx(0x80000001);
1104 if (xlvl >= 0x80000004)
1105 get_model_name(c); /* Default name */
1108 /* Transmeta-defined flags: level 0x80860001 */
1109 xlvl = cpuid_eax(0x80860000);
1110 if ((xlvl & 0xffff0000) == 0x80860000) {
1111 /* Don't set x86_cpuid_level here for now to not confuse. */
1112 if (xlvl >= 0x80860001)
1113 c->x86_capability[2] = cpuid_edx(0x80860001);
1116 c->apicid = phys_pkg_id(0);
1119 * Vendor-specific initialization. In this section we
1120 * canonicalize the feature flags, meaning if there are
1121 * features a certain CPU supports which CPUID doesn't
1122 * tell us, CPUID claiming incorrect flags, or other bugs,
1123 * we handle them here.
1125 * At the end of this section, c->x86_capability better
1126 * indicate the features this CPU genuinely supports!
1128 switch (c->x86_vendor) {
1129 case X86_VENDOR_AMD:
1133 case X86_VENDOR_INTEL:
1137 case X86_VENDOR_UNKNOWN:
1139 display_cacheinfo(c);
1143 select_idle_routine(c);
1147 * On SMP, boot_cpu_data holds the common feature set between
1148 * all CPUs; so make sure that we indicate which features are
1149 * common between the CPUs. The first time this routine gets
1150 * executed, c == &boot_cpu_data.
1152 if (c != &boot_cpu_data) {
1153 /* AND the already accumulated flags with these */
1154 for (i = 0 ; i < NCAPINTS ; i++)
1155 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1158 #ifdef CONFIG_X86_MCE
1161 if (c == &boot_cpu_data)
1166 numa_add_cpu(smp_processor_id());
1171 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1173 if (c->x86_model_id[0])
1174 printk("%s", c->x86_model_id);
1176 if (c->x86_mask || c->cpuid_level >= 0)
1177 printk(" stepping %02x\n", c->x86_mask);
1183 * Get CPU information for use by the procfs.
1186 static int show_cpuinfo(struct seq_file *m, void *v)
1188 struct cpuinfo_x86 *c = v;
1191 * These flag bits must match the definitions in <asm/cpufeature.h>.
1192 * NULL means this bit is undefined or reserved; either way it doesn't
1193 * have meaning as far as Linux is concerned. Note that it's important
1194 * to realize there is a difference between this table and CPUID -- if
1195 * applications want to get the raw CPUID data, they should access
1196 * /dev/cpu/<cpu_nr>/cpuid instead.
1198 static char *x86_cap_flags[] = {
1200 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1201 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1202 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1203 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1206 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1207 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1208 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1209 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1211 /* Transmeta-defined */
1212 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1217 /* Other (Linux-defined) */
1218 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1219 "constant_tsc", NULL, NULL,
1220 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1221 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1224 /* Intel-defined (#2) */
1225 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1226 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1227 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1230 /* VIA/Cyrix/Centaur-defined */
1231 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1233 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1234 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1236 /* AMD-defined (#2) */
1237 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1238 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1239 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1240 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1242 static char *x86_power_flags[] = {
1243 "ts", /* temperature sensor */
1244 "fid", /* frequency id control */
1245 "vid", /* voltage id control */
1246 "ttp", /* thermal trip */
1250 /* nothing */ /* constant_tsc - moved to flags */
1255 if (!cpu_online(c-cpu_data))
1259 seq_printf(m,"processor\t: %u\n"
1261 "cpu family\t: %d\n"
1263 "model name\t: %s\n",
1264 (unsigned)(c-cpu_data),
1265 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1268 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1270 if (c->x86_mask || c->cpuid_level >= 0)
1271 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1273 seq_printf(m, "stepping\t: unknown\n");
1275 if (cpu_has(c,X86_FEATURE_TSC)) {
1276 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1279 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1280 freq / 1000, (freq % 1000));
1284 if (c->x86_cache_size >= 0)
1285 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1288 if (smp_num_siblings * c->x86_max_cores > 1) {
1289 int cpu = c - cpu_data;
1290 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1291 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1292 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1293 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1299 "fpu_exception\t: yes\n"
1300 "cpuid level\t: %d\n"
1307 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1308 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1309 seq_printf(m, " %s", x86_cap_flags[i]);
1312 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1313 c->loops_per_jiffy/(500000/HZ),
1314 (c->loops_per_jiffy/(5000/HZ)) % 100);
1316 if (c->x86_tlbsize > 0)
1317 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1318 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1319 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1321 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1322 c->x86_phys_bits, c->x86_virt_bits);
1324 seq_printf(m, "power management:");
1327 for (i = 0; i < 32; i++)
1328 if (c->x86_power & (1 << i)) {
1329 if (i < ARRAY_SIZE(x86_power_flags) &&
1331 seq_printf(m, "%s%s",
1332 x86_power_flags[i][0]?" ":"",
1333 x86_power_flags[i]);
1335 seq_printf(m, " [%d]", i);
1339 seq_printf(m, "\n\n");
1344 static void *c_start(struct seq_file *m, loff_t *pos)
1346 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1349 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1352 return c_start(m, pos);
1355 static void c_stop(struct seq_file *m, void *v)
1359 struct seq_operations cpuinfo_op = {
1363 .show = show_cpuinfo,
1366 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1367 #include <linux/platform_device.h>
1368 static __init int add_pcspkr(void)
1370 struct platform_device *pd;
1373 pd = platform_device_alloc("pcspkr", -1);
1377 ret = platform_device_add(pd);
1379 platform_device_put(pd);
1383 device_initcall(add_pcspkr);