2 Support for B2C2/BBTI Technisat Air2PC - ATSC
4 Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * This driver needs external firmware. Please use the command
24 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to
25 * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
27 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
28 #define CRC_CCIT_MASK 0x1021
30 #include <linux/init.h>
31 #include <linux/module.h>
32 #include <linux/moduleparam.h>
33 #include <linux/device.h>
34 #include <linux/firmware.h>
35 #include <linux/string.h>
36 #include <linux/slab.h>
38 #include "dvb_frontend.h"
41 struct nxt2002_state {
43 struct i2c_adapter* i2c;
44 struct dvb_frontend_ops ops;
45 const struct nxt2002_config* config;
46 struct dvb_frontend frontend;
48 /* demodulator private data */
53 #define dprintk(args...) \
55 if (debug) printk(KERN_DEBUG "nxt2002: " args); \
58 static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len)
60 /* probbably a much better way or doing this */
63 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
66 for (x = 0 ; x < len ; x++)
69 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
70 printk ("%s: i2c write error (addr %02x, err == %i)\n",
71 __FUNCTION__, state->config->demod_address, err);
78 static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len)
82 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
83 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
87 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
88 printk ("%s: i2c read error (addr %02x, err == %i)\n",
89 __FUNCTION__, state->config->demod_address, err);
96 static u16 nxt2002_crc(u16 crc, u8 c)
100 u16 input = (u16) c & 0xFF;
104 if((crc ^ input) & 0x8000)
105 crc=(crc<<1)^CRC_CCIT_MASK;
113 static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
116 dprintk("%s\n", __FUNCTION__);
118 /* set multi register length */
119 i2c_writebytes(state,0x34,&len,1);
121 /* set mutli register register */
122 i2c_writebytes(state,0x35,®,1);
124 /* send the actual data */
125 i2c_writebytes(state,0x36,data,len);
127 /* toggle the multireg write bit*/
129 i2c_writebytes(state,0x21,&buf,1);
131 i2c_readbytes(state,0x21,&buf,1);
133 if ((buf & 0x02) == 0)
136 dprintk("Error writing multireg register %02X\n",reg);
141 static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
144 dprintk("%s\n", __FUNCTION__);
146 /* set multi register length */
148 i2c_writebytes(state,0x34,&len2,1);
150 /* set mutli register register */
151 i2c_writebytes(state,0x35,®,1);
153 /* send the actual data */
154 i2c_readbytes(state,reg,data,len);
159 static void nxt2002_microcontroller_stop (struct nxt2002_state* state)
161 u8 buf[2],counter = 0;
162 dprintk("%s\n", __FUNCTION__);
165 i2c_writebytes(state,0x22,buf,1);
167 while (counter < 20) {
168 i2c_readbytes(state,0x31,buf,1);
175 dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n");
179 static void nxt2002_microcontroller_start (struct nxt2002_state* state)
182 dprintk("%s\n", __FUNCTION__);
185 i2c_writebytes(state,0x22,&buf,1);
188 static int nxt2002_writetuner (struct nxt2002_state* state, u8* data)
192 dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]);
194 dprintk("%s\n", __FUNCTION__);
195 /* stop the micro first */
196 nxt2002_microcontroller_stop(state);
198 /* set the i2c transfer speed to the tuner */
200 i2c_writebytes(state,0x20,&buf,1);
202 /* setup to transfer 4 bytes via i2c */
204 i2c_writebytes(state,0x34,&buf,1);
206 /* write actual tuner bytes */
207 i2c_writebytes(state,0x36,data,4);
209 /* set tuner i2c address */
211 i2c_writebytes(state,0x35,&buf,1);
213 /* write UC Opmode to begin transfer */
215 i2c_writebytes(state,0x21,&buf,1);
218 i2c_readbytes(state,0x21,&buf,1);
219 if ((buf & 0x80)== 0x00)
225 printk("nxt2002: timeout error writing tuner\n");
229 static void nxt2002_agc_reset(struct nxt2002_state* state)
232 dprintk("%s\n", __FUNCTION__);
235 i2c_writebytes(state,0x08,&buf,1);
238 i2c_writebytes(state,0x08,&buf,1);
243 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
246 struct nxt2002_state* state = fe->demodulator_priv;
247 u8 buf[256],written = 0,chunkpos = 0;
248 u16 rambase,position,crc = 0;
250 dprintk("%s\n", __FUNCTION__);
251 dprintk("Firmware is %zu bytes\n",fw->size);
253 /* Get the RAM base for this nxt2002 */
254 i2c_readbytes(state,0x10,buf,1);
261 dprintk("rambase on this nxt2002 is %04X\n",rambase);
263 /* Hold the micro in reset while loading firmware */
265 i2c_writebytes(state,0x2B,buf,1);
267 for (position = 0; position < fw->size ; position++) {
271 buf[0] = ((rambase + position) >> 8);
272 buf[1] = (rambase + position) & 0xFF;
274 /* write starting address */
275 i2c_writebytes(state,0x29,buf,3);
280 if ((written % 4) == 0)
281 i2c_writebytes(state,chunkpos,&fw->data[position-3],4);
283 crc = nxt2002_crc(crc,fw->data[position]);
285 if ((written == 255) || (position+1 == fw->size)) {
286 /* write remaining bytes of firmware */
287 i2c_writebytes(state, chunkpos+4-(written %4),
288 &fw->data[position-(written %4) + 1],
294 i2c_writebytes(state,0x2C,buf,2);
296 /* do a read to stop things */
297 i2c_readbytes(state,0x2A,buf,1);
299 /* set transfer mode to complete */
301 i2c_writebytes(state,0x2B,buf,1);
311 static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe,
312 struct dvb_frontend_parameters *p)
314 struct nxt2002_state* state = fe->demodulator_priv;
319 freq = 44000 + ( p->frequency / 1000 );
321 dprintk("freq = %d p->frequency = %d\n",freq,p->frequency);
323 tunerfreq = freq * 24/4000;
325 buf[0] = (tunerfreq >> 8) & 0x7F;
326 buf[1] = (tunerfreq & 0xFF);
328 if (p->frequency <= 214000000) {
329 buf[2] = 0x84 + (0x06 << 3);
330 buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02;
331 } else if (p->frequency <= 721000000) {
332 buf[2] = 0x84 + (0x07 << 3);
333 buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08;
334 } else if (p->frequency <= 841000000) {
335 buf[2] = 0x84 + (0x0E << 3);
338 buf[2] = 0x84 + (0x0F << 3);
342 /* write frequency information */
343 nxt2002_writetuner(state,buf);
345 /* reset the agc now that tuning has been completed */
346 nxt2002_agc_reset(state);
348 /* set target power level */
349 switch (p->u.vsb.modulation) {
361 i2c_writebytes(state,0x42,buf,1);
365 i2c_writebytes(state,0x57,buf,1);
367 /* write sdm1 input */
370 nxt2002_writereg_multibyte(state,0x58,buf,2);
372 /* write sdmx input */
373 switch (p->u.vsb.modulation) {
388 nxt2002_writereg_multibyte(state,0x5C,buf,2);
390 /* write adc power lpf fc */
392 i2c_writebytes(state,0x43,buf,1);
394 /* write adc power lpf fc */
396 i2c_writebytes(state,0x43,buf,1);
398 /* write accumulator2 input */
401 nxt2002_writereg_multibyte(state,0x4B,buf,2);
405 i2c_writebytes(state,0x4D,buf,1);
407 /* write sdm12 lpf fc */
409 i2c_writebytes(state,0x55,buf,1);
411 /* write agc control reg */
413 i2c_writebytes(state,0x41,buf,1);
415 /* write agc ucgp0 */
416 switch (p->u.vsb.modulation) {
430 i2c_writebytes(state,0x30,buf,1);
432 /* write agc control reg */
434 i2c_writebytes(state,0x41,buf,1);
436 /* write accumulator2 input */
439 nxt2002_writereg_multibyte(state,0x49,buf,2);
440 nxt2002_writereg_multibyte(state,0x4B,buf,2);
442 /* write agc control reg */
444 i2c_writebytes(state,0x41,buf,1);
446 nxt2002_microcontroller_start(state);
448 /* adjacent channel detection should be done here, but I don't
449 have any stations with this need so I cannot test it */
454 static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status)
456 struct nxt2002_state* state = fe->demodulator_priv;
458 i2c_readbytes(state,0x31,&lock,1);
462 *status |= FE_HAS_SIGNAL;
463 *status |= FE_HAS_CARRIER;
464 *status |= FE_HAS_VITERBI;
465 *status |= FE_HAS_SYNC;
466 *status |= FE_HAS_LOCK;
471 static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber)
473 struct nxt2002_state* state = fe->demodulator_priv;
476 nxt2002_readreg_multibyte(state,0xE6,b,3);
478 *ber = ((b[0] << 8) + b[1]) * 8;
483 static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength)
485 struct nxt2002_state* state = fe->demodulator_priv;
489 /* setup to read cluster variance */
491 i2c_writebytes(state,0xA1,b,1);
493 /* get multreg val */
494 nxt2002_readreg_multibyte(state,0xA6,b,2);
496 temp = (b[0] << 8) | b[1];
497 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
502 static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr)
505 struct nxt2002_state* state = fe->demodulator_priv;
510 /* setup to read cluster variance */
512 i2c_writebytes(state,0xA1,b,1);
514 /* get multreg val from 0xA6 */
515 nxt2002_readreg_multibyte(state,0xA6,b,2);
517 temp = (b[0] << 8) | b[1];
518 temp2 = 0x7FFF - temp;
520 /* snr will be in db */
522 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
523 else if (temp2 > 0x7EC0)
524 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
525 else if (temp2 > 0x7C00)
526 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
528 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
530 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
532 *snr = snrdb * (0xFFFF/32000);
537 static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
539 struct nxt2002_state* state = fe->demodulator_priv;
542 nxt2002_readreg_multibyte(state,0xE6,b,3);
548 static int nxt2002_sleep(struct dvb_frontend* fe)
553 static int nxt2002_init(struct dvb_frontend* fe)
555 struct nxt2002_state* state = fe->demodulator_priv;
556 const struct firmware *fw;
560 if (!state->initialised) {
561 /* request the firmware, this will block until someone uploads it */
562 printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
563 ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE);
564 printk("nxt2002: Waiting for firmware upload(2)...\n");
566 printk("nxt2002: no firmware upload (timeout or file not found?)\n");
570 ret = nxt2002_load_firmware(fe, fw);
572 printk("nxt2002: writing firmware to device failed\n");
573 release_firmware(fw);
576 printk("nxt2002: firmware upload complete\n");
578 /* Put the micro into reset */
579 nxt2002_microcontroller_stop(state);
581 /* ensure transfer is complete */
583 i2c_writebytes(state,0x2B,buf,1);
585 /* Put the micro into reset for real this time */
586 nxt2002_microcontroller_stop(state);
588 /* soft reset everything (agc,frontend,eq,fec)*/
590 i2c_writebytes(state,0x08,buf,1);
592 i2c_writebytes(state,0x08,buf,1);
594 /* write agc sdm configure */
596 i2c_writebytes(state,0x57,buf,1);
598 /* write mod output format */
600 i2c_writebytes(state,0x09,buf,1);
602 /* write fec mpeg mode */
605 i2c_writebytes(state,0xE9,buf,2);
607 /* write mux selection */
609 i2c_writebytes(state,0xCC,buf,1);
611 state->initialised = 1;
617 static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
619 fesettings->min_delay_ms = 500;
620 fesettings->step_size = 0;
621 fesettings->max_drift = 0;
625 static void nxt2002_release(struct dvb_frontend* fe)
627 struct nxt2002_state* state = fe->demodulator_priv;
631 static struct dvb_frontend_ops nxt2002_ops;
633 struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
634 struct i2c_adapter* i2c)
636 struct nxt2002_state* state = NULL;
637 u8 buf [] = {0,0,0,0,0};
639 /* allocate memory for the internal state */
640 state = kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL);
641 if (state == NULL) goto error;
643 /* setup the state */
644 state->config = config;
646 memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops));
647 state->initialised = 0;
649 /* Check the first 5 registers to ensure this a revision we can handle */
651 i2c_readbytes(state, 0x00, buf, 5);
652 if (buf[0] != 0x04) goto error; /* device id */
653 if (buf[1] != 0x02) goto error; /* fab id */
654 if (buf[2] != 0x11) goto error; /* month */
655 if (buf[3] != 0x20) goto error; /* year msb */
656 if (buf[4] != 0x00) goto error; /* year lsb */
658 /* create dvb_frontend */
659 state->frontend.ops = &state->ops;
660 state->frontend.demodulator_priv = state;
661 return &state->frontend;
668 static struct dvb_frontend_ops nxt2002_ops = {
671 .name = "Nextwave nxt2002 VSB/QAM frontend",
673 .frequency_min = 54000000,
674 .frequency_max = 860000000,
675 /* stepsize is just a guess */
676 .frequency_stepsize = 166666,
677 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
678 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
679 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
682 .release = nxt2002_release,
684 .init = nxt2002_init,
685 .sleep = nxt2002_sleep,
687 .set_frontend = nxt2002_setup_frontend_parameters,
688 .get_tune_settings = nxt2002_get_tune_settings,
690 .read_status = nxt2002_read_status,
691 .read_ber = nxt2002_read_ber,
692 .read_signal_strength = nxt2002_read_signal_strength,
693 .read_snr = nxt2002_read_snr,
694 .read_ucblocks = nxt2002_read_ucblocks,
698 module_param(debug, int, 0644);
699 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
701 MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
702 MODULE_AUTHOR("Taylor Jacob");
703 MODULE_LICENSE("GPL");
705 EXPORT_SYMBOL(nxt2002_attach);