2 * MPC85xx ADS board definitions
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
6 * Copyright 2004 Freescale Semiconductor Inc.
8 * 2006 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
18 #ifndef __MACH_MPC85XXADS_H
19 #define __MACH_MPC85XXADS_H
21 #include <linux/config.h>
22 #include <linux/initrd.h>
23 #include <sysdev/fsl_soc.h>
25 #define BCSR_ADDR ((uint)0xf8000000)
26 #define BCSR_SIZE ((uint)(32 * 1024))
30 #define MPC85xx_CPM_OFFSET (0x80000)
32 #define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET)
33 #define CPM_IRQ_OFFSET 60
35 #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
36 #define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET)
37 #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
38 #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
39 #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
40 #define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
42 /* FCC1 Clock Source Configuration. These can be
43 * redefined in the board specific file.
44 * Can only choose from CLK9-12 */
48 /* FCC2 Clock Source Configuration. These can be
49 * redefined in the board specific file.
50 * Can only choose from CLK13-16 */
54 /* FCC3 Clock Source Configuration. These can be
55 * redefined in the board specific file.
56 * Can only choose from CLK13-16 */
60 #endif /* CONFIG_CPM2 */
61 #endif /* __MACH_MPC85XXADS_H */