2 * ALSA driver for RME Digi9652 audio interfaces
4 * Copyright (c) 1999 IEM - Winfried Ritsch
5 * Copyright (c) 1999-2001 Paul Davis
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/slab.h>
28 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/control.h>
32 #include <sound/pcm.h>
33 #include <sound/info.h>
34 #include <sound/asoundef.h>
35 #include <sound/initval.h>
37 #include <asm/current.h>
40 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
41 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
42 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
43 static int precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
45 module_param_array(index, int, NULL, 0444);
46 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
47 module_param_array(id, charp, NULL, 0444);
48 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
49 module_param_array(enable, bool, NULL, 0444);
50 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
51 module_param_array(precise_ptr, bool, NULL, 0444);
52 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
53 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
54 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
55 MODULE_LICENSE("GPL");
56 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
57 "{RME,Hammerfall-Light}}");
59 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
60 capture, one for playback. Both the ADAT and S/PDIF channels appear
61 to the host CPU in the same block of memory. There is no functional
62 difference between them in terms of access.
64 The Hammerfall Light is identical to the Hammerfall, except that it
65 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
68 #define RME9652_NCHANNELS 26
69 #define RME9636_NCHANNELS 18
71 /* Preferred sync source choices - used by "sync_pref" control switch */
73 #define RME9652_SYNC_FROM_SPDIF 0
74 #define RME9652_SYNC_FROM_ADAT1 1
75 #define RME9652_SYNC_FROM_ADAT2 2
76 #define RME9652_SYNC_FROM_ADAT3 3
78 /* Possible sources of S/PDIF input */
80 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
81 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
82 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
84 /* ------------- Status-Register bits --------------------- */
86 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
87 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
88 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
89 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
90 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
91 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
92 /* bits 6-15 encode h/w buffer pointer position */
93 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
94 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
95 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
96 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
97 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
98 #define RME9652_tc_out (1<<21) /* time-code out bit */
99 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
100 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
101 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
102 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
103 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
104 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
105 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
107 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
108 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
109 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
110 #define rme9652_decode_spdif_rate(x) ((x)>>22)
112 /* Bit 6..15 : h/w buffer pointer */
114 #define RME9652_buf_pos 0x000FFC0
116 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
117 Rev G EEPROMS and Rev 1.5 cards or later.
120 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
122 /* amount of io space we remap for register access. i'm not sure we
123 even need this much, but 1K is nice round number :)
126 #define RME9652_IO_EXTENT 1024
128 #define RME9652_init_buffer 0
129 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
130 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
131 #define RME9652_control_register 64
132 #define RME9652_irq_clear 96
133 #define RME9652_time_code 100 /* useful if used with alesis adat */
134 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
136 /* Read-only registers */
138 /* Writing to any of the register locations writes to the status
139 register. We'll use the first location as our point of access.
142 #define RME9652_status_register 0
144 /* --------- Control-Register Bits ---------------- */
147 #define RME9652_start_bit (1<<0) /* start record/play */
148 /* bits 1-3 encode buffersize/latency */
149 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
150 #define RME9652_IE (1<<5) /* Interrupt Enable */
151 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
152 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
153 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
154 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
155 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
156 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
157 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
158 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
159 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
160 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
161 #define RME9652_SyncPref_ADAT2 (1<<16)
162 #define RME9652_SyncPref_ADAT3 (1<<17)
163 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
164 #define RME9652_SPDIF_SELECT (1<<19)
165 #define RME9652_SPDIF_CLOCK (1<<20)
166 #define RME9652_SPDIF_WRITE (1<<21)
167 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
169 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
171 #define RME9652_latency 0x0e
172 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
173 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
174 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
175 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
176 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
177 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
179 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
180 #define RME9652_SyncPref_ADAT1 0
181 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
183 /* the size of a substream (1 mono data stream) */
185 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
186 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
188 /* the size of the area we need to allocate for DMA transfers. the
189 size is the same regardless of the number of channels - the
190 9636 still uses the same memory area.
192 Note that we allocate 1 more channel than is apparently needed
193 because the h/w seems to write 1 byte beyond the end of the last
197 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
198 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
206 void __iomem *iobase;
210 u32 control_register; /* cached value */
211 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
214 u32 creg_spdif_stream;
216 char *card_name; /* hammerfall or hammerfall light names */
218 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
219 size_t prev_hw_offset; /* previous hw offset */
220 size_t max_jitter; /* maximum jitter in frames for
222 size_t period_bytes; /* guess what this is */
224 unsigned char ds_channels;
225 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
227 struct snd_dma_buffer playback_dma_buf;
228 struct snd_dma_buffer capture_dma_buf;
230 unsigned char *capture_buffer; /* suitably aligned address */
231 unsigned char *playback_buffer; /* suitably aligned address */
236 struct snd_pcm_substream *capture_substream;
237 struct snd_pcm_substream *playback_substream;
240 int passthru; /* non-zero if doing pass-thru */
241 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
243 int last_spdif_sample_rate; /* so that we can catch externally ... */
244 int last_adat_sample_rate; /* ... induced rate changes */
248 struct snd_card *card;
251 struct snd_kcontrol *spdif_ctl;
255 /* These tables map the ALSA channels 1..N to the channels that we
256 need to use in order to find the relevant channel buffer. RME
257 refer to this kind of mapping as between "the ADAT channel and
258 the DMA channel." We index it using the logical audio channel,
259 and the value is the DMA channel (i.e. channel buffer number)
260 where the data for that channel can be read/written from/to.
263 static char channel_map_9652_ss[26] = {
264 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
265 18, 19, 20, 21, 22, 23, 24, 25
268 static char channel_map_9636_ss[26] = {
269 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
270 /* channels 16 and 17 are S/PDIF */
272 /* channels 18-25 don't exist */
273 -1, -1, -1, -1, -1, -1, -1, -1
276 static char channel_map_9652_ds[26] = {
277 /* ADAT channels are remapped */
278 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
279 /* channels 12 and 13 are S/PDIF */
281 /* others don't exist */
282 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
285 static char channel_map_9636_ds[26] = {
286 /* ADAT channels are remapped */
287 1, 3, 5, 7, 9, 11, 13, 15,
288 /* channels 8 and 9 are S/PDIF */
290 /* others don't exist */
291 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
294 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
296 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
297 dmab->dev.dev = snd_dma_pci_data(pci);
298 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
299 if (dmab->bytes >= size)
302 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
308 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
311 dmab->dev.dev = NULL; /* make it anonymous */
312 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
317 static struct pci_device_id snd_rme9652_ids[] = {
321 .subvendor = PCI_ANY_ID,
322 .subdevice = PCI_ANY_ID,
323 }, /* RME Digi9652 */
327 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
329 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
331 writel(val, rme9652->iobase + reg);
334 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
336 return readl(rme9652->iobase + reg);
339 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
344 spin_lock_irqsave(&rme9652->lock, flags);
345 if ((rme9652->playback_pid != rme9652->capture_pid) &&
346 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
349 spin_unlock_irqrestore(&rme9652->lock, flags);
353 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
355 if (rme9652_running_double_speed(rme9652)) {
356 return (rme9652_read(rme9652, RME9652_status_register) &
357 RME9652_fs48) ? 96000 : 88200;
359 return (rme9652_read(rme9652, RME9652_status_register) &
360 RME9652_fs48) ? 48000 : 44100;
364 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
368 i = rme9652->control_register & RME9652_latency;
369 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
370 rme9652->hw_offsetmask =
371 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
372 rme9652->max_jitter = 80;
375 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
378 unsigned int offset, frag;
379 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
380 snd_pcm_sframes_t delta;
382 status = rme9652_read(rme9652, RME9652_status_register);
383 if (!rme9652->precise_ptr)
384 return (status & RME9652_buffer_id) ? period_size : 0;
385 offset = status & RME9652_buf_pos;
387 /* The hardware may give a backward movement for up to 80 frames
388 Martin Kirst <martin.kirst@freenet.de> knows the details.
391 delta = rme9652->prev_hw_offset - offset;
393 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
394 offset = rme9652->prev_hw_offset;
396 rme9652->prev_hw_offset = offset;
397 offset &= rme9652->hw_offsetmask;
399 frag = status & RME9652_buffer_id;
401 if (offset < period_size) {
402 if (offset > rme9652->max_jitter) {
404 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
407 offset -= rme9652->max_jitter;
409 offset += period_size * 2;
411 if (offset > period_size + rme9652->max_jitter) {
413 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
416 offset -= rme9652->max_jitter;
422 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
426 /* reset the FIFO pointer to zero. We do this by writing to 8
427 registers, each of which is a 32bit wide register, and set
428 them all to zero. Note that s->iobase is a pointer to
429 int32, not pointer to char.
432 for (i = 0; i < 8; i++) {
433 rme9652_write(rme9652, i * 4, 0);
436 rme9652->prev_hw_offset = 0;
439 static inline void rme9652_start(struct snd_rme9652 *s)
441 s->control_register |= (RME9652_IE | RME9652_start_bit);
442 rme9652_write(s, RME9652_control_register, s->control_register);
445 static inline void rme9652_stop(struct snd_rme9652 *s)
447 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
448 rme9652_write(s, RME9652_control_register, s->control_register);
451 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
457 spin_lock_irq(&s->lock);
459 if ((restart = s->running)) {
470 s->control_register &= ~RME9652_latency;
471 s->control_register |= rme9652_encode_latency(n);
473 rme9652_write(s, RME9652_control_register, s->control_register);
475 rme9652_compute_period_size(s);
480 spin_unlock_irq(&s->lock);
485 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
488 int reject_if_open = 0;
491 if (!snd_rme9652_use_is_exclusive (rme9652)) {
495 /* Changing from a "single speed" to a "double speed" rate is
496 not allowed if any substreams are open. This is because
497 such a change causes a shift in the location of
498 the DMA buffers and a reduction in the number of available
501 Note that a similar but essentially insoluble problem
502 exists for externally-driven rate changes. All we can do
503 is to flag rate changes in the read/write routines.
506 spin_lock_irq(&rme9652->lock);
507 xrate = rme9652_adat_sample_rate(rme9652);
532 rate = RME9652_DS | RME9652_freq;
535 spin_unlock_irq(&rme9652->lock);
539 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
540 spin_unlock_irq(&rme9652->lock);
544 if ((restart = rme9652->running)) {
545 rme9652_stop(rme9652);
547 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
548 rme9652->control_register |= rate;
549 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
552 rme9652_start(rme9652);
555 if (rate & RME9652_DS) {
556 if (rme9652->ss_channels == RME9652_NCHANNELS) {
557 rme9652->channel_map = channel_map_9652_ds;
559 rme9652->channel_map = channel_map_9636_ds;
562 if (rme9652->ss_channels == RME9652_NCHANNELS) {
563 rme9652->channel_map = channel_map_9652_ss;
565 rme9652->channel_map = channel_map_9636_ss;
569 spin_unlock_irq(&rme9652->lock);
573 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
577 rme9652->passthru = 0;
581 /* set thru for all channels */
584 for (i = 0; i < RME9652_NCHANNELS; i++) {
585 rme9652->thru_bits |= (1 << i);
586 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
589 for (i = 0; i < RME9652_NCHANNELS; i++) {
590 rme9652->thru_bits &= ~(1 << i);
591 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
598 snd_assert(channel == RME9652_NCHANNELS, return);
600 mapped_channel = rme9652->channel_map[channel];
603 rme9652->thru_bits |= (1 << mapped_channel);
605 rme9652->thru_bits &= ~(1 << mapped_channel);
608 rme9652_write(rme9652,
609 RME9652_thru_base + mapped_channel * 4,
614 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
617 rme9652_set_thru(rme9652, -1, 1);
619 /* we don't want interrupts, so do a
620 custom version of rme9652_start().
623 rme9652->control_register =
625 rme9652_encode_latency(7) |
628 rme9652_reset_hw_pointer(rme9652);
630 rme9652_write(rme9652, RME9652_control_register,
631 rme9652->control_register);
632 rme9652->passthru = 1;
634 rme9652_set_thru(rme9652, -1, 0);
635 rme9652_stop(rme9652);
636 rme9652->passthru = 0;
642 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
645 rme9652->control_register |= mask;
647 rme9652->control_register &= ~mask;
649 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
652 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
657 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
659 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
661 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
663 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
664 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
668 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
676 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
678 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
680 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
686 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
688 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
689 rme9652_spdif_write_byte (rme9652, 0x20);
690 rme9652_spdif_write_byte (rme9652, address);
691 rme9652_spdif_write_byte (rme9652, data);
692 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
696 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
700 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
701 rme9652_spdif_write_byte (rme9652, 0x20);
702 rme9652_spdif_write_byte (rme9652, address);
703 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
704 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
706 rme9652_spdif_write_byte (rme9652, 0x21);
707 ret = rme9652_spdif_read_byte (rme9652);
708 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
713 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
715 /* XXX what unsets this ? */
717 rme9652->control_register |= RME9652_SPDIF_RESET;
719 rme9652_write_spdif_codec (rme9652, 4, 0x40);
720 rme9652_write_spdif_codec (rme9652, 17, 0x13);
721 rme9652_write_spdif_codec (rme9652, 6, 0x02);
724 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
726 unsigned int rate_bits;
728 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
729 return -1; /* error condition */
732 if (s->hw_rev == 15) {
736 x = rme9652_spdif_read_codec (s, 30);
743 if (y > 30400 && y < 33600) ret = 32000;
744 else if (y > 41900 && y < 46000) ret = 44100;
745 else if (y > 46000 && y < 50400) ret = 48000;
746 else if (y > 60800 && y < 67200) ret = 64000;
747 else if (y > 83700 && y < 92000) ret = 88200;
748 else if (y > 92000 && y < 100000) ret = 96000;
753 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
755 switch (rme9652_decode_spdif_rate(rate_bits)) {
781 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
782 s->card_name, rate_bits);
788 /*-----------------------------------------------------------------------------
790 ----------------------------------------------------------------------------*/
792 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
795 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
796 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
797 if (val & RME9652_PRO)
798 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
800 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
804 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
806 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
807 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
808 if (val & RME9652_PRO)
809 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
811 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
814 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
816 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
821 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
823 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
825 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
829 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
831 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
835 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
836 spin_lock_irq(&rme9652->lock);
837 change = val != rme9652->creg_spdif;
838 rme9652->creg_spdif = val;
839 spin_unlock_irq(&rme9652->lock);
843 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
845 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
850 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
852 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
854 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
858 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
860 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
864 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
865 spin_lock_irq(&rme9652->lock);
866 change = val != rme9652->creg_spdif_stream;
867 rme9652->creg_spdif_stream = val;
868 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
869 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
870 spin_unlock_irq(&rme9652->lock);
874 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
876 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
881 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
883 ucontrol->value.iec958.status[0] = kcontrol->private_value;
887 #define RME9652_ADAT1_IN(xname, xindex) \
888 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
889 .info = snd_rme9652_info_adat1_in, \
890 .get = snd_rme9652_get_adat1_in, \
891 .put = snd_rme9652_put_adat1_in }
893 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
895 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
900 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
905 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
907 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
910 /* XXX do we actually need to stop the card when we do this ? */
912 if ((restart = rme9652->running)) {
913 rme9652_stop(rme9652);
916 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
919 rme9652_start(rme9652);
925 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
927 static char *texts[2] = {"ADAT1", "Internal"};
929 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
931 uinfo->value.enumerated.items = 2;
932 if (uinfo->value.enumerated.item > 1)
933 uinfo->value.enumerated.item = 1;
934 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
938 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
940 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
942 spin_lock_irq(&rme9652->lock);
943 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
944 spin_unlock_irq(&rme9652->lock);
948 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
950 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
954 if (!snd_rme9652_use_is_exclusive(rme9652))
956 val = ucontrol->value.enumerated.item[0] % 2;
957 spin_lock_irq(&rme9652->lock);
958 change = val != rme9652_adat1_in(rme9652);
960 rme9652_set_adat1_input(rme9652, val);
961 spin_unlock_irq(&rme9652->lock);
965 #define RME9652_SPDIF_IN(xname, xindex) \
966 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
967 .info = snd_rme9652_info_spdif_in, \
968 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
970 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
972 return rme9652_decode_spdif_in(rme9652->control_register &
976 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
980 rme9652->control_register &= ~RME9652_inp;
981 rme9652->control_register |= rme9652_encode_spdif_in(in);
983 if ((restart = rme9652->running)) {
984 rme9652_stop(rme9652);
987 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
990 rme9652_start(rme9652);
996 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
998 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1000 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1002 uinfo->value.enumerated.items = 3;
1003 if (uinfo->value.enumerated.item > 2)
1004 uinfo->value.enumerated.item = 2;
1005 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1009 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1011 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1013 spin_lock_irq(&rme9652->lock);
1014 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1015 spin_unlock_irq(&rme9652->lock);
1019 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1021 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1025 if (!snd_rme9652_use_is_exclusive(rme9652))
1027 val = ucontrol->value.enumerated.item[0] % 3;
1028 spin_lock_irq(&rme9652->lock);
1029 change = val != rme9652_spdif_in(rme9652);
1031 rme9652_set_spdif_input(rme9652, val);
1032 spin_unlock_irq(&rme9652->lock);
1036 #define RME9652_SPDIF_OUT(xname, xindex) \
1037 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1038 .info = snd_rme9652_info_spdif_out, \
1039 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1041 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1043 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1046 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1051 rme9652->control_register |= RME9652_opt_out;
1053 rme9652->control_register &= ~RME9652_opt_out;
1056 if ((restart = rme9652->running)) {
1057 rme9652_stop(rme9652);
1060 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1063 rme9652_start(rme9652);
1069 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1071 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1073 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1075 spin_lock_irq(&rme9652->lock);
1076 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1077 spin_unlock_irq(&rme9652->lock);
1081 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1083 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1087 if (!snd_rme9652_use_is_exclusive(rme9652))
1089 val = ucontrol->value.integer.value[0] & 1;
1090 spin_lock_irq(&rme9652->lock);
1091 change = (int)val != rme9652_spdif_out(rme9652);
1092 rme9652_set_spdif_output(rme9652, val);
1093 spin_unlock_irq(&rme9652->lock);
1097 #define RME9652_SYNC_MODE(xname, xindex) \
1098 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1099 .info = snd_rme9652_info_sync_mode, \
1100 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1102 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1104 if (rme9652->control_register & RME9652_wsel) {
1106 } else if (rme9652->control_register & RME9652_Master) {
1113 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1119 rme9652->control_register &=
1120 ~(RME9652_Master | RME9652_wsel);
1123 rme9652->control_register =
1124 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1127 rme9652->control_register |=
1128 (RME9652_Master | RME9652_wsel);
1132 if ((restart = rme9652->running)) {
1133 rme9652_stop(rme9652);
1136 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1139 rme9652_start(rme9652);
1145 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1147 static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1149 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1151 uinfo->value.enumerated.items = 3;
1152 if (uinfo->value.enumerated.item > 2)
1153 uinfo->value.enumerated.item = 2;
1154 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1158 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1160 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1162 spin_lock_irq(&rme9652->lock);
1163 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1164 spin_unlock_irq(&rme9652->lock);
1168 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1170 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1174 val = ucontrol->value.enumerated.item[0] % 3;
1175 spin_lock_irq(&rme9652->lock);
1176 change = (int)val != rme9652_sync_mode(rme9652);
1177 rme9652_set_sync_mode(rme9652, val);
1178 spin_unlock_irq(&rme9652->lock);
1182 #define RME9652_SYNC_PREF(xname, xindex) \
1183 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1184 .info = snd_rme9652_info_sync_pref, \
1185 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1187 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1189 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1190 case RME9652_SyncPref_ADAT1:
1191 return RME9652_SYNC_FROM_ADAT1;
1192 case RME9652_SyncPref_ADAT2:
1193 return RME9652_SYNC_FROM_ADAT2;
1194 case RME9652_SyncPref_ADAT3:
1195 return RME9652_SYNC_FROM_ADAT3;
1196 case RME9652_SyncPref_SPDIF:
1197 return RME9652_SYNC_FROM_SPDIF;
1203 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1207 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1209 case RME9652_SYNC_FROM_ADAT1:
1210 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1212 case RME9652_SYNC_FROM_ADAT2:
1213 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1215 case RME9652_SYNC_FROM_ADAT3:
1216 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1218 case RME9652_SYNC_FROM_SPDIF:
1219 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1223 if ((restart = rme9652->running)) {
1224 rme9652_stop(rme9652);
1227 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1230 rme9652_start(rme9652);
1236 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1238 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1239 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1241 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1243 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1244 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1245 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1246 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1250 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1252 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1254 spin_lock_irq(&rme9652->lock);
1255 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1256 spin_unlock_irq(&rme9652->lock);
1260 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1262 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1266 if (!snd_rme9652_use_is_exclusive(rme9652))
1268 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1269 val = ucontrol->value.enumerated.item[0] % max;
1270 spin_lock_irq(&rme9652->lock);
1271 change = (int)val != rme9652_sync_pref(rme9652);
1272 rme9652_set_sync_pref(rme9652, val);
1273 spin_unlock_irq(&rme9652->lock);
1277 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1279 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1280 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1281 uinfo->count = rme9652->ss_channels;
1282 uinfo->value.integer.min = 0;
1283 uinfo->value.integer.max = 1;
1287 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1289 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1291 u32 thru_bits = rme9652->thru_bits;
1293 for (k = 0; k < rme9652->ss_channels; ++k) {
1294 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1299 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1301 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1306 if (!snd_rme9652_use_is_exclusive(rme9652))
1309 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1310 if (ucontrol->value.integer.value[chn])
1311 thru_bits |= 1 << chn;
1314 spin_lock_irq(&rme9652->lock);
1315 change = thru_bits ^ rme9652->thru_bits;
1317 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1318 if (!(change & (1 << chn)))
1320 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1323 spin_unlock_irq(&rme9652->lock);
1327 #define RME9652_PASSTHRU(xname, xindex) \
1328 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1329 .info = snd_rme9652_info_passthru, \
1330 .put = snd_rme9652_put_passthru, \
1331 .get = snd_rme9652_get_passthru }
1333 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1335 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1337 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1339 spin_lock_irq(&rme9652->lock);
1340 ucontrol->value.integer.value[0] = rme9652->passthru;
1341 spin_unlock_irq(&rme9652->lock);
1345 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1347 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1352 if (!snd_rme9652_use_is_exclusive(rme9652))
1355 val = ucontrol->value.integer.value[0] & 1;
1356 spin_lock_irq(&rme9652->lock);
1357 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1359 err = rme9652_set_passthru(rme9652, val);
1360 spin_unlock_irq(&rme9652->lock);
1361 return err ? err : change;
1364 /* Read-only switches */
1366 #define RME9652_SPDIF_RATE(xname, xindex) \
1367 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1368 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1369 .info = snd_rme9652_info_spdif_rate, \
1370 .get = snd_rme9652_get_spdif_rate }
1372 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1374 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1376 uinfo->value.integer.min = 0;
1377 uinfo->value.integer.max = 96000;
1381 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1383 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1385 spin_lock_irq(&rme9652->lock);
1386 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1387 spin_unlock_irq(&rme9652->lock);
1391 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1392 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1393 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1394 .info = snd_rme9652_info_adat_sync, \
1395 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1397 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1399 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1401 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1403 uinfo->value.enumerated.items = 4;
1404 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1405 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1406 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1410 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1412 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1413 unsigned int mask1, mask2, val;
1415 switch (kcontrol->private_value) {
1416 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1417 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1418 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1419 default: return -EINVAL;
1421 val = rme9652_read(rme9652, RME9652_status_register);
1422 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1423 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1427 #define RME9652_TC_VALID(xname, xindex) \
1428 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1429 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1430 .info = snd_rme9652_info_tc_valid, \
1431 .get = snd_rme9652_get_tc_valid }
1433 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1435 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1437 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1439 ucontrol->value.integer.value[0] =
1440 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1444 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1446 /* FIXME: this routine needs a port to the new control API --jk */
1448 static int snd_rme9652_get_tc_value(void *private_data,
1449 snd_kswitch_t *kswitch,
1450 snd_switch_t *uswitch)
1452 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1456 uswitch->type = SNDRV_SW_TYPE_DWORD;
1458 if ((rme9652_read(s, RME9652_status_register) &
1459 RME9652_tc_valid) == 0) {
1460 uswitch->value.data32[0] = 0;
1464 /* timecode request */
1466 rme9652_write(s, RME9652_time_code, 0);
1468 /* XXX bug alert: loop-based timing !!!! */
1470 for (i = 0; i < 50; i++) {
1471 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1475 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1481 for (i = 0; i < 32; i++) {
1484 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1485 value |= 0x80000000;
1488 if (value > 2 * 60 * 48000) {
1489 value -= 2 * 60 * 48000;
1494 uswitch->value.data32[0] = value;
1499 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1501 static struct snd_kcontrol_new snd_rme9652_controls[] = {
1503 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1504 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1505 .info = snd_rme9652_control_spdif_info,
1506 .get = snd_rme9652_control_spdif_get,
1507 .put = snd_rme9652_control_spdif_put,
1510 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1511 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1512 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1513 .info = snd_rme9652_control_spdif_stream_info,
1514 .get = snd_rme9652_control_spdif_stream_get,
1515 .put = snd_rme9652_control_spdif_stream_put,
1518 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1519 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1520 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1521 .info = snd_rme9652_control_spdif_mask_info,
1522 .get = snd_rme9652_control_spdif_mask_get,
1523 .private_value = IEC958_AES0_NONAUDIO |
1524 IEC958_AES0_PROFESSIONAL |
1525 IEC958_AES0_CON_EMPHASIS,
1528 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1529 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1530 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1531 .info = snd_rme9652_control_spdif_mask_info,
1532 .get = snd_rme9652_control_spdif_mask_get,
1533 .private_value = IEC958_AES0_NONAUDIO |
1534 IEC958_AES0_PROFESSIONAL |
1535 IEC958_AES0_PRO_EMPHASIS,
1537 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1538 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1539 RME9652_SYNC_MODE("Sync Mode", 0),
1540 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1542 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1543 .name = "Channels Thru",
1545 .info = snd_rme9652_info_thru,
1546 .get = snd_rme9652_get_thru,
1547 .put = snd_rme9652_put_thru,
1549 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1550 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1551 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1552 RME9652_TC_VALID("Timecode Valid", 0),
1553 RME9652_PASSTHRU("Passthru", 0)
1556 static struct snd_kcontrol_new snd_rme9652_adat3_check =
1557 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1559 static struct snd_kcontrol_new snd_rme9652_adat1_input =
1560 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1562 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1566 struct snd_kcontrol *kctl;
1568 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1569 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1571 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1572 rme9652->spdif_ctl = kctl;
1575 if (rme9652->ss_channels == RME9652_NCHANNELS)
1576 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1579 if (rme9652->hw_rev >= 15)
1580 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1586 /*------------------------------------------------------------
1588 ------------------------------------------------------------*/
1591 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1593 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1594 u32 thru_bits = rme9652->thru_bits;
1595 int show_auto_sync_source = 0;
1597 unsigned int status;
1600 status = rme9652_read(rme9652, RME9652_status_register);
1602 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1603 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1604 rme9652->capture_buffer, rme9652->playback_buffer);
1605 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1606 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1607 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1609 snd_iprintf(buffer, "\n");
1611 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1614 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1615 x, (unsigned long) rme9652->period_bytes);
1616 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1617 rme9652_hw_pointer(rme9652));
1618 snd_iprintf(buffer, "Passthru: %s\n",
1619 rme9652->passthru ? "yes" : "no");
1621 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1622 snd_iprintf(buffer, "Clock mode: autosync\n");
1623 show_auto_sync_source = 1;
1624 } else if (rme9652->control_register & RME9652_wsel) {
1625 if (status & RME9652_wsel_rd) {
1626 snd_iprintf(buffer, "Clock mode: word clock\n");
1628 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1631 snd_iprintf(buffer, "Clock mode: master\n");
1634 if (show_auto_sync_source) {
1635 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1636 case RME9652_SyncPref_ADAT1:
1637 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1639 case RME9652_SyncPref_ADAT2:
1640 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1642 case RME9652_SyncPref_ADAT3:
1643 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1645 case RME9652_SyncPref_SPDIF:
1646 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1649 snd_iprintf(buffer, "Pref. sync source: ???\n");
1653 if (rme9652->hw_rev >= 15)
1654 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1655 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1656 "Internal" : "ADAT1 optical");
1658 snd_iprintf(buffer, "\n");
1660 switch (rme9652_decode_spdif_in(rme9652->control_register &
1662 case RME9652_SPDIFIN_OPTICAL:
1663 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1665 case RME9652_SPDIFIN_COAXIAL:
1666 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1668 case RME9652_SPDIFIN_INTERN:
1669 snd_iprintf(buffer, "IEC958 input: Internal\n");
1672 snd_iprintf(buffer, "IEC958 input: ???\n");
1676 if (rme9652->control_register & RME9652_opt_out) {
1677 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1679 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1682 if (rme9652->control_register & RME9652_PRO) {
1683 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1685 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1688 if (rme9652->control_register & RME9652_EMP) {
1689 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1691 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1694 if (rme9652->control_register & RME9652_Dolby) {
1695 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1697 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1700 i = rme9652_spdif_sample_rate(rme9652);
1704 "IEC958 sample rate: error flag set\n");
1705 } else if (i == 0) {
1706 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1708 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1711 snd_iprintf(buffer, "\n");
1713 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1714 rme9652_adat_sample_rate(rme9652));
1718 x = status & RME9652_sync_0;
1719 if (status & RME9652_lock_0) {
1720 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1722 snd_iprintf(buffer, "ADAT1: No Lock\n");
1725 x = status & RME9652_sync_1;
1726 if (status & RME9652_lock_1) {
1727 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1729 snd_iprintf(buffer, "ADAT2: No Lock\n");
1732 x = status & RME9652_sync_2;
1733 if (status & RME9652_lock_2) {
1734 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1736 snd_iprintf(buffer, "ADAT3: No Lock\n");
1739 snd_iprintf(buffer, "\n");
1741 snd_iprintf(buffer, "Timecode signal: %s\n",
1742 (status & RME9652_tc_valid) ? "yes" : "no");
1746 snd_iprintf(buffer, "Punch Status:\n\n");
1748 for (i = 0; i < rme9652->ss_channels; i++) {
1749 if (thru_bits & (1 << i)) {
1750 snd_iprintf(buffer, "%2d: on ", i + 1);
1752 snd_iprintf(buffer, "%2d: off ", i + 1);
1755 if (((i + 1) % 8) == 0) {
1756 snd_iprintf(buffer, "\n");
1760 snd_iprintf(buffer, "\n");
1763 static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1765 struct snd_info_entry *entry;
1767 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1768 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1771 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1773 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1774 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1777 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1779 if (rme9652->irq >= 0)
1780 rme9652_stop(rme9652);
1781 snd_rme9652_free_buffers(rme9652);
1783 if (rme9652->irq >= 0)
1784 free_irq(rme9652->irq, (void *)rme9652);
1785 if (rme9652->iobase)
1786 iounmap(rme9652->iobase);
1788 pci_release_regions(rme9652->pci);
1790 pci_disable_device(rme9652->pci);
1794 static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1796 unsigned long pb_bus, cb_bus;
1798 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1799 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1800 if (rme9652->capture_dma_buf.area)
1801 snd_dma_free_pages(&rme9652->capture_dma_buf);
1802 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1806 /* Align to bus-space 64K boundary */
1808 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1809 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1811 /* Tell the card where it is */
1813 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1814 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1816 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1817 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1822 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1826 /* ASSUMPTION: rme9652->lock is either held, or
1827 there is no need to hold it (e.g. during module
1833 SPDIF Input via Coax
1835 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1836 which implies 2 4096 sample, 32Kbyte periods).
1838 if rev 1.5, initialize the S/PDIF receiver.
1842 rme9652->control_register =
1843 RME9652_inp_0 | rme9652_encode_latency(7);
1845 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1847 rme9652_reset_hw_pointer(rme9652);
1848 rme9652_compute_period_size(rme9652);
1850 /* default: thru off for all channels */
1852 for (k = 0; k < RME9652_NCHANNELS; ++k)
1853 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1855 rme9652->thru_bits = 0;
1856 rme9652->passthru = 0;
1858 /* set a default rate so that the channel map is set up */
1860 rme9652_set_rate(rme9652, 48000);
1863 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1865 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1867 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1871 rme9652_write(rme9652, RME9652_irq_clear, 0);
1873 if (rme9652->capture_substream) {
1874 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1877 if (rme9652->playback_substream) {
1878 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1883 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1885 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1886 return rme9652_hw_pointer(rme9652);
1889 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1896 snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1898 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1902 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1903 return rme9652->capture_buffer +
1904 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1906 return rme9652->playback_buffer +
1907 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1911 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel,
1912 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1914 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1917 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1919 channel_buf = rme9652_channel_buffer_location (rme9652,
1920 substream->pstr->stream,
1922 snd_assert(channel_buf != NULL, return -EIO);
1923 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1928 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel,
1929 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1931 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1934 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1936 channel_buf = rme9652_channel_buffer_location (rme9652,
1937 substream->pstr->stream,
1939 snd_assert(channel_buf != NULL, return -EIO);
1940 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1945 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel,
1946 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1948 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1951 channel_buf = rme9652_channel_buffer_location (rme9652,
1952 substream->pstr->stream,
1954 snd_assert(channel_buf != NULL, return -EIO);
1955 memset(channel_buf + pos * 4, 0, count * 4);
1959 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1961 struct snd_pcm_runtime *runtime = substream->runtime;
1962 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1963 struct snd_pcm_substream *other;
1964 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1965 other = rme9652->capture_substream;
1967 other = rme9652->playback_substream;
1968 if (rme9652->running)
1969 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1971 runtime->status->hw_ptr = 0;
1973 struct snd_pcm_substream *s;
1974 struct snd_pcm_runtime *oruntime = other->runtime;
1975 snd_pcm_group_for_each_entry(s, substream) {
1977 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1985 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1986 struct snd_pcm_hw_params *params)
1988 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1993 spin_lock_irq(&rme9652->lock);
1995 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1996 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1997 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1998 this_pid = rme9652->playback_pid;
1999 other_pid = rme9652->capture_pid;
2001 this_pid = rme9652->capture_pid;
2002 other_pid = rme9652->playback_pid;
2005 if ((other_pid > 0) && (this_pid != other_pid)) {
2007 /* The other stream is open, and not by the same
2008 task as this one. Make sure that the parameters
2009 that matter are the same.
2012 if ((int)params_rate(params) !=
2013 rme9652_adat_sample_rate(rme9652)) {
2014 spin_unlock_irq(&rme9652->lock);
2015 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2019 if (params_period_size(params) != rme9652->period_bytes / 4) {
2020 spin_unlock_irq(&rme9652->lock);
2021 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2027 spin_unlock_irq(&rme9652->lock);
2031 spin_unlock_irq(&rme9652->lock);
2034 /* how to make sure that the rate matches an externally-set one ?
2037 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2038 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2042 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2043 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2050 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2051 struct snd_pcm_channel_info *info)
2053 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2056 snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2058 if ((chn = rme9652->channel_map[info->channel]) < 0) {
2062 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2068 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2069 unsigned int cmd, void *arg)
2072 case SNDRV_PCM_IOCTL1_RESET:
2074 return snd_rme9652_reset(substream);
2076 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2078 struct snd_pcm_channel_info *info = arg;
2079 return snd_rme9652_channel_info(substream, info);
2085 return snd_pcm_lib_ioctl(substream, cmd, arg);
2088 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2090 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2093 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2096 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2097 struct snd_pcm_substream *other;
2099 spin_lock(&rme9652->lock);
2100 running = rme9652->running;
2102 case SNDRV_PCM_TRIGGER_START:
2103 running |= 1 << substream->stream;
2105 case SNDRV_PCM_TRIGGER_STOP:
2106 running &= ~(1 << substream->stream);
2110 spin_unlock(&rme9652->lock);
2113 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2114 other = rme9652->capture_substream;
2116 other = rme9652->playback_substream;
2119 struct snd_pcm_substream *s;
2120 snd_pcm_group_for_each_entry(s, substream) {
2122 snd_pcm_trigger_done(s, substream);
2123 if (cmd == SNDRV_PCM_TRIGGER_START)
2124 running |= 1 << s->stream;
2126 running &= ~(1 << s->stream);
2130 if (cmd == SNDRV_PCM_TRIGGER_START) {
2131 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2132 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2133 rme9652_silence_playback(rme9652);
2136 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2137 rme9652_silence_playback(rme9652);
2140 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2141 rme9652_silence_playback(rme9652);
2144 snd_pcm_trigger_done(substream, substream);
2145 if (!rme9652->running && running)
2146 rme9652_start(rme9652);
2147 else if (rme9652->running && !running)
2148 rme9652_stop(rme9652);
2149 rme9652->running = running;
2150 spin_unlock(&rme9652->lock);
2155 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2157 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2158 unsigned long flags;
2161 spin_lock_irqsave(&rme9652->lock, flags);
2162 if (!rme9652->running)
2163 rme9652_reset_hw_pointer(rme9652);
2164 spin_unlock_irqrestore(&rme9652->lock, flags);
2168 static struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2170 .info = (SNDRV_PCM_INFO_MMAP |
2171 SNDRV_PCM_INFO_MMAP_VALID |
2172 SNDRV_PCM_INFO_NONINTERLEAVED |
2173 SNDRV_PCM_INFO_SYNC_START |
2174 SNDRV_PCM_INFO_DOUBLE),
2175 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2176 .rates = (SNDRV_PCM_RATE_44100 |
2177 SNDRV_PCM_RATE_48000 |
2178 SNDRV_PCM_RATE_88200 |
2179 SNDRV_PCM_RATE_96000),
2184 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2185 .period_bytes_min = (64 * 4) * 10,
2186 .period_bytes_max = (8192 * 4) * 26,
2192 static struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2194 .info = (SNDRV_PCM_INFO_MMAP |
2195 SNDRV_PCM_INFO_MMAP_VALID |
2196 SNDRV_PCM_INFO_NONINTERLEAVED |
2197 SNDRV_PCM_INFO_SYNC_START),
2198 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2199 .rates = (SNDRV_PCM_RATE_44100 |
2200 SNDRV_PCM_RATE_48000 |
2201 SNDRV_PCM_RATE_88200 |
2202 SNDRV_PCM_RATE_96000),
2207 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2208 .period_bytes_min = (64 * 4) * 10,
2209 .period_bytes_max = (8192 * 4) * 26,
2215 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2217 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2218 .count = ARRAY_SIZE(period_sizes),
2219 .list = period_sizes,
2223 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2224 struct snd_pcm_hw_rule *rule)
2226 struct snd_rme9652 *rme9652 = rule->private;
2227 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2228 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2229 return snd_interval_list(c, 2, list, 0);
2232 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2233 struct snd_pcm_hw_rule *rule)
2235 struct snd_rme9652 *rme9652 = rule->private;
2236 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2237 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2238 if (r->min > 48000) {
2239 struct snd_interval t = {
2240 .min = rme9652->ds_channels,
2241 .max = rme9652->ds_channels,
2244 return snd_interval_refine(c, &t);
2245 } else if (r->max < 88200) {
2246 struct snd_interval t = {
2247 .min = rme9652->ss_channels,
2248 .max = rme9652->ss_channels,
2251 return snd_interval_refine(c, &t);
2256 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2257 struct snd_pcm_hw_rule *rule)
2259 struct snd_rme9652 *rme9652 = rule->private;
2260 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2261 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2262 if (c->min >= rme9652->ss_channels) {
2263 struct snd_interval t = {
2268 return snd_interval_refine(r, &t);
2269 } else if (c->max <= rme9652->ds_channels) {
2270 struct snd_interval t = {
2275 return snd_interval_refine(r, &t);
2280 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2282 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2283 struct snd_pcm_runtime *runtime = substream->runtime;
2285 spin_lock_irq(&rme9652->lock);
2287 snd_pcm_set_sync(substream);
2289 runtime->hw = snd_rme9652_playback_subinfo;
2290 runtime->dma_area = rme9652->playback_buffer;
2291 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2293 if (rme9652->capture_substream == NULL) {
2294 rme9652_stop(rme9652);
2295 rme9652_set_thru(rme9652, -1, 0);
2298 rme9652->playback_pid = current->pid;
2299 rme9652->playback_substream = substream;
2301 spin_unlock_irq(&rme9652->lock);
2303 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2304 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2305 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2306 snd_rme9652_hw_rule_channels, rme9652,
2307 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2308 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2309 snd_rme9652_hw_rule_channels_rate, rme9652,
2310 SNDRV_PCM_HW_PARAM_RATE, -1);
2311 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2312 snd_rme9652_hw_rule_rate_channels, rme9652,
2313 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2315 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2316 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2317 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2318 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2322 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2324 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2326 spin_lock_irq(&rme9652->lock);
2328 rme9652->playback_pid = -1;
2329 rme9652->playback_substream = NULL;
2331 spin_unlock_irq(&rme9652->lock);
2333 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2334 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2335 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2340 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2342 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2343 struct snd_pcm_runtime *runtime = substream->runtime;
2345 spin_lock_irq(&rme9652->lock);
2347 snd_pcm_set_sync(substream);
2349 runtime->hw = snd_rme9652_capture_subinfo;
2350 runtime->dma_area = rme9652->capture_buffer;
2351 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2353 if (rme9652->playback_substream == NULL) {
2354 rme9652_stop(rme9652);
2355 rme9652_set_thru(rme9652, -1, 0);
2358 rme9652->capture_pid = current->pid;
2359 rme9652->capture_substream = substream;
2361 spin_unlock_irq(&rme9652->lock);
2363 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2364 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2365 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2366 snd_rme9652_hw_rule_channels, rme9652,
2367 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2368 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2369 snd_rme9652_hw_rule_channels_rate, rme9652,
2370 SNDRV_PCM_HW_PARAM_RATE, -1);
2371 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2372 snd_rme9652_hw_rule_rate_channels, rme9652,
2373 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2377 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2379 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2381 spin_lock_irq(&rme9652->lock);
2383 rme9652->capture_pid = -1;
2384 rme9652->capture_substream = NULL;
2386 spin_unlock_irq(&rme9652->lock);
2390 static struct snd_pcm_ops snd_rme9652_playback_ops = {
2391 .open = snd_rme9652_playback_open,
2392 .close = snd_rme9652_playback_release,
2393 .ioctl = snd_rme9652_ioctl,
2394 .hw_params = snd_rme9652_hw_params,
2395 .prepare = snd_rme9652_prepare,
2396 .trigger = snd_rme9652_trigger,
2397 .pointer = snd_rme9652_hw_pointer,
2398 .copy = snd_rme9652_playback_copy,
2399 .silence = snd_rme9652_hw_silence,
2402 static struct snd_pcm_ops snd_rme9652_capture_ops = {
2403 .open = snd_rme9652_capture_open,
2404 .close = snd_rme9652_capture_release,
2405 .ioctl = snd_rme9652_ioctl,
2406 .hw_params = snd_rme9652_hw_params,
2407 .prepare = snd_rme9652_prepare,
2408 .trigger = snd_rme9652_trigger,
2409 .pointer = snd_rme9652_hw_pointer,
2410 .copy = snd_rme9652_capture_copy,
2413 static int __devinit snd_rme9652_create_pcm(struct snd_card *card,
2414 struct snd_rme9652 *rme9652)
2416 struct snd_pcm *pcm;
2419 if ((err = snd_pcm_new(card,
2421 0, 1, 1, &pcm)) < 0) {
2426 pcm->private_data = rme9652;
2427 strcpy(pcm->name, rme9652->card_name);
2429 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2430 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2432 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2437 static int __devinit snd_rme9652_create(struct snd_card *card,
2438 struct snd_rme9652 *rme9652,
2441 struct pci_dev *pci = rme9652->pci;
2447 rme9652->card = card;
2449 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2451 switch (rev & 0xff) {
2463 if ((err = pci_enable_device(pci)) < 0)
2466 spin_lock_init(&rme9652->lock);
2468 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2470 rme9652->port = pci_resource_start(pci, 0);
2471 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2472 if (rme9652->iobase == NULL) {
2473 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2477 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2478 "rme9652", rme9652)) {
2479 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq);
2482 rme9652->irq = pci->irq;
2483 rme9652->precise_ptr = precise_ptr;
2485 /* Determine the h/w rev level of the card. This seems like
2486 a particularly kludgy way to encode it, but its what RME
2487 chose to do, so we follow them ...
2490 status = rme9652_read(rme9652, RME9652_status_register);
2491 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2492 rme9652->hw_rev = 15;
2494 rme9652->hw_rev = 11;
2497 /* Differentiate between the standard Hammerfall, and the
2498 "Light", which does not have the expansion board. This
2499 method comes from information received from Mathhias
2500 Clausen at RME. Display the EEPROM and h/w revID where
2505 case 8: /* original eprom */
2506 strcpy(card->driver, "RME9636");
2507 if (rme9652->hw_rev == 15) {
2508 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2510 rme9652->card_name = "RME Digi9636";
2512 rme9652->ss_channels = RME9636_NCHANNELS;
2514 case 9: /* W36_G EPROM */
2515 strcpy(card->driver, "RME9636");
2516 rme9652->card_name = "RME Digi9636 (Rev G)";
2517 rme9652->ss_channels = RME9636_NCHANNELS;
2519 case 4: /* W52_G EPROM */
2520 strcpy(card->driver, "RME9652");
2521 rme9652->card_name = "RME Digi9652 (Rev G)";
2522 rme9652->ss_channels = RME9652_NCHANNELS;
2524 case 3: /* original eprom */
2525 strcpy(card->driver, "RME9652");
2526 if (rme9652->hw_rev == 15) {
2527 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2529 rme9652->card_name = "RME Digi9652";
2531 rme9652->ss_channels = RME9652_NCHANNELS;
2535 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2537 pci_set_master(rme9652->pci);
2539 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2543 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2547 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2551 snd_rme9652_proc_init(rme9652);
2553 rme9652->last_spdif_sample_rate = -1;
2554 rme9652->last_adat_sample_rate = -1;
2555 rme9652->playback_pid = -1;
2556 rme9652->capture_pid = -1;
2557 rme9652->capture_substream = NULL;
2558 rme9652->playback_substream = NULL;
2560 snd_rme9652_set_defaults(rme9652);
2562 if (rme9652->hw_rev == 15) {
2563 rme9652_initialize_spdif_receiver (rme9652);
2569 static void snd_rme9652_card_free(struct snd_card *card)
2571 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2574 snd_rme9652_free(rme9652);
2577 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2578 const struct pci_device_id *pci_id)
2581 struct snd_rme9652 *rme9652;
2582 struct snd_card *card;
2585 if (dev >= SNDRV_CARDS)
2592 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2593 sizeof(struct snd_rme9652));
2598 rme9652 = (struct snd_rme9652 *) card->private_data;
2599 card->private_free = snd_rme9652_card_free;
2602 snd_card_set_dev(card, &pci->dev);
2604 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2605 snd_card_free(card);
2609 strcpy(card->shortname, rme9652->card_name);
2611 sprintf(card->longname, "%s at 0x%lx, irq %d",
2612 card->shortname, rme9652->port, rme9652->irq);
2615 if ((err = snd_card_register(card)) < 0) {
2616 snd_card_free(card);
2619 pci_set_drvdata(pci, card);
2624 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2626 snd_card_free(pci_get_drvdata(pci));
2627 pci_set_drvdata(pci, NULL);
2630 static struct pci_driver driver = {
2631 .name = "RME Digi9652 (Hammerfall)",
2632 .id_table = snd_rme9652_ids,
2633 .probe = snd_rme9652_probe,
2634 .remove = __devexit_p(snd_rme9652_remove),
2637 static int __init alsa_card_hammerfall_init(void)
2639 return pci_register_driver(&driver);
2642 static void __exit alsa_card_hammerfall_exit(void)
2644 pci_unregister_driver(&driver);
2647 module_init(alsa_card_hammerfall_init)
2648 module_exit(alsa_card_hammerfall_exit)