1 #ifndef _ASM_IA64_SN_SN_SAL_H
2 #define _ASM_IA64_SN_SN_SAL_H
5 * System Abstraction Layer definitions for IA64
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 * Copyright (c) 2000-2005 Silicon Graphics, Inc. All rights reserved.
15 #include <linux/config.h>
17 #include <asm/sn/sn_cpuid.h>
18 #include <asm/sn/arch.h>
19 #include <asm/sn/geo.h>
20 #include <asm/sn/nodepda.h>
21 #include <asm/sn/shub_mmr.h>
24 #define SN_SAL_POD_MODE 0x02000001
25 #define SN_SAL_SYSTEM_RESET 0x02000002
26 #define SN_SAL_PROBE 0x02000003
27 #define SN_SAL_GET_MASTER_NASID 0x02000004
28 #define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
29 #define SN_SAL_LOG_CE 0x02000006
30 #define SN_SAL_REGISTER_CE 0x02000007
31 #define SN_SAL_GET_PARTITION_ADDR 0x02000009
32 #define SN_SAL_XP_ADDR_REGION 0x0200000f
33 #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
34 #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
35 #define SN_SAL_PRINT_ERROR 0x02000012
36 #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
37 #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
38 #define SN_SAL_GET_SAPIC_INFO 0x0200001d
39 #define SN_SAL_GET_SN_INFO 0x0200001e
40 #define SN_SAL_CONSOLE_PUTC 0x02000021
41 #define SN_SAL_CONSOLE_GETC 0x02000022
42 #define SN_SAL_CONSOLE_PUTS 0x02000023
43 #define SN_SAL_CONSOLE_GETS 0x02000024
44 #define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
45 #define SN_SAL_CONSOLE_POLL 0x02000026
46 #define SN_SAL_CONSOLE_INTR 0x02000027
47 #define SN_SAL_CONSOLE_PUTB 0x02000028
48 #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
49 #define SN_SAL_CONSOLE_READC 0x0200002b
50 #define SN_SAL_SYSCTL_MODID_GET 0x02000031
51 #define SN_SAL_SYSCTL_GET 0x02000032
52 #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
53 #define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
54 #define SN_SAL_SYSCTL_SLAB_GET 0x02000036
55 #define SN_SAL_BUS_CONFIG 0x02000037
56 #define SN_SAL_SYS_SERIAL_GET 0x02000038
57 #define SN_SAL_PARTITION_SERIAL_GET 0x02000039
58 #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
59 #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60 #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61 #define SN_SAL_COHERENCE 0x0200003d
62 #define SN_SAL_MEMPROTECT 0x0200003e
63 #define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
65 #define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
66 #define SN_SAL_IROUTER_OP 0x02000043
67 #define SN_SAL_SYSCTL_EVENT 0x02000044
68 #define SN_SAL_IOIF_INTERRUPT 0x0200004a
69 #define SN_SAL_HWPERF_OP 0x02000050 // lock
70 #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
72 #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
73 #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
74 #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
75 #define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
76 #define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
77 #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058
79 #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
80 #define SN_SAL_BTE_RECOVER 0x02000061
81 #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000062
84 * Service-specific constants
87 /* Console interrupt manipulation */
89 #define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */
90 #define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */
91 #define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */
92 /* interrupt specification & status return codes */
93 #define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */
94 #define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */
96 /* interrupt handling */
97 #define SAL_INTR_ALLOC 1
98 #define SAL_INTR_FREE 2
101 * IRouter (i.e. generalized system controller) operations
103 #define SAL_IROUTER_OPEN 0 /* open a subchannel */
104 #define SAL_IROUTER_CLOSE 1 /* close a subchannel */
105 #define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */
106 #define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */
107 #define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for
110 #define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */
111 #define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */
112 #define SAL_IROUTER_INIT 7 /* initialize IRouter driver */
114 /* IRouter interrupt mask bits */
115 #define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
116 #define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
119 * Error Handling Features
121 #define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1
122 #define SAL_ERR_FEAT_LOG_SBES 0x2
123 #define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
124 #define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
129 #define SALRET_MORE_PASSES 1
131 #define SALRET_NOT_IMPLEMENTED (-1)
132 #define SALRET_INVALID_ARG (-2)
133 #define SALRET_ERROR (-3)
135 #define SN_SAL_FAKE_PROM 0x02009999
139 * sn_sal_rev_major - get the major SGI SAL revision number
141 * The SGI PROM stores its version in sal_[ab]_rev_(major|minor).
142 * This routine simply extracts the major value from the
143 * @ia64_sal_systab structure constructed by ia64_sal_init().
146 sn_sal_rev_major(void)
148 struct ia64_sal_systab *systab = efi.sal_systab;
150 return (int)systab->sal_b_rev_major;
154 * sn_sal_rev_minor - get the minor SGI SAL revision number
156 * The SGI PROM stores its version in sal_[ab]_rev_(major|minor).
157 * This routine simply extracts the minor value from the
158 * @ia64_sal_systab structure constructed by ia64_sal_init().
161 sn_sal_rev_minor(void)
163 struct ia64_sal_systab *systab = efi.sal_systab;
165 return (int)systab->sal_b_rev_minor;
169 * Specify the minimum PROM revsion required for this kernel.
170 * Note that they're stored in hex format...
172 #define SN_SAL_MIN_MAJOR 0x4 /* SN2 kernels need at least PROM 4.0 */
173 #define SN_SAL_MIN_MINOR 0x0
176 * Returns the master console nasid, if the call fails, return an illegal
180 ia64_sn_get_console_nasid(void)
182 struct ia64_sal_retval ret_stuff;
184 ret_stuff.status = 0;
188 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0);
190 if (ret_stuff.status < 0)
191 return ret_stuff.status;
193 /* Master console nasid is in 'v0' */
198 * Returns the master baseio nasid, if the call fails, return an illegal
202 ia64_sn_get_master_baseio_nasid(void)
204 struct ia64_sal_retval ret_stuff;
206 ret_stuff.status = 0;
210 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0);
212 if (ret_stuff.status < 0)
213 return ret_stuff.status;
215 /* Master baseio nasid is in 'v0' */
220 ia64_sn_get_klconfig_addr(nasid_t nasid)
222 struct ia64_sal_retval ret_stuff;
225 cnodeid = nasid_to_cnodeid(nasid);
226 ret_stuff.status = 0;
230 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
233 * We should panic if a valid cnode nasid does not produce
234 * a klconfig address.
236 if (ret_stuff.status != 0) {
237 panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status);
239 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
243 * Returns the next console character.
246 ia64_sn_console_getc(int *ch)
248 struct ia64_sal_retval ret_stuff;
250 ret_stuff.status = 0;
254 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0);
256 /* character is in 'v0' */
257 *ch = (int)ret_stuff.v0;
259 return ret_stuff.status;
263 * Read a character from the SAL console device, after a previous interrupt
264 * or poll operation has given us to know that a character is available
268 ia64_sn_console_readc(void)
270 struct ia64_sal_retval ret_stuff;
272 ret_stuff.status = 0;
276 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0);
278 /* character is in 'v0' */
283 * Sends the given character to the console.
286 ia64_sn_console_putc(char ch)
288 struct ia64_sal_retval ret_stuff;
290 ret_stuff.status = 0;
294 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (uint64_t)ch, 0, 0, 0, 0, 0, 0);
296 return ret_stuff.status;
300 * Sends the given buffer to the console.
303 ia64_sn_console_putb(const char *buf, int len)
305 struct ia64_sal_retval ret_stuff;
307 ret_stuff.status = 0;
311 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0);
313 if ( ret_stuff.status == 0 ) {
320 * Print a platform error record
323 ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
325 struct ia64_sal_retval ret_stuff;
327 ret_stuff.status = 0;
331 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (uint64_t)hook, (uint64_t)rec, 0, 0, 0, 0, 0);
333 return ret_stuff.status;
337 * Check for Platform errors
340 ia64_sn_plat_cpei_handler(void)
342 struct ia64_sal_retval ret_stuff;
344 ret_stuff.status = 0;
348 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0);
350 return ret_stuff.status;
354 * Set Error Handling Features
357 ia64_sn_plat_set_error_handling_features(void)
359 struct ia64_sal_retval ret_stuff;
361 ret_stuff.status = 0;
365 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
366 (SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV | SAL_ERR_FEAT_LOG_SBES),
369 return ret_stuff.status;
373 * Checks for console input.
376 ia64_sn_console_check(int *result)
378 struct ia64_sal_retval ret_stuff;
380 ret_stuff.status = 0;
384 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0);
386 /* result is in 'v0' */
387 *result = (int)ret_stuff.v0;
389 return ret_stuff.status;
393 * Checks console interrupt status
396 ia64_sn_console_intr_status(void)
398 struct ia64_sal_retval ret_stuff;
400 ret_stuff.status = 0;
404 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
405 0, SAL_CONSOLE_INTR_STATUS,
408 if (ret_stuff.status == 0) {
416 * Enable an interrupt on the SAL console device.
419 ia64_sn_console_intr_enable(uint64_t intr)
421 struct ia64_sal_retval ret_stuff;
423 ret_stuff.status = 0;
427 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
428 intr, SAL_CONSOLE_INTR_ON,
433 * Disable an interrupt on the SAL console device.
436 ia64_sn_console_intr_disable(uint64_t intr)
438 struct ia64_sal_retval ret_stuff;
440 ret_stuff.status = 0;
444 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
445 intr, SAL_CONSOLE_INTR_OFF,
450 * Sends a character buffer to the console asynchronously.
453 ia64_sn_console_xmit_chars(char *buf, int len)
455 struct ia64_sal_retval ret_stuff;
457 ret_stuff.status = 0;
461 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
462 (uint64_t)buf, (uint64_t)len,
465 if (ret_stuff.status == 0) {
473 * Returns the iobrick module Id
476 ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
478 struct ia64_sal_retval ret_stuff;
480 ret_stuff.status = 0;
484 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0);
486 /* result is in 'v0' */
487 *result = (int)ret_stuff.v0;
489 return ret_stuff.status;
493 * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function
495 * SN_SAL_POD_MODE actually takes an argument, but it's always
496 * 0 when we call it from the kernel, so we don't have to expose
500 ia64_sn_pod_mode(void)
502 struct ia64_sal_retval isrv;
503 SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
510 * ia64_sn_probe_mem - read from memory safely
511 * @addr: address to probe
512 * @size: number bytes to read (1,2,4,8)
513 * @data_ptr: address to store value read by probe (-1 returned if probe fails)
515 * Call into the SAL to do a memory read. If the read generates a machine
516 * check, this routine will recover gracefully and return -1 to the caller.
517 * @addr is usually a kernel virtual address in uncached space (i.e. the
518 * address starts with 0xc), but if called in physical mode, @addr should
519 * be a physical address.
522 * 0 - probe successful
523 * 1 - probe failed (generated MCA)
528 ia64_sn_probe_mem(long addr, long size, void *data_ptr)
530 struct ia64_sal_retval isrv;
532 SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0);
537 *((u8*)data_ptr) = (u8)isrv.v0;
540 *((u16*)data_ptr) = (u16)isrv.v0;
543 *((u32*)data_ptr) = (u32)isrv.v0;
546 *((u64*)data_ptr) = (u64)isrv.v0;
556 * Retrieve the system serial number as an ASCII string.
559 ia64_sn_sys_serial_get(char *buf)
561 struct ia64_sal_retval ret_stuff;
562 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0);
563 return ret_stuff.status;
566 extern char sn_system_serial_number_string[];
567 extern u64 sn_partition_serial_number;
570 sn_system_serial_number(void) {
571 if (sn_system_serial_number_string[0]) {
572 return(sn_system_serial_number_string);
574 ia64_sn_sys_serial_get(sn_system_serial_number_string);
575 return(sn_system_serial_number_string);
581 * Returns a unique id number for this system and partition (suitable for
582 * use with license managers), based in part on the system serial number.
585 ia64_sn_partition_serial_get(void)
587 struct ia64_sal_retval ret_stuff;
588 ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
590 if (ret_stuff.status != 0)
596 sn_partition_serial_number_val(void) {
597 if (unlikely(sn_partition_serial_number == 0)) {
598 sn_partition_serial_number = ia64_sn_partition_serial_get();
600 return sn_partition_serial_number;
604 * Returns the partition id of the nasid passed in as an argument,
605 * or INVALID_PARTID if the partition id cannot be retrieved.
607 static inline partid_t
608 ia64_sn_sysctl_partition_get(nasid_t nasid)
610 struct ia64_sal_retval ret_stuff;
611 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
613 if (ret_stuff.status != 0)
614 return INVALID_PARTID;
615 return ((partid_t)ret_stuff.v0);
619 * Returns the partition id of the current processor.
622 extern partid_t sn_partid;
624 static inline partid_t
625 sn_local_partid(void) {
626 if (unlikely(sn_partid < 0)) {
627 sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id()));
633 * Returns the physical address of the partition's reserved page through
634 * an iterative number of calls.
636 * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
637 * set to the nasid of the partition whose reserved page's address is
639 * On subsequent calls, pass the values, that were passed back on the
642 * While the return status equals SALRET_MORE_PASSES, keep calling
643 * this function after first copying 'len' bytes starting at 'addr'
644 * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
645 * be the physical address of the partition's reserved page. If the
646 * return status equals neither of these, an error as occurred.
649 sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
651 struct ia64_sal_retval rv;
652 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
653 *addr, buf, *len, 0, 0, 0);
661 * Register or unregister a physical address range being referenced across
662 * a partition boundary for which certain SAL errors should be scanned for,
663 * cleaned up and ignored. This is of value for kernel partitioning code only.
664 * Values for the operation argument:
665 * 1 = register this address range with SAL
666 * 0 = unregister this address range with SAL
668 * SAL maintains a reference count on an address range in case it is registered
671 * On success, returns the reference count of the address range after the SAL
672 * call has performed the current registration/unregistration. Returns a
673 * negative value if an error occurred.
676 sn_register_xp_addr_region(u64 paddr, u64 len, int operation)
678 struct ia64_sal_retval ret_stuff;
679 ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
680 (u64)operation, 0, 0, 0, 0);
681 return ret_stuff.status;
685 * Register or unregister an instruction range for which SAL errors should
686 * be ignored. If an error occurs while in the registered range, SAL jumps
687 * to return_addr after ignoring the error. Values for the operation argument:
688 * 1 = register this instruction range with SAL
689 * 0 = unregister this instruction range with SAL
691 * Returns 0 on success, or a negative value if an error occurred.
694 sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
695 int virtual, int operation)
697 struct ia64_sal_retval ret_stuff;
700 call = SN_SAL_NO_FAULT_ZONE_VIRTUAL;
702 call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
704 ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
706 return ret_stuff.status;
710 * Change or query the coherence domain for this partition. Each cpu-based
711 * nasid is represented by a bit in an array of 64-bit words:
712 * 0 = not in this partition's coherency domain
713 * 1 = in this partition's coherency domain
715 * It is not possible for the local system's nasids to be removed from
716 * the coherency domain. Purpose of the domain arguments:
717 * new_domain = set the coherence domain to the given nasids
718 * old_domain = return the current coherence domain
720 * Returns 0 on success, or a negative value if an error occurred.
723 sn_change_coherence(u64 *new_domain, u64 *old_domain)
725 struct ia64_sal_retval ret_stuff;
726 ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
727 (u64)old_domain, 0, 0, 0, 0, 0);
728 return ret_stuff.status;
732 * Change memory access protections for a physical address range.
733 * nasid_array is not used on Altix, but may be in future architectures.
734 * Available memory protection access classes are defined after the function.
737 sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
739 struct ia64_sal_retval ret_stuff;
741 unsigned long irq_flags;
743 cnodeid = nasid_to_cnodeid(get_node_number(paddr));
744 // spin_lock(&NODEPDA(cnodeid)->bist_lock);
745 local_irq_save(irq_flags);
746 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
747 (u64)nasid_array, perms, 0, 0, 0);
748 local_irq_restore(irq_flags);
749 // spin_unlock(&NODEPDA(cnodeid)->bist_lock);
750 return ret_stuff.status;
752 #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
753 #define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
754 #define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
755 #define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
756 #define SN_MEMPROT_ACCESS_CLASS_6 0x084080
757 #define SN_MEMPROT_ACCESS_CLASS_7 0x021080
760 * Turns off system power.
763 ia64_sn_power_down(void)
765 struct ia64_sal_retval ret_stuff;
766 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
772 * ia64_sn_fru_capture - tell the system controller to capture hw state
774 * This routine will call the SAL which will tell the system controller(s)
775 * to capture hw mmr information from each SHub in the system.
778 ia64_sn_fru_capture(void)
780 struct ia64_sal_retval isrv;
781 SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0);
788 * Performs an operation on a PCI bus or slot -- power up, power down
792 ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type,
796 struct ia64_sal_retval rv = {0, 0, 0, 0};
798 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action,
799 bus, (u64) slot, 0, 0);
807 * Open a subchannel for sending arbitrary data to the system
808 * controller network via the system controller device associated with
809 * 'nasid'. Return the subchannel number or a negative error code.
812 ia64_sn_irtr_open(nasid_t nasid)
814 struct ia64_sal_retval rv;
815 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid,
821 * Close system controller subchannel 'subch' previously opened on 'nasid'.
824 ia64_sn_irtr_close(nasid_t nasid, int subch)
826 struct ia64_sal_retval rv;
827 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE,
828 (u64) nasid, (u64) subch, 0, 0, 0, 0);
829 return (int) rv.status;
833 * Read data from system controller associated with 'nasid' on
834 * subchannel 'subch'. The buffer to be filled is pointed to by
835 * 'buf', and its capacity is in the integer pointed to by 'len'. The
836 * referent of 'len' is set to the number of bytes read by the SAL
837 * call. The return value is either SALRET_OK (for bytes read) or
838 * SALRET_ERROR (for error or "no data available").
841 ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len)
843 struct ia64_sal_retval rv;
844 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV,
845 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
847 return (int) rv.status;
851 * Write data to the system controller network via the system
852 * controller associated with 'nasid' on suchannel 'subch'. The
853 * buffer to be written out is pointed to by 'buf', and 'len' is the
854 * number of bytes to be written. The return value is either the
855 * number of bytes written (which could be zero) or a negative error
859 ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len)
861 struct ia64_sal_retval rv;
862 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND,
863 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
869 * Check whether any interrupts are pending for the system controller
870 * associated with 'nasid' and its subchannel 'subch'. The return
871 * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or
872 * SAL_IROUTER_INTR_RECV).
875 ia64_sn_irtr_intr(nasid_t nasid, int subch)
877 struct ia64_sal_retval rv;
878 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS,
879 (u64) nasid, (u64) subch, 0, 0, 0, 0);
884 * Enable the interrupt indicated by the intr parameter (either
885 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
888 ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr)
890 struct ia64_sal_retval rv;
891 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON,
892 (u64) nasid, (u64) subch, intr, 0, 0, 0);
897 * Disable the interrupt indicated by the intr parameter (either
898 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
901 ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
903 struct ia64_sal_retval rv;
904 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF,
905 (u64) nasid, (u64) subch, intr, 0, 0, 0);
910 * Set up a node as the point of contact for system controller
911 * environmental event delivery.
914 ia64_sn_sysctl_event_init(nasid_t nasid)
916 struct ia64_sal_retval rv;
917 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
923 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
924 * @nasid: NASID of node to read
925 * @index: FIT entry index to be retrieved (0..n)
926 * @fitentry: 16 byte buffer where FIT entry will be stored.
927 * @banbuf: optional buffer for retrieving banner
928 * @banlen: length of banner buffer
930 * Access to the physical PROM chips needs to be serialized since reads and
931 * writes can't occur at the same time, so we need to call into the SAL when
932 * we want to look at the FIT entries on the chips.
936 * %SALRET_INVALID_ARG if index too big
937 * %SALRET_NOT_IMPLEMENTED if running on older PROM
938 * ??? if nasid invalid OR banner buffer not large enough
941 ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf,
944 struct ia64_sal_retval rv;
945 SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry,
946 banbuf, banlen, 0, 0);
947 return (int) rv.status;
951 * Initialize the SAL components of the system controller
952 * communication driver; specifically pass in a sizable buffer that
953 * can be used for allocation of subchannel queues as new subchannels
954 * are opened. "buf" points to the buffer, and "len" specifies its
958 ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
960 struct ia64_sal_retval rv;
961 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT,
962 (u64) nasid, (u64) buf, (u64) len, 0, 0, 0);
963 return (int) rv.status;
967 * Returns the nasid, subnode & slice corresponding to a SAPIC ID
970 * arg0 - SN_SAL_GET_SAPIC_INFO
971 * arg1 - sapicid (lid >> 16)
978 ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
980 struct ia64_sal_retval ret_stuff;
982 ret_stuff.status = 0;
986 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
988 /***** BEGIN HACK - temp til old proms no longer supported ********/
989 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
990 if (nasid) *nasid = sapicid & 0xfff;
991 if (subnode) *subnode = (sapicid >> 13) & 1;
992 if (slice) *slice = (sapicid >> 12) & 3;
995 /***** END HACK *******/
997 if (ret_stuff.status < 0)
998 return ret_stuff.status;
1000 if (nasid) *nasid = (int) ret_stuff.v0;
1001 if (subnode) *subnode = (int) ret_stuff.v1;
1002 if (slice) *slice = (int) ret_stuff.v2;
1007 * Returns information about the HUB/SHUB.
1009 * arg0 - SN_SAL_GET_SN_INFO
1010 * arg1 - 0 (other values reserved for future use)
1013 * [7:0] - shub type (0=shub1, 1=shub2)
1014 * [15:8] - Log2 max number of nodes in entire system (includes
1015 * C-bricks, I-bricks, etc)
1016 * [23:16] - Log2 of nodes per sharing domain
1017 * [31:24] - partition ID
1018 * [39:32] - coherency_id
1019 * [47:40] - regionsize
1021 * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
1022 * [23:15] - bit position of low nasid bit
1025 ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1026 u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg)
1028 struct ia64_sal_retval ret_stuff;
1030 ret_stuff.status = 0;
1034 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1036 /***** BEGIN HACK - temp til old proms no longer supported ********/
1037 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
1038 int nasid = get_sapicid() & 0xfff;;
1039 #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1040 #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1041 if (shubtype) *shubtype = 0;
1042 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1043 if (nasid_shift) *nasid_shift = 38;
1044 if (systemsize) *systemsize = 11;
1045 if (sharing_domain_size) *sharing_domain_size = 9;
1046 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1047 if (coher) *coher = nasid >> 9;
1048 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1049 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1052 /***** END HACK *******/
1054 if (ret_stuff.status < 0)
1055 return ret_stuff.status;
1057 if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
1058 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
1059 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
1060 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
1061 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
1062 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
1063 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
1064 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
1069 * This is the access point to the Altix PROM hardware performance
1070 * and status monitoring interface. For info on using this, see
1071 * include/asm-ia64/sn/sn2/sn_hwperf.h
1074 ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
1075 u64 a3, u64 a4, int *v0)
1077 struct ia64_sal_retval rv;
1078 SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid,
1079 opcode, a0, a1, a2, a3, a4);
1082 return (int) rv.status;
1086 ia64_sn_ioif_get_pci_topology(u64 rack, u64 bay, u64 slot, u64 slab,
1089 struct ia64_sal_retval rv;
1090 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY,
1091 rack, bay, slot, slab, buf, len, 0);
1092 return (int) rv.status;
1096 * BTE error recovery is implemented in SAL
1099 ia64_sn_bte_recovery(nasid_t nasid)
1101 struct ia64_sal_retval rv;
1104 SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, 0, 0, 0, 0, 0, 0, 0);
1105 if (rv.status == SALRET_NOT_IMPLEMENTED)
1107 return (int) rv.status;
1111 ia64_sn_is_fake_prom(void)
1113 struct ia64_sal_retval rv;
1114 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
1115 return (rv.status == 0);
1118 #endif /* _ASM_IA64_SN_SN_SAL_H */