git.oblomov.eu Git - linux-2.6/blob - drivers/pci/hotplug/cpqphp_pci.c

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  */
  28
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/types.h>
  32 #include <linux/slab.h>
  33 #include <linux/workqueue.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/pci.h>
  36 #include "../pci.h"
  37 #include "cpqphp.h"
  38 #include "cpqphp_nvram.h"
  39 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  40
  41
  42 u8 cpqhp_nic_irq;
  43 u8 cpqhp_disk_irq;
  44
  45 static u16 unused_IRQ;
  46
  47 /*
  48  * detect_HRT_floating_pointer
  49  *
  50  * find the Hot Plug Resource Table in the specified region of memory.
  51  *
  52  */
  53 static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
  54 {
  55         void __iomem *fp;
  56         void __iomem *endp;
  57         u8 temp1, temp2, temp3, temp4;
  58         int status = 0;
  59
  60         endp = (end - sizeof(struct hrt) + 1);
  61
  62         for (fp = begin; fp <= endp; fp += 16) {
  63                 temp1 = readb(fp + SIG0);
  64                 temp2 = readb(fp + SIG1);
  65                 temp3 = readb(fp + SIG2);
  66                 temp4 = readb(fp + SIG3);
  67                 if (temp1 == '$' &&
  68                     temp2 == 'H' &&
  69                     temp3 == 'R' &&
  70                     temp4 == 'T') {
  71                         status = 1;
  72                         break;
  73                 }
  74         }
  75
  76         if (!status)
  77                 fp = NULL;
  78
  79         dbg("Discovered Hotplug Resource Table at %p\n", fp);
  80         return fp;
  81 }
  82
  83
  84 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func)
  85 {
  86         unsigned char bus;
  87         struct pci_bus *child;
  88         int num;
  89
  90         if (func->pci_dev == NULL)
  91                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
  92
  93         /* No pci device, we need to create it then */
  94         if (func->pci_dev == NULL) {
  95                 dbg("INFO: pci_dev still null\n");
  96
  97                 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
  98                 if (num)
  99                         pci_bus_add_devices(ctrl->pci_dev->bus);
 100
 101                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
 102                 if (func->pci_dev == NULL) {
 103                         dbg("ERROR: pci_dev still null\n");
 104                         return 0;
 105                 }
 106         }
 107
 108         if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
 109                 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
 110                 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
 111                 pci_do_scan_bus(child);
 112         }
 113
 114         return 0;
 115 }
 116
 117
 118 int cpqhp_unconfigure_device(struct pci_func* func)
 119 {
 120         int j;
 121
 122         dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, func->device, func->function);
 123
 124         for (j=0; j<8 ; j++) {
 125                 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j));
 126                 if (temp)
 127                         pci_remove_bus_device(temp);
 128         }
 129         return 0;
 130 }
 131
 132 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
 133 {
 134         u32 vendID = 0;
 135
 136         if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1)
 137                 return -1;
 138         if (vendID == 0xffffffff)
 139                 return -1;
 140         return pci_bus_read_config_dword (bus, devfn, offset, value);
 141 }
 142
 143
 144 /*
 145  * cpqhp_set_irq
 146  *
 147  * @bus_num: bus number of PCI device
 148  * @dev_num: device number of PCI device
 149  * @slot: pointer to u8 where slot number will be returned
 150  */
 151 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
 152 {
 153         int rc = 0;
 154
 155         if (cpqhp_legacy_mode) {
 156                 struct pci_dev *fakedev;
 157                 struct pci_bus *fakebus;
 158                 u16 temp_word;
 159
 160                 fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
 161                 fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
 162                 if (!fakedev || !fakebus) {
 163                         kfree(fakedev);
 164                         kfree(fakebus);
 165                         return -ENOMEM;
 166                 }
 167
 168                 fakedev->devfn = dev_num << 3;
 169                 fakedev->bus = fakebus;
 170                 fakebus->number = bus_num;
 171                 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
 172                     __FUNCTION__, dev_num, bus_num, int_pin, irq_num);
 173                 rc = pcibios_set_irq_routing(fakedev, int_pin - 0x0a, irq_num);
 174                 kfree(fakedev);
 175                 kfree(fakebus);
 176                 dbg("%s: rc %d\n", __FUNCTION__, rc);
 177                 if (!rc)
 178                         return !rc;
 179
 180                 // set the Edge Level Control Register (ELCR)
 181                 temp_word = inb(0x4d0);
 182                 temp_word |= inb(0x4d1) << 8;
 183
 184                 temp_word |= 0x01 << irq_num;
 185
 186                 // This should only be for x86 as it sets the Edge Level Control Register
 187                 outb((u8) (temp_word & 0xFF), 0x4d0);
 188                 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
 189                 rc = 0;
 190         }
 191
 192         return rc;
 193 }
 194
 195
 196 /*
 197  * WTF??? This function isn't in the code, yet a function calls it, but the
 198  * compiler optimizes it away?  strange.  Here as a placeholder to keep the
 199  * compiler happy.
 200  */
 201 static int PCI_ScanBusNonBridge (u8 bus, u8 device)
 202 {
 203         return 0;
 204 }
 205
 206 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
 207 {
 208         u16 tdevice;
 209         u32 work;
 210         u8 tbus;
 211
 212         ctrl->pci_bus->number = bus_num;
 213
 214         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 215                 //Scan for access first
 216                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 217                         continue;
 218                 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
 219                 //Yep we got one. Not a bridge ?
 220                 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
 221                         *dev_num = tdevice;
 222                         dbg("found it !\n");
 223                         return 0;
 224                 }
 225         }
 226         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 227                 //Scan for access first
 228                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 229                         continue;
 230                 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
 231                 //Yep we got one. bridge ?
 232                 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 233                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
 234                         dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
 235                         if (PCI_ScanBusNonBridge(tbus, tdevice) == 0)
 236                                 return 0;
 237                 }
 238         }
 239
 240         return -1;
 241 }
 242
 243
 244 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
 245 {
 246         struct irq_routing_table *PCIIRQRoutingInfoLength;
 247         long len;
 248         long loop;
 249         u32 work;
 250
 251         u8 tbus, tdevice, tslot;
 252
 253         PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
 254         if (!PCIIRQRoutingInfoLength)
 255                 return -1;
 256
 257         len = (PCIIRQRoutingInfoLength->size -
 258                sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 259         // Make sure I got at least one entry
 260         if (len == 0) {
 261                 kfree(PCIIRQRoutingInfoLength );
 262                 return -1;
 263         }
 264
 265         for (loop = 0; loop < len; ++loop) {
 266                 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
 267                 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn;
 268                 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
 269
 270                 if (tslot == slot) {
 271                         *bus_num = tbus;
 272                         *dev_num = tdevice;
 273                         ctrl->pci_bus->number = tbus;
 274                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
 275                         if (!nobridge || (work == 0xffffffff)) {
 276                                 kfree(PCIIRQRoutingInfoLength );
 277                                 return 0;
 278                         }
 279
 280                         dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
 281                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
 282                         dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
 283
 284                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 285                                 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
 286                                 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
 287                                 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
 288                                         *bus_num = tbus;
 289                                         kfree(PCIIRQRoutingInfoLength );
 290                                         return 0;
 291                                 }
 292                         } else {
 293                                 kfree(PCIIRQRoutingInfoLength );
 294                                 return 0;
 295                         }
 296
 297                 }
 298         }
 299         kfree(PCIIRQRoutingInfoLength );
 300         return -1;
 301 }
 302
 303
 304 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
 305 {
 306         return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);    //plain (bridges allowed)
 307 }
 308
 309
 310 /* More PCI configuration routines; this time centered around hotplug controller */
 311
 312
 313 /*
 314  * cpqhp_save_config
 315  *
 316  * Reads configuration for all slots in a PCI bus and saves info.
 317  *
 318  * Note:  For non-hot plug busses, the slot # saved is the device #
 319  *
 320  * returns 0 if success
 321  */
 322 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
 323 {
 324         long rc;
 325         u8 class_code;
 326         u8 header_type;
 327         u32 ID;
 328         u8 secondary_bus;
 329         struct pci_func *new_slot;
 330         int sub_bus;
 331         int FirstSupported;
 332         int LastSupported;
 333         int max_functions;
 334         int function;
 335         u8 DevError;
 336         int device = 0;
 337         int cloop = 0;
 338         int stop_it;
 339         int index;
 340
 341         //              Decide which slots are supported
 342
 343         if (is_hot_plug) {
 344                 //*********************************
 345                 // is_hot_plug is the slot mask
 346                 //*********************************
 347                 FirstSupported = is_hot_plug >> 4;
 348                 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
 349         } else {
 350                 FirstSupported = 0;
 351                 LastSupported = 0x1F;
 352         }
 353
 354         //     Save PCI configuration space for all devices in supported slots
 355         ctrl->pci_bus->number = busnumber;
 356         for (device = FirstSupported; device <= LastSupported; device++) {
 357                 ID = 0xFFFFFFFF;
 358                 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
 359
 360                 if (ID != 0xFFFFFFFF) {   //  device in slot
 361                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
 362                         if (rc)
 363                                 return rc;
 364
 365                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
 366                         if (rc)
 367                                 return rc;
 368
 369                         // If multi-function device, set max_functions to 8
 370                         if (header_type & 0x80)
 371                                 max_functions = 8;
 372                         else
 373                                 max_functions = 1;
 374
 375                         function = 0;
 376
 377                         do {
 378                                 DevError = 0;
 379
 380                                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {   // P-P Bridge
 381                                         //  Recurse the subordinate bus
 382                                         //  get the subordinate bus number
 383                                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
 384                                         if (rc) {
 385                                                 return rc;
 386                                         } else {
 387                                                 sub_bus = (int) secondary_bus;
 388
 389                                                 // Save secondary bus cfg spc
 390                                                 // with this recursive call.
 391                                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 392                                                 if (rc)
 393                                                         return rc;
 394                                                 ctrl->pci_bus->number = busnumber;
 395                                         }
 396                                 }
 397
 398                                 index = 0;
 399                                 new_slot = cpqhp_slot_find(busnumber, device, index++);
 400                                 while (new_slot &&
 401                                        (new_slot->function != (u8) function))
 402                                         new_slot = cpqhp_slot_find(busnumber, device, index++);
 403
 404                                 if (!new_slot) {
 405                                         // Setup slot structure.
 406                                         new_slot = cpqhp_slot_create(busnumber);
 407
 408                                         if (new_slot == NULL)
 409                                                 return(1);
 410                                 }
 411
 412                                 new_slot->bus = (u8) busnumber;
 413                                 new_slot->device = (u8) device;
 414                                 new_slot->function = (u8) function;
 415                                 new_slot->is_a_board = 1;
 416                                 new_slot->switch_save = 0x10;
 417                                 // In case of unsupported board
 418                                 new_slot->status = DevError;
 419                                 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
 420
 421                                 for (cloop = 0; cloop < 0x20; cloop++) {
 422                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 423                                         if (rc)
 424                                                 return rc;
 425                                 }
 426
 427                                 function++;
 428
 429                                 stop_it = 0;
 430
 431                                 //  this loop skips to the next present function
 432                                 //  reading in Class Code and Header type.
 433
 434                                 while ((function < max_functions)&&(!stop_it)) {
 435                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
 436                                         if (ID == 0xFFFFFFFF) {  // nothing there.
 437                                                 function++;
 438                                         } else {  // Something there
 439                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
 440                                                 if (rc)
 441                                                         return rc;
 442
 443                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
 444                                                 if (rc)
 445                                                         return rc;
 446
 447                                                 stop_it++;
 448                                         }
 449                                 }
 450
 451                         } while (function < max_functions);
 452                 }               // End of IF (device in slot?)
 453                 else if (is_hot_plug) {
 454                         // Setup slot structure with entry for empty slot
 455                         new_slot = cpqhp_slot_create(busnumber);
 456
 457                         if (new_slot == NULL) {
 458                                 return(1);
 459                         }
 460
 461                         new_slot->bus = (u8) busnumber;
 462                         new_slot->device = (u8) device;
 463                         new_slot->function = 0;
 464                         new_slot->is_a_board = 0;
 465                         new_slot->presence_save = 0;
 466                         new_slot->switch_save = 0;
 467                 }
 468         }                       // End of FOR loop
 469
 470         return(0);
 471 }
 472
 473
 474 /*
 475  * cpqhp_save_slot_config
 476  *
 477  * Saves configuration info for all PCI devices in a given slot
 478  * including subordinate busses.
 479  *
 480  * returns 0 if success
 481  */
 482 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
 483 {
 484         long rc;
 485         u8 class_code;
 486         u8 header_type;
 487         u32 ID;
 488         u8 secondary_bus;
 489         int sub_bus;
 490         int max_functions;
 491         int function;
 492         int cloop = 0;
 493         int stop_it;
 494
 495         ID = 0xFFFFFFFF;
 496
 497         ctrl->pci_bus->number = new_slot->bus;
 498         pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
 499
 500         if (ID != 0xFFFFFFFF) {   //  device in slot
 501                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
 502                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
 503
 504                 if (header_type & 0x80) // Multi-function device
 505                         max_functions = 8;
 506                 else
 507                         max_functions = 1;
 508
 509                 function = 0;
 510
 511                 do {
 512                         if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 513                                 //  Recurse the subordinate bus
 514                                 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
 515
 516                                 sub_bus = (int) secondary_bus;
 517
 518                                 // Save the config headers for the secondary bus.
 519                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 520                                 if (rc)
 521                                         return(rc);
 522                                 ctrl->pci_bus->number = new_slot->bus;
 523
 524                         }       // End of IF
 525
 526                         new_slot->status = 0;
 527
 528                         for (cloop = 0; cloop < 0x20; cloop++) {
 529                                 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 530                         }
 531
 532                         function++;
 533
 534                         stop_it = 0;
 535
 536                         //  this loop skips to the next present function
 537                         //  reading in the Class Code and the Header type.
 538
 539                         while ((function < max_functions) && (!stop_it)) {
 540                                 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
 541
 542                                 if (ID == 0xFFFFFFFF) {  // nothing there.
 543                                         function++;
 544                                 } else {  // Something there
 545                                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
 546
 547                                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
 548
 549                                         stop_it++;
 550                                 }
 551                         }
 552
 553                 } while (function < max_functions);
 554         }                       // End of IF (device in slot?)
 555         else {
 556                 return 2;
 557         }
 558
 559         return 0;
 560 }
 561
 562
 563 /*
 564  * cpqhp_save_base_addr_length
 565  *
 566  * Saves the length of all base address registers for the
 567  * specified slot.  this is for hot plug REPLACE
 568  *
 569  * returns 0 if success
 570  */
 571 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
 572 {
 573         u8 cloop;
 574         u8 header_type;
 575         u8 secondary_bus;
 576         u8 type;
 577         int sub_bus;
 578         u32 temp_register;
 579         u32 base;
 580         u32 rc;
 581         struct pci_func *next;
 582         int index = 0;
 583         struct pci_bus *pci_bus = ctrl->pci_bus;
 584         unsigned int devfn;
 585
 586         func = cpqhp_slot_find(func->bus, func->device, index++);
 587
 588         while (func != NULL) {
 589                 pci_bus->number = func->bus;
 590                 devfn = PCI_DEVFN(func->device, func->function);
 591
 592                 // Check for Bridge
 593                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 594
 595                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 596                         // PCI-PCI Bridge
 597                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 598
 599                         sub_bus = (int) secondary_bus;
 600
 601                         next = cpqhp_slot_list[sub_bus];
 602
 603                         while (next != NULL) {
 604                                 rc = cpqhp_save_base_addr_length(ctrl, next);
 605                                 if (rc)
 606                                         return rc;
 607
 608                                 next = next->next;
 609                         }
 610                         pci_bus->number = func->bus;
 611
 612                         //FIXME: this loop is duplicated in the non-bridge case.  The two could be rolled together
 613                         // Figure out IO and memory base lengths
 614                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 615                                 temp_register = 0xFFFFFFFF;
 616                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 617                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 618
 619                                 if (base) {  // If this register is implemented
 620                                         if (base & 0x01L) {
 621                                                 // IO base
 622                                                 // set base = amount of IO space requested
 623                                                 base = base & 0xFFFFFFFE;
 624                                                 base = (~base) + 1;
 625
 626                                                 type = 1;
 627                                         } else {
 628                                                 // memory base
 629                                                 base = base & 0xFFFFFFF0;
 630                                                 base = (~base) + 1;
 631
 632                                                 type = 0;
 633                                         }
 634                                 } else {
 635                                         base = 0x0L;
 636                                         type = 0;
 637                                 }
 638
 639                                 // Save information in slot structure
 640                                 func->base_length[(cloop - 0x10) >> 2] =
 641                                 base;
 642                                 func->base_type[(cloop - 0x10) >> 2] = type;
 643
 644                         }       // End of base register loop
 645
 646
 647                 } else if ((header_type & 0x7F) == 0x00) {        // PCI-PCI Bridge
 648                         // Figure out IO and memory base lengths
 649                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 650                                 temp_register = 0xFFFFFFFF;
 651                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 652                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 653
 654                                 if (base) {  // If this register is implemented
 655                                         if (base & 0x01L) {
 656                                                 // IO base
 657                                                 // base = amount of IO space requested
 658                                                 base = base & 0xFFFFFFFE;
 659                                                 base = (~base) + 1;
 660
 661                                                 type = 1;
 662                                         } else {
 663                                                 // memory base
 664                                                 // base = amount of memory space requested
 665                                                 base = base & 0xFFFFFFF0;
 666                                                 base = (~base) + 1;
 667
 668                                                 type = 0;
 669                                         }
 670                                 } else {
 671                                         base = 0x0L;
 672                                         type = 0;
 673                                 }
 674
 675                                 // Save information in slot structure
 676                                 func->base_length[(cloop - 0x10) >> 2] = base;
 677                                 func->base_type[(cloop - 0x10) >> 2] = type;
 678
 679                         }       // End of base register loop
 680
 681                 } else {          // Some other unknown header type
 682                 }
 683
 684                 // find the next device in this slot
 685                 func = cpqhp_slot_find(func->bus, func->device, index++);
 686         }
 687
 688         return(0);
 689 }
 690
 691
 692 /*
 693  * cpqhp_save_used_resources
 694  *
 695  * Stores used resource information for existing boards.  this is
 696  * for boards that were in the system when this driver was loaded.
 697  * this function is for hot plug ADD
 698  *
 699  * returns 0 if success
 700  */
 701 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
 702 {
 703         u8 cloop;
 704         u8 header_type;
 705         u8 secondary_bus;
 706         u8 temp_byte;
 707         u8 b_base;
 708         u8 b_length;
 709         u16 command;
 710         u16 save_command;
 711         u16 w_base;
 712         u16 w_length;
 713         u32 temp_register;
 714         u32 save_base;
 715         u32 base;
 716         int index = 0;
 717         struct pci_resource *mem_node;
 718         struct pci_resource *p_mem_node;
 719         struct pci_resource *io_node;
 720         struct pci_resource *bus_node;
 721         struct pci_bus *pci_bus = ctrl->pci_bus;
 722         unsigned int devfn;
 723
 724         func = cpqhp_slot_find(func->bus, func->device, index++);
 725
 726         while ((func != NULL) && func->is_a_board) {
 727                 pci_bus->number = func->bus;
 728                 devfn = PCI_DEVFN(func->device, func->function);
 729
 730                 // Save the command register
 731                 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
 732
 733                 // disable card
 734                 command = 0x00;
 735                 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
 736
 737                 // Check for Bridge
 738                 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 739
 740                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 741                         // Clear Bridge Control Register
 742                         command = 0x00;
 743                         pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
 744                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 745                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
 746
 747                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
 748                         if (!bus_node)
 749                                 return -ENOMEM;
 750
 751                         bus_node->base = secondary_bus;
 752                         bus_node->length = temp_byte - secondary_bus + 1;
 753
 754                         bus_node->next = func->bus_head;
 755                         func->bus_head = bus_node;
 756
 757                         // Save IO base and Limit registers
 758                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
 759                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
 760
 761                         if ((b_base <= b_length) && (save_command & 0x01)) {
 762                                 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
 763                                 if (!io_node)
 764                                         return -ENOMEM;
 765
 766                                 io_node->base = (b_base & 0xF0) << 8;
 767                                 io_node->length = (b_length - b_base + 0x10) << 8;
 768
 769                                 io_node->next = func->io_head;
 770                                 func->io_head = io_node;
 771                         }
 772
 773                         // Save memory base and Limit registers
 774                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
 775                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
 776
 777                         if ((w_base <= w_length) && (save_command & 0x02)) {
 778                                 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
 779                                 if (!mem_node)
 780                                         return -ENOMEM;
 781
 782                                 mem_node->base = w_base << 16;
 783                                 mem_node->length = (w_length - w_base + 0x10) << 16;
 784
 785                                 mem_node->next = func->mem_head;
 786                                 func->mem_head = mem_node;
 787                         }
 788
 789                         // Save prefetchable memory base and Limit registers
 790                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
 791                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
 792
 793                         if ((w_base <= w_length) && (save_command & 0x02)) {
 794                                 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
 795                                 if (!p_mem_node)
 796                                         return -ENOMEM;
 797
 798                                 p_mem_node->base = w_base << 16;
 799                                 p_mem_node->length = (w_length - w_base + 0x10) << 16;
 800
 801                                 p_mem_node->next = func->p_mem_head;
 802                                 func->p_mem_head = p_mem_node;
 803                         }
 804                         // Figure out IO and memory base lengths
 805                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 806                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
 807
 808                                 temp_register = 0xFFFFFFFF;
 809                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 810                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 811
 812                                 temp_register = base;
 813
 814                                 if (base) {  // If this register is implemented
 815                                         if (((base & 0x03L) == 0x01)
 816                                             && (save_command & 0x01)) {
 817                                                 // IO base
 818                                                 // set temp_register = amount of IO space requested
 819                                                 temp_register = base & 0xFFFFFFFE;
 820                                                 temp_register = (~temp_register) + 1;
 821
 822                                                 io_node = kmalloc(sizeof(*io_node),
 823                                                                 GFP_KERNEL);
 824                                                 if (!io_node)
 825                                                         return -ENOMEM;
 826
 827                                                 io_node->base =
 828                                                 save_base & (~0x03L);
 829                                                 io_node->length = temp_register;
 830
 831                                                 io_node->next = func->io_head;
 832                                                 func->io_head = io_node;
 833                                         } else
 834                                                 if (((base & 0x0BL) == 0x08)
 835                                                     && (save_command & 0x02)) {
 836                                                 // prefetchable memory base
 837                                                 temp_register = base & 0xFFFFFFF0;
 838                                                 temp_register = (~temp_register) + 1;
 839
 840                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 841                                                                 GFP_KERNEL);
 842                                                 if (!p_mem_node)
 843                                                         return -ENOMEM;
 844
 845                                                 p_mem_node->base = save_base & (~0x0FL);
 846                                                 p_mem_node->length = temp_register;
 847
 848                                                 p_mem_node->next = func->p_mem_head;
 849                                                 func->p_mem_head = p_mem_node;
 850                                         } else
 851                                                 if (((base & 0x0BL) == 0x00)
 852                                                     && (save_command & 0x02)) {
 853                                                 // prefetchable memory base
 854                                                 temp_register = base & 0xFFFFFFF0;
 855                                                 temp_register = (~temp_register) + 1;
 856
 857                                                 mem_node = kmalloc(sizeof(*mem_node),
 858                                                                 GFP_KERNEL);
 859                                                 if (!mem_node)
 860                                                         return -ENOMEM;
 861
 862                                                 mem_node->base = save_base & (~0x0FL);
 863                                                 mem_node->length = temp_register;
 864
 865                                                 mem_node->next = func->mem_head;
 866                                                 func->mem_head = mem_node;
 867                                         } else
 868                                                 return(1);
 869                                 }
 870                         }       // End of base register loop
 871                 } else if ((header_type & 0x7F) == 0x00) {        // Standard header
 872                         // Figure out IO and memory base lengths
 873                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 874                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
 875
 876                                 temp_register = 0xFFFFFFFF;
 877                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 878                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 879
 880                                 temp_register = base;
 881
 882                                 if (base) {       // If this register is implemented
 883                                         if (((base & 0x03L) == 0x01)
 884                                             && (save_command & 0x01)) {
 885                                                 // IO base
 886                                                 // set temp_register = amount of IO space requested
 887                                                 temp_register = base & 0xFFFFFFFE;
 888                                                 temp_register = (~temp_register) + 1;
 889
 890                                                 io_node = kmalloc(sizeof(*io_node),
 891                                                                 GFP_KERNEL);
 892                                                 if (!io_node)
 893                                                         return -ENOMEM;
 894
 895                                                 io_node->base = save_base & (~0x01L);
 896                                                 io_node->length = temp_register;
 897
 898                                                 io_node->next = func->io_head;
 899                                                 func->io_head = io_node;
 900                                         } else
 901                                                 if (((base & 0x0BL) == 0x08)
 902                                                     && (save_command & 0x02)) {
 903                                                 // prefetchable memory base
 904                                                 temp_register = base & 0xFFFFFFF0;
 905                                                 temp_register = (~temp_register) + 1;
 906
 907                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 908                                                                 GFP_KERNEL);
 909                                                 if (!p_mem_node)
 910                                                         return -ENOMEM;
 911
 912                                                 p_mem_node->base = save_base & (~0x0FL);
 913                                                 p_mem_node->length = temp_register;
 914
 915                                                 p_mem_node->next = func->p_mem_head;
 916                                                 func->p_mem_head = p_mem_node;
 917                                         } else
 918                                                 if (((base & 0x0BL) == 0x00)
 919                                                     && (save_command & 0x02)) {
 920                                                 // prefetchable memory base
 921                                                 temp_register = base & 0xFFFFFFF0;
 922                                                 temp_register = (~temp_register) + 1;
 923
 924                                                 mem_node = kmalloc(sizeof(*mem_node),
 925                                                                 GFP_KERNEL);
 926                                                 if (!mem_node)
 927                                                         return -ENOMEM;
 928
 929                                                 mem_node->base = save_base & (~0x0FL);
 930                                                 mem_node->length = temp_register;
 931
 932                                                 mem_node->next = func->mem_head;
 933                                                 func->mem_head = mem_node;
 934                                         } else
 935                                                 return(1);
 936                                 }
 937                         }       // End of base register loop
 938                 } else {          // Some other unknown header type
 939                 }
 940
 941                 // find the next device in this slot
 942                 func = cpqhp_slot_find(func->bus, func->device, index++);
 943         }
 944
 945         return(0);
 946 }
 947
 948
 949 /*
 950  * cpqhp_configure_board
 951  *
 952  * Copies saved configuration information to one slot.
 953  * this is called recursively for bridge devices.
 954  * this is for hot plug REPLACE!
 955  *
 956  * returns 0 if success
 957  */
 958 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
 959 {
 960         int cloop;
 961         u8 header_type;
 962         u8 secondary_bus;
 963         int sub_bus;
 964         struct pci_func *next;
 965         u32 temp;
 966         u32 rc;
 967         int index = 0;
 968         struct pci_bus *pci_bus = ctrl->pci_bus;
 969         unsigned int devfn;
 970
 971         func = cpqhp_slot_find(func->bus, func->device, index++);
 972
 973         while (func != NULL) {
 974                 pci_bus->number = func->bus;
 975                 devfn = PCI_DEVFN(func->device, func->function);
 976
 977                 // Start at the top of config space so that the control
 978                 // registers are programmed last
 979                 for (cloop = 0x3C; cloop > 0; cloop -= 4) {
 980                         pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
 981                 }
 982
 983                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 984
 985                 // If this is a bridge device, restore subordinate devices
 986                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
 987                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 988
 989                         sub_bus = (int) secondary_bus;
 990
 991                         next = cpqhp_slot_list[sub_bus];
 992
 993                         while (next != NULL) {
 994                                 rc = cpqhp_configure_board(ctrl, next);
 995                                 if (rc)
 996                                         return rc;
 997
 998                                 next = next->next;
 999                         }
1000                 } else {
1001
1002                         // Check all the base Address Registers to make sure
1003                         // they are the same.  If not, the board is different.
1004
1005                         for (cloop = 16; cloop < 40; cloop += 4) {
1006                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
1007
1008                                 if (temp != func->config_space[cloop >> 2]) {
1009                                         dbg("Config space compare failure!!! offset = %x\n", cloop);
1010                                         dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
1011                                         dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
1012                                         return 1;
1013                                 }
1014                         }
1015                 }
1016
1017                 func->configured = 1;
1018
1019                 func = cpqhp_slot_find(func->bus, func->device, index++);
1020         }
1021
1022         return 0;
1023 }
1024
1025
1026 /*
1027  * cpqhp_valid_replace
1028  *
1029  * this function checks to see if a board is the same as the
1030  * one it is replacing.  this check will detect if the device's
1031  * vendor or device id's are the same
1032  *
1033  * returns 0 if the board is the same nonzero otherwise
1034  */
1035 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1036 {
1037         u8 cloop;
1038         u8 header_type;
1039         u8 secondary_bus;
1040         u8 type;
1041         u32 temp_register = 0;
1042         u32 base;
1043         u32 rc;
1044         struct pci_func *next;
1045         int index = 0;
1046         struct pci_bus *pci_bus = ctrl->pci_bus;
1047         unsigned int devfn;
1048
1049         if (!func->is_a_board)
1050                 return(ADD_NOT_SUPPORTED);
1051
1052         func = cpqhp_slot_find(func->bus, func->device, index++);
1053
1054         while (func != NULL) {
1055                 pci_bus->number = func->bus;
1056                 devfn = PCI_DEVFN(func->device, func->function);
1057
1058                 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1059
1060                 // No adapter present
1061                 if (temp_register == 0xFFFFFFFF)
1062                         return(NO_ADAPTER_PRESENT);
1063
1064                 if (temp_register != func->config_space[0])
1065                         return(ADAPTER_NOT_SAME);
1066
1067                 // Check for same revision number and class code
1068                 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1069
1070                 // Adapter not the same
1071                 if (temp_register != func->config_space[0x08 >> 2])
1072                         return(ADAPTER_NOT_SAME);
1073
1074                 // Check for Bridge
1075                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1076
1077                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {     // PCI-PCI Bridge
1078                         // In order to continue checking, we must program the
1079                         // bus registers in the bridge to respond to accesses
1080                         // for it's subordinate bus(es)
1081
1082                         temp_register = func->config_space[0x18 >> 2];
1083                         pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1084
1085                         secondary_bus = (temp_register >> 8) & 0xFF;
1086
1087                         next = cpqhp_slot_list[secondary_bus];
1088
1089                         while (next != NULL) {
1090                                 rc = cpqhp_valid_replace(ctrl, next);
1091                                 if (rc)
1092                                         return rc;
1093
1094                                 next = next->next;
1095                         }
1096
1097                 }
1098                 // Check to see if it is a standard config header
1099                 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1100                         // Check subsystem vendor and ID
1101                         pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1102
1103                         if (temp_register != func->config_space[0x2C >> 2]) {
1104                                 // If it's a SMART-2 and the register isn't filled
1105                                 // in, ignore the difference because
1106                                 // they just have an old rev of the firmware
1107
1108                                 if (!((func->config_space[0] == 0xAE100E11)
1109                                       && (temp_register == 0x00L)))
1110                                         return(ADAPTER_NOT_SAME);
1111                         }
1112                         // Figure out IO and memory base lengths
1113                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1114                                 temp_register = 0xFFFFFFFF;
1115                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1116                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1117                                 if (base) {       // If this register is implemented
1118                                         if (base & 0x01L) {
1119                                                 // IO base
1120                                                 // set base = amount of IO space requested
1121                                                 base = base & 0xFFFFFFFE;
1122                                                 base = (~base) + 1;
1123
1124                                                 type = 1;
1125                                         } else {
1126                                                 // memory base
1127                                                 base = base & 0xFFFFFFF0;
1128                                                 base = (~base) + 1;
1129
1130                                                 type = 0;
1131                                         }
1132                                 } else {
1133                                         base = 0x0L;
1134                                         type = 0;
1135                                 }
1136
1137                                 // Check information in slot structure
1138                                 if (func->base_length[(cloop - 0x10) >> 2] != base)
1139                                         return(ADAPTER_NOT_SAME);
1140
1141                                 if (func->base_type[(cloop - 0x10) >> 2] != type)
1142                                         return(ADAPTER_NOT_SAME);
1143
1144                         }       // End of base register loop
1145
1146                 }               // End of (type 0 config space) else
1147                 else {
1148                         // this is not a type 0 or 1 config space header so
1149                         // we don't know how to do it
1150                         return(DEVICE_TYPE_NOT_SUPPORTED);
1151                 }
1152
1153                 // Get the next function
1154                 func = cpqhp_slot_find(func->bus, func->device, index++);
1155         }
1156
1157
1158         return 0;
1159 }
1160
1161
1162 /*
1163  * cpqhp_find_available_resources
1164  *
1165  * Finds available memory, IO, and IRQ resources for programming
1166  * devices which may be added to the system
1167  * this function is for hot plug ADD!
1168  *
1169  * returns 0 if success
1170  */
1171 int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start)
1172 {
1173         u8 temp;
1174         u8 populated_slot;
1175         u8 bridged_slot;
1176         void __iomem *one_slot;
1177         void __iomem *rom_resource_table;
1178         struct pci_func *func = NULL;
1179         int i = 10, index;
1180         u32 temp_dword, rc;
1181         struct pci_resource *mem_node;
1182         struct pci_resource *p_mem_node;
1183         struct pci_resource *io_node;
1184         struct pci_resource *bus_node;
1185
1186         rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1187         dbg("rom_resource_table = %p\n", rom_resource_table);
1188
1189         if (rom_resource_table == NULL) {
1190                 return -ENODEV;
1191         }
1192         // Sum all resources and setup resource maps
1193         unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1194         dbg("unused_IRQ = %x\n", unused_IRQ);
1195
1196         temp = 0;
1197         while (unused_IRQ) {
1198                 if (unused_IRQ & 1) {
1199                         cpqhp_disk_irq = temp;
1200                         break;
1201                 }
1202                 unused_IRQ = unused_IRQ >> 1;
1203                 temp++;
1204         }
1205
1206         dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1207         unused_IRQ = unused_IRQ >> 1;
1208         temp++;
1209
1210         while (unused_IRQ) {
1211                 if (unused_IRQ & 1) {
1212                         cpqhp_nic_irq = temp;
1213                         break;
1214                 }
1215                 unused_IRQ = unused_IRQ >> 1;
1216                 temp++;
1217         }
1218
1219         dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1220         unused_IRQ = readl(rom_resource_table + PCIIRQ);
1221
1222         temp = 0;
1223
1224         if (!cpqhp_nic_irq) {
1225                 cpqhp_nic_irq = ctrl->cfgspc_irq;
1226         }
1227
1228         if (!cpqhp_disk_irq) {
1229                 cpqhp_disk_irq = ctrl->cfgspc_irq;
1230         }
1231
1232         dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1233
1234         rc = compaq_nvram_load(rom_start, ctrl);
1235         if (rc)
1236                 return rc;
1237
1238         one_slot = rom_resource_table + sizeof (struct hrt);
1239
1240         i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1241         dbg("number_of_entries = %d\n", i);
1242
1243         if (!readb(one_slot + SECONDARY_BUS))
1244                 return 1;
1245
1246         dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1247
1248         while (i && readb(one_slot + SECONDARY_BUS)) {
1249                 u8 dev_func = readb(one_slot + DEV_FUNC);
1250                 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1251                 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1252                 u8 max_bus = readb(one_slot + MAX_BUS);
1253                 u16 io_base = readw(one_slot + IO_BASE);
1254                 u16 io_length = readw(one_slot + IO_LENGTH);
1255                 u16 mem_base = readw(one_slot + MEM_BASE);
1256                 u16 mem_length = readw(one_slot + MEM_LENGTH);
1257                 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1258                 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1259
1260                 dbg("%2.2x | %4.4x  | %4.4x | %4.4x   | %4.4x | %4.4x   | %4.4x |%2.2x %2.2x %2.2x\n",
1261                     dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1262                     primary_bus, secondary_bus, max_bus);
1263
1264                 // If this entry isn't for our controller's bus, ignore it
1265                 if (primary_bus != ctrl->bus) {
1266                         i--;
1267                         one_slot += sizeof (struct slot_rt);
1268                         continue;
1269                 }
1270                 // find out if this entry is for an occupied slot
1271                 ctrl->pci_bus->number = primary_bus;
1272                 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1273                 dbg("temp_D_word = %x\n", temp_dword);
1274
1275                 if (temp_dword != 0xFFFFFFFF) {
1276                         index = 0;
1277                         func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1278
1279                         while (func && (func->function != (dev_func & 0x07))) {
1280                                 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1281                                 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1282                         }
1283
1284                         // If we can't find a match, skip this table entry
1285                         if (!func) {
1286                                 i--;
1287                                 one_slot += sizeof (struct slot_rt);
1288                                 continue;
1289                         }
1290                         // this may not work and shouldn't be used
1291                         if (secondary_bus != primary_bus)
1292                                 bridged_slot = 1;
1293                         else
1294                                 bridged_slot = 0;
1295
1296                         populated_slot = 1;
1297                 } else {
1298                         populated_slot = 0;
1299                         bridged_slot = 0;
1300                 }
1301
1302
1303                 // If we've got a valid IO base, use it
1304
1305                 temp_dword = io_base + io_length;
1306
1307                 if ((io_base) && (temp_dword < 0x10000)) {
1308                         io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
1309                         if (!io_node)
1310                                 return -ENOMEM;
1311
1312                         io_node->base = io_base;
1313                         io_node->length = io_length;
1314
1315                         dbg("found io_node(base, length) = %x, %x\n",
1316                                         io_node->base, io_node->length);
1317                         dbg("populated slot =%d \n", populated_slot);
1318                         if (!populated_slot) {
1319                                 io_node->next = ctrl->io_head;
1320                                 ctrl->io_head = io_node;
1321                         } else {
1322                                 io_node->next = func->io_head;
1323                                 func->io_head = io_node;
1324                         }
1325                 }
1326
1327                 // If we've got a valid memory base, use it
1328                 temp_dword = mem_base + mem_length;
1329                 if ((mem_base) && (temp_dword < 0x10000)) {
1330                         mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
1331                         if (!mem_node)
1332                                 return -ENOMEM;
1333
1334                         mem_node->base = mem_base << 16;
1335
1336                         mem_node->length = mem_length << 16;
1337
1338                         dbg("found mem_node(base, length) = %x, %x\n",
1339                                         mem_node->base, mem_node->length);
1340                         dbg("populated slot =%d \n", populated_slot);
1341                         if (!populated_slot) {
1342                                 mem_node->next = ctrl->mem_head;
1343                                 ctrl->mem_head = mem_node;
1344                         } else {
1345                                 mem_node->next = func->mem_head;
1346                                 func->mem_head = mem_node;
1347                         }
1348                 }
1349
1350                 // If we've got a valid prefetchable memory base, and
1351                 // the base + length isn't greater than 0xFFFF
1352                 temp_dword = pre_mem_base + pre_mem_length;
1353                 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1354                         p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
1355                         if (!p_mem_node)
1356                                 return -ENOMEM;
1357
1358                         p_mem_node->base = pre_mem_base << 16;
1359
1360                         p_mem_node->length = pre_mem_length << 16;
1361                         dbg("found p_mem_node(base, length) = %x, %x\n",
1362                                         p_mem_node->base, p_mem_node->length);
1363                         dbg("populated slot =%d \n", populated_slot);
1364
1365                         if (!populated_slot) {
1366                                 p_mem_node->next = ctrl->p_mem_head;
1367                                 ctrl->p_mem_head = p_mem_node;
1368                         } else {
1369                                 p_mem_node->next = func->p_mem_head;
1370                                 func->p_mem_head = p_mem_node;
1371                         }
1372                 }
1373
1374                 // If we've got a valid bus number, use it
1375                 // The second condition is to ignore bus numbers on
1376                 // populated slots that don't have PCI-PCI bridges
1377                 if (secondary_bus && (secondary_bus != primary_bus)) {
1378                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1379                         if (!bus_node)
1380                                 return -ENOMEM;
1381
1382                         bus_node->base = secondary_bus;
1383                         bus_node->length = max_bus - secondary_bus + 1;
1384                         dbg("found bus_node(base, length) = %x, %x\n",
1385                                         bus_node->base, bus_node->length);
1386                         dbg("populated slot =%d \n", populated_slot);
1387                         if (!populated_slot) {
1388                                 bus_node->next = ctrl->bus_head;
1389                                 ctrl->bus_head = bus_node;
1390                         } else {
1391                                 bus_node->next = func->bus_head;
1392                                 func->bus_head = bus_node;
1393                         }
1394                 }
1395
1396                 i--;
1397                 one_slot += sizeof (struct slot_rt);
1398         }
1399
1400         // If all of the following fail, we don't have any resources for
1401         // hot plug add
1402         rc = 1;
1403         rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1404         rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1405         rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1406         rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1407
1408         return rc;
1409 }
1410
1411
1412 /*
1413  * cpqhp_return_board_resources
1414  *
1415  * this routine returns all resources allocated to a board to
1416  * the available pool.
1417  *
1418  * returns 0 if success
1419  */
1420 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
1421 {
1422         int rc = 0;
1423         struct pci_resource *node;
1424         struct pci_resource *t_node;
1425         dbg("%s\n", __FUNCTION__);
1426
1427         if (!func)
1428                 return 1;
1429
1430         node = func->io_head;
1431         func->io_head = NULL;
1432         while (node) {
1433                 t_node = node->next;
1434                 return_resource(&(resources->io_head), node);
1435                 node = t_node;
1436         }
1437
1438         node = func->mem_head;
1439         func->mem_head = NULL;
1440         while (node) {
1441                 t_node = node->next;
1442                 return_resource(&(resources->mem_head), node);
1443                 node = t_node;
1444         }
1445
1446         node = func->p_mem_head;
1447         func->p_mem_head = NULL;
1448         while (node) {
1449                 t_node = node->next;
1450                 return_resource(&(resources->p_mem_head), node);
1451                 node = t_node;
1452         }
1453
1454         node = func->bus_head;
1455         func->bus_head = NULL;
1456         while (node) {
1457                 t_node = node->next;
1458                 return_resource(&(resources->bus_head), node);
1459                 node = t_node;
1460         }
1461
1462         rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1463         rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1464         rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1465         rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1466
1467         return rc;
1468 }
1469
1470
1471 /*
1472  * cpqhp_destroy_resource_list
1473  *
1474  * Puts node back in the resource list pointed to by head
1475  */
1476 void cpqhp_destroy_resource_list (struct resource_lists * resources)
1477 {
1478         struct pci_resource *res, *tres;
1479
1480         res = resources->io_head;
1481         resources->io_head = NULL;
1482
1483         while (res) {
1484                 tres = res;
1485                 res = res->next;
1486                 kfree(tres);
1487         }
1488
1489         res = resources->mem_head;
1490         resources->mem_head = NULL;
1491
1492         while (res) {
1493                 tres = res;
1494                 res = res->next;
1495                 kfree(tres);
1496         }
1497
1498         res = resources->p_mem_head;
1499         resources->p_mem_head = NULL;
1500
1501         while (res) {
1502                 tres = res;
1503                 res = res->next;
1504                 kfree(tres);
1505         }
1506
1507         res = resources->bus_head;
1508         resources->bus_head = NULL;
1509
1510         while (res) {
1511                 tres = res;
1512                 res = res->next;
1513                 kfree(tres);
1514         }
1515 }
1516
1517
1518 /*
1519  * cpqhp_destroy_board_resources
1520  *
1521  * Puts node back in the resource list pointed to by head
1522  */
1523 void cpqhp_destroy_board_resources (struct pci_func * func)
1524 {
1525         struct pci_resource *res, *tres;
1526
1527         res = func->io_head;
1528         func->io_head = NULL;
1529
1530         while (res) {
1531                 tres = res;
1532                 res = res->next;
1533                 kfree(tres);
1534         }
1535
1536         res = func->mem_head;
1537         func->mem_head = NULL;
1538
1539         while (res) {
1540                 tres = res;
1541                 res = res->next;
1542                 kfree(tres);
1543         }
1544
1545         res = func->p_mem_head;
1546         func->p_mem_head = NULL;
1547
1548         while (res) {
1549                 tres = res;
1550                 res = res->next;
1551                 kfree(tres);
1552         }
1553
1554         res = func->bus_head;
1555         func->bus_head = NULL;
1556
1557         while (res) {
1558                 tres = res;
1559                 res = res->next;
1560                 kfree(tres);
1561         }
1562 }
1563