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   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/module.h>
  58 #include <linux/kernel.h>
  59 #include <linux/errno.h>
  60 #include <linux/string.h>
  61 #include <linux/mm.h>
  62 #include <linux/tty.h>
  63 #include <linux/slab.h>
  64 #include <linux/delay.h>
  65 #include <linux/fb.h>
  66 #include <linux/pci.h>
  67 #include <linux/init.h>
  68 #ifdef CONFIG_TOSHIBA
  69 #include <linux/toshiba.h>
  70 extern int tosh_smm(SMMRegisters *regs);
  71 #endif
  72
  73 #include <asm/io.h>
  74 #include <asm/irq.h>
  75 #include <asm/pgtable.h>
  76 #include <asm/system.h>
  77 #include <asm/uaccess.h>
  78
  79 #ifdef CONFIG_MTRR
  80 #include <asm/mtrr.h>
  81 #endif
  82
  83 #include <video/vga.h>
  84 #include <video/neomagic.h>
  85
  86 #define NEOFB_VERSION "0.4.2"
  87
  88 /* --------------------------------------------------------------------- */
  89
  90 static int internal;
  91 static int external;
  92 static int libretto;
  93 static int nostretch;
  94 static int nopciburst;
  95 static char *mode_option __devinitdata = NULL;
  96
  97 #ifdef MODULE
  98
  99 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
 100 MODULE_LICENSE("GPL");
 101 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
 102 module_param(internal, bool, 0);
 103 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 104 module_param(external, bool, 0);
 105 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 106 module_param(libretto, bool, 0);
 107 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 108 module_param(nostretch, bool, 0);
 109 MODULE_PARM_DESC(nostretch,
 110                  "Disable stretching of modes smaller than LCD.");
 111 module_param(nopciburst, bool, 0);
 112 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 113 module_param(mode_option, charp, 0);
 114 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 115
 116 #endif
 117
 118
 119 /* --------------------------------------------------------------------- */
 120
 121 static biosMode bios8[] = {
 122         {320, 240, 0x40},
 123         {300, 400, 0x42},
 124         {640, 400, 0x20},
 125         {640, 480, 0x21},
 126         {800, 600, 0x23},
 127         {1024, 768, 0x25},
 128 };
 129
 130 static biosMode bios16[] = {
 131         {320, 200, 0x2e},
 132         {320, 240, 0x41},
 133         {300, 400, 0x43},
 134         {640, 480, 0x31},
 135         {800, 600, 0x34},
 136         {1024, 768, 0x37},
 137 };
 138
 139 static biosMode bios24[] = {
 140         {640, 480, 0x32},
 141         {800, 600, 0x35},
 142         {1024, 768, 0x38}
 143 };
 144
 145 #ifdef NO_32BIT_SUPPORT_YET
 146 /* FIXME: guessed values, wrong */
 147 static biosMode bios32[] = {
 148         {640, 480, 0x33},
 149         {800, 600, 0x36},
 150         {1024, 768, 0x39}
 151 };
 152 #endif
 153
 154 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 155 {
 156         writel(val, par->neo2200 + par->cursorOff + regindex);
 157 }
 158
 159 static int neoFindMode(int xres, int yres, int depth)
 160 {
 161         int xres_s;
 162         int i, size;
 163         biosMode *mode;
 164
 165         switch (depth) {
 166         case 8:
 167                 size = ARRAY_SIZE(bios8);
 168                 mode = bios8;
 169                 break;
 170         case 16:
 171                 size = ARRAY_SIZE(bios16);
 172                 mode = bios16;
 173                 break;
 174         case 24:
 175                 size = ARRAY_SIZE(bios24);
 176                 mode = bios24;
 177                 break;
 178 #ifdef NO_32BIT_SUPPORT_YET
 179         case 32:
 180                 size = ARRAY_SIZE(bios32);
 181                 mode = bios32;
 182                 break;
 183 #endif
 184         default:
 185                 return 0;
 186         }
 187
 188         for (i = 0; i < size; i++) {
 189                 if (xres <= mode[i].x_res) {
 190                         xres_s = mode[i].x_res;
 191                         for (; i < size; i++) {
 192                                 if (mode[i].x_res != xres_s)
 193                                         return mode[i - 1].mode;
 194                                 if (yres <= mode[i].y_res)
 195                                         return mode[i].mode;
 196                         }
 197                 }
 198         }
 199         return mode[size - 1].mode;
 200 }
 201
 202 /*
 203  * neoCalcVCLK --
 204  *
 205  * Determine the closest clock frequency to the one requested.
 206  */
 207 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 208 #define MAX_N 127
 209 #define MAX_D 31
 210 #define MAX_F 1
 211
 212 static void neoCalcVCLK(const struct fb_info *info,
 213                         struct neofb_par *par, long freq)
 214 {
 215         int n, d, f;
 216         int n_best = 0, d_best = 0, f_best = 0;
 217         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 218         long f_target = (freq << 12) / 1000;    /* 20.12 */
 219
 220         for (f = 0; f <= MAX_F; f++)
 221                 for (n = 0; n <= MAX_N; n++)
 222                         for (d = 0; d <= MAX_D; d++) {
 223                                 long f_out;     /* 20.12 */
 224                                 long f_diff;    /* 20.12 */
 225
 226                                 f_out =
 227                                     ((((n + 1) << 12) / ((d +
 228                                                           1) *
 229                                                          (1 << f))) >> 12)
 230                                     * REF_FREQ;
 231                                 f_diff = abs(f_out - f_target);
 232                                 if (f_diff < f_best_diff) {
 233                                         f_best_diff = f_diff;
 234                                         n_best = n;
 235                                         d_best = d;
 236                                         f_best = f;
 237                                 }
 238                         }
 239
 240         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 241             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 242             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 243             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 244                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 245                    We should be able to try n up to 2047 */
 246                 par->VCLK3NumeratorLow = n_best;
 247                 par->VCLK3NumeratorHigh = (f_best << 7);
 248         } else
 249                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 250
 251         par->VCLK3Denominator = d_best;
 252
 253 #ifdef NEOFB_DEBUG
 254         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 255                f_target >> 12,
 256                par->VCLK3NumeratorLow,
 257                par->VCLK3NumeratorHigh,
 258                par->VCLK3Denominator, f_best_diff >> 12);
 259 #endif
 260 }
 261
 262 /*
 263  * vgaHWInit --
 264  *      Handle the initialization, etc. of a screen.
 265  *      Return FALSE on failure.
 266  */
 267
 268 static int vgaHWInit(const struct fb_var_screeninfo *var,
 269                      const struct fb_info *info,
 270                      struct neofb_par *par, struct xtimings *timings)
 271 {
 272         par->MiscOutReg = 0x23;
 273
 274         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 275                 par->MiscOutReg |= 0x40;
 276
 277         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 278                 par->MiscOutReg |= 0x80;
 279
 280         /*
 281          * Time Sequencer
 282          */
 283         par->Sequencer[0] = 0x00;
 284         par->Sequencer[1] = 0x01;
 285         par->Sequencer[2] = 0x0F;
 286         par->Sequencer[3] = 0x00;       /* Font select */
 287         par->Sequencer[4] = 0x0E;       /* Misc */
 288
 289         /*
 290          * CRTC Controller
 291          */
 292         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 293         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 294         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 295         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 296         par->CRTC[4] = (timings->HSyncStart >> 3);
 297         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 298             | (((timings->HSyncEnd >> 3)) & 0x1F);
 299         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 300         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 301             | (((timings->VDisplay - 1) & 0x100) >> 7)
 302             | ((timings->VSyncStart & 0x100) >> 6)
 303             | (((timings->VDisplay - 1) & 0x100) >> 5)
 304             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 305             | (((timings->VDisplay - 1) & 0x200) >> 3)
 306             | ((timings->VSyncStart & 0x200) >> 2);
 307         par->CRTC[8] = 0x00;
 308         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 309
 310         if (timings->dblscan)
 311                 par->CRTC[9] |= 0x80;
 312
 313         par->CRTC[10] = 0x00;
 314         par->CRTC[11] = 0x00;
 315         par->CRTC[12] = 0x00;
 316         par->CRTC[13] = 0x00;
 317         par->CRTC[14] = 0x00;
 318         par->CRTC[15] = 0x00;
 319         par->CRTC[16] = timings->VSyncStart & 0xFF;
 320         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 321         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 322         par->CRTC[19] = var->xres_virtual >> 4;
 323         par->CRTC[20] = 0x00;
 324         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 325         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 326         par->CRTC[23] = 0xC3;
 327         par->CRTC[24] = 0xFF;
 328
 329         /*
 330          * are these unnecessary?
 331          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 332          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 333          */
 334
 335         /*
 336          * Graphics Display Controller
 337          */
 338         par->Graphics[0] = 0x00;
 339         par->Graphics[1] = 0x00;
 340         par->Graphics[2] = 0x00;
 341         par->Graphics[3] = 0x00;
 342         par->Graphics[4] = 0x00;
 343         par->Graphics[5] = 0x40;
 344         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 345         par->Graphics[7] = 0x0F;
 346         par->Graphics[8] = 0xFF;
 347
 348
 349         par->Attribute[0] = 0x00;       /* standard colormap translation */
 350         par->Attribute[1] = 0x01;
 351         par->Attribute[2] = 0x02;
 352         par->Attribute[3] = 0x03;
 353         par->Attribute[4] = 0x04;
 354         par->Attribute[5] = 0x05;
 355         par->Attribute[6] = 0x06;
 356         par->Attribute[7] = 0x07;
 357         par->Attribute[8] = 0x08;
 358         par->Attribute[9] = 0x09;
 359         par->Attribute[10] = 0x0A;
 360         par->Attribute[11] = 0x0B;
 361         par->Attribute[12] = 0x0C;
 362         par->Attribute[13] = 0x0D;
 363         par->Attribute[14] = 0x0E;
 364         par->Attribute[15] = 0x0F;
 365         par->Attribute[16] = 0x41;
 366         par->Attribute[17] = 0xFF;
 367         par->Attribute[18] = 0x0F;
 368         par->Attribute[19] = 0x00;
 369         par->Attribute[20] = 0x00;
 370         return 0;
 371 }
 372
 373 static void vgaHWLock(struct vgastate *state)
 374 {
 375         /* Protect CRTC[0-7] */
 376         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 377 }
 378
 379 static void vgaHWUnlock(void)
 380 {
 381         /* Unprotect CRTC[0-7] */
 382         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 383 }
 384
 385 static void neoLock(struct vgastate *state)
 386 {
 387         vga_wgfx(state->vgabase, 0x09, 0x00);
 388         vgaHWLock(state);
 389 }
 390
 391 static void neoUnlock(void)
 392 {
 393         vgaHWUnlock();
 394         vga_wgfx(NULL, 0x09, 0x26);
 395 }
 396
 397 /*
 398  * VGA Palette management
 399  */
 400 static int paletteEnabled = 0;
 401
 402 static inline void VGAenablePalette(void)
 403 {
 404         vga_r(NULL, VGA_IS1_RC);
 405         vga_w(NULL, VGA_ATT_W, 0x00);
 406         paletteEnabled = 1;
 407 }
 408
 409 static inline void VGAdisablePalette(void)
 410 {
 411         vga_r(NULL, VGA_IS1_RC);
 412         vga_w(NULL, VGA_ATT_W, 0x20);
 413         paletteEnabled = 0;
 414 }
 415
 416 static inline void VGAwATTR(u8 index, u8 value)
 417 {
 418         if (paletteEnabled)
 419                 index &= ~0x20;
 420         else
 421                 index |= 0x20;
 422
 423         vga_r(NULL, VGA_IS1_RC);
 424         vga_wattr(NULL, index, value);
 425 }
 426
 427 static void vgaHWProtect(int on)
 428 {
 429         unsigned char tmp;
 430
 431         if (on) {
 432                 /*
 433                  * Turn off screen and disable sequencer.
 434                  */
 435                 tmp = vga_rseq(NULL, 0x01);
 436                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 437                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 438
 439                 VGAenablePalette();
 440         } else {
 441                 /*
 442                  * Reenable sequencer, then turn on screen.
 443                  */
 444                 tmp = vga_rseq(NULL, 0x01);
 445                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 446                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 447
 448                 VGAdisablePalette();
 449         }
 450 }
 451
 452 static void vgaHWRestore(const struct fb_info *info,
 453                          const struct neofb_par *par)
 454 {
 455         int i;
 456
 457         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 458
 459         for (i = 1; i < 5; i++)
 460                 vga_wseq(NULL, i, par->Sequencer[i]);
 461
 462         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 463         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 464
 465         for (i = 0; i < 25; i++)
 466                 vga_wcrt(NULL, i, par->CRTC[i]);
 467
 468         for (i = 0; i < 9; i++)
 469                 vga_wgfx(NULL, i, par->Graphics[i]);
 470
 471         VGAenablePalette();
 472
 473         for (i = 0; i < 21; i++)
 474                 VGAwATTR(i, par->Attribute[i]);
 475
 476         VGAdisablePalette();
 477 }
 478
 479
 480 /* -------------------- Hardware specific routines ------------------------- */
 481
 482 /*
 483  * Hardware Acceleration for Neo2200+
 484  */
 485 static inline int neo2200_sync(struct fb_info *info)
 486 {
 487         struct neofb_par *par = info->par;
 488
 489         while (readl(&par->neo2200->bltStat) & 1);
 490         return 0;
 491 }
 492
 493 static inline void neo2200_wait_fifo(struct fb_info *info,
 494                                      int requested_fifo_space)
 495 {
 496         //  ndev->neo.waitfifo_calls++;
 497         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 498
 499         /* FIXME: does not work
 500            if (neo_fifo_space < requested_fifo_space)
 501            {
 502            neo_fifo_waitcycles++;
 503
 504            while (1)
 505            {
 506            neo_fifo_space = (neo2200->bltStat >> 8);
 507            if (neo_fifo_space >= requested_fifo_space)
 508            break;
 509            }
 510            }
 511            else
 512            {
 513            neo_fifo_cache_hits++;
 514            }
 515
 516            neo_fifo_space -= requested_fifo_space;
 517          */
 518
 519         neo2200_sync(info);
 520 }
 521
 522 static inline void neo2200_accel_init(struct fb_info *info,
 523                                       struct fb_var_screeninfo *var)
 524 {
 525         struct neofb_par *par = info->par;
 526         Neo2200 __iomem *neo2200 = par->neo2200;
 527         u32 bltMod, pitch;
 528
 529         neo2200_sync(info);
 530
 531         switch (var->bits_per_pixel) {
 532         case 8:
 533                 bltMod = NEO_MODE1_DEPTH8;
 534                 pitch = var->xres_virtual;
 535                 break;
 536         case 15:
 537         case 16:
 538                 bltMod = NEO_MODE1_DEPTH16;
 539                 pitch = var->xres_virtual * 2;
 540                 break;
 541         case 24:
 542                 bltMod = NEO_MODE1_DEPTH24;
 543                 pitch = var->xres_virtual * 3;
 544                 break;
 545         default:
 546                 printk(KERN_ERR
 547                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 548                 return;
 549         }
 550
 551         writel(bltMod << 16, &neo2200->bltStat);
 552         writel((pitch << 16) | pitch, &neo2200->pitch);
 553 }
 554
 555 /* --------------------------------------------------------------------- */
 556
 557 static int
 558 neofb_open(struct fb_info *info, int user)
 559 {
 560         struct neofb_par *par = info->par;
 561         int cnt = atomic_read(&par->ref_count);
 562
 563         if (!cnt) {
 564                 memset(&par->state, 0, sizeof(struct vgastate));
 565                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 566                 save_vga(&par->state);
 567         }
 568         atomic_inc(&par->ref_count);
 569         return 0;
 570 }
 571
 572 static int
 573 neofb_release(struct fb_info *info, int user)
 574 {
 575         struct neofb_par *par = info->par;
 576         int cnt = atomic_read(&par->ref_count);
 577
 578         if (!cnt)
 579                 return -EINVAL;
 580         if (cnt == 1) {
 581                 restore_vga(&par->state);
 582         }
 583         atomic_dec(&par->ref_count);
 584         return 0;
 585 }
 586
 587 static int
 588 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 589 {
 590         struct neofb_par *par = info->par;
 591         unsigned int pixclock = var->pixclock;
 592         struct xtimings timings;
 593         int memlen, vramlen;
 594         int mode_ok = 0;
 595
 596         DBG("neofb_check_var");
 597
 598         if (!pixclock)
 599                 pixclock = 10000;       /* 10ns = 100MHz */
 600         timings.pixclock = 1000000000 / pixclock;
 601         if (timings.pixclock < 1)
 602                 timings.pixclock = 1;
 603
 604         if (timings.pixclock > par->maxClock)
 605                 return -EINVAL;
 606
 607         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 608         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 609         timings.HDisplay = var->xres;
 610         timings.HSyncStart = timings.HDisplay + var->right_margin;
 611         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 612         timings.HTotal = timings.HSyncEnd + var->left_margin;
 613         timings.VDisplay = var->yres;
 614         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 615         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 616         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 617         timings.sync = var->sync;
 618
 619         /* Is the mode larger than the LCD panel? */
 620         if (par->internal_display &&
 621             ((var->xres > par->NeoPanelWidth) ||
 622              (var->yres > par->NeoPanelHeight))) {
 623                 printk(KERN_INFO
 624                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 625                        var->xres, var->yres, par->NeoPanelWidth,
 626                        par->NeoPanelHeight);
 627                 return -EINVAL;
 628         }
 629
 630         /* Is the mode one of the acceptable sizes? */
 631         if (!par->internal_display)
 632                 mode_ok = 1;
 633         else {
 634                 switch (var->xres) {
 635                 case 1280:
 636                         if (var->yres == 1024)
 637                                 mode_ok = 1;
 638                         break;
 639                 case 1024:
 640                         if (var->yres == 768)
 641                                 mode_ok = 1;
 642                         break;
 643                 case 800:
 644                         if (var->yres == (par->libretto ? 480 : 600))
 645                                 mode_ok = 1;
 646                         break;
 647                 case 640:
 648                         if (var->yres == 480)
 649                                 mode_ok = 1;
 650                         break;
 651                 }
 652         }
 653
 654         if (!mode_ok) {
 655                 printk(KERN_INFO
 656                        "Mode (%dx%d) won't display properly on LCD\n",
 657                        var->xres, var->yres);
 658                 return -EINVAL;
 659         }
 660
 661         var->red.msb_right = 0;
 662         var->green.msb_right = 0;
 663         var->blue.msb_right = 0;
 664
 665         switch (var->bits_per_pixel) {
 666         case 8:         /* PSEUDOCOLOUR, 256 */
 667                 var->transp.offset = 0;
 668                 var->transp.length = 0;
 669                 var->red.offset = 0;
 670                 var->red.length = 8;
 671                 var->green.offset = 0;
 672                 var->green.length = 8;
 673                 var->blue.offset = 0;
 674                 var->blue.length = 8;
 675                 break;
 676
 677         case 16:                /* DIRECTCOLOUR, 64k */
 678                 var->transp.offset = 0;
 679                 var->transp.length = 0;
 680                 var->red.offset = 11;
 681                 var->red.length = 5;
 682                 var->green.offset = 5;
 683                 var->green.length = 6;
 684                 var->blue.offset = 0;
 685                 var->blue.length = 5;
 686                 break;
 687
 688         case 24:                /* TRUECOLOUR, 16m */
 689                 var->transp.offset = 0;
 690                 var->transp.length = 0;
 691                 var->red.offset = 16;
 692                 var->red.length = 8;
 693                 var->green.offset = 8;
 694                 var->green.length = 8;
 695                 var->blue.offset = 0;
 696                 var->blue.length = 8;
 697                 break;
 698
 699 #ifdef NO_32BIT_SUPPORT_YET
 700         case 32:                /* TRUECOLOUR, 16m */
 701                 var->transp.offset = 24;
 702                 var->transp.length = 8;
 703                 var->red.offset = 16;
 704                 var->red.length = 8;
 705                 var->green.offset = 8;
 706                 var->green.length = 8;
 707                 var->blue.offset = 0;
 708                 var->blue.length = 8;
 709                 break;
 710 #endif
 711         default:
 712                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 713                        var->bits_per_pixel);
 714                 return -EINVAL;
 715         }
 716
 717         vramlen = info->fix.smem_len;
 718         if (vramlen > 4 * 1024 * 1024)
 719                 vramlen = 4 * 1024 * 1024;
 720
 721         if (var->yres_virtual < var->yres)
 722                 var->yres_virtual = var->yres;
 723         if (var->xres_virtual < var->xres)
 724                 var->xres_virtual = var->xres;
 725
 726         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 727
 728         if (memlen > vramlen) {
 729                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 730                                         var->bits_per_pixel);
 731                 memlen = var->xres_virtual * var->bits_per_pixel *
 732                                 var->yres_virtual / 8;
 733         }
 734
 735         /* we must round yres/xres down, we already rounded y/xres_virtual up
 736            if it was possible. We should return -EINVAL, but I disagree */
 737         if (var->yres_virtual < var->yres)
 738                 var->yres = var->yres_virtual;
 739         if (var->xres_virtual < var->xres)
 740                 var->xres = var->xres_virtual;
 741         if (var->xoffset + var->xres > var->xres_virtual)
 742                 var->xoffset = var->xres_virtual - var->xres;
 743         if (var->yoffset + var->yres > var->yres_virtual)
 744                 var->yoffset = var->yres_virtual - var->yres;
 745
 746         var->nonstd = 0;
 747         var->height = -1;
 748         var->width = -1;
 749
 750         if (var->bits_per_pixel >= 24 || !par->neo2200)
 751                 var->accel_flags &= ~FB_ACCELF_TEXT;
 752         return 0;
 753 }
 754
 755 static int neofb_set_par(struct fb_info *info)
 756 {
 757         struct neofb_par *par = info->par;
 758         struct xtimings timings;
 759         unsigned char temp;
 760         int i, clock_hi = 0;
 761         int lcd_stretch;
 762         int hoffset, voffset;
 763
 764         DBG("neofb_set_par");
 765
 766         neoUnlock();
 767
 768         vgaHWProtect(1);        /* Blank the screen */
 769
 770         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 771         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 772         timings.HDisplay = info->var.xres;
 773         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 774         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 775         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 776         timings.VDisplay = info->var.yres;
 777         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 778         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 779         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 780         timings.sync = info->var.sync;
 781         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 782
 783         if (timings.pixclock < 1)
 784                 timings.pixclock = 1;
 785
 786         /*
 787          * This will allocate the datastructure and initialize all of the
 788          * generic VGA registers.
 789          */
 790
 791         if (vgaHWInit(&info->var, info, par, &timings))
 792                 return -EINVAL;
 793
 794         /*
 795          * The default value assigned by vgaHW.c is 0x41, but this does
 796          * not work for NeoMagic.
 797          */
 798         par->Attribute[16] = 0x01;
 799
 800         switch (info->var.bits_per_pixel) {
 801         case 8:
 802                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 803                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 804                 par->ExtColorModeSelect = 0x11;
 805                 break;
 806         case 16:
 807                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 808                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 809                 par->ExtColorModeSelect = 0x13;
 810                 break;
 811         case 24:
 812                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 813                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 814                 par->ExtColorModeSelect = 0x14;
 815                 break;
 816 #ifdef NO_32BIT_SUPPORT_YET
 817         case 32:                /* FIXME: guessed values */
 818                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 819                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 820                 par->ExtColorModeSelect = 0x15;
 821                 break;
 822 #endif
 823         default:
 824                 break;
 825         }
 826
 827         par->ExtCRTDispAddr = 0x10;
 828
 829         /* Vertical Extension */
 830         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 831             | (((timings.VDisplay - 1) & 0x400) >> 9)
 832             | (((timings.VSyncStart) & 0x400) >> 8)
 833             | (((timings.VSyncStart) & 0x400) >> 7);
 834
 835         /* Fast write bursts on unless disabled. */
 836         if (par->pci_burst)
 837                 par->SysIfaceCntl1 = 0x30;
 838         else
 839                 par->SysIfaceCntl1 = 0x00;
 840
 841         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 842
 843         /* Initialize: by default, we want display config register to be read */
 844         par->PanelDispCntlRegRead = 1;
 845
 846         /* Enable any user specified display devices. */
 847         par->PanelDispCntlReg1 = 0x00;
 848         if (par->internal_display)
 849                 par->PanelDispCntlReg1 |= 0x02;
 850         if (par->external_display)
 851                 par->PanelDispCntlReg1 |= 0x01;
 852
 853         /* If the user did not specify any display devices, then... */
 854         if (par->PanelDispCntlReg1 == 0x00) {
 855                 /* Default to internal (i.e., LCD) only. */
 856                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
 857         }
 858
 859         /* If we are using a fixed mode, then tell the chip we are. */
 860         switch (info->var.xres) {
 861         case 1280:
 862                 par->PanelDispCntlReg1 |= 0x60;
 863                 break;
 864         case 1024:
 865                 par->PanelDispCntlReg1 |= 0x40;
 866                 break;
 867         case 800:
 868                 par->PanelDispCntlReg1 |= 0x20;
 869                 break;
 870         case 640:
 871         default:
 872                 break;
 873         }
 874
 875         /* Setup shadow register locking. */
 876         switch (par->PanelDispCntlReg1 & 0x03) {
 877         case 0x01:              /* External CRT only mode: */
 878                 par->GeneralLockReg = 0x00;
 879                 /* We need to program the VCLK for external display only mode. */
 880                 par->ProgramVCLK = 1;
 881                 break;
 882         case 0x02:              /* Internal LCD only mode: */
 883         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 884                 par->GeneralLockReg = 0x01;
 885                 /* Don't program the VCLK when using the LCD. */
 886                 par->ProgramVCLK = 0;
 887                 break;
 888         }
 889
 890         /*
 891          * If the screen is to be stretched, turn on stretching for the
 892          * various modes.
 893          *
 894          * OPTION_LCD_STRETCH means stretching should be turned off!
 895          */
 896         par->PanelDispCntlReg2 = 0x00;
 897         par->PanelDispCntlReg3 = 0x00;
 898
 899         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 900             (info->var.xres != par->NeoPanelWidth)) {
 901                 switch (info->var.xres) {
 902                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 903                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 904                 case 640:
 905                 case 800:
 906                 case 1024:
 907                         lcd_stretch = 1;
 908                         par->PanelDispCntlReg2 |= 0xC6;
 909                         break;
 910                 default:
 911                         lcd_stretch = 0;
 912                         /* No stretching in these modes. */
 913                 }
 914         } else
 915                 lcd_stretch = 0;
 916
 917         /*
 918          * If the screen is to be centerd, turn on the centering for the
 919          * various modes.
 920          */
 921         par->PanelVertCenterReg1 = 0x00;
 922         par->PanelVertCenterReg2 = 0x00;
 923         par->PanelVertCenterReg3 = 0x00;
 924         par->PanelVertCenterReg4 = 0x00;
 925         par->PanelVertCenterReg5 = 0x00;
 926         par->PanelHorizCenterReg1 = 0x00;
 927         par->PanelHorizCenterReg2 = 0x00;
 928         par->PanelHorizCenterReg3 = 0x00;
 929         par->PanelHorizCenterReg4 = 0x00;
 930         par->PanelHorizCenterReg5 = 0x00;
 931
 932
 933         if (par->PanelDispCntlReg1 & 0x02) {
 934                 if (info->var.xres == par->NeoPanelWidth) {
 935                         /*
 936                          * No centering required when the requested display width
 937                          * equals the panel width.
 938                          */
 939                 } else {
 940                         par->PanelDispCntlReg2 |= 0x01;
 941                         par->PanelDispCntlReg3 |= 0x10;
 942
 943                         /* Calculate the horizontal and vertical offsets. */
 944                         if (!lcd_stretch) {
 945                                 hoffset =
 946                                     ((par->NeoPanelWidth -
 947                                       info->var.xres) >> 4) - 1;
 948                                 voffset =
 949                                     ((par->NeoPanelHeight -
 950                                       info->var.yres) >> 1) - 2;
 951                         } else {
 952                                 /* Stretched modes cannot be centered. */
 953                                 hoffset = 0;
 954                                 voffset = 0;
 955                         }
 956
 957                         switch (info->var.xres) {
 958                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 959                                 par->PanelHorizCenterReg3 = hoffset;
 960                                 par->PanelVertCenterReg2 = voffset;
 961                                 break;
 962                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 963                                 par->PanelHorizCenterReg4 = hoffset;
 964                                 par->PanelVertCenterReg1 = voffset;
 965                                 break;
 966                         case 640:
 967                                 par->PanelHorizCenterReg1 = hoffset;
 968                                 par->PanelVertCenterReg3 = voffset;
 969                                 break;
 970                         case 800:
 971                                 par->PanelHorizCenterReg2 = hoffset;
 972                                 par->PanelVertCenterReg4 = voffset;
 973                                 break;
 974                         case 1024:
 975                                 par->PanelHorizCenterReg5 = hoffset;
 976                                 par->PanelVertCenterReg5 = voffset;
 977                                 break;
 978                         case 1280:
 979                         default:
 980                                 /* No centering in these modes. */
 981                                 break;
 982                         }
 983                 }
 984         }
 985
 986         par->biosMode =
 987             neoFindMode(info->var.xres, info->var.yres,
 988                         info->var.bits_per_pixel);
 989
 990         /*
 991          * Calculate the VCLK that most closely matches the requested dot
 992          * clock.
 993          */
 994         neoCalcVCLK(info, par, timings.pixclock);
 995
 996         /* Since we program the clocks ourselves, always use VCLK3. */
 997         par->MiscOutReg |= 0x0C;
 998
 999         /* alread unlocked above */
1000         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1001
1002         /* don't know what this is, but it's 0 from bootup anyway */
1003         vga_wgfx(NULL, 0x15, 0x00);
1004
1005         /* was set to 0x01 by my bios in text and vesa modes */
1006         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1007
1008         /*
1009          * The color mode needs to be set before calling vgaHWRestore
1010          * to ensure the DAC is initialized properly.
1011          *
1012          * NOTE: Make sure we don't change bits make sure we don't change
1013          * any reserved bits.
1014          */
1015         temp = vga_rgfx(NULL, 0x90);
1016         switch (info->fix.accel) {
1017         case FB_ACCEL_NEOMAGIC_NM2070:
1018                 temp &= 0xF0;   /* Save bits 7:4 */
1019                 temp |= (par->ExtColorModeSelect & ~0xF0);
1020                 break;
1021         case FB_ACCEL_NEOMAGIC_NM2090:
1022         case FB_ACCEL_NEOMAGIC_NM2093:
1023         case FB_ACCEL_NEOMAGIC_NM2097:
1024         case FB_ACCEL_NEOMAGIC_NM2160:
1025         case FB_ACCEL_NEOMAGIC_NM2200:
1026         case FB_ACCEL_NEOMAGIC_NM2230:
1027         case FB_ACCEL_NEOMAGIC_NM2360:
1028         case FB_ACCEL_NEOMAGIC_NM2380:
1029                 temp &= 0x70;   /* Save bits 6:4 */
1030                 temp |= (par->ExtColorModeSelect & ~0x70);
1031                 break;
1032         }
1033
1034         vga_wgfx(NULL, 0x90, temp);
1035
1036         /*
1037          * In some rare cases a lockup might occur if we don't delay
1038          * here. (Reported by Miles Lane)
1039          */
1040         //mdelay(200);
1041
1042         /*
1043          * Disable horizontal and vertical graphics and text expansions so
1044          * that vgaHWRestore works properly.
1045          */
1046         temp = vga_rgfx(NULL, 0x25);
1047         temp &= 0x39;
1048         vga_wgfx(NULL, 0x25, temp);
1049
1050         /*
1051          * Sleep for 200ms to make sure that the two operations above have
1052          * had time to take effect.
1053          */
1054         mdelay(200);
1055
1056         /*
1057          * This function handles restoring the generic VGA registers.  */
1058         vgaHWRestore(info, par);
1059
1060         /* linear colormap for non palettized modes */
1061         switch (info->var.bits_per_pixel) {
1062         case 8:
1063                 /* PseudoColor, 256 */
1064                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1065                 break;
1066         case 16:
1067                 /* TrueColor, 64k */
1068                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1069
1070                 for (i = 0; i < 64; i++) {
1071                         outb(i, 0x3c8);
1072
1073                         outb(i << 1, 0x3c9);
1074                         outb(i, 0x3c9);
1075                         outb(i << 1, 0x3c9);
1076                 }
1077                 break;
1078         case 24:
1079 #ifdef NO_32BIT_SUPPORT_YET
1080         case 32:
1081 #endif
1082                 /* TrueColor, 16m */
1083                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1084
1085                 for (i = 0; i < 256; i++) {
1086                         outb(i, 0x3c8);
1087
1088                         outb(i, 0x3c9);
1089                         outb(i, 0x3c9);
1090                         outb(i, 0x3c9);
1091                 }
1092                 break;
1093         }
1094
1095         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1096         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1097         temp = vga_rgfx(NULL, 0x10);
1098         temp &= 0x0F;           /* Save bits 3:0 */
1099         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1100         vga_wgfx(NULL, 0x10, temp);
1101
1102         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1103         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1104         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1105
1106         temp = vga_rgfx(NULL, 0x20);
1107         switch (info->fix.accel) {
1108         case FB_ACCEL_NEOMAGIC_NM2070:
1109                 temp &= 0xFC;   /* Save bits 7:2 */
1110                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1111                 break;
1112         case FB_ACCEL_NEOMAGIC_NM2090:
1113         case FB_ACCEL_NEOMAGIC_NM2093:
1114         case FB_ACCEL_NEOMAGIC_NM2097:
1115         case FB_ACCEL_NEOMAGIC_NM2160:
1116                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1117                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1118                 break;
1119         case FB_ACCEL_NEOMAGIC_NM2200:
1120         case FB_ACCEL_NEOMAGIC_NM2230:
1121         case FB_ACCEL_NEOMAGIC_NM2360:
1122         case FB_ACCEL_NEOMAGIC_NM2380:
1123                 temp &= 0x98;   /* Save bits 7,4:3 */
1124                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1125                 break;
1126         }
1127         vga_wgfx(NULL, 0x20, temp);
1128
1129         temp = vga_rgfx(NULL, 0x25);
1130         temp &= 0x38;           /* Save bits 5:3 */
1131         temp |= (par->PanelDispCntlReg2 & ~0x38);
1132         vga_wgfx(NULL, 0x25, temp);
1133
1134         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1135                 temp = vga_rgfx(NULL, 0x30);
1136                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1137                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1138                 vga_wgfx(NULL, 0x30, temp);
1139         }
1140
1141         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1142         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1143         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1144
1145         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1146                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1147                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1148                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1149                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1150         }
1151
1152         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1153                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1154
1155         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1156             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1157             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1158             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1159                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1160                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1161                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1162
1163                 clock_hi = 1;
1164         }
1165
1166         /* Program VCLK3 if needed. */
1167         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1168                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1169                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1170                                                   != (par->VCLK3NumeratorHigh &
1171                                                       ~0x0F))))) {
1172                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1173                 if (clock_hi) {
1174                         temp = vga_rgfx(NULL, 0x8F);
1175                         temp &= 0x0F;   /* Save bits 3:0 */
1176                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1177                         vga_wgfx(NULL, 0x8F, temp);
1178                 }
1179                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1180         }
1181
1182         if (par->biosMode)
1183                 vga_wcrt(NULL, 0x23, par->biosMode);
1184
1185         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1186
1187         /* Program vertical extension register */
1188         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1189             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1190             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1191             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1192                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1193         }
1194
1195         vgaHWProtect(0);        /* Turn on screen */
1196
1197         /* Calling this also locks offset registers required in update_start */
1198         neoLock(&par->state);
1199
1200         info->fix.line_length =
1201             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1202
1203         switch (info->fix.accel) {
1204                 case FB_ACCEL_NEOMAGIC_NM2200:
1205                 case FB_ACCEL_NEOMAGIC_NM2230:
1206                 case FB_ACCEL_NEOMAGIC_NM2360:
1207                 case FB_ACCEL_NEOMAGIC_NM2380:
1208                         neo2200_accel_init(info, &info->var);
1209                         break;
1210                 default:
1211                         break;
1212         }
1213         return 0;
1214 }
1215
1216 static void neofb_update_start(struct fb_info *info,
1217                                struct fb_var_screeninfo *var)
1218 {
1219         struct neofb_par *par = info->par;
1220         struct vgastate *state = &par->state;
1221         int oldExtCRTDispAddr;
1222         int Base;
1223
1224         DBG("neofb_update_start");
1225
1226         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1227         Base *= (var->bits_per_pixel + 7) / 8;
1228
1229         neoUnlock();
1230
1231         /*
1232          * These are the generic starting address registers.
1233          */
1234         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1235         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1236
1237         /*
1238          * Make sure we don't clobber some other bits that might already
1239          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1240          * be needed.
1241          */
1242         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1243         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1244
1245         neoLock(state);
1246 }
1247
1248 /*
1249  *    Pan or Wrap the Display
1250  */
1251 static int neofb_pan_display(struct fb_var_screeninfo *var,
1252                              struct fb_info *info)
1253 {
1254         u_int y_bottom;
1255
1256         y_bottom = var->yoffset;
1257
1258         if (!(var->vmode & FB_VMODE_YWRAP))
1259                 y_bottom += var->yres;
1260
1261         if (var->xoffset > (var->xres_virtual - var->xres))
1262                 return -EINVAL;
1263         if (y_bottom > info->var.yres_virtual)
1264                 return -EINVAL;
1265
1266         neofb_update_start(info, var);
1267
1268         info->var.xoffset = var->xoffset;
1269         info->var.yoffset = var->yoffset;
1270
1271         if (var->vmode & FB_VMODE_YWRAP)
1272                 info->var.vmode |= FB_VMODE_YWRAP;
1273         else
1274                 info->var.vmode &= ~FB_VMODE_YWRAP;
1275         return 0;
1276 }
1277
1278 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1279                            u_int transp, struct fb_info *fb)
1280 {
1281         if (regno >= fb->cmap.len || regno > 255)
1282                 return -EINVAL;
1283
1284         switch (fb->var.bits_per_pixel) {
1285         case 8:
1286                 outb(regno, 0x3c8);
1287
1288                 outb(red >> 10, 0x3c9);
1289                 outb(green >> 10, 0x3c9);
1290                 outb(blue >> 10, 0x3c9);
1291                 break;
1292         case 16:
1293                 ((u32 *) fb->pseudo_palette)[regno] =
1294                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1295                                 ((blue & 0xf800) >> 11);
1296                 break;
1297         case 24:
1298                 ((u32 *) fb->pseudo_palette)[regno] =
1299                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1300                                 ((blue & 0xff00) >> 8);
1301                 break;
1302 #ifdef NO_32BIT_SUPPORT_YET
1303         case 32:
1304                 ((u32 *) fb->pseudo_palette)[regno] =
1305                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1306                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1307                 break;
1308 #endif
1309         default:
1310                 return 1;
1311         }
1312         return 0;
1313 }
1314
1315 /*
1316  *    (Un)Blank the display.
1317  */
1318 static int neofb_blank(int blank_mode, struct fb_info *info)
1319 {
1320         /*
1321          *  Blank the screen if blank_mode != 0, else unblank.
1322          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1323          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1324          *  and powerdown modes for monitors, and backlight control on LCDs.
1325          *    blank_mode == 0: unblanked (backlight on)
1326          *    blank_mode == 1: blank (backlight on)
1327          *    blank_mode == 2: suspend vsync (backlight off)
1328          *    blank_mode == 3: suspend hsync (backlight off)
1329          *    blank_mode == 4: powerdown (backlight off)
1330          *
1331          *  wms...Enable VESA DPMS compatible powerdown mode
1332          *  run "setterm -powersave powerdown" to take advantage
1333          */
1334         struct neofb_par *par = info->par;
1335         int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1336
1337         /*
1338          * Read back the register bits related to display configuration. They might
1339          * have been changed underneath the driver via Fn key stroke.
1340          */
1341         neoUnlock();
1342         tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1343         neoLock(&par->state);
1344
1345         /* In case we blank the screen, we want to store the possibly new
1346          * configuration in the driver. During un-blank, we re-apply this setting,
1347          * since the LCD bit will be cleared in order to switch off the backlight.
1348          */
1349         if (par->PanelDispCntlRegRead) {
1350                 par->PanelDispCntlReg1 = tmpdisp;
1351         }
1352         par->PanelDispCntlRegRead = !blank_mode;
1353
1354         switch (blank_mode) {
1355         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1356                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1357                 lcdflags = 0;                   /* LCD off */
1358                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1359                             NEO_GR01_SUPPRESS_VSYNC;
1360 #ifdef CONFIG_TOSHIBA
1361                 /* Do we still need this ? */
1362                 /* attempt to turn off backlight on toshiba; also turns off external */
1363                 {
1364                         SMMRegisters regs;
1365
1366                         regs.eax = 0xff00; /* HCI_SET */
1367                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1368                         regs.ecx = 0x0000; /* HCI_DISABLE */
1369                         tosh_smm(&regs);
1370                 }
1371 #endif
1372                 break;
1373         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1374                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1375                 lcdflags = 0;                   /* LCD off */
1376                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1377                 break;
1378         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1379                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1380                 lcdflags = 0;                   /* LCD off */
1381                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1382                 break;
1383         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1384                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1385                 /*
1386                  * During a blank operation with the LID shut, we might store "LCD off"
1387                  * by mistake. Due to timing issues, the BIOS may switch the lights
1388                  * back on, and we turn it back off once we "unblank".
1389                  *
1390                  * So here is an attempt to implement ">=" - if we are in the process
1391                  * of unblanking, and the LCD bit is unset in the driver but set in the
1392                  * register, we must keep it.
1393                  */
1394                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1395                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1396                 break;
1397         case FB_BLANK_UNBLANK:          /* unblank */
1398                 seqflags = 0;                   /* Enable sequencer */
1399                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1400                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1401 #ifdef CONFIG_TOSHIBA
1402                 /* Do we still need this ? */
1403                 /* attempt to re-enable backlight/external on toshiba */
1404                 {
1405                         SMMRegisters regs;
1406
1407                         regs.eax = 0xff00; /* HCI_SET */
1408                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1409                         regs.ecx = 0x0001; /* HCI_ENABLE */
1410                         tosh_smm(&regs);
1411                 }
1412 #endif
1413                 break;
1414         default:        /* Anything else we don't understand; return 1 to tell
1415                          * fb_blank we didn't aactually do anything */
1416                 return 1;
1417         }
1418
1419         neoUnlock();
1420         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1421         vga_wseq(NULL, 0x01, reg);
1422         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1423         vga_wgfx(NULL, 0x20, reg);
1424         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1425         vga_wgfx(NULL, 0x01, reg);
1426         neoLock(&par->state);
1427         return 0;
1428 }
1429
1430 static void
1431 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1432 {
1433         struct neofb_par *par = info->par;
1434         u_long dst, rop;
1435
1436         dst = rect->dx + rect->dy * info->var.xres_virtual;
1437         rop = rect->rop ? 0x060000 : 0x0c0000;
1438
1439         neo2200_wait_fifo(info, 4);
1440
1441         /* set blt control */
1442         writel(NEO_BC3_FIFO_EN |
1443                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1444                //               NEO_BC3_DST_XY_ADDR  |
1445                //               NEO_BC3_SRC_XY_ADDR  |
1446                rop, &par->neo2200->bltCntl);
1447
1448         switch (info->var.bits_per_pixel) {
1449         case 8:
1450                 writel(rect->color, &par->neo2200->fgColor);
1451                 break;
1452         case 16:
1453         case 24:
1454                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1455                        &par->neo2200->fgColor);
1456                 break;
1457         }
1458
1459         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1460                &par->neo2200->dstStart);
1461         writel((rect->height << 16) | (rect->width & 0xffff),
1462                &par->neo2200->xyExt);
1463 }
1464
1465 static void
1466 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1467 {
1468         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1469         struct neofb_par *par = info->par;
1470         u_long src, dst, bltCntl;
1471
1472         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1473
1474         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1475                 /* Start with the lower right corner */
1476                 sy += (area->height - 1);
1477                 dy += (area->height - 1);
1478                 sx += (area->width - 1);
1479                 dx += (area->width - 1);
1480
1481                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1482         }
1483
1484         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1485         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1486
1487         neo2200_wait_fifo(info, 4);
1488
1489         /* set blt control */
1490         writel(bltCntl, &par->neo2200->bltCntl);
1491
1492         writel(src, &par->neo2200->srcStart);
1493         writel(dst, &par->neo2200->dstStart);
1494         writel((area->height << 16) | (area->width & 0xffff),
1495                &par->neo2200->xyExt);
1496 }
1497
1498 static void
1499 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1500 {
1501         struct neofb_par *par = info->par;
1502         int s_pitch = (image->width * image->depth + 7) >> 3;
1503         int scan_align = info->pixmap.scan_align - 1;
1504         int buf_align = info->pixmap.buf_align - 1;
1505         int bltCntl_flags, d_pitch, data_len;
1506
1507         // The data is padded for the hardware
1508         d_pitch = (s_pitch + scan_align) & ~scan_align;
1509         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1510
1511         neo2200_sync(info);
1512
1513         if (image->depth == 1) {
1514                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1515                         /* FIXME. There is a bug with accelerated color-expanded
1516                          * transfers in 24 bit mode if the image being transferred
1517                          * is less than 16 bits wide. This is due to insufficient
1518                          * padding when writing the image. We need to adjust
1519                          * struct fb_pixmap. Not yet done. */
1520                         return cfb_imageblit(info, image);
1521                 }
1522                 bltCntl_flags = NEO_BC0_SRC_MONO;
1523         } else if (image->depth == info->var.bits_per_pixel) {
1524                 bltCntl_flags = 0;
1525         } else {
1526                 /* We don't currently support hardware acceleration if image
1527                  * depth is different from display */
1528                 return cfb_imageblit(info, image);
1529         }
1530
1531         switch (info->var.bits_per_pixel) {
1532         case 8:
1533                 writel(image->fg_color, &par->neo2200->fgColor);
1534                 writel(image->bg_color, &par->neo2200->bgColor);
1535                 break;
1536         case 16:
1537         case 24:
1538                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1539                        &par->neo2200->fgColor);
1540                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1541                        &par->neo2200->bgColor);
1542                 break;
1543         }
1544
1545         writel(NEO_BC0_SYS_TO_VID |
1546                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1547                 // NEO_BC3_DST_XY_ADDR |
1548                 0x0c0000, &par->neo2200->bltCntl);
1549
1550         writel(0, &par->neo2200->srcStart);
1551 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1552         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1553                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1554         writel((image->height << 16) | (image->width & 0xffff),
1555                &par->neo2200->xyExt);
1556
1557         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1558 }
1559
1560 static void
1561 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1562 {
1563         switch (info->fix.accel) {
1564                 case FB_ACCEL_NEOMAGIC_NM2200:
1565                 case FB_ACCEL_NEOMAGIC_NM2230:
1566                 case FB_ACCEL_NEOMAGIC_NM2360:
1567                 case FB_ACCEL_NEOMAGIC_NM2380:
1568                         neo2200_fillrect(info, rect);
1569                         break;
1570                 default:
1571                         cfb_fillrect(info, rect);
1572                         break;
1573         }
1574 }
1575
1576 static void
1577 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1578 {
1579         switch (info->fix.accel) {
1580                 case FB_ACCEL_NEOMAGIC_NM2200:
1581                 case FB_ACCEL_NEOMAGIC_NM2230:
1582                 case FB_ACCEL_NEOMAGIC_NM2360:
1583                 case FB_ACCEL_NEOMAGIC_NM2380:
1584                         neo2200_copyarea(info, area);
1585                         break;
1586                 default:
1587                         cfb_copyarea(info, area);
1588                         break;
1589         }
1590 }
1591
1592 static void
1593 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1594 {
1595         switch (info->fix.accel) {
1596                 case FB_ACCEL_NEOMAGIC_NM2200:
1597                 case FB_ACCEL_NEOMAGIC_NM2230:
1598                 case FB_ACCEL_NEOMAGIC_NM2360:
1599                 case FB_ACCEL_NEOMAGIC_NM2380:
1600                         neo2200_imageblit(info, image);
1601                         break;
1602                 default:
1603                         cfb_imageblit(info, image);
1604                         break;
1605         }
1606 }
1607
1608 static int
1609 neofb_sync(struct fb_info *info)
1610 {
1611         switch (info->fix.accel) {
1612                 case FB_ACCEL_NEOMAGIC_NM2200:
1613                 case FB_ACCEL_NEOMAGIC_NM2230:
1614                 case FB_ACCEL_NEOMAGIC_NM2360:
1615                 case FB_ACCEL_NEOMAGIC_NM2380:
1616                         neo2200_sync(info);
1617                         break;
1618                 default:
1619                         break;
1620         }
1621         return 0;
1622 }
1623
1624 /*
1625 static void
1626 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1627 {
1628         //memset_io(info->sprite.addr, 0xff, 1);
1629 }
1630
1631 static int
1632 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1633 {
1634         struct neofb_par *par = (struct neofb_par *) info->par;
1635
1636         * Disable cursor *
1637         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1638
1639         if (cursor->set & FB_CUR_SETPOS) {
1640                 u32 x = cursor->image.dx;
1641                 u32 y = cursor->image.dy;
1642
1643                 info->cursor.image.dx = x;
1644                 info->cursor.image.dy = y;
1645                 write_le32(NEOREG_CURSX, x, par);
1646                 write_le32(NEOREG_CURSY, y, par);
1647         }
1648
1649         if (cursor->set & FB_CUR_SETSIZE) {
1650                 info->cursor.image.height = cursor->image.height;
1651                 info->cursor.image.width = cursor->image.width;
1652         }
1653
1654         if (cursor->set & FB_CUR_SETHOT)
1655                 info->cursor.hot = cursor->hot;
1656
1657         if (cursor->set & FB_CUR_SETCMAP) {
1658                 if (cursor->image.depth == 1) {
1659                         u32 fg = cursor->image.fg_color;
1660                         u32 bg = cursor->image.bg_color;
1661
1662                         info->cursor.image.fg_color = fg;
1663                         info->cursor.image.bg_color = bg;
1664
1665                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1666                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1667                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1668                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1669                 }
1670         }
1671
1672         if (cursor->set & FB_CUR_SETSHAPE)
1673                 fb_load_cursor_image(info);
1674
1675         if (info->cursor.enable)
1676                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1677         return 0;
1678 }
1679 */
1680
1681 static struct fb_ops neofb_ops = {
1682         .owner          = THIS_MODULE,
1683         .fb_open        = neofb_open,
1684         .fb_release     = neofb_release,
1685         .fb_check_var   = neofb_check_var,
1686         .fb_set_par     = neofb_set_par,
1687         .fb_setcolreg   = neofb_setcolreg,
1688         .fb_pan_display = neofb_pan_display,
1689         .fb_blank       = neofb_blank,
1690         .fb_sync        = neofb_sync,
1691         .fb_fillrect    = neofb_fillrect,
1692         .fb_copyarea    = neofb_copyarea,
1693         .fb_imageblit   = neofb_imageblit,
1694 };
1695
1696 /* --------------------------------------------------------------------- */
1697
1698 static struct fb_videomode __devinitdata mode800x480 = {
1699         .xres           = 800,
1700         .yres           = 480,
1701         .pixclock       = 25000,
1702         .left_margin    = 88,
1703         .right_margin   = 40,
1704         .upper_margin   = 23,
1705         .lower_margin   = 1,
1706         .hsync_len      = 128,
1707         .vsync_len      = 4,
1708         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1709         .vmode          = FB_VMODE_NONINTERLACED
1710 };
1711
1712 static int __devinit neo_map_mmio(struct fb_info *info,
1713                                   struct pci_dev *dev)
1714 {
1715         struct neofb_par *par = info->par;
1716
1717         DBG("neo_map_mmio");
1718
1719         switch (info->fix.accel) {
1720                 case FB_ACCEL_NEOMAGIC_NM2070:
1721                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1722                                 0x100000;
1723                         break;
1724                 case FB_ACCEL_NEOMAGIC_NM2090:
1725                 case FB_ACCEL_NEOMAGIC_NM2093:
1726                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1727                                 0x200000;
1728                         break;
1729                 case FB_ACCEL_NEOMAGIC_NM2160:
1730                 case FB_ACCEL_NEOMAGIC_NM2097:
1731                 case FB_ACCEL_NEOMAGIC_NM2200:
1732                 case FB_ACCEL_NEOMAGIC_NM2230:
1733                 case FB_ACCEL_NEOMAGIC_NM2360:
1734                 case FB_ACCEL_NEOMAGIC_NM2380:
1735                         info->fix.mmio_start = pci_resource_start(dev, 1);
1736                         break;
1737                 default:
1738                         info->fix.mmio_start = pci_resource_start(dev, 0);
1739         }
1740         info->fix.mmio_len = MMIO_SIZE;
1741
1742         if (!request_mem_region
1743             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1744                 printk("neofb: memory mapped IO in use\n");
1745                 return -EBUSY;
1746         }
1747
1748         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1749         if (!par->mmio_vbase) {
1750                 printk("neofb: unable to map memory mapped IO\n");
1751                 release_mem_region(info->fix.mmio_start,
1752                                    info->fix.mmio_len);
1753                 return -ENOMEM;
1754         } else
1755                 printk(KERN_INFO "neofb: mapped io at %p\n",
1756                        par->mmio_vbase);
1757         return 0;
1758 }
1759
1760 static void neo_unmap_mmio(struct fb_info *info)
1761 {
1762         struct neofb_par *par = info->par;
1763
1764         DBG("neo_unmap_mmio");
1765
1766         iounmap(par->mmio_vbase);
1767         par->mmio_vbase = NULL;
1768
1769         release_mem_region(info->fix.mmio_start,
1770                            info->fix.mmio_len);
1771 }
1772
1773 static int __devinit neo_map_video(struct fb_info *info,
1774                                    struct pci_dev *dev, int video_len)
1775 {
1776         //unsigned long addr;
1777
1778         DBG("neo_map_video");
1779
1780         info->fix.smem_start = pci_resource_start(dev, 0);
1781         info->fix.smem_len = video_len;
1782
1783         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1784                                 "frame buffer")) {
1785                 printk("neofb: frame buffer in use\n");
1786                 return -EBUSY;
1787         }
1788
1789         info->screen_base =
1790             ioremap(info->fix.smem_start, info->fix.smem_len);
1791         if (!info->screen_base) {
1792                 printk("neofb: unable to map screen memory\n");
1793                 release_mem_region(info->fix.smem_start,
1794                                    info->fix.smem_len);
1795                 return -ENOMEM;
1796         } else
1797                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1798                        info->screen_base);
1799
1800 #ifdef CONFIG_MTRR
1801         ((struct neofb_par *)(info->par))->mtrr =
1802                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1803                                 MTRR_TYPE_WRCOMB, 1);
1804 #endif
1805
1806         /* Clear framebuffer, it's all white in memory after boot */
1807         memset_io(info->screen_base, 0, info->fix.smem_len);
1808
1809         /* Allocate Cursor drawing pad.
1810         info->fix.smem_len -= PAGE_SIZE;
1811         addr = info->fix.smem_start + info->fix.smem_len;
1812         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1813                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1814         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1815         info->sprite.addr = (u8 *) addr; */
1816         return 0;
1817 }
1818
1819 static void neo_unmap_video(struct fb_info *info)
1820 {
1821         DBG("neo_unmap_video");
1822
1823 #ifdef CONFIG_MTRR
1824         {
1825                 struct neofb_par *par = info->par;
1826
1827                 mtrr_del(par->mtrr, info->fix.smem_start,
1828                          info->fix.smem_len);
1829         }
1830 #endif
1831         iounmap(info->screen_base);
1832         info->screen_base = NULL;
1833
1834         release_mem_region(info->fix.smem_start,
1835                            info->fix.smem_len);
1836 }
1837
1838 static int __devinit neo_scan_monitor(struct fb_info *info)
1839 {
1840         struct neofb_par *par = info->par;
1841         unsigned char type, display;
1842         int w;
1843
1844         // Eventually we will have i2c support.
1845         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1846         if (!info->monspecs.modedb)
1847                 return -ENOMEM;
1848         info->monspecs.modedb_len = 1;
1849
1850         /* Determine the panel type */
1851         vga_wgfx(NULL, 0x09, 0x26);
1852         type = vga_rgfx(NULL, 0x21);
1853         display = vga_rgfx(NULL, 0x20);
1854         if (!par->internal_display && !par->external_display) {
1855                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1856                 par->external_display = display & 1;
1857                 printk (KERN_INFO "Autodetected %s display\n",
1858                         par->internal_display && par->external_display ? "simultaneous" :
1859                         par->internal_display ? "internal" : "external");
1860         }
1861
1862         /* Determine panel width -- used in NeoValidMode. */
1863         w = vga_rgfx(NULL, 0x20);
1864         vga_wgfx(NULL, 0x09, 0x00);
1865         switch ((w & 0x18) >> 3) {
1866         case 0x00:
1867                 // 640x480@60
1868                 par->NeoPanelWidth = 640;
1869                 par->NeoPanelHeight = 480;
1870                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1871                 break;
1872         case 0x01:
1873                 par->NeoPanelWidth = 800;
1874                 if (par->libretto) {
1875                         par->NeoPanelHeight = 480;
1876                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1877                 } else {
1878                         // 800x600@60
1879                         par->NeoPanelHeight = 600;
1880                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1881                 }
1882                 break;
1883         case 0x02:
1884                 // 1024x768@60
1885                 par->NeoPanelWidth = 1024;
1886                 par->NeoPanelHeight = 768;
1887                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1888                 break;
1889         case 0x03:
1890                 /* 1280x1024@60 panel support needs to be added */
1891 #ifdef NOT_DONE
1892                 par->NeoPanelWidth = 1280;
1893                 par->NeoPanelHeight = 1024;
1894                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1895                 break;
1896 #else
1897                 printk(KERN_ERR
1898                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1899                 return -1;
1900 #endif
1901         default:
1902                 // 640x480@60
1903                 par->NeoPanelWidth = 640;
1904                 par->NeoPanelHeight = 480;
1905                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1906                 break;
1907         }
1908
1909         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1910                par->NeoPanelWidth,
1911                par->NeoPanelHeight,
1912                (type & 0x02) ? "color" : "monochrome",
1913                (type & 0x10) ? "TFT" : "dual scan");
1914         return 0;
1915 }
1916
1917 static int __devinit neo_init_hw(struct fb_info *info)
1918 {
1919         struct neofb_par *par = info->par;
1920         int videoRam = 896;
1921         int maxClock = 65000;
1922         int CursorMem = 1024;
1923         int CursorOff = 0x100;
1924         int linearSize = 1024;
1925         int maxWidth = 1024;
1926         int maxHeight = 1024;
1927
1928         DBG("neo_init_hw");
1929
1930         neoUnlock();
1931
1932 #if 0
1933         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1934         for (int w = 0; w < 0x85; w++)
1935                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1936                        (void *) vga_rcrt(NULL, w);
1937         for (int w = 0; w < 0xC7; w++)
1938                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1939                        (void *) vga_rgfx(NULL, w));
1940 #endif
1941         switch (info->fix.accel) {
1942         case FB_ACCEL_NEOMAGIC_NM2070:
1943                 videoRam = 896;
1944                 maxClock = 65000;
1945                 CursorMem = 2048;
1946                 CursorOff = 0x100;
1947                 linearSize = 1024;
1948                 maxWidth = 1024;
1949                 maxHeight = 1024;
1950                 break;
1951         case FB_ACCEL_NEOMAGIC_NM2090:
1952         case FB_ACCEL_NEOMAGIC_NM2093:
1953                 videoRam = 1152;
1954                 maxClock = 80000;
1955                 CursorMem = 2048;
1956                 CursorOff = 0x100;
1957                 linearSize = 2048;
1958                 maxWidth = 1024;
1959                 maxHeight = 1024;
1960                 break;
1961         case FB_ACCEL_NEOMAGIC_NM2097:
1962                 videoRam = 1152;
1963                 maxClock = 80000;
1964                 CursorMem = 1024;
1965                 CursorOff = 0x100;
1966                 linearSize = 2048;
1967                 maxWidth = 1024;
1968                 maxHeight = 1024;
1969                 break;
1970         case FB_ACCEL_NEOMAGIC_NM2160:
1971                 videoRam = 2048;
1972                 maxClock = 90000;
1973                 CursorMem = 1024;
1974                 CursorOff = 0x100;
1975                 linearSize = 2048;
1976                 maxWidth = 1024;
1977                 maxHeight = 1024;
1978                 break;
1979         case FB_ACCEL_NEOMAGIC_NM2200:
1980                 videoRam = 2560;
1981                 maxClock = 110000;
1982                 CursorMem = 1024;
1983                 CursorOff = 0x1000;
1984                 linearSize = 4096;
1985                 maxWidth = 1280;
1986                 maxHeight = 1024;       /* ???? */
1987
1988                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1989                 break;
1990         case FB_ACCEL_NEOMAGIC_NM2230:
1991                 videoRam = 3008;
1992                 maxClock = 110000;
1993                 CursorMem = 1024;
1994                 CursorOff = 0x1000;
1995                 linearSize = 4096;
1996                 maxWidth = 1280;
1997                 maxHeight = 1024;       /* ???? */
1998
1999                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2000                 break;
2001         case FB_ACCEL_NEOMAGIC_NM2360:
2002                 videoRam = 4096;
2003                 maxClock = 110000;
2004                 CursorMem = 1024;
2005                 CursorOff = 0x1000;
2006                 linearSize = 4096;
2007                 maxWidth = 1280;
2008                 maxHeight = 1024;       /* ???? */
2009
2010                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2011                 break;
2012         case FB_ACCEL_NEOMAGIC_NM2380:
2013                 videoRam = 6144;
2014                 maxClock = 110000;
2015                 CursorMem = 1024;
2016                 CursorOff = 0x1000;
2017                 linearSize = 8192;
2018                 maxWidth = 1280;
2019                 maxHeight = 1024;       /* ???? */
2020
2021                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2022                 break;
2023         }
2024 /*
2025         info->sprite.size = CursorMem;
2026         info->sprite.scan_align = 1;
2027         info->sprite.buf_align = 1;
2028         info->sprite.flags = FB_PIXMAP_IO;
2029         info->sprite.outbuf = neofb_draw_cursor;
2030 */
2031         par->maxClock = maxClock;
2032         par->cursorOff = CursorOff;
2033         return ((videoRam * 1024));
2034 }
2035
2036
2037 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2038                                                    pci_device_id *id)
2039 {
2040         struct fb_info *info;
2041         struct neofb_par *par;
2042
2043         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2044
2045         if (!info)
2046                 return NULL;
2047
2048         par = info->par;
2049
2050         info->fix.accel = id->driver_data;
2051
2052         par->pci_burst = !nopciburst;
2053         par->lcd_stretch = !nostretch;
2054         par->libretto = libretto;
2055
2056         par->internal_display = internal;
2057         par->external_display = external;
2058         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2059
2060         switch (info->fix.accel) {
2061         case FB_ACCEL_NEOMAGIC_NM2070:
2062                 sprintf(info->fix.id, "MagicGraph 128");
2063                 break;
2064         case FB_ACCEL_NEOMAGIC_NM2090:
2065                 sprintf(info->fix.id, "MagicGraph 128V");
2066                 break;
2067         case FB_ACCEL_NEOMAGIC_NM2093:
2068                 sprintf(info->fix.id, "MagicGraph 128ZV");
2069                 break;
2070         case FB_ACCEL_NEOMAGIC_NM2097:
2071                 sprintf(info->fix.id, "MagicGraph 128ZV+");
2072                 break;
2073         case FB_ACCEL_NEOMAGIC_NM2160:
2074                 sprintf(info->fix.id, "MagicGraph 128XD");
2075                 break;
2076         case FB_ACCEL_NEOMAGIC_NM2200:
2077                 sprintf(info->fix.id, "MagicGraph 256AV");
2078                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2079                                FBINFO_HWACCEL_COPYAREA |
2080                                FBINFO_HWACCEL_FILLRECT;
2081                 break;
2082         case FB_ACCEL_NEOMAGIC_NM2230:
2083                 sprintf(info->fix.id, "MagicGraph 256AV+");
2084                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2085                                FBINFO_HWACCEL_COPYAREA |
2086                                FBINFO_HWACCEL_FILLRECT;
2087                 break;
2088         case FB_ACCEL_NEOMAGIC_NM2360:
2089                 sprintf(info->fix.id, "MagicGraph 256ZX");
2090                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2091                                FBINFO_HWACCEL_COPYAREA |
2092                                FBINFO_HWACCEL_FILLRECT;
2093                 break;
2094         case FB_ACCEL_NEOMAGIC_NM2380:
2095                 sprintf(info->fix.id, "MagicGraph 256XL+");
2096                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2097                                FBINFO_HWACCEL_COPYAREA |
2098                                FBINFO_HWACCEL_FILLRECT;
2099                 break;
2100         }
2101
2102         info->fix.type = FB_TYPE_PACKED_PIXELS;
2103         info->fix.type_aux = 0;
2104         info->fix.xpanstep = 0;
2105         info->fix.ypanstep = 4;
2106         info->fix.ywrapstep = 0;
2107         info->fix.accel = id->driver_data;
2108
2109         info->fbops = &neofb_ops;
2110         info->pseudo_palette = par->palette;
2111         return info;
2112 }
2113
2114 static void neo_free_fb_info(struct fb_info *info)
2115 {
2116         if (info) {
2117                 /*
2118                  * Free the colourmap
2119                  */
2120                 fb_dealloc_cmap(&info->cmap);
2121                 framebuffer_release(info);
2122         }
2123 }
2124
2125 /* --------------------------------------------------------------------- */
2126
2127 static int __devinit neofb_probe(struct pci_dev *dev,
2128                                  const struct pci_device_id *id)
2129 {
2130         struct fb_info *info;
2131         u_int h_sync, v_sync;
2132         int video_len, err;
2133
2134         DBG("neofb_probe");
2135
2136         err = pci_enable_device(dev);
2137         if (err)
2138                 return err;
2139
2140         err = -ENOMEM;
2141         info = neo_alloc_fb_info(dev, id);
2142         if (!info)
2143                 return err;
2144
2145         err = neo_map_mmio(info, dev);
2146         if (err)
2147                 goto err_map_mmio;
2148
2149         err = neo_scan_monitor(info);
2150         if (err)
2151                 goto err_scan_monitor;
2152
2153         video_len = neo_init_hw(info);
2154         if (video_len < 0) {
2155                 err = video_len;
2156                 goto err_init_hw;
2157         }
2158
2159         err = neo_map_video(info, dev, video_len);
2160         if (err)
2161                 goto err_init_hw;
2162
2163         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2164                         info->monspecs.modedb, 16)) {
2165                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2166                 goto err_map_video;
2167         }
2168
2169         /*
2170          * Calculate the hsync and vsync frequencies.  Note that
2171          * we split the 1e12 constant up so that we can preserve
2172          * the precision and fit the results into 32-bit registers.
2173          *  (1953125000 * 512 = 1e12)
2174          */
2175         h_sync = 1953125000 / info->var.pixclock;
2176         h_sync =
2177             h_sync * 512 / (info->var.xres + info->var.left_margin +
2178                             info->var.right_margin + info->var.hsync_len);
2179         v_sync =
2180             h_sync / (info->var.yres + info->var.upper_margin +
2181                       info->var.lower_margin + info->var.vsync_len);
2182
2183         printk(KERN_INFO "neofb v" NEOFB_VERSION
2184                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2185                info->fix.smem_len >> 10, info->var.xres,
2186                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2187
2188         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2189                 goto err_map_video;
2190
2191         err = register_framebuffer(info);
2192         if (err < 0)
2193                 goto err_reg_fb;
2194
2195         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2196                info->node, info->fix.id);
2197
2198         /*
2199          * Our driver data
2200          */
2201         pci_set_drvdata(dev, info);
2202         return 0;
2203
2204 err_reg_fb:
2205         fb_dealloc_cmap(&info->cmap);
2206 err_map_video:
2207         neo_unmap_video(info);
2208 err_init_hw:
2209         fb_destroy_modedb(info->monspecs.modedb);
2210 err_scan_monitor:
2211         neo_unmap_mmio(info);
2212 err_map_mmio:
2213         neo_free_fb_info(info);
2214         return err;
2215 }
2216
2217 static void __devexit neofb_remove(struct pci_dev *dev)
2218 {
2219         struct fb_info *info = pci_get_drvdata(dev);
2220
2221         DBG("neofb_remove");
2222
2223         if (info) {
2224                 /*
2225                  * If unregister_framebuffer fails, then
2226                  * we will be leaving hooks that could cause
2227                  * oopsen laying around.
2228                  */
2229                 if (unregister_framebuffer(info))
2230                         printk(KERN_WARNING
2231                                "neofb: danger danger!  Oopsen imminent!\n");
2232
2233                 neo_unmap_video(info);
2234                 fb_destroy_modedb(info->monspecs.modedb);
2235                 neo_unmap_mmio(info);
2236                 neo_free_fb_info(info);
2237
2238                 /*
2239                  * Ensure that the driver data is no longer
2240                  * valid.
2241                  */
2242                 pci_set_drvdata(dev, NULL);
2243         }
2244 }
2245
2246 static struct pci_device_id neofb_devices[] = {
2247         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2248          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2249
2250         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2251          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2252
2253         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2254          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2255
2256         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2257          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2258
2259         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2260          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2261
2262         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2263          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2264
2265         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2266          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2267
2268         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2269          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2270
2271         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2272          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2273
2274         {0, 0, 0, 0, 0, 0, 0}
2275 };
2276
2277 MODULE_DEVICE_TABLE(pci, neofb_devices);
2278
2279 static struct pci_driver neofb_driver = {
2280         .name =         "neofb",
2281         .id_table =     neofb_devices,
2282         .probe =        neofb_probe,
2283         .remove =       __devexit_p(neofb_remove)
2284 };
2285
2286 /* ************************* init in-kernel code ************************** */
2287
2288 #ifndef MODULE
2289 static int __init neofb_setup(char *options)
2290 {
2291         char *this_opt;
2292
2293         DBG("neofb_setup");
2294
2295         if (!options || !*options)
2296                 return 0;
2297
2298         while ((this_opt = strsep(&options, ",")) != NULL) {
2299                 if (!*this_opt)
2300                         continue;
2301
2302                 if (!strncmp(this_opt, "internal", 8))
2303                         internal = 1;
2304                 else if (!strncmp(this_opt, "external", 8))
2305                         external = 1;
2306                 else if (!strncmp(this_opt, "nostretch", 9))
2307                         nostretch = 1;
2308                 else if (!strncmp(this_opt, "nopciburst", 10))
2309                         nopciburst = 1;
2310                 else if (!strncmp(this_opt, "libretto", 8))
2311                         libretto = 1;
2312                 else
2313                         mode_option = this_opt;
2314         }
2315         return 0;
2316 }
2317 #endif  /*  MODULE  */
2318
2319 static int __init neofb_init(void)
2320 {
2321 #ifndef MODULE
2322         char *option = NULL;
2323
2324         if (fb_get_options("neofb", &option))
2325                 return -ENODEV;
2326         neofb_setup(option);
2327 #endif
2328         return pci_register_driver(&neofb_driver);
2329 }
2330
2331 module_init(neofb_init);
2332
2333 #ifdef MODULE
2334 static void __exit neofb_exit(void)
2335 {
2336         pci_unregister_driver(&neofb_driver);
2337 }
2338
2339 module_exit(neofb_exit);
2340 #endif                          /* MODULE */