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   1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
   2  * time.c: UltraSparc timer and TOD clock support.
   3  *
   4  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   6  *
   7  * Based largely on code which is:
   8  *
   9  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  10  */
  11
  12 #include <linux/errno.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/kernel.h>
  16 #include <linux/param.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/time.h>
  21 #include <linux/timex.h>
  22 #include <linux/init.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mc146818rtc.h>
  25 #include <linux/delay.h>
  26 #include <linux/profile.h>
  27 #include <linux/bcd.h>
  28 #include <linux/jiffies.h>
  29 #include <linux/cpufreq.h>
  30 #include <linux/percpu.h>
  31 #include <linux/profile.h>
  32 #include <linux/miscdevice.h>
  33 #include <linux/rtc.h>
  34 #include <linux/kernel_stat.h>
  35 #include <linux/clockchips.h>
  36 #include <linux/clocksource.h>
  37
  38 #include <asm/oplib.h>
  39 #include <asm/mostek.h>
  40 #include <asm/timer.h>
  41 #include <asm/irq.h>
  42 #include <asm/io.h>
  43 #include <asm/prom.h>
  44 #include <asm/of_device.h>
  45 #include <asm/starfire.h>
  46 #include <asm/smp.h>
  47 #include <asm/sections.h>
  48 #include <asm/cpudata.h>
  49 #include <asm/uaccess.h>
  50 #include <asm/prom.h>
  51 #include <asm/irq_regs.h>
  52
  53 DEFINE_SPINLOCK(mostek_lock);
  54 DEFINE_SPINLOCK(rtc_lock);
  55 void __iomem *mstk48t02_regs = NULL;
  56 #ifdef CONFIG_PCI
  57 unsigned long ds1287_regs = 0UL;
  58 static void __iomem *bq4802_regs;
  59 #endif
  60
  61 static void __iomem *mstk48t08_regs;
  62 static void __iomem *mstk48t59_regs;
  63
  64 static int set_rtc_mmss(unsigned long);
  65
  66 #define TICK_PRIV_BIT   (1UL << 63)
  67 #define TICKCMP_IRQ_BIT (1UL << 63)
  68
  69 #ifdef CONFIG_SMP
  70 unsigned long profile_pc(struct pt_regs *regs)
  71 {
  72         unsigned long pc = instruction_pointer(regs);
  73
  74         if (in_lock_functions(pc))
  75                 return regs->u_regs[UREG_RETPC];
  76         return pc;
  77 }
  78 EXPORT_SYMBOL(profile_pc);
  79 #endif
  80
  81 static void tick_disable_protection(void)
  82 {
  83         /* Set things up so user can access tick register for profiling
  84          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
  85          * read back of %tick after writing it.
  86          */
  87         __asm__ __volatile__(
  88         "       ba,pt   %%xcc, 1f\n"
  89         "        nop\n"
  90         "       .align  64\n"
  91         "1:     rd      %%tick, %%g2\n"
  92         "       add     %%g2, 6, %%g2\n"
  93         "       andn    %%g2, %0, %%g2\n"
  94         "       wrpr    %%g2, 0, %%tick\n"
  95         "       rdpr    %%tick, %%g0"
  96         : /* no outputs */
  97         : "r" (TICK_PRIV_BIT)
  98         : "g2");
  99 }
 100
 101 static void tick_disable_irq(void)
 102 {
 103         __asm__ __volatile__(
 104         "       ba,pt   %%xcc, 1f\n"
 105         "        nop\n"
 106         "       .align  64\n"
 107         "1:     wr      %0, 0x0, %%tick_cmpr\n"
 108         "       rd      %%tick_cmpr, %%g0"
 109         : /* no outputs */
 110         : "r" (TICKCMP_IRQ_BIT));
 111 }
 112
 113 static void tick_init_tick(void)
 114 {
 115         tick_disable_protection();
 116         tick_disable_irq();
 117 }
 118
 119 static unsigned long tick_get_tick(void)
 120 {
 121         unsigned long ret;
 122
 123         __asm__ __volatile__("rd        %%tick, %0\n\t"
 124                              "mov       %0, %0"
 125                              : "=r" (ret));
 126
 127         return ret & ~TICK_PRIV_BIT;
 128 }
 129
 130 static int tick_add_compare(unsigned long adj)
 131 {
 132         unsigned long orig_tick, new_tick, new_compare;
 133
 134         __asm__ __volatile__("rd        %%tick, %0"
 135                              : "=r" (orig_tick));
 136
 137         orig_tick &= ~TICKCMP_IRQ_BIT;
 138
 139         /* Workaround for Spitfire Errata (#54 I think??), I discovered
 140          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 141          * number 103640.
 142          *
 143          * On Blackbird writes to %tick_cmpr can fail, the
 144          * workaround seems to be to execute the wr instruction
 145          * at the start of an I-cache line, and perform a dummy
 146          * read back from %tick_cmpr right after writing to it. -DaveM
 147          */
 148         __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t"
 149                              " add      %1, %2, %0\n\t"
 150                              ".align    64\n"
 151                              "1:\n\t"
 152                              "wr        %0, 0, %%tick_cmpr\n\t"
 153                              "rd        %%tick_cmpr, %%g0\n\t"
 154                              : "=r" (new_compare)
 155                              : "r" (orig_tick), "r" (adj));
 156
 157         __asm__ __volatile__("rd        %%tick, %0"
 158                              : "=r" (new_tick));
 159         new_tick &= ~TICKCMP_IRQ_BIT;
 160
 161         return ((long)(new_tick - (orig_tick+adj))) > 0L;
 162 }
 163
 164 static unsigned long tick_add_tick(unsigned long adj)
 165 {
 166         unsigned long new_tick;
 167
 168         /* Also need to handle Blackbird bug here too. */
 169         __asm__ __volatile__("rd        %%tick, %0\n\t"
 170                              "add       %0, %1, %0\n\t"
 171                              "wrpr      %0, 0, %%tick\n\t"
 172                              : "=&r" (new_tick)
 173                              : "r" (adj));
 174
 175         return new_tick;
 176 }
 177
 178 static struct sparc64_tick_ops tick_operations __read_mostly = {
 179         .name           =       "tick",
 180         .init_tick      =       tick_init_tick,
 181         .disable_irq    =       tick_disable_irq,
 182         .get_tick       =       tick_get_tick,
 183         .add_tick       =       tick_add_tick,
 184         .add_compare    =       tick_add_compare,
 185         .softint_mask   =       1UL << 0,
 186 };
 187
 188 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
 189
 190 static void stick_disable_irq(void)
 191 {
 192         __asm__ __volatile__(
 193         "wr     %0, 0x0, %%asr25"
 194         : /* no outputs */
 195         : "r" (TICKCMP_IRQ_BIT));
 196 }
 197
 198 static void stick_init_tick(void)
 199 {
 200         /* Writes to the %tick and %stick register are not
 201          * allowed on sun4v.  The Hypervisor controls that
 202          * bit, per-strand.
 203          */
 204         if (tlb_type != hypervisor) {
 205                 tick_disable_protection();
 206                 tick_disable_irq();
 207
 208                 /* Let the user get at STICK too. */
 209                 __asm__ __volatile__(
 210                 "       rd      %%asr24, %%g2\n"
 211                 "       andn    %%g2, %0, %%g2\n"
 212                 "       wr      %%g2, 0, %%asr24"
 213                 : /* no outputs */
 214                 : "r" (TICK_PRIV_BIT)
 215                 : "g1", "g2");
 216         }
 217
 218         stick_disable_irq();
 219 }
 220
 221 static unsigned long stick_get_tick(void)
 222 {
 223         unsigned long ret;
 224
 225         __asm__ __volatile__("rd        %%asr24, %0"
 226                              : "=r" (ret));
 227
 228         return ret & ~TICK_PRIV_BIT;
 229 }
 230
 231 static unsigned long stick_add_tick(unsigned long adj)
 232 {
 233         unsigned long new_tick;
 234
 235         __asm__ __volatile__("rd        %%asr24, %0\n\t"
 236                              "add       %0, %1, %0\n\t"
 237                              "wr        %0, 0, %%asr24\n\t"
 238                              : "=&r" (new_tick)
 239                              : "r" (adj));
 240
 241         return new_tick;
 242 }
 243
 244 static int stick_add_compare(unsigned long adj)
 245 {
 246         unsigned long orig_tick, new_tick;
 247
 248         __asm__ __volatile__("rd        %%asr24, %0"
 249                              : "=r" (orig_tick));
 250         orig_tick &= ~TICKCMP_IRQ_BIT;
 251
 252         __asm__ __volatile__("wr        %0, 0, %%asr25"
 253                              : /* no outputs */
 254                              : "r" (orig_tick + adj));
 255
 256         __asm__ __volatile__("rd        %%asr24, %0"
 257                              : "=r" (new_tick));
 258         new_tick &= ~TICKCMP_IRQ_BIT;
 259
 260         return ((long)(new_tick - (orig_tick+adj))) > 0L;
 261 }
 262
 263 static struct sparc64_tick_ops stick_operations __read_mostly = {
 264         .name           =       "stick",
 265         .init_tick      =       stick_init_tick,
 266         .disable_irq    =       stick_disable_irq,
 267         .get_tick       =       stick_get_tick,
 268         .add_tick       =       stick_add_tick,
 269         .add_compare    =       stick_add_compare,
 270         .softint_mask   =       1UL << 16,
 271 };
 272
 273 /* On Hummingbird the STICK/STICK_CMPR register is implemented
 274  * in I/O space.  There are two 64-bit registers each, the
 275  * first holds the low 32-bits of the value and the second holds
 276  * the high 32-bits.
 277  *
 278  * Since STICK is constantly updating, we have to access it carefully.
 279  *
 280  * The sequence we use to read is:
 281  * 1) read high
 282  * 2) read low
 283  * 3) read high again, if it rolled re-read both low and high again.
 284  *
 285  * Writing STICK safely is also tricky:
 286  * 1) write low to zero
 287  * 2) write high
 288  * 3) write low
 289  */
 290 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
 291 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
 292
 293 static unsigned long __hbird_read_stick(void)
 294 {
 295         unsigned long ret, tmp1, tmp2, tmp3;
 296         unsigned long addr = HBIRD_STICK_ADDR+8;
 297
 298         __asm__ __volatile__("ldxa      [%1] %5, %2\n"
 299                              "1:\n\t"
 300                              "sub       %1, 0x8, %1\n\t"
 301                              "ldxa      [%1] %5, %3\n\t"
 302                              "add       %1, 0x8, %1\n\t"
 303                              "ldxa      [%1] %5, %4\n\t"
 304                              "cmp       %4, %2\n\t"
 305                              "bne,a,pn  %%xcc, 1b\n\t"
 306                              " mov      %4, %2\n\t"
 307                              "sllx      %4, 32, %4\n\t"
 308                              "or        %3, %4, %0\n\t"
 309                              : "=&r" (ret), "=&r" (addr),
 310                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
 311                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
 312
 313         return ret;
 314 }
 315
 316 static void __hbird_write_stick(unsigned long val)
 317 {
 318         unsigned long low = (val & 0xffffffffUL);
 319         unsigned long high = (val >> 32UL);
 320         unsigned long addr = HBIRD_STICK_ADDR;
 321
 322         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
 323                              "add       %0, 0x8, %0\n\t"
 324                              "stxa      %3, [%0] %4\n\t"
 325                              "sub       %0, 0x8, %0\n\t"
 326                              "stxa      %2, [%0] %4"
 327                              : "=&r" (addr)
 328                              : "0" (addr), "r" (low), "r" (high),
 329                                "i" (ASI_PHYS_BYPASS_EC_E));
 330 }
 331
 332 static void __hbird_write_compare(unsigned long val)
 333 {
 334         unsigned long low = (val & 0xffffffffUL);
 335         unsigned long high = (val >> 32UL);
 336         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
 337
 338         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
 339                              "sub       %0, 0x8, %0\n\t"
 340                              "stxa      %2, [%0] %4"
 341                              : "=&r" (addr)
 342                              : "0" (addr), "r" (low), "r" (high),
 343                                "i" (ASI_PHYS_BYPASS_EC_E));
 344 }
 345
 346 static void hbtick_disable_irq(void)
 347 {
 348         __hbird_write_compare(TICKCMP_IRQ_BIT);
 349 }
 350
 351 static void hbtick_init_tick(void)
 352 {
 353         tick_disable_protection();
 354
 355         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
 356          * XXX into actually sending STICK interrupts.  I think because
 357          * XXX of how we store %tick_cmpr in head.S this somehow resets the
 358          * XXX {TICK + STICK} interrupt mux.  -DaveM
 359          */
 360         __hbird_write_stick(__hbird_read_stick());
 361
 362         hbtick_disable_irq();
 363 }
 364
 365 static unsigned long hbtick_get_tick(void)
 366 {
 367         return __hbird_read_stick() & ~TICK_PRIV_BIT;
 368 }
 369
 370 static unsigned long hbtick_add_tick(unsigned long adj)
 371 {
 372         unsigned long val;
 373
 374         val = __hbird_read_stick() + adj;
 375         __hbird_write_stick(val);
 376
 377         return val;
 378 }
 379
 380 static int hbtick_add_compare(unsigned long adj)
 381 {
 382         unsigned long val = __hbird_read_stick();
 383         unsigned long val2;
 384
 385         val &= ~TICKCMP_IRQ_BIT;
 386         val += adj;
 387         __hbird_write_compare(val);
 388
 389         val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
 390
 391         return ((long)(val2 - val)) > 0L;
 392 }
 393
 394 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
 395         .name           =       "hbtick",
 396         .init_tick      =       hbtick_init_tick,
 397         .disable_irq    =       hbtick_disable_irq,
 398         .get_tick       =       hbtick_get_tick,
 399         .add_tick       =       hbtick_add_tick,
 400         .add_compare    =       hbtick_add_compare,
 401         .softint_mask   =       1UL << 0,
 402 };
 403
 404 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
 405
 406 #define TICK_SIZE (tick_nsec / 1000)
 407
 408 #define USEC_AFTER      500000
 409 #define USEC_BEFORE     500000
 410
 411 static void sync_cmos_clock(unsigned long dummy);
 412
 413 static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);
 414
 415 static void sync_cmos_clock(unsigned long dummy)
 416 {
 417         struct timeval now, next;
 418         int fail = 1;
 419
 420         /*
 421          * If we have an externally synchronized Linux clock, then update
 422          * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
 423          * called as close as possible to 500 ms before the new second starts.
 424          * This code is run on a timer.  If the clock is set, that timer
 425          * may not expire at the correct time.  Thus, we adjust...
 426          */
 427         if (!ntp_synced())
 428                 /*
 429                  * Not synced, exit, do not restart a timer (if one is
 430                  * running, let it run out).
 431                  */
 432                 return;
 433
 434         do_gettimeofday(&now);
 435         if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
 436             now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
 437                 fail = set_rtc_mmss(now.tv_sec);
 438
 439         next.tv_usec = USEC_AFTER - now.tv_usec;
 440         if (next.tv_usec <= 0)
 441                 next.tv_usec += USEC_PER_SEC;
 442
 443         if (!fail)
 444                 next.tv_sec = 659;
 445         else
 446                 next.tv_sec = 0;
 447
 448         if (next.tv_usec >= USEC_PER_SEC) {
 449                 next.tv_sec++;
 450                 next.tv_usec -= USEC_PER_SEC;
 451         }
 452         mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
 453 }
 454
 455 void notify_arch_cmos_timer(void)
 456 {
 457         mod_timer(&sync_cmos_timer, jiffies + 1);
 458 }
 459
 460 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
 461 static void __init kick_start_clock(void)
 462 {
 463         void __iomem *regs = mstk48t02_regs;
 464         u8 sec, tmp;
 465         int i, count;
 466
 467         prom_printf("CLOCK: Clock was stopped. Kick start ");
 468
 469         spin_lock_irq(&mostek_lock);
 470
 471         /* Turn on the kick start bit to start the oscillator. */
 472         tmp = mostek_read(regs + MOSTEK_CREG);
 473         tmp |= MSTK_CREG_WRITE;
 474         mostek_write(regs + MOSTEK_CREG, tmp);
 475         tmp = mostek_read(regs + MOSTEK_SEC);
 476         tmp &= ~MSTK_STOP;
 477         mostek_write(regs + MOSTEK_SEC, tmp);
 478         tmp = mostek_read(regs + MOSTEK_HOUR);
 479         tmp |= MSTK_KICK_START;
 480         mostek_write(regs + MOSTEK_HOUR, tmp);
 481         tmp = mostek_read(regs + MOSTEK_CREG);
 482         tmp &= ~MSTK_CREG_WRITE;
 483         mostek_write(regs + MOSTEK_CREG, tmp);
 484
 485         spin_unlock_irq(&mostek_lock);
 486
 487         /* Delay to allow the clock oscillator to start. */
 488         sec = MSTK_REG_SEC(regs);
 489         for (i = 0; i < 3; i++) {
 490                 while (sec == MSTK_REG_SEC(regs))
 491                         for (count = 0; count < 100000; count++)
 492                                 /* nothing */ ;
 493                 prom_printf(".");
 494                 sec = MSTK_REG_SEC(regs);
 495         }
 496         prom_printf("\n");
 497
 498         spin_lock_irq(&mostek_lock);
 499
 500         /* Turn off kick start and set a "valid" time and date. */
 501         tmp = mostek_read(regs + MOSTEK_CREG);
 502         tmp |= MSTK_CREG_WRITE;
 503         mostek_write(regs + MOSTEK_CREG, tmp);
 504         tmp = mostek_read(regs + MOSTEK_HOUR);
 505         tmp &= ~MSTK_KICK_START;
 506         mostek_write(regs + MOSTEK_HOUR, tmp);
 507         MSTK_SET_REG_SEC(regs,0);
 508         MSTK_SET_REG_MIN(regs,0);
 509         MSTK_SET_REG_HOUR(regs,0);
 510         MSTK_SET_REG_DOW(regs,5);
 511         MSTK_SET_REG_DOM(regs,1);
 512         MSTK_SET_REG_MONTH(regs,8);
 513         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
 514         tmp = mostek_read(regs + MOSTEK_CREG);
 515         tmp &= ~MSTK_CREG_WRITE;
 516         mostek_write(regs + MOSTEK_CREG, tmp);
 517
 518         spin_unlock_irq(&mostek_lock);
 519
 520         /* Ensure the kick start bit is off. If it isn't, turn it off. */
 521         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
 522                 prom_printf("CLOCK: Kick start still on!\n");
 523
 524                 spin_lock_irq(&mostek_lock);
 525
 526                 tmp = mostek_read(regs + MOSTEK_CREG);
 527                 tmp |= MSTK_CREG_WRITE;
 528                 mostek_write(regs + MOSTEK_CREG, tmp);
 529
 530                 tmp = mostek_read(regs + MOSTEK_HOUR);
 531                 tmp &= ~MSTK_KICK_START;
 532                 mostek_write(regs + MOSTEK_HOUR, tmp);
 533
 534                 tmp = mostek_read(regs + MOSTEK_CREG);
 535                 tmp &= ~MSTK_CREG_WRITE;
 536                 mostek_write(regs + MOSTEK_CREG, tmp);
 537
 538                 spin_unlock_irq(&mostek_lock);
 539         }
 540
 541         prom_printf("CLOCK: Kick start procedure successful.\n");
 542 }
 543
 544 /* Return nonzero if the clock chip battery is low. */
 545 static int __init has_low_battery(void)
 546 {
 547         void __iomem *regs = mstk48t02_regs;
 548         u8 data1, data2;
 549
 550         spin_lock_irq(&mostek_lock);
 551
 552         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
 553         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
 554         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
 555         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
 556
 557         spin_unlock_irq(&mostek_lock);
 558
 559         return (data1 == data2);        /* Was the write blocked? */
 560 }
 561
 562 /* Probe for the real time clock chip. */
 563 static void __init set_system_time(void)
 564 {
 565         unsigned int year, mon, day, hour, min, sec;
 566         void __iomem *mregs = mstk48t02_regs;
 567 #ifdef CONFIG_PCI
 568         unsigned long dregs = ds1287_regs;
 569         void __iomem *bregs = bq4802_regs;
 570 #else
 571         unsigned long dregs = 0UL;
 572         void __iomem *bregs = 0UL;
 573 #endif
 574         u8 tmp;
 575
 576         if (!mregs && !dregs && !bregs) {
 577                 prom_printf("Something wrong, clock regs not mapped yet.\n");
 578                 prom_halt();
 579         }
 580
 581         if (mregs) {
 582                 spin_lock_irq(&mostek_lock);
 583
 584                 /* Traditional Mostek chip. */
 585                 tmp = mostek_read(mregs + MOSTEK_CREG);
 586                 tmp |= MSTK_CREG_READ;
 587                 mostek_write(mregs + MOSTEK_CREG, tmp);
 588
 589                 sec = MSTK_REG_SEC(mregs);
 590                 min = MSTK_REG_MIN(mregs);
 591                 hour = MSTK_REG_HOUR(mregs);
 592                 day = MSTK_REG_DOM(mregs);
 593                 mon = MSTK_REG_MONTH(mregs);
 594                 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
 595         } else if (bregs) {
 596                 unsigned char val = readb(bregs + 0x0e);
 597                 unsigned int century;
 598
 599                 /* BQ4802 RTC chip. */
 600
 601                 writeb(val | 0x08, bregs + 0x0e);
 602
 603                 sec  = readb(bregs + 0x00);
 604                 min  = readb(bregs + 0x02);
 605                 hour = readb(bregs + 0x04);
 606                 day  = readb(bregs + 0x06);
 607                 mon  = readb(bregs + 0x09);
 608                 year = readb(bregs + 0x0a);
 609                 century = readb(bregs + 0x0f);
 610
 611                 writeb(val, bregs + 0x0e);
 612
 613                 BCD_TO_BIN(sec);
 614                 BCD_TO_BIN(min);
 615                 BCD_TO_BIN(hour);
 616                 BCD_TO_BIN(day);
 617                 BCD_TO_BIN(mon);
 618                 BCD_TO_BIN(year);
 619                 BCD_TO_BIN(century);
 620
 621                 year += (century * 100);
 622         } else {
 623                 /* Dallas 12887 RTC chip. */
 624
 625                 do {
 626                         sec  = CMOS_READ(RTC_SECONDS);
 627                         min  = CMOS_READ(RTC_MINUTES);
 628                         hour = CMOS_READ(RTC_HOURS);
 629                         day  = CMOS_READ(RTC_DAY_OF_MONTH);
 630                         mon  = CMOS_READ(RTC_MONTH);
 631                         year = CMOS_READ(RTC_YEAR);
 632                 } while (sec != CMOS_READ(RTC_SECONDS));
 633
 634                 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 635                         BCD_TO_BIN(sec);
 636                         BCD_TO_BIN(min);
 637                         BCD_TO_BIN(hour);
 638                         BCD_TO_BIN(day);
 639                         BCD_TO_BIN(mon);
 640                         BCD_TO_BIN(year);
 641                 }
 642                 if ((year += 1900) < 1970)
 643                         year += 100;
 644         }
 645
 646         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 647         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 648         set_normalized_timespec(&wall_to_monotonic,
 649                                 -xtime.tv_sec, -xtime.tv_nsec);
 650
 651         if (mregs) {
 652                 tmp = mostek_read(mregs + MOSTEK_CREG);
 653                 tmp &= ~MSTK_CREG_READ;
 654                 mostek_write(mregs + MOSTEK_CREG, tmp);
 655
 656                 spin_unlock_irq(&mostek_lock);
 657         }
 658 }
 659
 660 /* davem suggests we keep this within the 4M locked kernel image */
 661 static u32 starfire_get_time(void)
 662 {
 663         static char obp_gettod[32];
 664         static u32 unix_tod;
 665
 666         sprintf(obp_gettod, "h# %08x unix-gettod",
 667                 (unsigned int) (long) &unix_tod);
 668         prom_feval(obp_gettod);
 669
 670         return unix_tod;
 671 }
 672
 673 static int starfire_set_time(u32 val)
 674 {
 675         /* Do nothing, time is set using the service processor
 676          * console on this platform.
 677          */
 678         return 0;
 679 }
 680
 681 static u32 hypervisor_get_time(void)
 682 {
 683         unsigned long ret, time;
 684         int retries = 10000;
 685
 686 retry:
 687         ret = sun4v_tod_get(&time);
 688         if (ret == HV_EOK)
 689                 return time;
 690         if (ret == HV_EWOULDBLOCK) {
 691                 if (--retries > 0) {
 692                         udelay(100);
 693                         goto retry;
 694                 }
 695                 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
 696                 return 0;
 697         }
 698         printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
 699         return 0;
 700 }
 701
 702 static int hypervisor_set_time(u32 secs)
 703 {
 704         unsigned long ret;
 705         int retries = 10000;
 706
 707 retry:
 708         ret = sun4v_tod_set(secs);
 709         if (ret == HV_EOK)
 710                 return 0;
 711         if (ret == HV_EWOULDBLOCK) {
 712                 if (--retries > 0) {
 713                         udelay(100);
 714                         goto retry;
 715                 }
 716                 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
 717                 return -EAGAIN;
 718         }
 719         printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
 720         return -EOPNOTSUPP;
 721 }
 722
 723 static int __init clock_model_matches(const char *model)
 724 {
 725         if (strcmp(model, "mk48t02") &&
 726             strcmp(model, "mk48t08") &&
 727             strcmp(model, "mk48t59") &&
 728             strcmp(model, "m5819") &&
 729             strcmp(model, "m5819p") &&
 730             strcmp(model, "m5823") &&
 731             strcmp(model, "ds1287") &&
 732             strcmp(model, "bq4802"))
 733                 return 0;
 734
 735         return 1;
 736 }
 737
 738 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
 739 {
 740         struct device_node *dp = op->node;
 741         const char *model = of_get_property(dp, "model", NULL);
 742         const char *compat = of_get_property(dp, "compatible", NULL);
 743         unsigned long size, flags;
 744         void __iomem *regs;
 745
 746         if (!model)
 747                 model = compat;
 748
 749         if (!model || !clock_model_matches(model))
 750                 return -ENODEV;
 751
 752         /* On an Enterprise system there can be multiple mostek clocks.
 753          * We should only match the one that is on the central FHC bus.
 754          */
 755         if (!strcmp(dp->parent->name, "fhc") &&
 756             strcmp(dp->parent->parent->name, "central") != 0)
 757                 return -ENODEV;
 758
 759         size = (op->resource[0].end - op->resource[0].start) + 1;
 760         regs = of_ioremap(&op->resource[0], 0, size, "clock");
 761         if (!regs)
 762                 return -ENOMEM;
 763
 764 #ifdef CONFIG_PCI
 765         if (!strcmp(model, "ds1287") ||
 766             !strcmp(model, "m5819") ||
 767             !strcmp(model, "m5819p") ||
 768             !strcmp(model, "m5823")) {
 769                 ds1287_regs = (unsigned long) regs;
 770         } else if (!strcmp(model, "bq4802")) {
 771                 bq4802_regs = regs;
 772         } else
 773 #endif
 774         if (model[5] == '0' && model[6] == '2') {
 775                 mstk48t02_regs = regs;
 776         } else if(model[5] == '0' && model[6] == '8') {
 777                 mstk48t08_regs = regs;
 778                 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
 779         } else {
 780                 mstk48t59_regs = regs;
 781                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 782         }
 783
 784         printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
 785
 786         local_irq_save(flags);
 787
 788         if (mstk48t02_regs != NULL) {
 789                 /* Report a low battery voltage condition. */
 790                 if (has_low_battery())
 791                         prom_printf("NVRAM: Low battery voltage!\n");
 792
 793                 /* Kick start the clock if it is completely stopped. */
 794                 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
 795                         kick_start_clock();
 796         }
 797
 798         set_system_time();
 799
 800         local_irq_restore(flags);
 801
 802         return 0;
 803 }
 804
 805 static struct of_device_id clock_match[] = {
 806         {
 807                 .name = "eeprom",
 808         },
 809         {
 810                 .name = "rtc",
 811         },
 812         {},
 813 };
 814
 815 static struct of_platform_driver clock_driver = {
 816         .name           = "clock",
 817         .match_table    = clock_match,
 818         .probe          = clock_probe,
 819 };
 820
 821 static int __init clock_init(void)
 822 {
 823         if (this_is_starfire) {
 824                 xtime.tv_sec = starfire_get_time();
 825                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 826                 set_normalized_timespec(&wall_to_monotonic,
 827                                         -xtime.tv_sec, -xtime.tv_nsec);
 828                 return 0;
 829         }
 830         if (tlb_type == hypervisor) {
 831                 xtime.tv_sec = hypervisor_get_time();
 832                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 833                 set_normalized_timespec(&wall_to_monotonic,
 834                                         -xtime.tv_sec, -xtime.tv_nsec);
 835                 return 0;
 836         }
 837
 838         return of_register_driver(&clock_driver, &of_bus_type);
 839 }
 840
 841 /* Must be after subsys_initcall() so that busses are probed.  Must
 842  * be before device_initcall() because things like the RTC driver
 843  * need to see the clock registers.
 844  */
 845 fs_initcall(clock_init);
 846
 847 /* This is gets the master TICK_INT timer going. */
 848 static unsigned long sparc64_init_timers(void)
 849 {
 850         struct device_node *dp;
 851         unsigned long clock;
 852 #ifdef CONFIG_SMP
 853         extern void smp_tick_init(void);
 854 #endif
 855
 856         dp = of_find_node_by_path("/");
 857         if (tlb_type == spitfire) {
 858                 unsigned long ver, manuf, impl;
 859
 860                 __asm__ __volatile__ ("rdpr %%ver, %0"
 861                                       : "=&r" (ver));
 862                 manuf = ((ver >> 48) & 0xffff);
 863                 impl = ((ver >> 32) & 0xffff);
 864                 if (manuf == 0x17 && impl == 0x13) {
 865                         /* Hummingbird, aka Ultra-IIe */
 866                         tick_ops = &hbtick_operations;
 867                         clock = of_getintprop_default(dp, "stick-frequency", 0);
 868                 } else {
 869                         tick_ops = &tick_operations;
 870                         clock = local_cpu_data().clock_tick;
 871                 }
 872         } else {
 873                 tick_ops = &stick_operations;
 874                 clock = of_getintprop_default(dp, "stick-frequency", 0);
 875         }
 876
 877 #ifdef CONFIG_SMP
 878         smp_tick_init();
 879 #endif
 880
 881         return clock;
 882 }
 883
 884 struct freq_table {
 885         unsigned long clock_tick_ref;
 886         unsigned int ref_freq;
 887 };
 888 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
 889
 890 unsigned long sparc64_get_clock_tick(unsigned int cpu)
 891 {
 892         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 893
 894         if (ft->clock_tick_ref)
 895                 return ft->clock_tick_ref;
 896         return cpu_data(cpu).clock_tick;
 897 }
 898
 899 #ifdef CONFIG_CPU_FREQ
 900
 901 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
 902                                     void *data)
 903 {
 904         struct cpufreq_freqs *freq = data;
 905         unsigned int cpu = freq->cpu;
 906         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 907
 908         if (!ft->ref_freq) {
 909                 ft->ref_freq = freq->old;
 910                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
 911         }
 912         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
 913             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
 914             (val == CPUFREQ_RESUMECHANGE)) {
 915                 cpu_data(cpu).clock_tick =
 916                         cpufreq_scale(ft->clock_tick_ref,
 917                                       ft->ref_freq,
 918                                       freq->new);
 919         }
 920
 921         return 0;
 922 }
 923
 924 static struct notifier_block sparc64_cpufreq_notifier_block = {
 925         .notifier_call  = sparc64_cpufreq_notifier
 926 };
 927
 928 #endif /* CONFIG_CPU_FREQ */
 929
 930 static int sparc64_next_event(unsigned long delta,
 931                               struct clock_event_device *evt)
 932 {
 933         return tick_ops->add_compare(delta) ? -ETIME : 0;
 934 }
 935
 936 static void sparc64_timer_setup(enum clock_event_mode mode,
 937                                 struct clock_event_device *evt)
 938 {
 939         switch (mode) {
 940         case CLOCK_EVT_MODE_ONESHOT:
 941                 break;
 942
 943         case CLOCK_EVT_MODE_SHUTDOWN:
 944                 tick_ops->disable_irq();
 945                 break;
 946
 947         case CLOCK_EVT_MODE_PERIODIC:
 948         case CLOCK_EVT_MODE_UNUSED:
 949                 WARN_ON(1);
 950                 break;
 951         };
 952 }
 953
 954 static struct clock_event_device sparc64_clockevent = {
 955         .features       = CLOCK_EVT_FEAT_ONESHOT,
 956         .set_mode       = sparc64_timer_setup,
 957         .set_next_event = sparc64_next_event,
 958         .rating         = 100,
 959         .shift          = 30,
 960         .irq            = -1,
 961 };
 962 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
 963
 964 void timer_interrupt(int irq, struct pt_regs *regs)
 965 {
 966         struct pt_regs *old_regs = set_irq_regs(regs);
 967         unsigned long tick_mask = tick_ops->softint_mask;
 968         int cpu = smp_processor_id();
 969         struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
 970
 971         clear_softint(tick_mask);
 972
 973         irq_enter();
 974
 975         kstat_this_cpu.irqs[0]++;
 976
 977         if (unlikely(!evt->event_handler)) {
 978                 printk(KERN_WARNING
 979                        "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
 980         } else
 981                 evt->event_handler(evt);
 982
 983         irq_exit();
 984
 985         set_irq_regs(old_regs);
 986 }
 987
 988 void __devinit setup_sparc64_timer(void)
 989 {
 990         struct clock_event_device *sevt;
 991         unsigned long pstate;
 992
 993         /* Guarantee that the following sequences execute
 994          * uninterrupted.
 995          */
 996         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 997                              "wrpr      %0, %1, %%pstate"
 998                              : "=r" (pstate)
 999                              : "i" (PSTATE_IE));
1000
1001         tick_ops->init_tick();
1002
1003         /* Restore PSTATE_IE. */
1004         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
1005                              : /* no outputs */
1006                              : "r" (pstate));
1007
1008         sevt = &__get_cpu_var(sparc64_events);
1009
1010         memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
1011         sevt->cpumask = cpumask_of_cpu(smp_processor_id());
1012
1013         clockevents_register_device(sevt);
1014 }
1015
1016 #define SPARC64_NSEC_PER_CYC_SHIFT      10UL
1017
1018 static struct clocksource clocksource_tick = {
1019         .rating         = 100,
1020         .mask           = CLOCKSOURCE_MASK(64),
1021         .shift          = 16,
1022         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
1023 };
1024
1025 static void __init setup_clockevent_multiplier(unsigned long hz)
1026 {
1027         unsigned long mult, shift = 32;
1028
1029         while (1) {
1030                 mult = div_sc(hz, NSEC_PER_SEC, shift);
1031                 if (mult && (mult >> 32UL) == 0UL)
1032                         break;
1033
1034                 shift--;
1035         }
1036
1037         sparc64_clockevent.shift = shift;
1038         sparc64_clockevent.mult = mult;
1039 }
1040
1041 void __init time_init(void)
1042 {
1043         unsigned long clock = sparc64_init_timers();
1044
1045         timer_ticks_per_nsec_quotient =
1046                 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
1047
1048         clocksource_tick.name = tick_ops->name;
1049         clocksource_tick.mult =
1050                 clocksource_hz2mult(clock,
1051                                     clocksource_tick.shift);
1052         clocksource_tick.read = tick_ops->get_tick;
1053
1054         printk("clocksource: mult[%x] shift[%d]\n",
1055                clocksource_tick.mult, clocksource_tick.shift);
1056
1057         clocksource_register(&clocksource_tick);
1058
1059         sparc64_clockevent.name = tick_ops->name;
1060
1061         setup_clockevent_multiplier(clock);
1062
1063         sparc64_clockevent.max_delta_ns =
1064                 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent);
1065         sparc64_clockevent.min_delta_ns =
1066                 clockevent_delta2ns(0xF, &sparc64_clockevent);
1067
1068         printk("clockevent: mult[%lx] shift[%d]\n",
1069                sparc64_clockevent.mult, sparc64_clockevent.shift);
1070
1071         setup_sparc64_timer();
1072
1073 #ifdef CONFIG_CPU_FREQ
1074         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1075                                   CPUFREQ_TRANSITION_NOTIFIER);
1076 #endif
1077 }
1078
1079 unsigned long long sched_clock(void)
1080 {
1081         unsigned long ticks = tick_ops->get_tick();
1082
1083         return (ticks * timer_ticks_per_nsec_quotient)
1084                 >> SPARC64_NSEC_PER_CYC_SHIFT;
1085 }
1086
1087 static int set_rtc_mmss(unsigned long nowtime)
1088 {
1089         int real_seconds, real_minutes, chip_minutes;
1090         void __iomem *mregs = mstk48t02_regs;
1091 #ifdef CONFIG_PCI
1092         unsigned long dregs = ds1287_regs;
1093         void __iomem *bregs = bq4802_regs;
1094 #else
1095         unsigned long dregs = 0UL;
1096         void __iomem *bregs = 0UL;
1097 #endif
1098         unsigned long flags;
1099         u8 tmp;
1100
1101         /*
1102          * Not having a register set can lead to trouble.
1103          * Also starfire doesn't have a tod clock.
1104          */
1105         if (!mregs && !dregs & !bregs)
1106                 return -1;
1107
1108         if (mregs) {
1109                 spin_lock_irqsave(&mostek_lock, flags);
1110
1111                 /* Read the current RTC minutes. */
1112                 tmp = mostek_read(mregs + MOSTEK_CREG);
1113                 tmp |= MSTK_CREG_READ;
1114                 mostek_write(mregs + MOSTEK_CREG, tmp);
1115
1116                 chip_minutes = MSTK_REG_MIN(mregs);
1117
1118                 tmp = mostek_read(mregs + MOSTEK_CREG);
1119                 tmp &= ~MSTK_CREG_READ;
1120                 mostek_write(mregs + MOSTEK_CREG, tmp);
1121
1122                 /*
1123                  * since we're only adjusting minutes and seconds,
1124                  * don't interfere with hour overflow. This avoids
1125                  * messing with unknown time zones but requires your
1126                  * RTC not to be off by more than 15 minutes
1127                  */
1128                 real_seconds = nowtime % 60;
1129                 real_minutes = nowtime / 60;
1130                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1131                         real_minutes += 30;     /* correct for half hour time zone */
1132                 real_minutes %= 60;
1133
1134                 if (abs(real_minutes - chip_minutes) < 30) {
1135                         tmp = mostek_read(mregs + MOSTEK_CREG);
1136                         tmp |= MSTK_CREG_WRITE;
1137                         mostek_write(mregs + MOSTEK_CREG, tmp);
1138
1139                         MSTK_SET_REG_SEC(mregs,real_seconds);
1140                         MSTK_SET_REG_MIN(mregs,real_minutes);
1141
1142                         tmp = mostek_read(mregs + MOSTEK_CREG);
1143                         tmp &= ~MSTK_CREG_WRITE;
1144                         mostek_write(mregs + MOSTEK_CREG, tmp);
1145
1146                         spin_unlock_irqrestore(&mostek_lock, flags);
1147
1148                         return 0;
1149                 } else {
1150                         spin_unlock_irqrestore(&mostek_lock, flags);
1151
1152                         return -1;
1153                 }
1154         } else if (bregs) {
1155                 int retval = 0;
1156                 unsigned char val = readb(bregs + 0x0e);
1157
1158                 /* BQ4802 RTC chip. */
1159
1160                 writeb(val | 0x08, bregs + 0x0e);
1161
1162                 chip_minutes = readb(bregs + 0x02);
1163                 BCD_TO_BIN(chip_minutes);
1164                 real_seconds = nowtime % 60;
1165                 real_minutes = nowtime / 60;
1166                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1167                         real_minutes += 30;
1168                 real_minutes %= 60;
1169
1170                 if (abs(real_minutes - chip_minutes) < 30) {
1171                         BIN_TO_BCD(real_seconds);
1172                         BIN_TO_BCD(real_minutes);
1173                         writeb(real_seconds, bregs + 0x00);
1174                         writeb(real_minutes, bregs + 0x02);
1175                 } else {
1176                         printk(KERN_WARNING
1177                                "set_rtc_mmss: can't update from %d to %d\n",
1178                                chip_minutes, real_minutes);
1179                         retval = -1;
1180                 }
1181
1182                 writeb(val, bregs + 0x0e);
1183
1184                 return retval;
1185         } else {
1186                 int retval = 0;
1187                 unsigned char save_control, save_freq_select;
1188
1189                 /* Stolen from arch/i386/kernel/time.c, see there for
1190                  * credits and descriptive comments.
1191                  */
1192                 spin_lock_irqsave(&rtc_lock, flags);
1193                 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1194                 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1195
1196                 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1197                 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1198
1199                 chip_minutes = CMOS_READ(RTC_MINUTES);
1200                 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1201                         BCD_TO_BIN(chip_minutes);
1202                 real_seconds = nowtime % 60;
1203                 real_minutes = nowtime / 60;
1204                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1205                         real_minutes += 30;
1206                 real_minutes %= 60;
1207
1208                 if (abs(real_minutes - chip_minutes) < 30) {
1209                         if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1210                                 BIN_TO_BCD(real_seconds);
1211                                 BIN_TO_BCD(real_minutes);
1212                         }
1213                         CMOS_WRITE(real_seconds,RTC_SECONDS);
1214                         CMOS_WRITE(real_minutes,RTC_MINUTES);
1215                 } else {
1216                         printk(KERN_WARNING
1217                                "set_rtc_mmss: can't update from %d to %d\n",
1218                                chip_minutes, real_minutes);
1219                         retval = -1;
1220                 }
1221
1222                 CMOS_WRITE(save_control, RTC_CONTROL);
1223                 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1224                 spin_unlock_irqrestore(&rtc_lock, flags);
1225
1226                 return retval;
1227         }
1228 }
1229
1230 #define RTC_IS_OPEN             0x01    /* means /dev/rtc is in use     */
1231 static unsigned char mini_rtc_status;   /* bitmapped status byte.       */
1232
1233 #define FEBRUARY        2
1234 #define STARTOFTIME     1970
1235 #define SECDAY          86400L
1236 #define SECYR           (SECDAY * 365)
1237 #define leapyear(year)          ((year) % 4 == 0 && \
1238                                  ((year) % 100 != 0 || (year) % 400 == 0))
1239 #define days_in_year(a)         (leapyear(a) ? 366 : 365)
1240 #define days_in_month(a)        (month_days[(a) - 1])
1241
1242 static int month_days[12] = {
1243         31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1244 };
1245
1246 /*
1247  * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1248  */
1249 static void GregorianDay(struct rtc_time * tm)
1250 {
1251         int leapsToDate;
1252         int lastYear;
1253         int day;
1254         int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1255
1256         lastYear = tm->tm_year - 1;
1257
1258         /*
1259          * Number of leap corrections to apply up to end of last year
1260          */
1261         leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1262
1263         /*
1264          * This year is a leap year if it is divisible by 4 except when it is
1265          * divisible by 100 unless it is divisible by 400
1266          *
1267          * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1268          */
1269         day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1270
1271         day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1272                    tm->tm_mday;
1273
1274         tm->tm_wday = day % 7;
1275 }
1276
1277 static void to_tm(int tim, struct rtc_time *tm)
1278 {
1279         register int    i;
1280         register long   hms, day;
1281
1282         day = tim / SECDAY;
1283         hms = tim % SECDAY;
1284
1285         /* Hours, minutes, seconds are easy */
1286         tm->tm_hour = hms / 3600;
1287         tm->tm_min = (hms % 3600) / 60;
1288         tm->tm_sec = (hms % 3600) % 60;
1289
1290         /* Number of years in days */
1291         for (i = STARTOFTIME; day >= days_in_year(i); i++)
1292                 day -= days_in_year(i);
1293         tm->tm_year = i;
1294
1295         /* Number of months in days left */
1296         if (leapyear(tm->tm_year))
1297                 days_in_month(FEBRUARY) = 29;
1298         for (i = 1; day >= days_in_month(i); i++)
1299                 day -= days_in_month(i);
1300         days_in_month(FEBRUARY) = 28;
1301         tm->tm_mon = i;
1302
1303         /* Days are what is left over (+1) from all that. */
1304         tm->tm_mday = day + 1;
1305
1306         /*
1307          * Determine the day of week
1308          */
1309         GregorianDay(tm);
1310 }
1311
1312 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1313  * aka Unix time.  So we have to convert to/from rtc_time.
1314  */
1315 static void starfire_get_rtc_time(struct rtc_time *time)
1316 {
1317         u32 seconds = starfire_get_time();
1318
1319         to_tm(seconds, time);
1320         time->tm_year -= 1900;
1321         time->tm_mon -= 1;
1322 }
1323
1324 static int starfire_set_rtc_time(struct rtc_time *time)
1325 {
1326         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1327                              time->tm_mday, time->tm_hour,
1328                              time->tm_min, time->tm_sec);
1329
1330         return starfire_set_time(seconds);
1331 }
1332
1333 static void hypervisor_get_rtc_time(struct rtc_time *time)
1334 {
1335         u32 seconds = hypervisor_get_time();
1336
1337         to_tm(seconds, time);
1338         time->tm_year -= 1900;
1339         time->tm_mon -= 1;
1340 }
1341
1342 static int hypervisor_set_rtc_time(struct rtc_time *time)
1343 {
1344         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1345                              time->tm_mday, time->tm_hour,
1346                              time->tm_min, time->tm_sec);
1347
1348         return hypervisor_set_time(seconds);
1349 }
1350
1351 #ifdef CONFIG_PCI
1352 static void bq4802_get_rtc_time(struct rtc_time *time)
1353 {
1354         unsigned char val = readb(bq4802_regs + 0x0e);
1355         unsigned int century;
1356
1357         writeb(val | 0x08, bq4802_regs + 0x0e);
1358
1359         time->tm_sec = readb(bq4802_regs + 0x00);
1360         time->tm_min = readb(bq4802_regs + 0x02);
1361         time->tm_hour = readb(bq4802_regs + 0x04);
1362         time->tm_mday = readb(bq4802_regs + 0x06);
1363         time->tm_mon = readb(bq4802_regs + 0x09);
1364         time->tm_year = readb(bq4802_regs + 0x0a);
1365         time->tm_wday = readb(bq4802_regs + 0x08);
1366         century = readb(bq4802_regs + 0x0f);
1367
1368         writeb(val, bq4802_regs + 0x0e);
1369
1370         BCD_TO_BIN(time->tm_sec);
1371         BCD_TO_BIN(time->tm_min);
1372         BCD_TO_BIN(time->tm_hour);
1373         BCD_TO_BIN(time->tm_mday);
1374         BCD_TO_BIN(time->tm_mon);
1375         BCD_TO_BIN(time->tm_year);
1376         BCD_TO_BIN(time->tm_wday);
1377         BCD_TO_BIN(century);
1378
1379         time->tm_year += (century * 100);
1380         time->tm_year -= 1900;
1381
1382         time->tm_mon--;
1383 }
1384
1385 static int bq4802_set_rtc_time(struct rtc_time *time)
1386 {
1387         unsigned char val = readb(bq4802_regs + 0x0e);
1388         unsigned char sec, min, hrs, day, mon, yrs, century;
1389         unsigned int year;
1390
1391         year = time->tm_year + 1900;
1392         century = year / 100;
1393         yrs = year % 100;
1394
1395         mon = time->tm_mon + 1;   /* tm_mon starts at zero */
1396         day = time->tm_mday;
1397         hrs = time->tm_hour;
1398         min = time->tm_min;
1399         sec = time->tm_sec;
1400
1401         BIN_TO_BCD(sec);
1402         BIN_TO_BCD(min);
1403         BIN_TO_BCD(hrs);
1404         BIN_TO_BCD(day);
1405         BIN_TO_BCD(mon);
1406         BIN_TO_BCD(yrs);
1407         BIN_TO_BCD(century);
1408
1409         writeb(val | 0x08, bq4802_regs + 0x0e);
1410
1411         writeb(sec, bq4802_regs + 0x00);
1412         writeb(min, bq4802_regs + 0x02);
1413         writeb(hrs, bq4802_regs + 0x04);
1414         writeb(day, bq4802_regs + 0x06);
1415         writeb(mon, bq4802_regs + 0x09);
1416         writeb(yrs, bq4802_regs + 0x0a);
1417         writeb(century, bq4802_regs + 0x0f);
1418
1419         writeb(val, bq4802_regs + 0x0e);
1420
1421         return 0;
1422 }
1423 #endif /* CONFIG_PCI */
1424
1425 struct mini_rtc_ops {
1426         void (*get_rtc_time)(struct rtc_time *);
1427         int (*set_rtc_time)(struct rtc_time *);
1428 };
1429
1430 static struct mini_rtc_ops starfire_rtc_ops = {
1431         .get_rtc_time = starfire_get_rtc_time,
1432         .set_rtc_time = starfire_set_rtc_time,
1433 };
1434
1435 static struct mini_rtc_ops hypervisor_rtc_ops = {
1436         .get_rtc_time = hypervisor_get_rtc_time,
1437         .set_rtc_time = hypervisor_set_rtc_time,
1438 };
1439
1440 #ifdef CONFIG_PCI
1441 static struct mini_rtc_ops bq4802_rtc_ops = {
1442         .get_rtc_time = bq4802_get_rtc_time,
1443         .set_rtc_time = bq4802_set_rtc_time,
1444 };
1445 #endif /* CONFIG_PCI */
1446
1447 static struct mini_rtc_ops *mini_rtc_ops;
1448
1449 static inline void mini_get_rtc_time(struct rtc_time *time)
1450 {
1451         unsigned long flags;
1452
1453         spin_lock_irqsave(&rtc_lock, flags);
1454         mini_rtc_ops->get_rtc_time(time);
1455         spin_unlock_irqrestore(&rtc_lock, flags);
1456 }
1457
1458 static inline int mini_set_rtc_time(struct rtc_time *time)
1459 {
1460         unsigned long flags;
1461         int err;
1462
1463         spin_lock_irqsave(&rtc_lock, flags);
1464         err = mini_rtc_ops->set_rtc_time(time);
1465         spin_unlock_irqrestore(&rtc_lock, flags);
1466
1467         return err;
1468 }
1469
1470 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1471                           unsigned int cmd, unsigned long arg)
1472 {
1473         struct rtc_time wtime;
1474         void __user *argp = (void __user *)arg;
1475
1476         switch (cmd) {
1477
1478         case RTC_PLL_GET:
1479                 return -EINVAL;
1480
1481         case RTC_PLL_SET:
1482                 return -EINVAL;
1483
1484         case RTC_UIE_OFF:       /* disable ints from RTC updates.       */
1485                 return 0;
1486
1487         case RTC_UIE_ON:        /* enable ints for RTC updates. */
1488                 return -EINVAL;
1489
1490         case RTC_RD_TIME:       /* Read the time/date from RTC  */
1491                 /* this doesn't get week-day, who cares */
1492                 memset(&wtime, 0, sizeof(wtime));
1493                 mini_get_rtc_time(&wtime);
1494
1495                 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1496
1497         case RTC_SET_TIME:      /* Set the RTC */
1498             {
1499                 int year, days;
1500
1501                 if (!capable(CAP_SYS_TIME))
1502                         return -EACCES;
1503
1504                 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1505                         return -EFAULT;
1506
1507                 year = wtime.tm_year + 1900;
1508                 days = month_days[wtime.tm_mon] +
1509                        ((wtime.tm_mon == 1) && leapyear(year));
1510
1511                 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1512                     (wtime.tm_mday < 1))
1513                         return -EINVAL;
1514
1515                 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1516                         return -EINVAL;
1517
1518                 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1519                     wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1520                     wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1521                         return -EINVAL;
1522
1523                 return mini_set_rtc_time(&wtime);
1524             }
1525         }
1526
1527         return -EINVAL;
1528 }
1529
1530 static int mini_rtc_open(struct inode *inode, struct file *file)
1531 {
1532         if (mini_rtc_status & RTC_IS_OPEN)
1533                 return -EBUSY;
1534
1535         mini_rtc_status |= RTC_IS_OPEN;
1536
1537         return 0;
1538 }
1539
1540 static int mini_rtc_release(struct inode *inode, struct file *file)
1541 {
1542         mini_rtc_status &= ~RTC_IS_OPEN;
1543         return 0;
1544 }
1545
1546
1547 static const struct file_operations mini_rtc_fops = {
1548         .owner          = THIS_MODULE,
1549         .ioctl          = mini_rtc_ioctl,
1550         .open           = mini_rtc_open,
1551         .release        = mini_rtc_release,
1552 };
1553
1554 static struct miscdevice rtc_mini_dev =
1555 {
1556         .minor          = RTC_MINOR,
1557         .name           = "rtc",
1558         .fops           = &mini_rtc_fops,
1559 };
1560
1561 static int __init rtc_mini_init(void)
1562 {
1563         int retval;
1564
1565         if (tlb_type == hypervisor)
1566                 mini_rtc_ops = &hypervisor_rtc_ops;
1567         else if (this_is_starfire)
1568                 mini_rtc_ops = &starfire_rtc_ops;
1569 #ifdef CONFIG_PCI
1570         else if (bq4802_regs)
1571                 mini_rtc_ops = &bq4802_rtc_ops;
1572 #endif /* CONFIG_PCI */
1573         else
1574                 return -ENODEV;
1575
1576         printk(KERN_INFO "Mini RTC Driver\n");
1577
1578         retval = misc_register(&rtc_mini_dev);
1579         if (retval < 0)
1580                 return retval;
1581
1582         return 0;
1583 }
1584
1585 static void __exit rtc_mini_exit(void)
1586 {
1587         misc_deregister(&rtc_mini_dev);
1588 }
1589
1590
1591 module_init(rtc_mini_init);
1592 module_exit(rtc_mini_exit);