Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...
[linux-2.6] / arch / s390 / kernel / reipl64.S
1 /*
2  *  arch/s390/kernel/reipl.S
3  *
4  *  S390 version
5  *    Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
7                  Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
8  */
9
10 #include <asm/lowcore.h>
11                 .globl  do_reipl_asm
12 do_reipl_asm:   basr    %r13,0
13 .Lpg0:          lpswe   .Lnewpsw-.Lpg0(%r13)
14 .Lpg1:          # do store status of all registers
15
16                 stg     %r1,.Lregsave-.Lpg0(%r13)
17                 lghi    %r1,0x1000
18                 stmg    %r0,%r15,__LC_GPREGS_SAVE_AREA-0x1000(%r1)
19                 lg      %r0,.Lregsave-.Lpg0(%r13)
20                 stg     %r0,__LC_GPREGS_SAVE_AREA-0x1000+8(%r1)
21                 stctg   %c0,%c15,__LC_CREGS_SAVE_AREA-0x1000(%r1)
22                 stam    %a0,%a15,__LC_AREGS_SAVE_AREA-0x1000(%r1)
23                 mvc     __LC_PREFIX_SAVE_AREA-0x1000(4,%r1),dump_prefix_page-.Lpg0(%r13)
24                 stfpc   __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
25                 stckc   .Lclkcmp-.Lpg0(%r13)
26                 mvc     __LC_CLOCK_COMP_SAVE_AREA-0x1000(8,%r1),.Lclkcmp-.Lpg0(%r13)
27                 stpt    __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
28                 stg     %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
29
30                 lctlg   %c6,%c6,.Lall-.Lpg0(%r13)
31                 lgr     %r1,%r2
32                 mvc     __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
33                 stsch   .Lschib-.Lpg0(%r13)
34                 oi      .Lschib+5-.Lpg0(%r13),0x84
35 .Lecs:          xi      .Lschib+27-.Lpg0(%r13),0x01
36                 msch    .Lschib-.Lpg0(%r13)
37                 lghi    %r0,5
38 .Lssch:         ssch    .Liplorb-.Lpg0(%r13)
39                 jz      .L001
40                 brct    %r0,.Lssch
41                 bas     %r14,.Ldisab-.Lpg0(%r13)
42 .L001:          mvc     __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
43 .Ltpi:          lpswe   .Lwaitpsw-.Lpg0(%r13)
44 .Lcont:         c       %r1,__LC_SUBCHANNEL_ID
45                 jnz     .Ltpi
46                 clc     __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
47                 jnz     .Ltpi
48                 tsch    .Liplirb-.Lpg0(%r13)
49                 tm      .Liplirb+9-.Lpg0(%r13),0xbf
50                 jz      .L002
51                 bas     %r14,.Ldisab-.Lpg0(%r13)
52 .L002:          tm      .Liplirb+8-.Lpg0(%r13),0xf3
53                 jz      .L003
54                 bas     %r14,.Ldisab-.Lpg0(%r13)
55 .L003:          st      %r1,__LC_SUBCHANNEL_ID
56                 lhi     %r1,0            # mode 0 = esa
57                 slr     %r0,%r0          # set cpuid to zero
58                 sigp    %r1,%r0,0x12     # switch to esa mode
59                 lpsw    0
60 .Ldisab:        sll     %r14,1
61                 srl     %r14,1           # need to kill hi bit to avoid specification exceptions.
62                 st      %r14,.Ldispsw+12-.Lpg0(%r13)
63                 lpswe   .Ldispsw-.Lpg0(%r13)
64                 .align  8
65 .Lclkcmp:       .quad   0x0000000000000000
66 .Lall:          .quad   0x00000000ff000000
67 .Lregsave:      .quad   0x0000000000000000
68                 .align  16
69 /*
70  * These addresses have to be 31 bit otherwise
71  * the sigp will throw a specifcation exception
72  * when switching to ESA mode as bit 31 be set
73  * in the ESA psw.
74  * Bit 31 of the addresses has to be 0 for the
75  * 31bit lpswe instruction a fact they appear to have
76  * ommited from the pop.
77  */
78 .Lnewpsw:       .quad   0x0000000080000000
79                 .quad   .Lpg1
80 .Lpcnew:        .quad   0x0000000080000000
81                 .quad   .Lecs
82 .Lionew:        .quad   0x0000000080000000
83                 .quad   .Lcont
84 .Lwaitpsw:      .quad   0x0202000080000000
85                 .quad   .Ltpi
86 .Ldispsw:       .quad   0x0002000080000000
87                 .quad   0x0000000000000000
88 .Liplccws:      .long   0x02000000,0x60000018
89                 .long   0x08000008,0x20000001
90 .Liplorb:       .long   0x0049504c,0x0040ff80
91                 .long   0x00000000+.Liplccws
92 .Lschib:        .long   0x00000000,0x00000000
93                 .long   0x00000000,0x00000000
94                 .long   0x00000000,0x00000000
95                 .long   0x00000000,0x00000000
96                 .long   0x00000000,0x00000000
97                 .long   0x00000000,0x00000000
98 .Liplirb:       .long   0x00000000,0x00000000
99                 .long   0x00000000,0x00000000
100                 .long   0x00000000,0x00000000
101                 .long   0x00000000,0x00000000
102                 .long   0x00000000,0x00000000
103                 .long   0x00000000,0x00000000
104                 .long   0x00000000,0x00000000
105                 .long   0x00000000,0x00000000
106         .globl dump_prefix_page
107 dump_prefix_page:
108         .long 0x00000000